U.S. patent application number 13/758334 was filed with the patent office on 2013-06-13 for method of manufacturing semiconductor device and substrate processing apparatus.
This patent application is currently assigned to HITACHI KOKUSAI ELECTRIC INC.. The applicant listed for this patent is Hitachi Kokusai Electric Inc.. Invention is credited to Yasunobu KOSHI, Kiyohiko MAEDA, Keigo NISHIDA.
Application Number | 20130149846 13/758334 |
Document ID | / |
Family ID | 45772751 |
Filed Date | 2013-06-13 |
United States Patent
Application |
20130149846 |
Kind Code |
A1 |
KOSHI; Yasunobu ; et
al. |
June 13, 2013 |
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE
PROCESSING APPARATUS
Abstract
A film is formed on a substrate by performing a cycle at least
twice, the cycle including a nucleus formation process for forming
nuclei on the substrate and a nucleus growth suppression process
for suppressing growth of the nuclei. A time required for the
nucleus growth suppression process is less than or equal to a time
required for the nucleus formation process. Alternatively, the
nucleus formation process is further performed after the cycle is
repeatedly performed a plurality of times.
Inventors: |
KOSHI; Yasunobu;
(Hakusan-City, JP) ; NISHIDA; Keigo;
(Kahoku-county, JP) ; MAEDA; Kiyohiko; (Imizu-shi,
JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Hitachi Kokusai Electric Inc.; |
Tokyo |
|
JP |
|
|
Assignee: |
HITACHI KOKUSAI ELECTRIC
INC.
Tokyo
JP
|
Family ID: |
45772751 |
Appl. No.: |
13/758334 |
Filed: |
February 4, 2013 |
Current U.S.
Class: |
438/478 ;
118/696 |
Current CPC
Class: |
H01L 21/02532 20130101;
C23C 16/0236 20130101; H01L 21/0245 20130101; H01L 21/0262
20130101; C23C 16/45544 20130101; C23C 16/24 20130101; H01L
21/02592 20130101; C23C 16/45523 20130101; C23C 16/52 20130101 |
Class at
Publication: |
438/478 ;
118/696 |
International
Class: |
H01L 21/02 20060101
H01L021/02 |
Foreign Application Data
Date |
Code |
Application Number |
Sep 1, 2010 |
JP |
2010-195662 |
Claims
1. A method of manufacturing a semiconductor device, comprising
forming a silicon film by performing a cycle at least twice, the
cycle including a nucleus growth suppression process of supplying a
chlorine-containing gas onto a substrate to suppress a growth of
nuclei and control a local growth of silicon on the substrate and a
nucleus formation process of supplying a silicon-containing gas
onto the substrate to form silicon nuclei on the substrate, wherein
a time required for the nucleus growth suppression process is less
than or equal to a time required for the nucleus formation
process.
2. A substrate processing apparatus comprising: a process chamber
configured to process a substrate; a chlorine-containing gas supply
system configured to supply at least a chlorine-containing gas into
the process chamber; a silicon-containing gas supply system
configured to supply at least a silicon-containing gas into the
process chamber; and a controller configured to control at least
the chlorine-containing gas supply system and the
silicon-containing gas supply system to form a silicon film by
performing a cycle at least twice, the cycle including a nucleus
growth suppression process of supplying the chlorine-containing gas
onto the substrate to suppress a growth of nuclei and control a
local growth of silicon on the substrate and a nucleus formation
process of supplying the silicon-containing gas onto the substrate
to form silicon nuclei on the substrate, wherein a time required
for the nucleus growth suppression process is less than or equal to
a time required for the nucleus formation process.
3. The method of claim 1, further comprising performing the nucleus
formation process after the cycle is performed at least twice.
4. The method of claim 1, wherein the time required for the nucleus
growth suppression process is 0.4 to 1 times the time required for
the nucleus formation process.
Description
CROSS-REFERENCE TO RELATED PATENT APPLICATION
[0001] This U.S. non-provisional patent application claims priority
under 35 U.S.C. .sctn.119 of Japanese Patent Application No.
2010-195662, filed on Sep. 1, 2010, in the Japanese Patent Office,
and International Patent Application No. PCT/JP2011/069319, filed
on Aug. 26, 2011, in the WIPO, the entire contents of which are
hereby incorporated by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a method of manufacturing a
semiconductor device including a substrate processing process, and
a substrate processing apparatus, and more particularly, to a
method of manufacturing a semiconductor device including forming a
silicon film and a substrate processing apparatus.
[0004] 2. Description of the Related Art
[0005] In one process of a manufacturing process of a semiconductor
device, a NAND flash memory developed after 2X-nm NAND flash memory
has been suggested to be applied to a terabit cell array transistor
(TCAT) using either a floating gate (FG) structure including a
silicon film or the silicon film as a channel of a longitudinal
transistor and to bit-cost scalable (BICS) technology so as to
prevent interference from occurring between adjacent cells and
reduce bit costs.
[0006] However, when the silicon film is used in this case, the
roughness (Rms) of the silicon film may be degraded, thereby
preventing high carrier mobility from being achieved. Also, when
the silicon film is used as a part of a semiconductor device, the
performance of the semiconductor device may not be sufficiently
exhibited, thereby lowering the throughput.
[0007] On the other hand, Japanese Patent Application Laid-Open No.
H7-249600 discloses that after a silicon film is formed, a surface
of the silicon film is polished using an abrasive to planarize the
surface of the silicon film.
SUMMARY OF THE INVENTION
[0008] However, pollutants or particles may be generated during
polishing of a surface of a silicon film and may then be mixed with
a substrate including the silicon film. In this case, the quality
of the substrate or the performance of a semiconductor device may
be degraded.
[0009] It is an object of the present invention to provide a method
of manufacturing a semiconductor device, which is capable of
preventing the quality of a substrate or the performance of the
semiconductor device from being degraded, and a substrate
processing apparatus.
[0010] According to one aspect of the present invention, there is
provided a method of manufacturing a semiconductor device, the
method including forming a silicon film by performing a cycle at
least twice, the cycle including a nucleus growth suppression
process for supplying a chlorine-containing gas onto a substrate to
suppress a growth of nuclei and control a local growth of silicon
on the substrate and a nucleus formation process for supplying a
silicon-containing gas onto the substrate to form silicon nuclei on
the substrate, wherein a time required for the nucleus growth
suppression process is less than or equal to a time required for
the nucleus formation process.
[0011] According to another aspect of the present invention, there
is provided a substrate processing apparatus including a process
chamber configured to process a substrate; a chlorine-containing
gas supply system configured to supply at least a
chlorine-containing gas into the process chamber; a
silicon-containing gas supply system configured to supply at least
a silicon-containing gas into the process chamber; and a controller
configured to control at least the chlorine-containing gas supply
system and the silicon-containing gas supply system to form a
silicon film by performing a cycle at least twice including a
nucleus growth suppression process for supplying the
chlorine-containing gas onto the substrate to suppress a growth of
nuclei and control a local growth of silicon on the substrate and a
nucleus formation process for supplying the silicon-containing gas
onto the substrate to form silicon nuclei on the substrate, wherein
a time required for the nucleus growth suppression process is less
than or equal to a time required for the nucleus formation
process.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] FIG. 1 is a perspective view of a semiconductor
manufacturing apparatus according to a first embodiment of the
present invention.
[0013] FIG. 2 shows a side cross-section of a structure of a
processing furnace and each part of the substrate manufacturing
apparatus according to the first embodiment of the present
invention.
[0014] FIG. 3 is a schematic view of the processing furnace and
peripheral structures of the substrate manufacturing apparatus
according to the first embodiment of the present invention.
[0015] FIGS. 4A to 4D are schematic views illustrating a state of a
substrate according to each process in the first embodiment of the
present invention.
[0016] FIG. 5 is a graph showing a result of forming a silicon film
according to the first embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
First Embodiment
[0017] Hereinafter, the first embodiment of the present invention
will be described in detail with reference to the appended
drawings. FIG. 1 is a perspective view of a semiconductor
manufacturing apparatus 10 as a substrate processing apparatus
according to the first embodiment of the present invention. The
semiconductor manufacturing apparatus 10 is a batch-type vertical
heat treatment apparatus and includes a housing 12 in which main
parts are disposed. In the semiconductor manufacturing device 10, a
Front Opening Unified Pod (FOUP) (hereinafter referred to as a pod)
16 which is a substrate receiver that receives a wafer 200 as a
substrate formed of, for example, silicon (Si) or silicon carbide
(SiC) is used as a wafer carrier. A pod stage 18 is disposed in
front of the housing 12, and the pod 16 is conveyed to the pod
stage 18. For example, 25 sheets of wafers 200 are received in the
pod 16, and the pod 16 is dosed with a cover and then placed on the
pod stage 18.
[0018] In the housing 12, a pod conveying device 20 is disposed at
a front side of the housing 12 to face the pod stage 18. A pod
shelf 22, a pod opener 24, and a substrate number detector 26 are
disposed near the pod conveying device 20. The pod shelf 22 is
disposed above the pod opener 24 and configured to hold a plurality
of pods 16 while placing the plurality of pods 16. The substrate
number detector 26 is disposed adjacent to the pod opener 24. The
pod conveying device 20 conveys the pod 16 among the pod stage 18,
the pod shelf 22, and the pod opener 24. The pod opener 24 opens
the cover of the pod 16, and the substrate number detector 26
detects the number of the wafers 200 in the pod 16, the cover of
which is open.
[0019] In the housing 12, a substrate transfer machine 28 and a
boat 217 which is a substrate holder are disposed. The substrate
transfer machine 28 may include an arm (tweezers) 32, and is
configured to be vertically rotated by a driving unit (not shown).
The arm 32 may be used to take out, for example, five sheets of
wafers 200. By moving the arm 32, the wafers 200 are transferred
between the pod 16 disposed on a location of the pod opener 24 and
the boat 217.
[0020] FIG. 2 is a schematic longitudinal cross-sectional view of a
structure of a processing furnace 202 of a substrate processing
apparatus according to an embodiment of the present invention.
[0021] As illustrated in FIG. 2, the processing furnace 202
includes a heater 206 as a heating device. The heater 206 has a
tube shape, e.g., a cylindrical shape, and is vertically installed
and supported by a heater base (not shown) which is a holding
plate.
[0022] In the heater 206, a process tube 203 as a reaction tube
having a concentric shape with the heater 206 is provided. The
process tube 203 includes an inner tube 204 which is an internal
reaction tube, and an outer tube 205 which is an external reaction
tube installed at an outer side thereof. The inner tube 204 is
formed of a heat-resistive material, e.g., quartz (SiO.sub.2) or
silicon carbide (SiC), and has a cylindrical shape having open
upper and lower portions. A process chamber 201 is formed in a
hollow portion of the inner tube 204. The process chamber 201 is
configured to receive the wafers 200 as substrates, in a state in
which the wafers 200 are arranged in a vertically multi-layered
structure in a horizontal posture using the boat 217 which will be
described in detail below. The outer tube 205 is formed of a
heat-resistive material, e.g., quartz (SiO.sub.2) or silicon
carbide (SiC). The outer tube 205 has an internal diameter that is
greater than an external diameter of the inner tube 204, has a
cylindrical shape, an upper end of which is closed and a lower end
of which is open, and has a concentric shape with the inner tube
204.
[0023] A manifold 209 is provided below the outer tube 205 to have
a concentric shape with the outer tube 205. The manifold 209 is
formed of, for example, stainless steel, and has a cylindrical
shape, upper and lower ends of which are open. The manifold 209 is
engaged with the inner tube 204 and the outer tube 205 to support
the inner tube 204 and the outer tube 205. An O-ring 220a is
installed as a sealing member between the manifold 209 and the
outer tube 205. Since the manifold 209 is supported by the heater
base (not shown), the process tube 203 is vertically maintained. A
reaction container is formed mainly by the process tube 203 and the
manifold 209.
[0024] In the manifold 209, nozzles 230a, 230b, and 230c which are
gas injection ports are installed to communicate with the inside of
the process chamber 201. Gas supply pipes 232a, 232b, and 232c are
connected to the nozzles 230a, 230b, and 230c, respectively. A
silicon-containing gas source 300a, a chlorine-containing gas
source 300b, and an inert gas source 300c are connected to upstream
sides of the gas supply pipes 232a, 232b, and 232c which are
opposite to sides of the gas supply pipes 232a, 232b, and 232c
connected to the nozzles 230a, 230b, and 230c via mass flow
controllers (MFCs) 241a, 241b, and 241c which are gas flow rate
controllers and valves 310a, 310b, and 310c which are switching
devices. A gas flow rate control unit 235 is electrically connected
to the MFCs 241a, 241b, and 241c so as to control a flow rate of
gas to be supplied in a desired level at a desired timing.
[0025] The nozzle 230a that supplies a silicon-containing gas,
e.g., disilane gas (Si.sub.2H.sub.6), is formed of, for example, a
quartz material and is installed in the manifold 209 to pass
through the manifold 209. At least one nozzle 230a is located below
rather than the range which is opposite the heater 206, and is
installed in the range which is opposite manifold 209, and may be
configured to supply the silicon-containing gas into the process
chamber 201. The nozzle 230a is connected to the gas supply pipe
232a. The gas supply pipe 232a is connected to the
silicon-containing gas source 300a that supplies the
silicon-containing gas, e.g., the disilane gas (Si.sub.2H.sub.6)
via the MFC 241a as a flow rate controller (flow rate control
member) and the valve 310a. Thus, the supply flow rate,
concentration, and partial pressure of the silicon-containing gas,
e.g., the disilane gas (Si.sub.2H.sub.6), which is supplied to the
process chamber 201 may be controlled. A silicon-containing gas
supply system provided as a gas supply system is mainly configured
by the silicon-containing gas source 300a, the valve 310a, the MFC
241a, the gas supply pipe 232a, and the nozzle 230a.
[0026] The nozzle 230b that supplies a chlorine-containing gas,
e.g., dichlorosilane gas (SiH.sub.2Cl.sub.2) is formed of, for
example, a quartz material, and is installed in the manifold 209 to
pass through the manifold 209. At least one nozzle 230b is located
below rather than the range which is opposite the heater 206, and
is installed in the range which is opposite manifold 209, and may
be configured to supply the chlorine-containing gas into the
process chamber 201. The nozzle 230b is connected to the gas supply
pipe 232b. The gas supply pipe 232b is connected to the
chlorine-containing gas source 300b that supplies the
chlorine-containing gas, e.g., the dichlorosilane gas
(SiH.sub.2Cl.sub.2) via the MFC 241b as a flow rate controller
(flow rate control member) and the valve 310b. Thus, the supply
flow rate, concentration, and partial pressure of the
chlorine-containing gas, e.g., the dichlorosilane gas
(SiH.sub.2Cl.sub.2), which is supplied into the process chamber 201
may be controlled. A chlorine-containing gas supply system provided
as a gas supply system is mainly configured by the
chlorine-containing gas source 300b, the valve 310b, the MFC 241b,
the gas supply pipe 232b, and the nozzle 230b.
[0027] The nozzle 230c that supplies an inert gas, e.g., nitrogen
gas (N.sub.2), may be formed of, for example, a quartz material,
and is formed in the manifold 209 to pass through the manifold 209.
At least one nozzle 230c is located below rather than the range
which is opposite the heater 206, and is installed in the range
which is opposite manifold 209, and may be configured to supply the
inert gas into the process chamber 201. The nozzle 230c is
connected to the gas supply pipe 232c. The gas supply pipe 232c is
connected to the inert gas source 300c that supplies the inert gas,
e.g., the nitrogen gas (N.sub.2) via the MFC 241c as a flow rate
controller (flow rate control member) and the valve 310c. Thus, the
supply flow rate, concentration, and partial pressure of the inert
gas, e.g., the nitrogen gas (N.sub.2), which is supplied to the
process chamber 201 may be controlled. An inert gas supply system
provided as a gas supply system is mainly configured by the inert
gas source 300c, the valve 310c, the MFC 241c, the gas supply pipe
232c, and the nozzle 230c.
[0028] The gas flow rate control unit 235 is electrically connected
to the valves 310a, 310b, and 310c and the MFCs 241a, 241b, and
241c so as to control a gas supply amount, start of the gas supply,
and end of the gas supply at desired timings.
[0029] Although, in the present embodiment, the nozzles 230a, 230b,
and 230c are installed in the range which is opposite 209, the
present invention is not limited thereto. For example, at least
some of the nozzles 230a, 230b, and 230c may located below rather
than the range which is opposite the heater 206 so as to supply the
silicon-containing gas, the chlorine-containing gas, or the inert
gas to a process region of a wafer. For example, at least one
L-shaped nozzle may be used, and a location at which gas is
supplied may extend to the process region of the wafer in order to
supply gas from at least one location to a region near the wafer.
Furthermore, the nozzles 230a, 230b, and 230c may be installed in a
region facing either the manifold 209 or the heater 206.
[0030] Also, although, in the present embodiment, the disilane gas
(Si2H6) is used as the silicon-containing gas, the present
invention is not limited thereto and a high-order silane gas, e.g.,
silane gas (SiH.sub.4) or trisilane gas (Si.sub.3H.sub.8), or a
combination of such high-degree silane gases may be used.
[0031] Also, although, in the present embodiment, the
dichlorosilane gas (SiH.sub.2Cl.sub.2) is used as the
chlorine-containing gas, the present invention is not limited
thereto. For example, a chloro silane-based gas, e.g.,
trichlorosilane gas (SiHCl.sub.3) or tetrachlorosilane gas
(SiCl.sub.4), chlorine gas (Cl.sub.2) or hydrogen chloride gas
(HCl), or a combination thereof may be used.
[0032] Also, although, in the present embodiment, nitrogen gas
(N.sub.2) is used as the inert gas, the present invention is not
limited thereto. For example, a rare gas, e.g., helium gas (He),
neon gas (Ne), or argon gas (Ar), may be used or a combination of
nitrogen gas (N.sub.2) and a rare gas may be used.
[0033] In the manifold 209, an exhaust pipe 231 is installed to
exhaust an atmosphere in the process chamber 201. The exhaust pipe
231 is disposed at a lower end portion of a tube-shaped space 250
formed by a gap between the inner tube 204 and the outer tube 205,
and connects to the tube-shaped space 250. A vacuum exhaust device
246, e.g., a vacuum pump, is connected to a downstream side of the
exhaust pipe 231 which is opposite to a side of the exhaust pipe
231 connected to the manifold 209 via a pressure sensor 245 which
senses pressure and a pressure control device 242. The vacuum
exhaust device 246 is configured to perform vacuum-exhaust in such
a manner that pressure in the process chamber 201 may be equal to a
predetermined pressure (predetermined degree of vacuum). The
pressure control device 242 and the pressure sensor 245 are
electrically connected to a pressure control unit 236. The pressure
control unit 236 is configured to control the pressure control
device 242, based on pressure sensed by the pressure sensor 245 at
a desired timing so that the pressure in the process chamber 201
may be equal to a desired pressure.
[0034] A seal cap 219 is installed below the manifold 209 and
functions as a furnace port lid configured to air-tightly close a
lower end opening of the manifold 209. The seal cap 219 is
configured to abut a lower end of the manifold 209 from a lower
side in a vertical direction. The seal cap 219 is formed of, for
example, stainless steel, and has a disc shape. An O-ring 220b
which is a seal member that abuts a lower end of the manifold 209
is disposed on an upper surface of the seal cap 219. At a side of
the seal cap 219 opposite to the process chamber 201, a rotation
mechanism 254 is installed to rotate the boat 217. A rotation shaft
255 of the rotation mechanism 254 passes through the seal cap 219
to be connected to the boat 217 which will be described in detail
below. The rotation mechanism 254 is configured to rotate the
wafers 200 by rotating the boat 217. The seal cap 219 is configured
to be vertically moved by a boat elevator 115 which is an elevating
mechanism vertically installed outside the process tube 203. By
vertically moving the seal cap 219, the boat 217 may be loaded into
or unloaded from the process chamber 201. The rotation mechanism
254 and the boat elevator 115 are electrically connected to a
driving control unit 237 so as to be controlled to perform a
desired operation at a desired timing.
[0035] The boat 217 which is a substrate holder is formed of a
heat-resistive material, e.g., quartz or silicon carbide, and is
configured to hold a plurality of sheets of wafers 200 in the form
of a multi-layer structure by arranging the plurality of sheets of
wafers 200 horizontally and concentrically. A plurality of sheets
of insulating plates 216 formed of a heat-resistive material, e.g.,
quartz or silicon carbide, and having disc shapes are each
horizontally placed below the boat 217 to form a multi-layer
structure. Thus, heat generated from the heater 206 may be
prevented from being delivered to the manifold 209.
[0036] In the process tube 203, a temperature sensor 263 is
installed to sense temperature. A temperature control unit 238 is
electrically connected to the heater 206 and the temperature sensor
263 so as to control the process chamber 201 to have a desired
temperature distribution at a desired timing by controlling supply
of current to the heater 206, based on temperature information
sensed by the temperature sensor 263.
[0037] The gas flow rate control unit 235, the pressure control
unit 236, the driving control unit 237, and the temperature control
unit 238 form a manipulation unit and an input/output (I/O) unit,
and are electrically connected to a main control unit 239 that
controls overall operations of the substrate processing apparatus.
The gas flow rate control unit 235, the pressure control unit 236,
the driving control unit 237, the temperature control unit 238, and
the main control unit 239 form a controller 240.
[0038] Next, a method of forming a silicon film on a wafer 200 by
chemical vapor deposition (CVD) using the processing furnace 202
described above, which is a process included in a method of
manufacturing a semiconductor device, will be described below. In
the description below, operations of the elements of the substrate
processing apparatus are controlled by the controller 240.
[0039] When several sheets of wafers 200 are loaded into the boat
217 (wafer charging), the boat 217 holding the several sheets of
wafers 200 is lifted by the boat elevator 115 to be loaded into the
process chamber 201 (boat loading) as illustrated in FIG. 2. In
this state, the seal cap 219 seals the lower end of the manifold
209 via the O-ring 220b.
[0040] The inside of the process chamber 201 is vacuum-exhausted to
a desired degree of pressure (degree of vacuum) by the vacuum
exhaust device 246. In this case, pressure in the process chamber
201 is measured by the pressure sensor 245, and is
feedback-controlled by the pressure control device 242, based on
the measured pressure. The process chamber 201 is heated by the
heater 206 so that the inside of the process chamber 201 has a
desired temperature. In this case, a flow of current supplied to
the heater 206 is feedback-controlled based on the temperature
information sensed by the temperature sensor 263, so that the
inside of the process chamber 201 may have a desired temperature
distribution. Then, the wafers 200 are rotated by rotating the boat
217 by the rotation mechanism 254.
[0041] Then, as illustrated in FIG. 2, for example, a
silicon-containing gas is supplied as process gas from the
silicon-containing gas source 300a. The silicon-containing gas, the
flow rate of which is controlled to a desired level by the MFC 241a
is introduced into the process chamber 201 through the gas supply
pipe 232a and the nozzle 230a. Then, the introduced
silicon-containing gas moves upward in the process chamber 201, is
discharged into the cylindrical space 250 through an upper end
opening of the inner tube 204, and is then exhausted via the
exhaust pipe 231. The silicon-containing gas contacts the surface
of the wafer 200 when the silicon-containing gas passes through the
process chamber 201. In this case, a film, e.g., a silicon film, is
deposited on the wafers 200 by a thermal CVD reaction.
[0042] After a predetermined time has elapsed, an inert gas, the
flow rate of which is controlled to a desired level by the MFC
241c, is supplied from the inert gas source 300c to replace the
atmosphere in the process chamber 201 with the inert gas, thereby
allowing the pressure in the process chamber 201 to return to a
normal pressure.
[0043] Then, the seal cap 219 is moved downward by the boat
elevator 115 to open the lower end of the manifold 209, and the
processed wafer 200 is unloaded from the lower end of the manifold
209 to the outside of the process tube 203 while being held by the
boat 217 (boat unloading). Then, the processed wafer 200 is
discharged from the boat 217 (wafer discharging).
[0044] Next, a method of forming a film according to the first
embodiment of the present invention will be described in greater
detail. By using the semiconductor manufacturing apparatus 10
described above, a desired film is formed on a substrate as
described below according to a process included in a method of
manufacturing a semiconductor device.
[0045] FIGS. 4A to 4D are diagrams illustrating a state of a
substrate according to each process in the first embodiment of the
present invention. As illustrated in FIGS. 4A to 4D, according to
the first embodiment of the present invention, a
chlorine-containing gas and a silicon-containing gas are supplied
onto a wafer 200 which is a substrate to form a silicon film having
a predetermined thickness thereon. Thus, the silicon film having
the predetermined thickness may be formed by controlling a
thickness distribution in a plane of the silicon film formed on the
wafer 200, as will be described in detail below.
[0046] First, each process will be described in detail below.
[0047] <Nucleus Growth Suppression Process>
[0048] This process is performed to suppress local growth of nuclei
(impurities generated on a substrate in an initial stage, formed
silicon nuclei, etc.) by partially removing the nuclei or
suppressing the growth of the nuclei. As described above, while
silicon nuclei are formed on the wafer 200, the growth of the
silicon nuclei is suppressed by supplying the chlorine-containing
gas for a predetermined time, suppressing the growth of the formed
silicon nuclei illustrated in FIG. 4A and separating some silicon
nuclei from the wafer 200, as illustrated in FIG. 4B.
[0049] Although, in the present embodiment, dichlorosilane
(SiH.sub.2Cl.sub.2) gas is used as the chlorine-containing gas, the
present invention is not limited thereto. For example,
trichlorosilane gas (SiHCl.sub.3), tetrachlorosilane gas
(SiCl.sub.4), chlorine gas (Cl.sub.2), hydrogen chloride gas (HCl),
or a combination thereof may be used.
[0050] As an example, in the present embodiment, conditions of
processing the wafer 200 in the process chamber 201, i.e.,
conditions of suppressing the growth of the silicon nuclei on the
wafer 200 using the dichlorosilane (SiH.sub.2Cl.sub.2) gas, may
include the following:
[0051] Process temperature: equal to or greater than 300.degree. C.
and is less than or equal to 500.degree. C.,
[0052] Process pressure: equal to or greater than 10 Pa and is less
than or equal to 1,330 Pa, and
[0053] Supply flow rate of the dichlorosilane (SiH.sub.2Cl.sub.2)
gas: equal to or greater than 10 sccm and is less than or equal to
5,000 sccm,
[0054] By maintaining the above conditions to fall constantly
within the ranges described above, the growth of the silicon nuclei
on the wafer 200 may be suppressed.
[0055] <Nucleus Formation Process>
[0056] This operation is performed to form silicon nuclei on the
wafer 200 which is the substrate. The silicon nuclei can be formed
on the entire wafer 200 by repeatedly performing one cycle
including the nucleus growth suppression process and the nucleus
formation process twice or more. A process of forming a film, e.g.,
an amorphous silicon film, on the wafer 200 formed of silicon will
now be described. As illustrated in FIG. 4A, at least
silicon-containing gas is supplied into the process chamber 201 for
a predetermined time so as to form silicon nuclei on the wafer
200.
[0057] Silane gas (SiH.sub.4), disilane gas (Si.sub.2H.sub.6), or a
combination thereof may be used as the silicon-containing gas.
[0058] As an example, in the present embodiment, conditions of
processing the wafer 200 in the process chamber 201, i.e.,
conditions of forming the silicon nuclei on the wafer 200 using the
disilane gas (Si.sub.2H.sub.6), may include the following:
[0059] Process temperature: equal to or greater than 300.degree. C.
and is less than or equal to 500.degree. C.,
[0060] Process pressure: equal to or greater than 10 Pa and is less
than or equal to 1,330 Pa, and
[0061] Supply flow rate of the disilane gas (Si.sub.2H.sub.6):
equal to or greater than 10 sccm and is less than or equal to 5,000
sccm
[0062] By maintaining the above conditions to fall constantly
within the ranges described above, the silicon nuclei may be formed
on the wafer 200.
[0063] After the nucleus growth suppression process is performed,
the nucleus formation process is performed to form the silicon
nuclei on the wafer 200, thereby forming new silicon nuclei as
illustrated in FIG. 4C. By repeatedly performing one cycle
including the nucleus growth suppression process (see FIG. 4B) and
the nucleus formation process (see FIG. 4C) twice or more, silicon
nuclei are evenly formed on the wafer 200 as illustrated in FIG.
4D. Then, a silicon film is formed on the wafer 200 by growing the
formed silicon nuclei.
[0064] Here, a mechanism of controlling the growth of the silicon
nuclei will be described.
[0065] The silicon nuclei formed on the wafer 200 may be coarsened
to grow as the silicon film by further supplying the
silicon-containing gas. However, when the silicon nuclei are
coarsened to grow as the silicon film, although the growth of the
formed silicon nuclei is promoted, silicon nuclei are formed late
on portions of the wafer 200 at which no silicon nuclei are
present. Thus, the sizes of the silicon nuclei formed on the wafer
200 may not be the same. In this case, the silicon film formed on
the wafer 200 has an uneven thickness distribution.
[0066] Accordingly, according to the present embodiment, as
described above, first, the silicon-containing gas is first
supplied once for a predetermined time, and then, the
chlorine-containing gas is supplied to delay the coarsening of the
silicon nuclei formed on the wafer 200 when the silicon-containing
gas was supplied once. Then, the silicon-containing gas is supplied
for a predetermined time so as to form silicon nuclei on portions
of the wafer 200 on which no silicon nuclei were formed when the
silicon-containing gas was first supplied. That is, the sizes of
silicon nuclei can be uniformized by forming new silicon nuclei
while suppressing the growth of silicon nuclei that are first
formed.
[0067] As described above, silicon nucleus growth suppression and
silicon nucleus formation may be repeatedly performed to evenly
form silicon nuclei on the wafer 200. Also, the thickness
distribution of the formed silicon film on the wafer 200 may be
improved by controlling the growth of the evenly formed silicon
nuclei.
[0068] An oxide silicon film may be formed on the wafer 200, and an
amorphous silicon film may be formed on the oxide silicon film as
described above. Thus, since an adhesive strength between the
amorphous silicon film and the oxide silicon film is high, it is
possible to prevent the performance of a semiconductor device from
being degraded and the throughput from being lowered.
[0069] Also, preprocessing may be performed before the nucleus
formation process is performed. Thus, impurities adhered onto the
wafer 200 may be removed to form the silicon film without causing
the growth of the silicon nuclei to be interfered with by the
impurities.
[0070] Also, the atmosphere in a reaction furnace may be replaced
with vacuum or nitrogen gas (N.sub.2) by supplying the nitrogen gas
between the nucleus growth suppression process and the nucleus
formation process. Thus, it is possible to efficiently react gases
supplied during the processes.
[0071] Although formation of a film by CVD has been described
above, the present invention is not limited thereto, and for
example, atomic layer deposition (ALD) may be used.
[0072] After a series of processes are completed, the supply of
such process gases is suspended, and inert gas is supplied from an
inert gas source to replace the atmosphere in the process chamber
201 with the inert gas, thereby returning the pressure in the
process chamber 201 to a normal pressure.
[0073] Then, the seal cap 219 is moved downward by a lifting motor
122 to open the lower end of the manifold 209, the boat 217 holding
the processed wafer 200 is unloaded from the lower end of the
manifold 209 to the outside of the process chamber 201 (boat
unloading), and the boat 217 stands by at a predetermined location
until all wafers 200 supported in the boat 217 are cooled. When the
stand-by wafers 200 in the boat 217 are cooled to a predetermined
temperature, the wafers 200 are unloaded from the boat 218 by the
substrate transfer unit 28, and transferred to and received in the
pod 16 that is unoccupied and set in the pod opener 24. Then, the
pod 16 receiving the wafers 200 is transferred to the pod shelf 22
or the pod stage 18 by the pod conveying device 20, thereby
completing the operations of the semiconductor manufacture
apparatus 10.
[0074] A result of forming a film as described above will now be
described. FIG. 5 is a graph showing a result of forming a silicon
film as described above. Sample data in the graph of FIG. 5 shows
results when a time required to form nuclei was X [sec.] and when
times required to suppress the growth of the nuclei were 0.4X, X,
and 2X [sec.]. In the graph of FIG. 5, the right vertical axis
denotes a thickness [.ANG.] of a silicon film formed on a wafer
according to each of conditions, the left vertical axis denotes a
variation in thickness distribution [.ANG.] of the silicon film on
the wafer, and the horizontal axis denotes a ratio [-] between a
time required for nucleus formation suppression and a time required
for nucleus formation. The variation in the thickness distribution
[.ANG.] denotes the difference between a maximum thickness and a
minimum thickness of the silicon film on the wafer. When the
variation in the thickness distribution [.ANG.] is small, it means
that the formed silicon film is evenly formed on the wafer.
[0075] Referring to FIG. 5, as a time required to perform nucleus
growth suppression was relatively longer than a time required to
perform nucleus formation, i.e., as the ratio [-] between the time
required for nucleus formation suppression and the time required
for nucleus formation approached zero, the speed of forming a film
gradually decreased. Also, as the time required to perform nucleus
growth suppression became longer than that required to perform
nucleus formation (when the ratio [-] between the time required for
nucleus formation suppression and the time required for nucleus
formation exceeded `1.0`), the variation in the thickness
distribution [.ANG.] gradually increased. Thus, if this ratio [-]
is equal to or greater than `0.4` and is less than or equal to `1`,
a silicon film having a less variation in the thickness
distribution [.ANG.] may be formed.
[0076] According to the present embodiment, at least one or more of
the following advantages may be achieved:
[0077] (1) A silicon film having an improved thickness distribution
can be formed.
[0078] (2) An insulating film of silicon can be evenly formed,
particularly, when (1) is applied to a semiconductor manufacture
process.
[0079] (3) In relation to (1), a time required for nucleus growth
suppression may be between 0.4 and 1 times a time required for
nucleus formation.
[0080] (4) Good step coverage can be achieved particularly when (1)
is applied to a trench structure having a high aspect ratio or the
like.
[0081] (5) A semiconductor device having high performance can be
stably manufactured, thereby improving the throughput.
Second Embodiment
[0082] Next, a second embodiment of the present invention will be
described. The second embodiment is a modified example of the first
embodiment of the present invention, in which nucleus formation is
performed to form a film after repeatedly performing one cycle
including a nucleus growth suppression process and a nucleus
formation process twice or more, as will be described in detail
below.
[0083] Each of the processes will now be described in detail.
[0084] <Nucleus Growth Suppression Process>
[0085] As described above, while silicon nuclei are formed on the
wafer 200, the growth of the formed silicon nuclei is controlled by
supplying a chlorine-containing gas for a predetermined time.
[0086] Although, in the present embodiment, dichlorosilane gas
(SiH.sub.2Cl.sub.2) is used as the chlorine-containing gas, the
present invention is not limited thereto. For example,
trichlorosilane gas (SiHCl.sub.3), tetrachlorosilane gas
(SiCl.sub.4), chlorine gas (Cl.sub.2), hydrogen chloride gas (HCl),
or a combination thereof may be used.
[0087] As an example, in the present embodiment, conditions of
processing the wafer 200 in the process chamber 201, i.e.,
conditions of suppressing the growth of the silicon nuclei on the
wafer 200 using the dichlorosilane gas (SiH.sub.2Cl.sub.2), may
include the following:
[0088] Process temperature: equal to or greater than 300.degree. C.
and is less than or equal to 500.degree. C.,
[0089] Process pressure: equal to or greater than 10 Pa and is less
than or equal to 1,330 Pa, and
[0090] Supply flow rate of the dichlorosilane gas
(SiH.sub.2Cl.sub.2): equal to or greater than 10 sccm and is less
than or equal to 5,000 sccm
[0091] By maintaining the above conditions to fall constantly
within the ranges described above, the growth of the silicon nuclei
on the wafer 200 may be suppressed.
[0092] <Nucleus Formation Process>
[0093] A process of forming a film, e.g., an amorphous silicon
film, on the wafer 200 which is a substrate formed of silicon will
now be described. In this process, silicon nuclei are formed on the
wafer 200 by supplying at least silicon-containing gas into the
process chamber 201.
[0094] Silane gas (SiH.sub.4), disilane gas (Si.sub.2H.sub.6), or a
combination thereof may be used as the silicon-containing gas.
[0095] As an example, in the present embodiment, conditions of
processing the wafer 200 in the process chamber 201, i.e.,
conditions of forming silicon nuclei on the wafer 200 using the
disilane gas (Si.sub.2H.sub.6), may include the following:
[0096] Process temperature: equal to or greater than 300.degree. C.
and is less than or equal to 500.degree. C.,
[0097] Process pressure: equal to or greater than 10 Pa and is less
than or equal to 1,330 Pa, and
[0098] Supply flow rate of the disilane gas (Si.sub.2H.sub.6):
equal to or greater than 10 sccm and is less than or equal to 5,000
sccm
[0099] By maintaining the above conditions to fall constantly
within the ranges described above, the silicon nuclei may be formed
on the wafer 200.
[0100] <Nucleus Growth Process>
[0101] This process is performed to grow the silicon nuclei formed
on the entire wafer 200 after one cycle including the nucleus
growth suppression process and the nucleus formation process is
performed twice or more. As described above, while the silicon
nuclei are evenly formed on the wafer 200, a silicon film is formed
by supplying a silicon-containing gas for a predetermined time to
grow the formed silicon nuclei.
[0102] Silane gas (SiH.sub.4), disilane gas (Si.sub.2H.sub.6), or a
combination thereof may be used as the silicon-containing gas.
[0103] As an example, in the present embodiment, conditions of
processing the wafer 200 in the process chamber 201, i.e.,
conditions of controlling the growth of the silicon nuclei on the
wafer 200 by using the silane gas (SiH.sub.4), may include the
following:
[0104] Process temperature: equal to or greater than 300.degree. C.
and is less than or equal to 500.degree. C.,
[0105] Process pressure: equal to or greater than 10 Pa and is less
than or equal to 1,330 Pa, and
[0106] Supply flow rate of the silane gas (SiH.sub.4): equal to or
greater than 10 sccm and is less than or equal to 5,000 sccm
[0107] By maintaining the above conditions to fall constantly
within the ranges described above, the silicon nuclei formed on the
wafer 200 may be grown to become a silicon film.
[0108] Accordingly, the silicon film may be formed by efficiently
growing the silicon nuclei evenly formed on the wafer 200.
[0109] According to the present embodiment, at least one of the
following advantages may be further achieved, in addition to the
advantages that may be achieved according to the first
embodiment.
[0110] (1) A silicon film can be formed by efficiently growing the
silicon nuclei.
[0111] (2) In relation to (1), consumption of a source gas can be
reduced.
[0112] The present invention may be applied not only to batch-type
apparatuses but also to single-type apparatuses.
[0113] Also, the preset invention has been described above with
respect to formation of a polysilicon film, but may also be applied
to formation of an epitaxial film or a CVD film, e.g., a silicon
nitride film.
[0114] According to the present invention, degradation in the
quality of a substrate or the performance of a semiconductor device
can be prevented.
* * * * *