U.S. patent application number 13/477128 was filed with the patent office on 2013-03-14 for back-surface-incidence-type semiconductor light receiving element.
This patent application is currently assigned to MITSUBISHI ELECTRIC CORPORATION. The applicant listed for this patent is Yasuhiro KUNITSUGU, Yasuo NAKAJIMA, Hitoshi TADA. Invention is credited to Yasuhiro KUNITSUGU, Yasuo NAKAJIMA, Hitoshi TADA.
Application Number | 20130062718 13/477128 |
Document ID | / |
Family ID | 47829089 |
Filed Date | 2013-03-14 |
United States Patent
Application |
20130062718 |
Kind Code |
A1 |
TADA; Hitoshi ; et
al. |
March 14, 2013 |
BACK-SURFACE-INCIDENCE-TYPE SEMICONDUCTOR LIGHT RECEIVING
ELEMENT
Abstract
A back-surface-incidence semiconductor light element includes: a
semiconductor substrate of a first conductivity type; a first
semiconductor layer of a first conductivity type on the
semiconductor substrate; a light absorbing layer on the first
semiconductor layer; a second semiconductor layer on the light
absorbing layer; and an impurity diffusion region of a second
conductivity type in a portion of the second semiconductor layer. A
region including a p-n junction between the first semiconductor
layer and the impurity diffusion region, and extending through the
light absorbing layer, is a light detecting portion that detects
light incident on a back surface of the semiconductor substrate. A
groove in the back surface of the semiconductor substrate surrounds
the light detecting portion, as viewed in plan.
Inventors: |
TADA; Hitoshi; (Tokyo,
JP) ; NAKAJIMA; Yasuo; (Tokyo, JP) ;
KUNITSUGU; Yasuhiro; (Tokyo, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
TADA; Hitoshi
NAKAJIMA; Yasuo
KUNITSUGU; Yasuhiro |
Tokyo
Tokyo
Tokyo |
|
JP
JP
JP |
|
|
Assignee: |
MITSUBISHI ELECTRIC
CORPORATION
Tokyo
JP
|
Family ID: |
47829089 |
Appl. No.: |
13/477128 |
Filed: |
May 22, 2012 |
Current U.S.
Class: |
257/432 ;
257/E31.128 |
Current CPC
Class: |
H01L 31/02327 20130101;
H01L 31/105 20130101; Y02E 10/50 20130101; H01L 31/035281
20130101 |
Class at
Publication: |
257/432 ;
257/E31.128 |
International
Class: |
H01L 31/0232 20060101
H01L031/0232 |
Foreign Application Data
Date |
Code |
Application Number |
Sep 9, 2011 |
JP |
2011-196694 |
Claims
1. A back-surface-incidence semiconductor light detecting element
comprising: a semiconductor substrate of a first conductivity type;
a first semiconductor layer of a first conductivity type on the
semiconductor substrate; a light absorbing layer on the first
semiconductor layer; a second semiconductor layer on the light
absorbing layer; and an impurity diffusion region of a second
conductivity type in a portion of the second semiconductor layer,
wherein a region including a p-n junction between the first
semiconductor layer and the impurity diffusion region, and
extending through the light absorbing layer, is a light detecting
portion that detects incident light incident on a back surface of
the semiconductor substrate, and the back surface of the
semiconductor substrate includes a groove surrounding the light
detecting portion, as viewed in plan.
2. The back-surface-incidence semiconductor light detecting element
according to claim 1, wherein the groove reaches a position near an
interface between the semiconductor substrate and the first
semiconductor layer.
3. The back-surface-incidence semiconductor light detecting element
according to claim 1, further comprising a reflecting film,
reflecting the incident light, located on a side wall of the
groove.
4. The back-surface-incidence semiconductor light detecting element
according to claim 1, wherein the back surface of the semiconductor
substrate and a side wall of the groove form an angle smaller than
90 degrees.
5. The back-surface-incidence semiconductor light detecting element
according to claim 1, further comprising a low-reflection film
having a reflectance of 1% or less to the incident light incident
on a light detecting region in the back surface of the
semiconductor substrate and that is surrounded by the groove.
6. The back-surface-incidence semiconductor light detecting element
according to claim 1, further comprising a convex lens in a light
detecting region in the back surface of the semiconductor substrate
and that is surrounded by the groove.
Description
BACKGROUND OF THE INVENTION
[0001] The present invention relates to a
back-surface-incidence-type semiconductor light receiving element
that receives light incident on the back surface of a semiconductor
substrate.
[0002] Background Art
[0003] With the increase in amount of information in communications
in recent years, schemes to develop optical transmission systems
having higher capacities through higher transmission speeds using
semiconductor lasers and optical fibers have been pursued. There is
also a strong demand for increasing the response speed of
semiconductor light receiving elements used in optical transmission
systems. It is necessary that semiconductor light receiving
elements used in optical transmission systems absorb incident light
in the 1.3 .mu.m or 1.55 .mu.m band. Therefore, p-i-n photodiodes
in which an InP substrate is used are ordinarily used as
semiconductor light receiving elements in optical transmission
systems.
[0004] In improving the response speed of a p-i-n photodiode, it is
effective to reduce the capacitance of the element by reducing the
area of the light receiving portion (p-n junction). For example,
enabling operation at 40 Gbits/sec requires reducing the diameter
of the light receiving portion to about 10 .mu.m.
[0005] A front-surface-incidence-type p-i-n photodiode, however, is
lower in efficiency due to blocking of incident light by an
electrode provided on the element surface. It is, therefore,
difficult to reduce the diameter of the light receiving portion of
this type of photodiode. Therefore, a back-surface-incidence-type
photodiode unsusceptible to the influence of the electrode even
when the diameter of the light receiving portion is reduced is
suitable for a system that needs to be capable of response at a
high speed of 10 Gbits/sec or higher.
[0006] However, it is becoming difficult to make even a
back-surface-incidence-type photodiode capable of response at a
high speed of 40 Gbits/sec or higher probably needed in future.
Thickening the light absorbing layer for the purpose of reducing
the capacitance is conceivable. However, the time during which
electrons and positive holes produced in the light absorbing layer
move in the light absorbing layer is increased, resulting in
degradation in response characteristics. As a solution to this
problem, a technique for collecting light with a collective lens
provided outside a light receiving element and causing the light to
enter the light receiving element has been proposed (see, for
example, Japanese Patent Laid-Open No. 2008-270679).
SUMMARY OF THE INVENTION
[0007] If the semiconductor substrate is reduced in thickness when
a back-surface-incidence-type semiconductor light receiving element
is manufactured, the strength of the semiconductor substrate is
reduced so that a crack can be caused in the substrate in the
manufacturing process. Considering this, it is necessary to set the
thickness of the semiconductor substrate to about 100 .mu.m.
Therefore, even if light is collected with a collective lens,
incident light is scattered in the thick semiconductor substrate,
resulting in a reduction in efficiency. With the reduction in light
receiving area for the purpose of increasing the response speed, it
becomes more important to consider scattering of light in the
semiconductor substrate.
[0008] In view of the above-described problems, an object of the
present invention is to provide a back-surface-incidence-type
semiconductor light receiving element which can improve the
response speed and the efficiency.
[0009] According to the present invention, a
back-surface-incidence-type semiconductor light receiving element
comprises: a semiconductor substrate of a first conductivity type;
a first semiconductor layer of a first conductivity type on the
semiconductor substrate; a light absorbing layer on the first
semiconductor layer; a second semiconductor layer on the light
absorbing layer; and an impurity diffusion region of a second
conductivity type in a portion of the second semiconductor layer,
wherein a portion in which a p-n junction is provided between the
first semiconductor layer and the impurity diffusion region through
the light absorbing layer is a light receiving portion that
receives incident light on a back surface of the semiconductor
substrate, and a groove is provided in the back surface of the
semiconductor substrate so as to surround the light receiving
portion as viewed in plan.
[0010] The present invention makes it possible to improve the
response speed and the efficiency.
[0011] Other and further objects, features and advantages of the
invention will appear more fully from the following
description.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] FIG. 1 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a first
embodiment of the present invention.
[0013] FIGS. 2-7 show process steps of manufacturing the
back-surface-incidence-type semiconductor light receiving element
according to the first embodiment.
[0014] FIG. 8 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a second
embodiment of the present invention.
[0015] FIG. 9 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a third
embodiment of the present invention.
[0016] FIG. 10 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a fourth
embodiment of the present invention.
[0017] FIG. 11 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a fifth
embodiment of the present invention.
[0018] FIG. 12 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a sixth
embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0019] A back-surface-incidence-type semiconductor light receiving
element according to the embodiments of the present invention will
be described with reference to the drawings. The same components
will be denoted by the same symbols, and the repeated description
thereof may be omitted.
[0020] First Embodiment
[0021] FIG. 1 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a first
embodiment of the present invention. An n-type InP layer 2, an
InGaAs light absorbing layer 3, an undoped InP layer 4 are
successively provided on an n-type InP substrate 1.
[0022] A p-type impurity diffusion region 5 doped with Zn is
provided in a portion of the undoped InP layer 4. An InP buried
layer 6 is provided on opposite sides of the p-type impurity
diffusion region 5. An SiN film 7 is provided on the undoped InP
layer 4 and the InP buried layer 6. An opening is formed in the SiN
film 7 above the p-type impurity diffusion region 5. A p-side ohmic
electrode 8 is provided through this opening on the p-type impurity
diffusion region 5.
[0023] A portion in which a p-n junction is formed between the
n-type InP layer 2 and the p-type impurity diffusion region 5
through the InGaAs light absorbing layer 3 is a light receiving
portion 9 that receives light incident on the back surface of the
n-type
[0024] InP substrate 1. A groove 10 is provided in the back surface
of the n-type InP substrate 1 so as to surround the light receiving
portion 9 as viewed in plan.
[0025] An n-side ohmic electrode 11 is provided on the back surface
of the n-type InP substrate 1. The n-side ohmic electrode 11 has an
opening containing the light receiving portion 9 as viewed in plan.
The groove 10 is provided in the opening of the n-side ohmic
electrode 11.
[0026] A method of manufacturing the back-surface-incidence-type
semiconductor light receiving element according to the first
embodiment will be described. First, as shown in FIG. 2, the n-type
InP layer 2, the InGaAs light absorbing layer 3 and the undoped InP
layer 4 are successively grown on the n-type InP substrate 1.
[0027] Next, as shown in FIG. 3, an SiO.sub.2 film 12 in the form
of a disk having a diameter of 20 .mu.m (film thickness: 200 nm) is
formed on the undoped InP layer 4 so as to cover the light
receiving portion 9. Portions of the layers from the surface of the
undoped InP layer 4 to an intermediate position in the n-type InP
layer 2 are removed by etching using the SiO.sub.2 film 12 as a
mask. The diameter of the SiO.sub.2 film 12 is not limited to 20
.mu.m. A different size of the SiO.sub.2 film 12 may be selected as
long as the necessary element capacitance can be realized.
[0028] Next, as shown in FIG. 4, the InP buried layer 6 is grown to
be buried. It is desirable that the InP buried layer 6 have a high
resistance. However, it is difficult to grow an InP layer having an
insulating property. Therefore the InP layer is doped with Fe or
Ru, for example.
[0029] Next, as shown in FIG. 5, the SiO.sub.2 film 12 is removed
and an SiO.sub.2 film 13 is formed on the wafer surface. An opening
is formed in the SiO.sub.2 film 13 at the light receiving portion
9. A ZnO film that serves as a diffusion source is formed on the
SiO.sub.2 film 13 and Zn is diffused in circular form with a
diameter of 10 .mu.m from the wafer surface to the light receiving
portion 9. Thermal diffusion processing is performed to form the
p-type impurity diffusion region 5. Zn diffusion is performed until
the diffusion front reaches a position in the InGaAs light
absorbing layer 3.
[0030] Next, as shown in FIG. 6, the SiN film 7 is formed as a
surface protective film on the wafer surface after removal of the
SiO.sub.2 film 13 and the ZnO film. The p-side ohmic electrode 8 is
formed on the p-type impurity diffusion region 5. A contact layer
of InGaAsP, InGaAs or the like having a bandgap smaller than that
of InP may be provided on the undoped InP layer 4. Also, part of
the SiN film 7 may exist between the p-side ohmic electrode 8 and a
semiconductor layer. Next, as shown in FIG. 7, the thickness of the
n-type InP substrate 1 is reduced to about 100.mu.m. The groove 10
is formed by etching in the back surface of the n-type InP
substrate 1 so as to surround the light receiving portion 9 as
viewed in plan. The groove 10 has a diameter of about 50 .mu.m
width of 10 .mu.m, and a depth of about 10 .mu.m. When the
thickness of the n-type InP substrate 1 is 100 .mu.m, the diameter
of the groove 10 may be set larger by about 30 to 50 .mu.m than
that of the light receiving portion 9.
[0031] Finally, as shown in FIG. 1, the n-side ohmic electrode 11
is formed on the back surface of the n-type InP substrate 1. By the
above-described processes, the back-surface-incidence-type
semiconductor light receiving element according to the present
embodiment is manufactured.
[0032] The effects of the present embodiment will be described.
Incident light is sent from an optical fiber or an optical
waveguide placed at a distance of several ten to several hundred
.mu.m from the light receiving element and therefore includes not
only light perpendicularly incident on the back surface of the
n-type InP substrate 1 but also light obliquely incident on the
back surface. In the present embodiment, the groove 10 is provided
in the back surface of the n-type InP substrate 1 so as to surround
the light receiving portion 9 as viewed in plan. Obliquely incident
light is totally reflected by the groove 10 surrounding the light
receiving portion 9 to propagate to the light receiving portion 9
with efficiency. As a result, the amount of incident light reaching
the light receiving portion 9 is increased, thus improving the
efficiency. This effect can also be obtained in a case where the
light receiving area is reduced for the purpose of improving the
response speed. Thus, in the present embodiment, the response speed
and the efficiency can be improved.
[0033] If the depth of the groove 10 is increased, light can be
collected more efficiently. It is, therefore, desirable that the
groove 10 be provided so as to reach a position near the interface
between the n-type InP substrate 1 and the n-type InP layer 2.
Since total reflection at the boundary surface between air in the
groove 10 and the semiconductor is utilized, the width of the
groove 10 is not limited to any particular value.
[0034] Second Embodiment
[0035] FIG. 8 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a second
embodiment of the present invention. In the first embodiment, total
reflection at the boundary surface between air in the groove 10 and
the semiconductor is utilized. In the present embodiment, a
reflecting film 14 that reflects incident light is provided on side
walls of the groove 10.
[0036] The reflecting film 14 is, for example, a two-layer film
formed of SiN film and Au film. The reflectance at the side walls
of the groove 10 can be increased by means of the Au film in the
reflecting film 14. Ag, Al, Cu or any other metal or a dielectric
multilayer film, for example, may be used in place of the Au film.
The SiN film prevents the n-type InP substrate 1 and Au from
directly contacting and reacting with each other in an alloying
manner. The film thickness d (nm) of the SiN film is set so that if
the refractive index of SiN is nr and the wavelength of incident
light is .lamda. (nm), d=.lamda./(4.times.nr) is satisfied.
[0037] Third Embodiment
[0038] FIG. 9 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a third
embodiment of the present invention. In the present embodiment, the
angles between the back surface of the n-type InP substrate 1 and
the side walls of the groove 10 are smaller than 90 degrees.
Setting the angles in this way enables incident light totally
reflected by the side walls of the groove 10 to be led to a central
portion of the light receiving portion 9. As a result, the
efficiency is further improved in comparison with the first
embodiment.
[0039] Examples of a method of forming the groove 10 as described
above are a method of performing dry etching using an SiCl.sub.4/Ar
or Cl.sub.2/Ar mixture gas and using a resist or an insulating film
as an etching mask and a method of performing etching using a
solution formed of a mixture of bromine and methanol.
[0040] Fourth Embodiment
[0041] FIG. 10 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a fourth
embodiment of the present invention. In the present embodiment, a
low-reflection film 15 having a reflectance of 1% or less to
incident light having wavelengths in the 1.3 to 1.5 .mu.m band is
provided on a light receiving region in the back surface of the
n-type InP substrate 1 surrounded by the groove 10.
[0042] The low-reflection film 15 is a dielectric film such as SiN
film, SiO.sub.2 film or Al.sub.2O.sub.3 film. The film thickness of
the low-reflection film 15 is set to a value expressed by
.lamda./(4.times.nr) with respect to a center wavelength .lamda. of
incident light. In this expression, nr is the refractive index of
the low-reflection film 15. The low-reflection film 15 is provided
on the light receiving region in the back surface of the n-type InP
substrate 1 to limit reflection at the interface between the
semiconductor and air at the back surface of the substrate, thus
enabling leading incident light into the semiconductor with
efficiency.
[0043] Fifth Embodiment
[0044] FIG. 11 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a fifth
embodiment of the present invention. In the present embodiment, a
convex microlens 16 is provided in a light receiving region in the
back surface of the n-type InP substrate 1 surrounded by the groove
10. Incident light can be positively taken into the light receiving
portion 9 with the microlens 16. Therefore the efficiency can be
further improved in comparison with the first embodiment.
[0045] In the manufacturing method according to the first
embodiment, a resist is formed on the light receiving region after
reducing the thickness of the n-type InP substrate 1, and etching
is performed by using a solution formed of a mixture of an aqueous
bromine solution, hydrogen peroxide and pure water and using the
resist as a mask, thereby forming the microlens 16. Alternatively,
after forming the resist on the light receiving region, baking at
about 200.degree. C. is performed to thermally weaken the resist
and sputter-etching is performed until the resist is completely
removed, thereby forming the microlens 16.
[0046] Sixth Embodiment
[0047] FIG. 12 is a sectional view of a back-surface-incidence-type
semiconductor light receiving element according to a sixth
embodiment of the present invention. In the present embodiment, a
groove 17 is provided from the element front surface side to the
n-type InP substrate 1 or the n-type InP layer 2. Side walls of the
groove 17 are covered with an insulating film 18. The n-side ohmic
electrode 11 is connected to the n-type InP substrate 1 or the
n-type InP layer 2 at the bottom of the groove 10 and extends
substantially flush with the p-side ohmic electrode 8.
[0048] Both the n-side ohmic electrode 11 and the p-side ohmic
electrode 8 can be provided on the wafer front surface side in this
way, thereby enabling use of flip-chip bonding. Thus, a reduction
in inductance can be achieved in comparison with the case of using
ordinary wire bonding, and a high-speed response characteristic can
be obtained more easily.
[0049] In the above-described first to sixth embodiments, the
InGaAs light absorbing layer 3 is used to absorb incident light
with wavelengths of 1.3 to 1.55 .mu.m. However, a material capable
of absorbing incident light of the necessary wavelength may be used
in the light absorbing layer. For example, in a case where incident
light with wavelengths in the 1.3 .mu.m band only is to be
absorbed, InGaAsP may be used in the light absorbing layer.
[0050] In the above-described first to sixth embodiments, a p-i-n
photodiode is used. However, the same effect can also be obtained
by using an avalanche photodiode (APD).
[0051] Obviously many modifications and variations of the present
invention are possible in the light of the above teachings. It is
therefore to be understood that within the scope of the appended
claims the invention may be practiced otherwise than as
specifically described.
[0052] The entire disclosure of Japanese Patent Application No.
2011-196694, filed on Sep. 9, 2011 including specification, claims,
drawings, and summary, on which the Convention priority of the
present application is based, is incorporated herein by reference
in its entirety.
* * * * *