U.S. patent application number 13/654824 was filed with the patent office on 2013-02-21 for semiconductor device and manufacturing method thereof.
This patent application is currently assigned to Semiconductor Energy Laboratory Co., Ltd.. The applicant listed for this patent is Semiconductor Energy Laboratory Co., Ltd.. Invention is credited to Kengo AKIMOTO.
Application Number | 20130045568 13/654824 |
Document ID | / |
Family ID | 42098067 |
Filed Date | 2013-02-21 |
United States Patent
Application |
20130045568 |
Kind Code |
A1 |
AKIMOTO; Kengo |
February 21, 2013 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Abstract
Electric characteristics and reliability of a thin film
transistor are impaired by diffusion of an impurity element into a
channel region. The present invention provides a thin film
transistor in which aluminum atoms are unlikely to be diffused to
an oxide semiconductor layer. A thin film transistor including an
oxide semiconductor layer including indium, gallium, and zinc
includes source or drain electrode layers in which first
conductive, layers including aluminum as a main component and
second conductive layers including a high-melting-point metal
material are stacked. An oxide semiconductor layer 113 is in
contact with the second conductive layers and barrier layers
including aluminum oxide as a main component, whereby diffusion of
aluminum atoms to the oxide semiconductor layer is suppressed.
Inventors: |
AKIMOTO; Kengo; (Atsugi,
JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Semiconductor Energy Laboratory Co., Ltd.; |
Atsugi-shi |
|
JP |
|
|
Assignee: |
Semiconductor Energy Laboratory
Co., Ltd.
Atsugi-shi
JP
|
Family ID: |
42098067 |
Appl. No.: |
13/654824 |
Filed: |
October 18, 2012 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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13417445 |
Mar 12, 2012 |
8313980 |
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13654824 |
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12575564 |
Oct 8, 2009 |
8158975 |
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13417445 |
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Current U.S.
Class: |
438/104 ;
257/E21.409 |
Current CPC
Class: |
H01L 27/1225 20130101;
H01L 29/7869 20130101; H01L 29/45 20130101; H01L 29/78606
20130101 |
Class at
Publication: |
438/104 ;
257/E21.409 |
International
Class: |
H01L 21/336 20060101
H01L021/336 |
Foreign Application Data
Date |
Code |
Application Number |
Oct 10, 2008 |
JP |
2008-264497 |
Claims
1. A method for manufacturing a semiconductor device, comprising
the steps of: forming a source electrode layer and a drain
electrode layer, each comprising a first conductive layer and a
second conductive layer over the first conductive layer; oxidizing
an edge portion of the first conductive layer; forming an oxide
semiconductor layer to be in contact with the edge portion; forming
a gate insulating film over the oxide semiconductor layer; and
forming a gate electrode over the gate insulating film.
2. The method for manufacturing a semiconductor device according to
claim 1, wherein the oxide semiconductor layer includes indium,
gallium, and zinc.
3. The method for manufacturing a semiconductor device according to
claim 1, wherein the first conductive layer includes aluminum.
4. The method for manufacturing a semiconductor device according to
claim 1, wherein the second conductive layer includes at least one
selected from the group consisting of titanium, tantalum, tungsten,
molybdenum, chromium, neodymium, and scandium.
5. The method for manufacturing a semiconductor device according to
claim 1, wherein the oxidizing step is one of an oxygen plasma
treatment, an ozone treatment using ultraviolet light, and a
treatment using hydrogen peroxide.
6. A method for manufacturing a semiconductor device, comprising
the steps of: forming a source electrode layer and a drain
electrode layer, each comprising a first conductive layer and a
second conductive layer over the first conductive layer; oxidizing
an edge portion of the first conductive layer; forming an oxide
semiconductor layer to be in contact with the edge portion;
performing a plasma treatment on the oxide semiconductor layer in
an atmosphere containing N.sub.2O; forming a gate insulating film
over the oxide semiconductor layer; and forming a gate electrode
over the gate insulating film.
7. The method for manufacturing a semiconductor device according to
claim 6, wherein the oxide semiconductor layer includes indium,
gallium, and zinc.
8. The method for manufacturing a semiconductor device according to
claim 6, wherein the first conductive layer includes aluminum.
9. The method for manufacturing a semiconductor device according to
claim 6, wherein the second conductive layer includes at least one
selected from the group consisting of titanium, tantalum, tungsten,
molybdenum, chromium, neodymium, and scandium.
10. The method for manufacturing a semiconductor device according
to claim 6, wherein the oxidizing step is one of an oxygen plasma
treatment, an ozone treatment using ultraviolet light, and a
treatment using hydrogen peroxide.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] An embodiment of the present invention relates to a
semiconductor device having a circuit including a thin film
transistor (hereinafter referred to as a TFT) in which an oxide
semiconductor film is used for a channel formation region, and a 10
manufacturing method thereof. For example, the present invention
relates to an electronic appliance on which an electro-optical
device typified by a liquid crystal display panel or a
light-emitting display device having an organic light-emitting
element is mounted as a component. It is to be noted that the
semiconductor devices in this specification indicate all the
devices which can operate by using semiconductor characteristics,
and an electro-optical device, a semiconductor circuit, and an
electronic appliance are all included in the semiconductor
devices.
[0003] 2. Description of the Related Art
[0004] Recently, active-matrix display devices (such as liquid
crystal display devices, light-emitting display devices, and
electrophoretic display devices) in each of which a switching
element of a thin film transistor (TFT) is provided in each display
pixel arranged in matrix, have been actively developed. Since a
switching element is provided in each pixel (or each dot), the
active-matrix display devices are advantageous in low voltage
driving in the case of increasing the pixel density as compared to
a passive matrix mode.
[0005] A technique for manufacturing a thin film transistor (TFT)
or the like using an oxide semiconductor film for a channel
formation region and applying it to an electronic device or an
optical device has been attracting attention. As examples of such a
thin film transistor, a thin film transistor using ZnO for an oxide
semiconductor film and a thin film transistor using oxide including
indium, gallium, and zinc for an oxide semiconductor film can be
given, for example. A technique for forming such a thin film
transistor using an oxide semiconductor film over a
light-transmitting substrate and applying it to a switching element
or the like of an image display device is disclosed in Patent
Document 1, Patent Document 2, and the like.
[0006] Further, a variety of conductive layers are used for a
source electrode layer and a drain electrode layer (hereinafter
also collectively referred to as source or drain electrode layers)
of a thin film transistor that uses oxide semiconductor. For
example, a stacked film of titanium and platinum is known as a
metal film (Non-patent Document 1), an oxide including indium (In)
and zinc (Zn) is known as a light-transmitting conductive film
(Non-patent Document 2), and a stacked film of indium tin oxide and
gold is known as a stacked film of a metal film and a
light-transmitting conductive film (Non-patent Document 3).
[0007] On the contrary, an aluminum film is excellent in
conductivity and processability and inexpensive; therefore, the
aluminum film is actively applied to a wiring material of a
semiconductor element. However, since aluminum atoms are likely to
be diffused, it is known that if an aluminum film is simply used as
a wiring material, problems due to diffusion of aluminum atoms,
such as hillocks, electromigration, or stress migration, are
caused. In particular, heat treatment in a manufacturing process of
a semiconductor element promotes diffusion of aluminum atoms.
[0008] In order to suppress diffusion of aluminum atoms, a method
of adding impurities and a method of stacking a high-melting-point
metal material such as tungsten or molybdenum are known. In
particular, a structure in which a high-melting-point metal
material is sandwiched between adjacent layers is effective for
enabling diffusion of aluminum atoms to be suppressed. Such a layer
including a high-melting-point metal material is called a barrier
metal layer.
REFERENCE
[Patent Document]
[0009] [Patent Document 1] Japanese Published Patent Application
No. 2007-123861 [0010] [Patent Document 2] Japanese Published
Patent Application No. 2007-96055
[Non-patent Document]
[0010] [0011] [Non-patent Document 1] APPLIED PHYSICS LETTERS 90,
262106 (2007) [0012] [Non-patent Document 2] APPLIED PHYSICS
LETTERS 91, 113505 (2007) [0013] [Non-patent Document 3] APPLIED
PHYSICS LETTERS 92, 133512 (2008)
SUMMARY OF THE INVENTION
[0014] In a thin film transistor that uses an oxide semiconductor
film including indium, gallium, and zinc for a channel formation
region, high operation speed, a relatively simple manufacturing
process, and sufficient reliability are required. However, electric
characteristics and reliability of the thin film transistor are, in
some cases, impaired by diffusion of an impurity element into a
channel region.
[0015] In the case where a first conductive film including aluminum
as a main component is used for source or drain electrode layers,
if such a structure that a second conductive film formed using a
high-melting-point metal material is sandwiched between the first
conductive film and a semiconductor layer for forming a channel
formation region is employed, the second conductive film serves as
a barrier layer. Accordingly, a phenomenon in which aluminum atoms
are diffused into a channel region can be prevented.
[0016] However, when the stacked conductive film of the first
conductive film including aluminum as a main component and the
second conductive film formed using a high-melting-point metal
material is etched to form source or drain electrode layers, first
conductive layers including aluminum as a main component are
exposed at edge portions of the source or drain electrode layers.
In addition, when an oxide semiconductor film is stacked over the
source or drain electrode layers, the first conductive layers
including aluminum as a main component, which are exposed at the
edge portions, are in direct contact with the oxide semiconductor
film. Further, the structure in which the first conductive layers
including aluminum as a main component sandwich the channel region
is formed, which causes a problem in that aluminum atoms are likely
to be diffused into the oxide semiconductor film including indium,
gallium, and zinc from the edge portions of the first conductive
layers including aluminum as a main component.
[0017] Thin film transistor characteristics of the semiconductor
element that uses an oxide semiconductor including indium, gallium,
and zinc are improved by heat treatment (specifically, on current
is increased and variations in characteristics of transistors are
reduced). Therefore, it is preferable that the heat treatment be
performed after formation of the oxide semiconductor film including
indium, gallium, and zinc. However, the heat treatment promotes a
phenomenon in which aluminum atoms are thermally diffused from the
first conductive layers including aluminum as a main component to
the oxide semiconductor layer.
[0018] It is an object of an embodiment of the present invention to
provide a thin film transistor in which an oxide semiconductor film
including indium, gallium, and zinc is stacked over source or drain
electrode layers including first conductive layers including
aluminum as a main component and in which aluminum atoms are
unlikely to be diffused into the oxide semiconductor layer from the
first conductive layers.
[0019] Furthermore, it is an object to provide a manufacturing
method of a thin film transistor in which an oxide semiconductor
film including indium, gallium, and zinc is stacked over source or
drain electrode layers including first conductive layers including
aluminum as a main component and in which aluminum atoms are
unlikely to be diffused into the oxide semiconductor layer from the
first conductive layers.
[0020] An embodiment of the present invention is a semiconductor
device provided with barrier layers to prevent aluminum atoms from
diffusing from the first conductive layers including aluminum as a
main component to the oxide semiconductor film including indium,
gallium, and zinc, and a manufacturing method thereof. Further, an
aspect of an embodiment of the present invention is a semiconductor
device in which layers including aluminum as a main component,
which are subjected to oxidation treatment, and an oxide
semiconductor layer including indium, gallium, and zinc are in
contact with each other at edge portions of source or drain
electrode layers, and a manufacturing method thereof.
[0021] Specifically, part of the first conductive layers including
aluminum as a main component, which appears at the edge portions of
the conductive layers, is intentionally oxidized, so that barrier
layers are formed. Note that the barrier layers have a thickness of
greater than 0 nm and less than or equal to 5 nm, and include dense
non-hydrated aluminum oxide as a main component.
[0022] An embodiment of the present invention is a semiconductor
device which includes an oxide semiconductor layer including
indium, gallium, and zinc; a first conductive layer including
aluminum as a main component; a second conductive layer formed
using a high-melting-point metal material; and a barrier layer
including aluminum oxide as a main component, in which the second
conductive layer is stacked over the first conductive layer, the
barrier layer is formed in an edge portion of the first conductive
layer, and the oxide semiconductor layer is provided in contact
with the second conductive layer or the barrier layer.
[0023] Another embodiment of the present invention is a
semiconductor device which includes a gate insulating layer; a gate
electrode layer provided on one side of the gate insulating layer;
an oxide semiconductor layer provided on the other side of the gate
insulating layer; and a source electrode layer and a drain
electrode layer in each of which a second conductive layer formed
using a high-melting-point metal material is stacked over a first
conductive layer that is in contact with the gate insulating layer
and includes aluminum as a main component and each of which is
provided with a barrier layer including aluminum oxide as a main
component at an edge portion of the first conductive layer, in
which the oxide semiconductor layer is in contact with the second
conductive layer and the barrier layer.
[0024] Still another embodiment of the present invention is a
semiconductor device which includes a source electrode layer and a
drain electrode layer in each of which a second conductive layer
formed using a high-melting-point metal material is stacked over a
first conductive layer including aluminum as a main component and
each of which is provided with a barrier layer including aluminum
oxide as a main component at an edge portion of the first
conductive layer, an oxide semiconductor layer which covers end
portions of the source electrode layer and the drain electrode
layer; a gate insulating layer which covers the oxide semiconductor
layer; and a gate electrode layer which overlaps the end portions
of the source electrode layer and the drain electrode layer with
the oxide semiconductor layer and the gate insulating layer
interposed therebetween, in which the oxide semiconductor layer is
in contact with the second conductive layer and the barrier
layer.
[0025] Further, in the semiconductor device, the barrier layer
including aluminum oxide as a main component has a thickness of
greater than 0 nm and less than or equal to 5 nm.
[0026] Further, another embodiment of the present invention is a
manufacturing method of a thin film transistor, which includes the
steps of forming a source electrode layer and a drain electrode
layer in each of which a second conductive layer formed using a
high-melting-point metal material is stacked over a first
conductive layer including aluminum as a main component; forming a
barrier layer including aluminum oxide as a main component by
performing oxidation treatment on an exposed edge portion of the
first conductive layer of the source electrode layer and the drain
electrode layer; and stacking an oxide semiconductor layer
including indium, gallium, and zinc so that the oxide semiconductor
layer is in contact with the second conductive layer and the
barrier layer.
[0027] According to an embodiment of the present invention, the
second conductive layers formed using a high-melting-point metal
material or the barrier layers including aluminum oxide as a main
component are formed between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component; accordingly, aluminum atoms
can be prevented from being diffused into the oxide semiconductor
layer. In particular, even when the oxide semiconductor layer
including indium, gallium, and zinc is subjected to heat treatment,
diffusion of aluminum atoms to the oxide semiconductor layer can be
suppressed. In addition, electric corrosion (also 20 referred to as
electrochemical corrosion) caused between the oxide semiconductor
layer including indium, gallium, and zinc and the first conductive
layers including aluminum as a main component can be prevented.
Therefore, a semiconductor device including a reliable thin film
transistor can be provided.
BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In the accompanying drawings:
[0029] FIGS. 1A and 1B are a top view and a cross-sectional view,
respectively, illustrating a semiconductor device;
[0030] FIGS. 2A to 2C are cross-sectional views illustrating a
manufacturing process of a thin film transistor;
[0031] FIGS. 3A to 3C are cross-sectional views illustrating a
manufacturing process of a thin film transistor;
[0032] FIGS. 4A and 4B are a top view and a cross-sectional view,
respectively, illustrating a semiconductor device;
[0033] FIGS. 5A to 5C are cross-sectional views illustrating a
manufacturing process of a thin film transistor;
[0034] FIGS. 6A to 6C are cross-sectional views illustrating a
manufacturing process of a thin film transistor;
[0035] FIG. 7 is a cross-sectional view of electronic paper;
[0036] FIGS. 8A and 8B are block diagrams each showing a
semiconductor device;
[0037] FIG. 9 shows a structure of a signal line driver
circuit;
[0038] FIG. 10 is a timing chart showing operation of a signal line
driver circuit;
[0039] FIG. 11 is a timing chart showing operation of a signal line
driver circuit;
[0040] FIG. 12 shows a structure of a shift register;
[0041] FIG. 13 shows a connection structure of a flip-flop shown in
FIG. 12;
[0042] FIGS. 14A-1 and 14A-2 are top views illustrating
semiconductor devices and FIG. 14B is a cross-sectional view
thereof;
[0043] FIG. 15 is a cross-sectional view of a semiconductor
device;
[0044] FIG. 16 is an equivalent circuit diagram of a pixel in a
semiconductor device;
[0045] FIGS. 17A to 17C illustrate semiconductor devices;
[0046] FIGS. 18A and 18B are a top view and a cross-sectional view,
respectively, illustrating a semiconductor device;
[0047] FIGS. 19A and 19B illustrate examples of an application mode
of electronic paper;
[0048] FIG. 20 is an exterior view illustrating an example of an
e-book reader;
[0049] FIGS. 21A and 21B are exterior views illustrating examples
of a television device and a digital photo frame;
[0050] FIGS. 22A and 22B are exterior views illustrating examples
of an amusement machine; and
[0051] FIG. 23 is an exterior view illustrating an example of a
cellular phone.
DETAILED DESCRIPTION OF THE INVENTION
[0052] Embodiments of the present invention will be described with
reference to the accompanying drawings. However, the present
invention is not limited to the following description, and it will
be easily understood by those skilled in the art that various
changes and modifications can be made in modes and details without
departing from the spirit and scope of the present invention.
Therefore, the present invention should not be construed as being
limited to the description of the following embodiments. Note that
a common reference numeral refers to the same part or a part having
a similar function throughout the drawings in the structures of the
present invention described below, and the description thereof is
omitted.
Embodiment 1
[0053] In Embodiment 1, a thin film transistor and a manufacturing
process thereof will be described with reference to FIGS. 1A and
1B, FIGS. 2A to 2C, and FIGS. 3A to 3C.
[0054] FIGS. 1A and 1B illustrate a thin film transistor of this
embodiment. FIG. 1A is a plan view and FIG. 1B is a cross-sectional
view taken along line Q1-Q2 in FIG. 1A. In a thin film transistor
150 illustrated in FIGS. 1A and 1B, a gate electrode layer 111 is
formed over a substrate 100, and a gate insulating film 102 is
formed over the gate electrode layer 111. Source or drain electrode
layers (117a, 117b) are formed over the gate insulating film 102 by
stacking second conductive layers (115a, 115b) which are formed
using a high-melting-point metal material over first conductive
layers (114a, 114b) including aluminum as a main component so that
end portions of the source or drain electrode layers (117a, 117b)
overlap the gate electrode layer 111. An oxide semiconductor layer
113 is formed so as to overlap the gate electrode layer 111 and to
be in contact with the second conductive layers (115a, 115b) which
are formed using a high-melting-point metal material in the source
or drain electrode layers and barrier layers (116a, 116b) which
include aluminum oxide as a main component and are located in edge
portions of the source or drain electrode layers.
[0055] The oxide semiconductor layer 113 is in contact with the
second conductive layers (115a, 115b) which are formed using a
high-melting-point metal material in the source or drain electrode
layers and the barrier layers (116a, 116b) which include aluminum
oxide as a main component and are located in the edge portions of
the source or drain electrode layers.
[0056] In this embodiment, the barrier layers (116a, 116b) which
include aluminum oxide as a main component are formed in the edge
portions of the source or drain electrode layers (117a, 117b) in
which the first conductive layers (114a, 114b) including aluminum
as a main component and the second conductive layers (115a, 115b)
which are formed using a high-melting-point metal material are
stacked. Thus, the oxide semiconductor and the first conductive
layers including aluminum as a main component do not directly touch
each other.
[0057] In this specification, the oxide semiconductor used for the
oxide semiconductor layer is a thin film of InMO.sub.3(ZnO).sub.m
(m>0) and the thin film is used as a semiconductor layer to
manufacture a thin film transistor. Note that M indicates one metal
element or a plurality of metal elements selected from Ga, Fe, Ni,
Mn, and Co. For example, as well as a case where M is Ga, there are
cases where M includes, in addition to Ga, a metal element selected
from the above-described metal elements, such as a case where M is
Ga and Ni, a case where M is Ga and Fe, and the like. Furthermore,
there are some cases in which the oxide semiconductor includes Fe,
Ni, any of the other transition metal elements, or an oxide of the
transition metal element in addition to the metal element as M. In
this specification, this thin film is also referred to as an
In--Ga--Zn--O based non-single-crystal film.
[0058] The composition rate of the In--Ga--Zn--O based
non-single-crystal film changes depending on its film formation
condition. Here, a condition in which a target of In.sub.2O.sub.3,
Ga.sub.2O.sub.3, and ZnO (1:1:1) (the composition ratio of In, Ga,
and Zn is 1:1:0.5) is used and the flow rate of an argon gas is 40
sccm in a sputtering method is referred to as Condition 1, and a
condition in which the flow rate of an argon gas is 10 sccm and the
flow rate of oxygen is 5 sccm in a sputtering method is referred to
as Condition 2.
[0059] A typical composition ratio of an oxide semiconductor film,
which is measured by inductively coupled plasma mass spectrometry
(ICP-MS), is InGa.sub.0.95Zn.sub.0.41O.sub.3.33 in the case of
Condition 1, and InGa.sub.0.94Zn.sub.0.400.sub.3.31 in the case of
Condition 2.
[0060] A typical composition ratio of an oxide semiconductor film,
which is quantified by Rutherford backscattering spectrometry
(RBS), is InGa.sub.0.93Zn.sub.0.44O.sub.3.49 in the case of
Condition 1, and InGa.sub.0.92Zn.sub.0.45O.sub.3.86 in the case of
Condition 2.
[0061] Since the In--Ga--Zn--O based non-single-crystal film is
formed by a sputtering method and then subjected to heat treatment
at a temperature of from 200.degree. C. to 500.degree. C.,
typically, from 300.degree. C. to 400.degree. C. inclusive for 10
minutes to 100 minutes, an amorphous structure is observed when the
crystal structure of the In--Ga--Zn--O based non-single-crystal
film is analyzed by X-ray diffraction (XRD).
[0062] Further, the amount of light absorbed by the oxide
semiconductor layer including indium, gallium, and zinc is small
and thus the oxide semiconductor layer is unlikely to be
photoexcited; therefore, it is not necessary to cover a channel
formation region with the gate electrode layer in order to shield
the channel formation region from light. That is, the overlap area
of the gate electrode layer and the source or drain electrode
layers can be reduced in the channel formation region, whereby
parasitic capacitance can be reduced.
[0063] A manufacturing method of the thin film transistor 150 in
FIGS. 1A and 1B will be described with reference to FIGS. 2A to 2C
and FIGS. 3A to 3C.
[0064] As the substrate 100, any of the following substrates can be
used: non-alkaline glass substrates made of barium borosilicate
glass, aluminoborosilicate glass, aluminosilicate glass, and the
like by a fusion method or a float method; ceramic substrates;
plastic substrates having heat resistance enough to withstand a
process temperature of this manufacturing process; and the like.
For example, a glass substrate which contains barium oxide (BaO)
more than boric oxide (B.sub.2O.sub.3) and has a strain point of
730.degree. C. or higher is preferably used. This is because the
glass substrate is not warped even when the oxide semiconductor
layer is subjected to heat treatment at a high temperature of
approximately 700.degree. C. Alternatively, a metal substrate such
as a stainless steel alloy substrate, provided with an insulating
film over its surface, may be used. When the substrate 100 is
mother glass, the substrate may have any of the following sizes:
the first generation (320 mm.times.400 mm), the second generation
(400 mm.times.500 mm), the third generation (550 mm.times.650 mm),
the fourth generation (680 mm.times.880 mm, or 730 mm.times.920
mm), the fifth generation (1000 mm.times.1200 mm, or 1100
mm.times.1250 mm), the sixth generation (1500 mm.times.1800 mm),
the seventh generation (1900 mm.times.2200 mm), the eighth
generation (2160 mm.times.2460 mm), the ninth generation (2400
mm.times.2800 mm, or 2450 mm.times.3050 mm), the tenth generation
(2950 mm.times.3400 mm), and the like.
[0065] An insulating film may be formed as a base film over the
substrate 100. As the base film, the insulating film may be formed
using a single layer or stacked layers of a silicon oxide film, a
silicon nitride film, a silicon oxynitride film, and/or a silicon
nitride oxide film by a CVD method, a sputtering method, or the
like.
[0066] Next, a conductive film for forming a gate wiring including
the gate electrode layer 111, a capacitor wiring, and a terminal
portion is formed. The conductive film is desirably formed using a
low-resistant conductive material such as aluminum (Al) or copper
(Cu); however, since aluminum alone has disadvantages such as low
heat resistance and a tendency to be corroded, it is used in
combination with a material having both heat resistance and
conductivity. As the heat-resistant conductive material, an element
selected from titanium (Ti), tantalum (Ta), tungsten (W),
molybdenum (Mo), chromium (Cr), neodymium (Nd), and scandium (Sc),
an alloy containing any of the elements as its component, an alloy
film including a combination of the elements, or a nitride
containing any of the elements as its component may be used.
[0067] Alternatively, a transparent conductive film may be used; in
such a case, indium tin oxide, indium tin oxide containing silicon
or silicon oxide, indium zinc oxide, zinc oxide, or the like can be
used as a material.
[0068] The conductive film for forming the gate electrode layer 111
is formed to have a thickness of from 50 nm to 300 nm inclusive.
When the thickness of the conductive film for forming the wiring
layer including the gate electrode layer 111 is 300 nm or less,
disconnection of a semiconductor film and a wiring to be formed
later can be avoided. Further, in the case where the conductive
film for forming the wiring layer including the gate electrode
layer 111 has a thickness of 150 nm or larger, the resistance of
the gate electrode can be lowered and the size of the substrate can
be increased.
[0069] Next, an unnecessary part of the conductive film formed over
the substrate is etched with the use of a resist mask which is
formed using a first photomask in this embodiment, whereby wirings
and electrodes (the gate wiring including the gate electrode layer
111, the capacitor wiring, and the terminal) are formed. At this
time, etching is performed so that a taper shape is formed at least
at an edge portion of the gate electrode layer 111. A
cross-sectional view at this stage is illustrated in FIG. 2A.
[0070] Then, the gate insulating film 102 is formed. Examples of
the insulating film that can be used as the gate insulating film
102 is as follows: a silicon oxide film, a silicon nitride film, a
silicon oxynitride film, a silicon nitride oxide film, an aluminum
oxide film, a magnesium oxide film, an aluminum nitride film, an
yttrium oxide film, a hafnium oxide film, and a tantalum oxide
film.
[0071] Here, a silicon oxynitride film means a film that contains
more oxygen than nitrogen and includes oxygen, nitrogen, silicon,
and hydrogen at concentrations ranging from 55 atomic % to 65
atomic %, 1 atomic % to 20 atomic %, 25 atomic % to 35 atomic %,
and 0.1 atomic % to 10 atomic %, respectively. Further, a silicon
nitride oxide film means a film that contains more nitrogen than
oxygen and includes oxygen, nitrogen, silicon, and hydrogen at
concentrations ranging from 15 atomic % to 30 atomic %, 20 atomic %
to 35 atomic %, 25 atomic % to 35 atomic %, and 15 atomic % to 25
atomic %, respectively.
[0072] The gate insulating film may have either a single layer or
stacked layers of two or three layers. For example, by forming the
gate insulating film that is in contact with the substrate using a
silicon nitride film or a silicon nitride oxide film, adhesion
between the substrate and the gate insulating film is increased,
and further, impurities from the substrate can be prevented from
diffusing into the oxide semiconductor layer 113 when a glass
substrate is used as the substrate. Furthermore, oxidation of the
gate electrode layer 111 can be prevented. That is, film peeling
can be prevented, and thus electric characteristics of a thin film
transistor which is completed later can be improved.
[0073] The thickness of the gate insulating film 102 is from 50 nm
to 250 nm inclusive. It is preferable that the thickness of the
gate insulating film be 50 nm or greater because the gate
insulating film can cover unevenness of the wiring layer including
the gate electrode layer 111.
[0074] Here, a silicon oxide film with a thickness of 100 nm is
formed by a plasma CVD method or a sputtering method as the gate
insulating film 102.
[0075] The source or drain electrode layers are formed using a
conductive film in which a first conductive film including
aluminum, which is a low-resistant conductive material, as a main
component and a second conductive film which is formed using a
high-melting-point metal material are stacked. The second
conductive film which is formed using a high-melting-point metal
material is formed between the first conductive film and the oxide
semiconductor film. Note that although the source or drain
electrode layers each have a two-layer structure including the
first conductive layer and the second conductive layer in this
embodiment, if a structure in which the first conductive layer
including aluminum as a main component is not in direct contact
with the oxide semiconductor layer is employed, a stacked film of
two or more layers may be employed. For example, the source or
drain electrode layers can each have a three-layer structure in
which a first conductive layer including aluminum as a main
component is sandwiched between a second conductive layer and a
third conductive layer which are formed using a high-melting-point
metal material.
[0076] For the first conductive film including aluminum as a main
component, pure aluminum (Al) can be used; however, it is
preferable to use an element which improves heat resistance or an
element which prevents hillocks, such as titanium (Ti), tantalum
(Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd),
scandium (Sc), nickel, platinum, copper, gold, silver, manganese,
carbon, silicon, or the like; an alloy material containing any of
the elements as its main component; or an aluminum alloy to which a
compound is added.
[0077] As the high-melting-point metal material used for the second
conductive film, an element selected from titanium (Ti), tantalum
(Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd),
and scandium (Sc), an alloy containing any of the elements as its
component, an alloy film including a combination of the elements,
or a nitride containing any of the elements as its component may be
used.
[0078] The conductive film for forming the source or drain
electrode layers is formed by a sputtering method or a vacuum
evaporation method. The thickness of the conductive film for
forming the source or drain electrode layers is preferably from 50
nm to 500 nm inclusive. A thickness of 500 nm or less of the
conductive film is effective for preventing disconnection of a
semiconductor film and a wiring to be formed later.
[0079] Next, a resist mask is formed over the conductive film with
the use of a second photomask in this embodiment. An unnecessary
part of the conductive film is selectively etched using the resist
mask, whereby the source or drain electrode layers (117a, 117b)
which are stacked films of the second conductive layers (115a,
115b) which are formed using a high-melting-point metal material
and the first conductive layers (114a, 114b) including aluminum as
a main component are formed.
[0080] By the etching, the first conductive layers (114a, 114b)
including aluminum as a main component appear at edge portions of
the source or drain electrode layers (117a, 117b). In other words,
since the source or drain electrode layers (117a, 117b) are formed
using the conductive film which is a stack of the first conductive
film including aluminum as a main component and the second
conductive film, the first conductive film including aluminum as a
main component appears at the edge portions of the source or drain
electrode layers (117a, 117b), in particular, side surface portions
thereof. A cross-sectional view at this stage is illustrated in
FIG. 2B.
[0081] Next, the first conductive layers including aluminum as a
main component which are exposed along the edge portions of the
source or drain electrode layers (117a, 117b) are subjected to
oxidation treatment, whereby the barrier layers (116a, 116b) which
include aluminum oxide as a main component are formed. The barrier
layers including aluminum oxide as a main component have a
thickness of greater than 0 nm and less than or equal to 4 nm and
are preferably non-hydrated oxide films. The non-hydrated oxide
film is a dense film including no moisture. Even if the barrier
layers contain moisture, it is favorable that the barrier layers
contain a smaller amount of moisture in order to prevent entry of
contaminant impurities. Note that the thickness of the barrier
layers means the average length in a direction perpendicular to the
surface of the barrier layers to the interface with the first
conductive layers including aluminum as a main component. A
cross-sectional view at this stage is illustrated in FIG. 2C. As
illustrated in FIG. 2C, the barrier layers formed by the oxidation
treatment are, in some cases, extend to an outer side than the edge
portions of the second conductive layers. In this case, the channel
length is a distance between a conductive portion of the source
electrode layer 117a and a conductive portion of the drain
electrode layer 117b.
[0082] The non-hydrated oxide film is formed by oxidizing a metal
film. As the oxidation method, oxygen plasma treatment, ozone
treatment using ultraviolet light, and treatment using hydrogen
peroxide can be given. Any of the treatments can be performed alone
or the treatments can be performed in combination. As long as
barrier layers which suppress diffusion of aluminum atoms can be
formed, the treatment is not limited to the oxidation treatments.
As an alternate treatment method, nitridation treatment can be
performed, for example, to form aluminum nitride for the barrier
layers.
[0083] After the oxidation treatment, it is preferable that the
oxide semiconductor film be formed in succession without exposing
the source or drain electrode layers (117a, 117b) to air. By
successive formation, an interface of the stacked layers is not
contaminated by an air constituent such as moisture, an impurity
element floating in air, and dust; accordingly, variations in
characteristics of thin film transistors can be reduced.
[0084] Next, the oxide semiconductor film is formed over the source
or drain electrode layers (117a, 117b).
[0085] Here, the oxide semiconductor film is formed under an argon
or oxygen atmosphere with the use of an oxide semiconductor target
including indium, gallium, and zinc with a diameter of 8 inches
(the composition ratio of In.sub.2O.sub.3, Ga.sub.2O.sub.3, and ZnO
is 1:1:1), with a distance between the substrate and the target of
170 mm, at a pressure of 0.4 Pa and a direct current (DC) power of
0.5 kW. Note that a pulsed direct current (DC) power is preferably
used because dust can be reduced and the thickness distribution
becomes uniform. The thickness of the oxide semiconductor film is
set at 5 nm to 200 nm. In this embodiment, the thickness of the
oxide semiconductor film is 100 nm.
[0086] The oxide semiconductor film is formed in an atmosphere
including excessive oxygen so as to include much oxygen.
Specifically, an oxygen atmosphere (or a condition in which the
flow rate of an oxygen gas is higher than that of an argon gas and
the flow ratio of the oxygen gas to the argon gas is 1 or more to
1) is employed as the film formation condition of the oxide
semiconductor film. In the case where the oxide semiconductor film
includes much oxygen, conductivity can be decreased, and further,
off current can be reduced. Accordingly, a thin film transistor
with a high on/off ratio can be obtained.
[0087] Then, a resist mask is formed with the use of a third
photomask in this embodiment, and an unnecessary part is etched,
whereby the oxide semiconductor layer 113 including indium,
gallium, and zinc is formed. The etching method of the oxide
semiconductor layer 113 including indium, gallium, and zinc may be
dry etching without limitation to wet etching
[0088] Here, the unnecessary part is removed by wet etching with
the use of ITO07N (produced by Kanto Chemical Co., Inc.), so that
the oxide semiconductor layer 113 including indium, gallium, and
zinc is formed.
[0089] Through the above-described process, the thin film
transistor 150 in which the oxide semiconductor layer 113 including
indium, gallium, and zinc is used for a channel formation region
can be manufactured. A cross-sectional view at this stage is
illustrated in FIG. 3A.
[0090] The thin film transistor using the oxide semiconductor
including indium, gallium, and zinc is preferably subjected to heat
treatment at 200.degree. C. to 600.degree. C., typically,
300.degree. C. to 500.degree. C. Here, the thin film transistor is
put in a furnace and subjected to heat treatment at 350.degree. C.
for 1 hour under a nitrogen atmosphere. Note that the atmosphere of
the heat treatment is not limited to a nitrogen atmosphere, and an
air atmosphere or an oxygen atmosphere may also be employed. By
this heat treatment, rearrangement at an atomic level is performed
in the oxide semiconductor film including indium, gallium, and
zinc. The heat treatment here (including light annealing) is
important for reducing distortion which inhibits transfer of
carriers. Note that the timing of the heat treatment is not
particularly limited as long as it is performed after formation of
the oxide semiconductor film and, for example, the heat treatment
may be performed after formation of a pixel electrode.
[0091] Further, the oxide semiconductor layer 113 may be subjected
to plasma treatment. By performing plasma treatment, damage to the
oxide semiconductor layer 113 due to etching can be recovered. The
plasma treatment is preferably performed in O.sub.2 or N.sub.2O,
preferably a N.sub.2 atmosphere including oxygen, a He atmosphere
including oxygen, or an Ar atmosphere including oxygen.
Alternatively, Cl.sub.2 or CF.sub.4 may be added to the
above-described atmosphere. Note that the plasma treatment is
preferably performed with non-bias applied.
[0092] Next, a protective insulating film 109 which covers the
oxide semiconductor layer 113 including indium, gallium, and zinc
is formed. A silicon nitride film, a silicon oxide film, a silicon
oxynitride film, or the like obtained by a sputtering method or the
like can be used as the protective insulating film 109.
[0093] Then, a resist mask is formed with the use of a fourth
photomask in this embodiment, and the protective insulating film
109 is etched to form a contact hole 125 which reaches the drain
electrode layer 107b. A cross-sectional view at this stage is
illustrated in FIG. 3B.
[0094] Next, a third conductive layer after the gate electrode
layer 111 and the source or drain electrode layers (117a, 117b) is
formed. In the case of applying the semiconductor device according
to an embodiment of the present invention to a display device, the
third conductive layer serves as a pixel electrode, a wiring, and a
terminal portion of the display device.
[0095] Here, a transparent conductive film is formed as the third
conductive layer. Indium oxide (In.sub.2O.sub.3), an indium oxide
tin oxide alloy (In.sub.2O.sub.3--SnO.sub.2, abbreviated as ITO),
or the like is deposited as a material of the transparent
conductive film by a sputtering method, a vacuum evaporation
method, or the like. The etching treatment of such a material is
performed with a hydrochloric-acid based solution. However, since
etching of ITO is particularly likely to leave residue, an indium
oxide zinc oxide alloy (In.sub.2O.sub.3--ZnO) may be used in order
to improve etching processability.
[0096] Next, a resist mask is formed with the use of a fifth
photomask in this embodiment, and an unnecessary part is etched to
form a third conductive layer 128. A cross-sectional view at this
stage is illustrated in FIG. 3C.
[0097] By the above-described method, the bottom-gate type thin
film transistor illustrated in FIGS. 1A and 1B according to an
embodiment of the present invention is manufactured. In the thin
film transistor formed in this embodiment, the second conductive
layers formed using a high-melting-point metal material or the
barrier layers including aluminum oxide as a main component are
formed between the oxide semiconductor layer including indium,
gallium, and zinc and the first conductive layers including
aluminum as a main component; accordingly, aluminum atoms can be
prevented from being diffused into the oxide semiconductor layer.
In particular, even when the oxide semiconductor layer including
indium, gallium, and zinc is subjected to heat treatment, diffusion
of aluminum atoms to the oxide semiconductor layer can be
suppressed. In addition, electric corrosion (also referred to as
electrochemical corrosion) caused between the oxide semiconductor
layer including indium, gallium, and zinc and the first conductive
layers including aluminum as a main component can be prevented.
Therefore, a semiconductor device including a reliable thin film
transistor can be provided.
Embodiment 2
[0098] In Embodiment 2, a thin film transistor and a manufacturing
method thereof, which are different from those in Embodiment 1,
will be described with reference to FIGS. 4A and 4B, FIGS. 5A to
5C, and FIGS. 6A to 6C.
[0099] FIGS. 4A and 4B illustrate an embodiment different from that
of Embodiment 1. FIG. 4A is a plan view and FIG. 4B is a
cross-sectional view taken along line Q1-Q2 in FIG. 4A.
[0100] In a thin film transistor 151 illustrated in FIGS. 4A and
4B, source or drain electrode layers (117a, 117b) are formed over a
substrate 100. In the source or drain electrode layers (117a,
117b), second conductive layers (115a, 115b) which are formed using
a high-melting-point metal material are stacked over first
conductive layers (114a, 114b) including aluminum as a main
component. An oxide semiconductor layer 113 is formed to be in
contact with the second conductive layers (115a, 115b) which are
formed using a high-melting-point metal material in the source or
drain electrode layers and barrier layers (116a, 116b) which
include aluminum oxide as a main component and are located in edge
portions of the source or drain electrode layers. A gate insulating
film 102 which covers the oxide semiconductor layer 113 is formed,
and a gate electrode layer 111 is formed so as to overlap end
portions of the source or drain electrode layers (117a, 117b) with
the gate insulating film 102 interposed therebetween.
[0101] In an embodiment of the present invention, the barrier
layers (116a, 116b) which include aluminum oxide as a main
component are formed in the edge portions of the source or drain
electrode layers (117a, 117b) in which the first conductive layers
(114a, 114b) including aluminum as a main component and the second
conductive layers (115a, 115b) which are formed using a
high-melting-point metal material are stacked. Thus, the oxide
semiconductor and the first conductive layers including aluminum as
a main component do not directly touch each other.
[0102] A manufacturing method of the thin film transistor 151 of
FIGS. 4A and 4B will be described with reference to FIGS. 5A to 5C
and FIGS. 6A to 6C.
[0103] A conductive film for forming the source or drain electrode
layers is formed by stacking, over a substrate, a second conductive
film which is formed using a high-melting-point metal material over
a first conductive film including aluminum, which is a
low-resistant conductive material, as a main component. Note that
materials of the substrate, the first conductive film including
aluminum as a main component, and the second conductive film which
is formed using a high-melting-point metal material can be similar
to those of Embodiment 1.
[0104] Here, the first conductive film and the second conductive
film are stacked by a sputtering method. Then, an unnecessary part
of the conductive film formed over the substrate 100 is etched
using a resist mask that is formed with the use of a first
photomask in this embodiment, whereby wirings and electrodes (a
signal line, a capacitor wiring, and a terminal including the
source or drain electrode layers (117a, 117b)) are formed. At this
time, etching is performed so that a taper shape is formed at least
at edge portions of the source or drain electrode layers (117a,
117b). In addition, first conductive layers including aluminum as a
main component are exposed at the edge portions of the electrode
layers formed here. A cross-sectional view at this stage is
illustrated in FIG. 5A.
[0105] Next, the first conductive layers including aluminum as a
main component, which are exposed at the edge portions of the
source or drain electrode layers (117a, 117b) are subjected to
oxidation treatment in a manner similar to that in Embodiment 1,
whereby the barrier layers (116a, 116b) which includes aluminum
oxide as a main component are formed. The barrier layers which
include aluminum oxide as a main component have a thickness of
greater than 0 nm and less than or equal to 5 nm and are preferably
non-hydrated oxide films. A cross-sectional view at this stage is
illustrated in FIG. 5B.
[0106] Next, an oxide semiconductor film is formed over the source
or drain electrode layers (117a, 117b). After oxidation treatment
is performed on the first conductive layers including aluminum as a
main component, it is preferable that the oxide semiconductor film
be formed in succession without exposure to air. By successive
formation, an interface of the stacked layers is not contaminated
by an air constituent such as moisture, an impurity element
floating in air, and dust; accordingly, variations in
characteristics of thin film transistors can be reduced.
[0107] Here, an oxide semiconductor including indium, gallium, and
zinc is used for the oxide semiconductor film, and the oxide
semiconductor film is formed in an atmosphere including excessive
oxygen so as to include much oxygen in a manner similar to that of
Embodiment 1. In the case where the oxide semiconductor film
includes much oxygen, off current can be reduced. Accordingly, a
thin film transistor with a high on/off ratio can be obtained. In
this embodiment, the thickness of the oxide semiconductor film is
100 nm.
[0108] Next, a resist mask is formed with the use of a second
photomask in this embodiment, and an unnecessary part is etched,
whereby the oxide semiconductor layer 113 including indium,
gallium, and zinc is formed. The etching method of the oxide
semiconductor layer 113 may be dry etching without limitation to
wet etching
[0109] Here, the unnecessary part is removed by wet etching with
the use of ITO07N (produced by Kanto Chemical Co., Inc.) in a
manner similar to that of Embodiment 1, so that the oxide
semiconductor layer 113 including indium, gallium, and zinc is
formed. A cross-sectional view at this stage is illustrated in FIG.
5C.
[0110] The thin film transistor using the oxide semiconductor
including indium, gallium, and zinc is preferably subjected to heat
treatment at 200.degree. C. to 600.degree. C., typically,
300.degree. C. to 500.degree. C. Here, the thin film transistor is
put in a furnace and subjected to heat treatment at 350.degree. C.
for 1 hour under a nitrogen atmosphere. Note that the atmosphere of
the heat treatment is not limited to a nitrogen atmosphere, and an
air atmosphere or an oxygen atmosphere may also be employed. By
this heat treatment, rearrangement at an atomic level is performed
in the oxide semiconductor film including indium, gallium, and
zinc. The heat treatment here (including light annealing) is
important for reducing distortion which inhibits transfer of
carriers. Note that the timing of the heat treatment is not
particularly limited as long as it is performed after formation of
the oxide semiconductor film and, for example, the heat treatment
may be performed after formation of a pixel electrode.
[0111] Before formation of the gate insulating film, the oxide
semiconductor layer 113 may be subjected to plasma treatment. By
performing plasma treatment, damage to the oxide semiconductor
layer 113 due to etching can be recovered. The plasma treatment is
preferably performed in O.sub.2 or N.sub.2O, preferably a N.sub.2
atmosphere including oxygen, a He atmosphere including oxygen, or
an Ar atmosphere including oxygen. Alternatively, Cl.sub.2 or
CF.sub.4 may be added to the above-described atmosphere. Note that
the plasma treatment is preferably performed with non-bias
applied.
[0112] Next, the gate insulating film 102 is formed. A gate
insulating film similar to that of Embodiment 1 can be used for the
gate insulating film 102 and may have either a single layer or
stacked layers of two or three layers. Here, a silicon oxide film
with a thickness of 100 nm is formed by a sputtering method as the
gate insulating film 102.
[0113] Then, a conductive film for forming the gate electrode layer
111 is formed. A material similar to that of Embodiment 1 can be
used for the conductive film.
[0114] Next, an unnecessary part of the conductive film is etched
with the use of a resist mask that is formed using a third
photomask in this embodiment, whereby the gate electrode layer 111
is formed. Through the above-described process, the thin film
transistor 151 in which the oxide semiconductor layer 113 including
indium, gallium, and zinc is used for a channel formation region
can be manufactured. A cross-sectional view at this stage is
illustrated in FIG. 6A.
[0115] Next, a protective insulating film 109 which covers the thin
film transistor 151 is formed. A silicon nitride film, a silicon
oxide film, a silicon oxynitride film, or the like obtained by a
sputtering method or the like can be used as the protective
insulating film 109.
[0116] Then, the protective insulating film 109 and the gate
insulating film 102 are etched using a resist mask formed with the
use of a fourth photomask in this embodiment, so that a contact
hole 125 which reaches the drain electrode layer 107b is formed. A
cross-sectional view at this stage is illustrated in FIG. 6B.
[0117] Next, a third conductive layer after the gate electrode
layer 111 and the source or drain electrode layers (117a, 117b) is
formed. In the case of applying the semiconductor device according
to an embodiment of the present invention to a display device, the
third conductive layer serves as a pixel electrode, a wiring, and a
terminal portion of the display device.
[0118] Here, a transparent conductive film is formed as the third
conductive layer. Indium oxide (In.sub.2O.sub.3), an indium oxide
tin oxide alloy (In.sub.2O.sub.3--SnO.sub.2, abbreviated as ITO),
or the like is deposited as a material of the transparent
conductive film by a sputtering method, a vacuum evaporation
method, or the like. The etching treatment of such a material is
performed with a hydrochloric-acid based solution. However, since
etching of ITO is particularly likely to leave residue, an indium
oxide zinc oxide alloy (In.sub.2O.sub.3--ZnO) may be used in order
to improve etching processability.
[0119] Then, an unnecessary part is etched using a resist mask
formed with the use of a fifth photomask in this embodiment, so
that a third conductive layer 128 is formed. A cross-sectional view
at this stage is illustrated in FIG. 6C.
[0120] By the above-described method, the forward-staggered thin
film transistor illustrated in FIGS. 4A and 4B according to an
embodiment of the present invention is manufactured. In the thin
film transistor formed in this embodiment, the second conductive
layers formed using a high-melting-point metal material or the
barrier layers including aluminum oxide as a main component are
formed between the oxide semiconductor layer including indium,
gallium, and zinc and the first conductive layers including
aluminum as a main component; accordingly, aluminum atoms can be
prevented from being diffused into the oxide semiconductor layer.
In particular, even when the oxide semiconductor layer including
indium, gallium, and zinc is subjected to heat treatment, diffusion
of aluminum atoms to the oxide semiconductor layer can be
suppressed. In addition, electric corrosion (also referred to as
electrochemical corrosion) caused between the oxide semiconductor
layer including indium, gallium, and zinc and the first conductive
layers including aluminum as a main component can be prevented.
Therefore, a semiconductor device including a reliable thin film
transistor can be provided.
Embodiment 3
[0121] In Embodiment 3, an example of electronic paper will be
described as a display device which is an example of a
semiconductor device according to an embodiment of the present
invention.
[0122] FIG. 7 illustrates active-matrix electronic paper as an
example of a display device to which an embodiment of the present
invention is applied. A thin film transistor 581 used in the
display device can be manufactured in a manner similar to that of
Embodiment 1 or 2 and has high reliability with suppression in
diffusion of aluminum atoms to an oxide semiconductor layer.
[0123] The electronic paper in FIG. 7 is an example of a display
device using a twisting ball display system. The twisting ball
display system refers to a method in which spherical particles each
colored in black and white are used for a display element and
arranged between a first electrode layer and a second electrode
layer which are electrode layers, and a potential difference is
generated between the first electrode layer and the second
electrode layer to control orientation of the spherical particles,
so that display is performed.
[0124] A source electrode layer or a drain electrode layer of the
thin film transistor 581 is in contact with a first electrode layer
587 at an opening formed in an insulating layer 585, whereby the
thin film transistor 581 is electrically connected to the first
electrode layer 587. Between the first electrode layer 587 and a
second electrode layer 588, spherical particles 589 each having a
black region 590a, a white region 590b, and a cavity 594 around the
regions which is filled with liquid are provided. A space around
the spherical particles 589 is filled with a filler 595 such as a
resin (see FIG. 7).
[0125] Further, instead of the twisting ball, an electrophoretic
element can also be used. A microcapsule having a diameter of about
10 .mu.m to 200 .mu.m in which transparent liquid, positively
charged white microparticles, and negatively charged black
microparticles are encapsulated, is used. In the microcapsule which
is provided between the first electrode layer and the second
electrode layer, when an electric field is applied by the first
electrode layer and the second electrode layer, the white
microparticles and black microparticles move to opposite sides, so
that white or black can be displayed. A display element using this
principle is an electrophoretic display element and is called
electronic paper in general. The electrophoretic display element
has higher reflectance than a liquid crystal display element, and
thus, an auxiliary light is unnecessary, power consumption is low,
and a display portion can be recognized in a dim place. In
addition, even when power is not supplied to the display portion,
an image which has been displayed once can be maintained.
Accordingly, a displayed image can be stored even if a
semiconductor device having a display function (which may be
referred to simply as a display device or a semiconductor device
provided with a display device) is distanced from an electric wave
source.
[0126] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. Electronic paper on
which the thin film transistor having high reliability is mounted
has high reliability as a display element.
Embodiment 4
[0127] In Embodiment 4, examples of manufacturing at least part of
a driver circuit and a thin film transistor that is arranged in a
pixel portion over the same substrate in a display device which is
an example of a semiconductor device according to an embodiment of
the present invention will be described with reference to FIGS. 8A
and 8B, FIG. 9, FIG. 10, FIG. 11, FIG. 12, and FIG. 13.
[0128] The thin film transistor arranged over the same substrate is
formed in a manner similar to that of Embodiment 1 or 2. The thin
film transistor formed by a method similar to that of Embodiment 1
or 2 is an n-channel TFT; therefore, among driver circuits, part of
a driver circuit (driver circuits) which can be formed using an
n-channel TFT is formed over the same substrate as the thin film
transistor of the pixel portion.
[0129] FIG. 8A illustrates an example of a block diagram of an
active-matrix liquid crystal display device which is an example of
a semiconductor device according to an embodiment of the present
invention. The display device illustrated in FIG. 8A includes, over
a substrate 5300, a pixel portion 5301 including a plurality of
pixels that are provided with a display element; a scan line driver
circuit 5302 that selects a pixel; and a signal line driver circuit
5303 that controls a video signal input to the selected pixel.
[0130] The pixel portion 5301 is connected to the signal line
driver circuit 5303 by a plurality of signal lines S1 to Sm (not
illustrated) that extend in a column direction from the signal line
driver circuit 5303, and to the scan line driver circuit 5302 by a
plurality of scan lines G1 to Gn (not illustrated) that extend in a
row direction from the scan line driver circuit 5302. The pixel
portion 5301 includes a plurality of pixels (not illustrated)
arranged in matrix so as to correspond to the signal lines S1 to Sm
and the scan lines G1 to Gn. Each pixel is connected to a signal
line Sj (one of the signal lines S1 to Sm) and a scan line Gj (one
of the scan lines G1 to Gn).
[0131] In addition, the thin film transistor which can be formed by
a method similar to that of Embodiment 2 is an n-channel TFT, and a
signal line driver circuit including the n-channel TFT will be
described with reference to FIG. 9.
[0132] The signal line driver circuit illustrated in FIG. 9
includes a driver IC 5601, switch groups 5602_1 to 5602_M, a first
wiring 5611, a second wiring 5612, a third wiring 5613, and wirings
5621_1 to 5621_M. Each of the switch groups 5602_1 to 5602_M
includes a first thin film transistor 5603a, a second thin film
transistor 5603b, and a third thin film transistor 5603c.
[0133] The driver IC 5601 is connected to the first wiring 5611,
the second wiring 5612, the third wiring 5613, and the wirings
5621_1 to 5621_M. Each of the switch groups 5602_1 to 5602_M is
connected to the first wiring 5611, the second wiring 5612, and the
third wiring 5613, and the switch groups 5602_1 to 5602_M are
connected to the wirings 5621_1 to 5621_M, respectively. Each of
the wirings 5621_1 to 5621_M is connected to three signal lines via
the first thin film transistor 5603a, the second thin film
transistor 5603b, and the third thin film transistor 5603c. For
example, the wiring 5621_J of the J-th column (one of the wirings
5621_1 to 5621_M) is connected to a signal line Sj-1, a signal line
Sj, and a signal line Sj+1 via the first thin film transistor
5603a, the second thin film transistor 5603b, and the third thin
film transistor 5603c included in the switch group 5602_J.
[0134] A signal is input to each of the first wiring 5611, the
second wiring 5612, and the third wiring 5613.
[0135] Note that the driver IC 5601 is preferably formed over a
single crystal substrate. The switch groups 5602_1 to 5602_M are
preferably formed over the same substrate as the pixel portion.
Therefore, the driver IC 5601 and the switch groups 5602_1 to
5602_M are preferably connected through an FPC or the like.
[0136] Next, operation of the signal line driver circuit
illustrated in FIG. 9 will be described with reference to a timing
chart in FIG. 10. The timing chart in FIG. 10 illustrates a case
where the scan line Gi of the i-th row is selected. A selection
period of the scan line Gi of the i-th row is divided into a first
sub-selection period T1, a second sub-selection period T2, and a
third sub-selection period T3. In addition, the signal line driver
circuit in FIG. 9 operates in a manner similar to that of FIG. 10
even when a scan line of another row is selected.
[0137] Note that the timing chart in FIG. 10 shows a case where the
wiring 5621_J in the J-th column is connected to the signal line
Sj-1, the signal line Sj, and the signal line Sj+1 via the first
thin film transistor 5603a, the second thin film transistor 5603b,
and the third thin film transistor 5603c.
[0138] The timing chart in FIG. 10 shows timing at which the scan
line Gi of the i-th row is selected, timing 5703a of on/off of the
first thin film transistor 5603a, timing 5703b of on/off of the
second thin film transistor 5603b, timing 5703c of on/off of the
third thin film transistor 5603c, and a signal 5721_J input to the
wiring 5621_J of the J-th column.
[0139] In the first sub-selection period T1, the second
sub-selection period T2, and the third sub-selection period T3,
different video signals are input to the wirings 5621_1 to 5621_M.
For example, a video signal input to the wiring 5621_J in the first
sub-selection period T1 is input to the signal line Sj-1, a video
signal input to the wiring 5621_J in the second sub-selection
period T2 is input to the signal line Sj, and a video signal input
to the wiring 5621_J in the third sub-selection period T3 is input
to the signal line Sj+1. In addition, in the first sub-selection
period T1, the second sub-selection period T2, and the third
sub-selection period T3, the video signals input to the wiring
5621_J are denoted by Data_j-1, Data j, and Data_j+1.
[0140] As illustrated in FIG. 10, in the first sub-selection period
T1, the first thin film transistor 5603a is turned on, and the
second thin film transistor 5603b and the third thin film
transistor 5603c are turned off. At this time, Data_j-1 input to
the wiring 5621_J is input to the signal line Sj-1 via the first
thin film transistor 5603a. In the second sub-selection period T2,
the second thin film transistor 5603b is turned on, and the first
thin film transistor 5603a and the third thin film transistor 5603c
are turned off. At this time, Data_j input to the wiring 5621_J is
input to the signal line Sj via the second thin film transistor
5603b. In the third sub-selection period T3, the third thin film
transistor 5603c is turned on, and the first thin film transistor
5603a and the second thin film transistor 5603b are turned off. At
this time, Data_j+1 input to the wiring 5621_J is input to the
signal line Sj+1 via the third thin film transistor 5603c.
[0141] As described above, in the signal line driver circuit in
FIG. 9, by dividing one gate selection period into three, video
signals can be input to three signal lines from one wiring 5621 in
one gate selection period. Therefore, in the signal line driver
circuit in FIG. 9, the number of connections between the substrate
provided with the driver IC 5601 and the substrate provided with
the pixel portion can be approximately 1/3 of the number of signal
lines. The number of connections is reduced to approximately 1/3 of
the number of the signal lines, so that reliability, yield, etc.,
of the signal line driver circuit in FIG. 9 can be improved.
[0142] Note that there are no particular limitations on the
arrangement, the number, a driving method, and the like of the thin
film transistors, as long as one gate selection period is divided
into a plurality of sub-selection periods and video signals are
input to a plurality of signal lines from one wiring in respective
sub-selection periods as illustrated in FIG. 9.
[0143] For example, when video signals are input to three or more
signal lines from one wiring in three or more sub-selection
periods, it is only necessary to add a thin film transistor and a
wiring for controlling the thin film transistor. Note that when one
gate selection period is divided into four or more sub-selection
periods, one sub-selection period becomes shorter. Therefore, one
gate selection period is preferably divided into two or three
sub-selection periods.
[0144] As another example, one selection period may be divided into
a precharge period Tp, the first sub-selection period T1, the
second sub-selection period T2, and the third sub-selection period
T3 as illustrated in a timing chart in FIG. 11. The timing chart in
FIG. 11 shows timing at which the scan line Gi of the i-th row is
selected, timing 5803a of on/off of the first thin film transistor
5603a, timing 5803b of on/off of the second thin film transistor
5603b, timing 5803c of on/off of the third thin film transistor
5603c, and a signal 5821_J input to the wiring 5621_J of the J-th
column. As illustrated in FIG. 11, the first thin film transistor
5603a, the second thin film transistor 5603b, and the third thin
film transistor 5603c are tuned on in the precharge period Tp. At
this time, precharge voltage Vp input to the wiring 5621_J is input
to each of the signal line Sj-1, the signal line Sj, and the signal
line Sj+1 via the first thin film transistor 5603a, the second thin
film transistor 5603b, and the third thin film transistor 5603c. In
the first sub-selection period T1, the first thin film transistor
5603a is turned on, and the second thin film transistor 5603b and
the third thin film transistor 5603c are turned off. At this time,
Data_j-1 input to the wiring 5621_J is input to the signal line
Sj-1 via the first thin film transistor 5603a. In the second
sub-selection period T2, the second thin film transistor 5603b is
turned on, and the first thin film transistor 5603a and the third
thin film transistor 5603c are turned off. At this time, Data_j
input to the wiring 5621_J is input to the signal line Sj via the
second thin film transistor 5603b. In the third sub-selection
period T3, the third thin film transistor 5603c is turned on, and
the first thin film transistor 5603a and the second thin film
transistor 5603b are turned off. At this time, Data_j+1 input to
the wiring 5621_J is input to the signal line Sj+1 via the third
thin film transistor 5603c.
[0145] As described above, in the signal line driver circuit in
FIG. 9 to which the timing chart in FIG. 11 is applied, the video
signal can be written to the pixel at high speed because the signal
line can be precharged by providing a precharge period before a
sub-selection period. Note that portions in FIG. 11 which are
similar to those of FIG. 10 are denoted by common reference
numerals and detailed description of the portions which are the
same and portions which have similar functions is omitted.
[0146] Further, a structure of a scan line driver circuit is
described. The scan line driver circuit includes a shift register
and a buffer. Additionally, the scan line driver circuit may
include a level shifter in some cases. In the scan line driver
circuit, when the clock signal (CLK) and the start pulse signal
(SP) are input to the shift register, a selection signal is
produced. The generated selection signal is buffered and amplified
by the buffer, and the resulting signal is supplied to a
corresponding scan line. Gate electrodes of transistors in pixels
of one line are connected to the scan line. Further, since the
transistors in the pixels of one line have to be turned on at the
same time, a buffer which can feed a large current can be used.
[0147] One mode of a shift register which is used for a part of a
scan line driver circuit will be described with reference to FIG.
12 and FIG. 13.
[0148] FIG. 12 illustrates a circuit configuration of the shift
register. The shift register illustrated in FIG. 12 includes a
plurality of flip-flops such as flip-flops 5701_1 to 5701.sub.--n.
The shift register is operated with input of a first clock signal,
a second clock signal, a start pulse signal, and a reset
signal.
[0149] Connection relations of the shift register in FIG. 12 will
be described. In the i-th stage flip-flop 5701.sub.--i (one of the
flip-flops 5701_1 to 5701.sub.--n) in the shift 10 register of FIG.
12, a first wiring 5501 illustrated in FIG. 13 is connected to a
seventh wiring 5717.sub.--i-1; a second wiring 5502 illustrated in
FIG. 13 is connected to a seventh wiring 5717.sub.--i+1; a third
wiring 5503 illustrated in FIG. 13 is connected to a seventh wiring
5717.sub.--i; and a sixth wiring 5506 illustrated in FIG. 13 is
connected to a fifth wiring 5715.
[0150] Further, a fourth wiring 5504 illustrated in FIG. 13 is
connected to a second wiring 5712 in flip-flops of odd-numbered
stages, and is connected to a third wiring 5713 in flip-flops of
even-numbered stages. A fifth wiring 5505 illustrated in FIG. 13 is
connected to a fourth wiring 5714.
[0151] Note that the first wiring 5501 of the first stage flip-flop
5701_1 illustrated in FIG. 13 is connected to a first wiring 5711.
Moreover, the second wiring 5502 of the n-th stage flip-flop
5701.sub.--n illustrated in FIG. 13 is connected to a sixth wiring
5716.
[0152] Note that the first wiring 5711, the second wiring 5712, the
third wiring 5713, and the sixth wiring 5716 may be referred to as
a first signal line, a second signal line, a third signal line, and
a fourth signal line, respectively. The fourth wiring 5714 and the
fifth wiring 5715 may be referred to as a first power supply line
and a second power supply line, respectively.
[0153] Next, FIG. 13 illustrates details of the flip-flop
illustrated in FIG. 12. A flip-flop illustrated in FIG. 13 includes
a first thin film transistor 5571, a second thin film transistor
5572, a third thin film transistor 5573, a fourth thin film
transistor 5574, a fifth thin film transistor 5575, a sixth thin
film transistor 5576, a seventh thin film transistor 5577, and an
eighth thin film transistor 5578. Each of the first thin film
transistor 5571, the second thin film transistor 5572, the third
thin film transistor 5573, the fourth thin film transistor 5574,
the fifth thin film transistor 5575, the sixth thin film transistor
5576, the seventh thin film transistor 5577, and 10 the eighth thin
film transistor 5578 is an n-channel transistor and is turned on
when the gate-source voltage (V.sub.gs) exceeds the threshold
voltage (V.sub.th).
[0154] Next, connection structures of the flip-flop illustrated in
FIG. 13 will be described below.
[0155] A first electrode (one of a source electrode and a drain
electrode) of the first thin film transistor 5571 is connected to
the fourth wiring 5504. A second electrode (the other of the source
electrode and the drain electrode) of the first thin film
transistor 5571 is connected to the third wiring 5503.
[0156] A first electrode of the second thin film transistor 5572 is
connected to the sixth wiring 5506. A second electrode of the
second thin film transistor 5572 is connected to the third wiring
5503.
[0157] A first electrode of the third thin film transistor 5573 is
connected to the fifth wiring 5505. A second electrode of the third
thin film transistor 5573 is connected to a gate electrode of the
second thin film transistor 5572. A gate electrode of the third
thin film transistor 5573 is connected to the fifth wiring
5505.
[0158] A first electrode of the fourth thin film transistor 5574 is
connected to the sixth wiring 5506 and a second electrode of the
fourth thin film transistor 5574 is connected to the gate electrode
of the second thin film transistor 5572. A gate electrode of the
fourth thin film transistor 5574 is connected to a gate electrode
of the first thin film transistor 5571.
[0159] A first electrode of the fifth thin film transistor 5575 is
connected to the fifth wiring 5505. A second electrode of the fifth
thin film transistor 5575 is connected to the gate electrode of the
first thin film transistor 5571. A gate electrode of the fifth thin
film transistor 5575 is connected to the first wiring 5501.
[0160] A first electrode of the sixth thin film transistor 5576 is
connected to the sixth wiring 5506. A second electrode of the sixth
thin film transistor 5576 is connected to the gate electrode of the
first thin film transistor 5571. A gate electrode of the sixth thin
film transistor 5576 is connected to the gate electrode of the
second thin film transistor 5572.
[0161] A first electrode of the seventh thin film transistor 5577
is connected to the sixth wiring 5506. A second electrode of the
seventh thin film transistor 5577 is connected to the gate
electrode of the first thin film transistor 5571. A gate electrode
of the seventh thin film transistor 5577 is connected to the second
wiring 5502. A first electrode of the eighth thin film transistor
5578 is connected to the sixth wiring 5506. A second electrode of
the eighth thin film transistor 5578 is connected to the gate
electrode of the second thin film transistor 5572. A gate electrode
of the eighth thin film transistor 5578 is connected to the first
wiring 5501.
[0162] Note that the point at which the gate electrode of the first
thin film transistor 5571, the gate electrode of the fourth thin
film transistor 5574, the second electrode of the fifth thin film
transistor 5575, the second electrode of the sixth thin film
transistor 5576, and the second electrode of the seventh thin film
transistor 5577 are connected is referred to as a node 5543. The
point at which the gate electrode of the second thin film
transistor 5572, the second electrode of the third thin film
transistor 5573, the second electrode of the fourth thin film
transistor 5574, the gate electrode of the sixth thin film
transistor 5576, and the second electrode of the eighth thin film
transistor 5578 are connected is referred to as a node 5544.
[0163] Note that the first wiring 5501, the second wiring 5502, the
third wiring 5503, and the fourth wiring 5504 may be referred to as
a first signal line, a second signal line, a third signal line, and
a fourth signal line, respectively. The fifth 10 wiring 5505 and
the sixth wiring 5506 may be referred to as a first power supply
line and a second power supply line, respectively.
[0164] In addition, the signal line driver circuit and the scan
line driver circuit can be formed using only the n-channel TFTs
which can be formed by a method similar to that of Embodiment 2.
The n-channel TFT which can be formed by a method similar to that
of Embodiment 2 has a high mobility, and thus a driving frequency
of a driver circuit can be increased. For example, a scan line
driver circuit using the n-channel TFT which can be formed by a
method similar to that of Embodiment 2 can operate at high speed,
and thus a frame frequency can be increased and insertion of black
images can be realized.
[0165] In addition, when the channel width of the transistor in the
scan line driver circuit is increased or a plurality of scan line
driver circuits are provided, for example, higher frame frequency
can be realized. When a plurality of scan line driver circuits are
provided, a scan line driver circuit for driving even-numbered scan
lines is provided on one side and a scan line driver circuit for
driving odd-numbered scan lines is provided on the opposite side;
thus, increase in frame frequency can be realized. Further, it is
advantageous that signals be outputted to the same scan line from a
plurality of scan line driver circuits in terms of increase in size
of a display device.
[0166] Further, when an active-matrix light-emitting display
device, which is an example of a semiconductor device to which an
embodiment of the present invention is applied, is manufactured, a
plurality of thin film transistors are arranged in at least one
pixel, and thus a plurality of scan line driver circuits are
preferably arranged. FIG. 8B is a block diagram illustrating an
example of an active-matrix light-emitting display device.
[0167] The light-emitting display device illustrated in FIG. 8B
includes, over a substrate 5400, a pixel portion 5401 having a
plurality of pixels provided with a display element, a first scan
line driver circuit 5402 and a second scan line driver circuit 5404
which select a pixel, and a signal line driver circuit 5403 which
controls input of a video signal to the selected pixel.
[0168] When the video signal input to a pixel of the light-emitting
display device illustrated in FIG. 8B is a digital signal, a pixel
emits light or does not emit light by switching of on/off of a
transistor. Thus, grayscale can be displayed using an area ratio
grayscale method or a time ratio grayscale method. An area ratio
grayscale method refers to a driving method by which one pixel is
divided into a plurality of subpixels and the respective subpixels
are driven independently based on video signals so that grayscale
is displayed. Further, a time ratio grayscale method refers to a
driving method by which a period during which a pixel is in a
light-emitting state is controlled so that grayscale is
displayed.
[0169] Since the response speed of light-emitting elements is
higher than that of liquid crystal elements or the like, the
light-emitting elements are more suitable for a time ratio
grayscale method than the liquid-crystal display elements.
Specifically, in the case of displaying by a time ratio gray scale
method, one frame period is divided into a plurality of subframe
periods. Then, in accordance with video signals, the light-emitting
element in the pixel is set in a light-emitting state or a
non-light-emitting state in each subframe period. By dividing one
frame into a plurality of subframe periods, the total length of
time, in which pixels actually emit light, in one frame period can
be controlled with video signals, so that grayscale can be
displayed.
[0170] The light-emitting display device illustrated in FIG. 8B is
an example in the case of arranging two switching TFTs in one
pixel, where the first scan line driver circuit 5402 generates a
signal which is input to a first scan line serving as a gate wiring
of one of the switching TFTs, and the second scan line driver
circuit 5404 generates a signal which is input to a second scan
line serving as a gate wiring of the other switching TFT. However,
one scan line driver circuit may generate both the signal which is
input to the first scan line and the signal which is input to the
second scan line. In addition, for example, there is a possibility
that a plurality of scan lines used for controlling the operation
of the switching element are provided in each pixel, depending on
the number of switching TFTs included in one pixel. In that case,
one scan line driver circuit may generate all signals that are
input to the plurality of scan lines, or a plurality of scan line
driver circuits may generate signals that are input to the
plurality of first scan lines.
[0171] In addition, also in the light-emitting display device,
among driver circuits, part of the driver circuit(s) which can be
formed using an n-channel TFT can be formed over the same substrate
as the thin film transistor of the pixel portion. Alternatively,
the signal line driver circuit and the scan line driver circuit can
be formed using only n-channel TFTs which can be formed by a method
similar to that of Embodiment 2.
[0172] Moreover, the above-described driver circuit can be used for
electronic paper that drives electronic ink using an element
electrically connected to a switching element, without being
limited to applications to a liquid crystal display device or a
light-emitting display device. The electronic paper is also
referred to as an electrophoretic display device (electrophoretic
display) and has advantages in that it has the same level of
readability as plain paper, it has lower power consumption than
other display devices, and it can be made thin and lightweight.
[0173] Electrophoretic displays can have various modes.
Electrophoretic displays contain a plurality of microcapsules
dispersed in a solvent or a solute, each microcapsule containing
first particles which are positively charged and second particles
which are negatively charged. By applying an electric field to the
microcapsules, the particles in the microcapsules are moved in
opposite directions to each other and only the color of the
particles concentrated on one side is exhibited. It is to be noted
that the first particles and the second particles each contain
pigment and do not move without an electric field. Moreover, the
colors of the first particles and the second particles are
different from each other (the colors include colorless or
achroma).
[0174] In this way, an electrophoretic display is a display that
utilizes a so-called dielectrophoretic effect by which a substance
that has a high dielectric constant moves to a high-electric field
region. An electrophoretic display does not need to use a polarizer
and a counter substrate, which are required in a liquid crystal
display device, and both the thickness and weight of the
electrophoretic display device can be a half of those of a liquid
crystal display device.
[0175] A solution in which the aforementioned microcapsules are
dispersed in a solvent is referred to as electronic ink. This
electronic ink can be printed on a surface of glass, plastic,
cloth, paper, or the like. Furthermore, with the use of a color
filter or particles including a coloring matter, color display is
possible, as well.
[0176] In addition, if a plurality of the aforementioned
microcapsules are arranged as appropriate over an active-matrix
substrate so as to be interposed between two electrodes, an
active-matrix display device can be completed, and display can be
performed by application of an electric field to the microcapsules.
For example, an active-matrix substrate obtained using the thin
film transistor which can be formed by a method similar to that of
Embodiment 2 can be used.
[0177] It is to be noted that the first particles and the second
particles in the microcapsules may each be formed of a single
material selected from a conductive material, an insulating
material, a semiconductor material, a magnetic material, a liquid
crystal material, a ferroelectric material, an electroluminescent
material, an electrochromic material, or a magnetophoretic material
or formed of a composite material of any of these.
[0178] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. Through the
above-described process, a highly reliable display device provided
with a reliable thin film transistor in which diffusion of aluminum
atoms to the oxide semiconductor layer is suppressed can be
manufactured. Note that this embodiment can be implemented in
combination with any of the structures described in other
embodiments, as appropriate.
Embodiment 5
[0179] When a thin film transistor of one embodiment of the present
invention is manufactured and used for a pixel portion and further
for a driver circuit, a semiconductor device having a display
function (also referred to as a display device) can be
manufactured. Furthermore, when part or whole of a driver circuit
using a thin film transistor of one embodiment of the present
invention is formed over the same substrate as a pixel portion, a
system-on-panel can be obtained.
[0180] The display device includes a display element. As the
display element, a liquid crystal element (also referred to as a
liquid crystal display element) or a light-emitting element (also
referred to as a light-emitting display element) can be used.
Light-emitting elements include, in its category, an element whose
luminance is controlled by current or voltage, and specifically
include an inorganic electroluminescent (EL) element, an organic EL
element, and the like. Furthermore, a display medium whose contrast
is changed by an electric effect, such as an electronic ink, can be
used.
[0181] In addition, the display device includes a panel in which
the display element is sealed, and a module in which an IC or the
like including a controller is mounted on the panel. An embodiment
of the present invention also relates to an element substrate,
which corresponds to one mode before the display element is
completed in a manufacturing process of the display device, and the
element substrate is provided with means for supplying current to
the display element in each of a plurality of pixels. Specifically,
the element substrate may be in a state after only a pixel
electrode of the display element is formed, a state after a
conductive film to be a pixel electrode is formed and before the
conductive film is etched to form the pixel electrode, or any of
other states.
[0182] Note that a display device in this specification means an
image display device, a display device, or a light source
(including a lighting device). Furthermore, the display device also
includes the following modules in its category: a module to which a
connector such as a flexible printed circuit (FPC), a tape
automated bonding (TAB) tape, or a tape carrier package (TCP) is
attached; a module having a TAB tape or a TCP at the tip of which a
printed wiring board is provided; and a module in which an
integrated circuit (IC) is directly mounted on a display element by
chip on glass (COG).
[0183] In this embodiment, the appearance and a cross section of a
liquid crystal display panel, which is one mode of the
semiconductor device according to an embodiment of the present
invention, will be described with reference to FIGS. 14A-1, 14A-2
and FIG. 14B. FIGS. 14A-1 and 14A-2 are top views of a panel in 5
which thin film transistors 4010 and 4011 with high electric
characteristics, in each of which second conductive layers formed
using a high-melting-point metal material or barrier layers
including aluminum oxide as a main component are provided between
an oxide semiconductor layer including indium, gallium, and zinc
and first conductive layers including aluminum as a main component
in order to suppress diffusion of aluminum atoms to the oxide
semiconductor layer, and a liquid crystal element 4013 are sealed
between a first substrate 4001 and a second substrate 4006 with a
sealant 4005. FIG. 14B is a cross-sectional view taken along line
M-N of FIGS. 14A-1 and 14A-2.
[0184] The sealant 4005 is provided to surround a pixel portion
4002 and a scanning line driver circuit 4004 that are provided over
the first substrate 4001. The second substrate 4006 is provided
over the pixel portion 4002 and the scanning line driver circuit
4004. Therefore, the pixel portion 4002 and the scanning line
driver circuit 4004 are sealed together with a liquid crystal layer
4008, by the first substrate 4001, the sealant 4005, and the second
substrate 4006. A signal line driver circuit 4003 that is formed
using a single crystal semiconductor film or a polycrystalline
semiconductor film over a substrate separately prepared is mounted
in a region different from the region surrounded by the sealant
4005 over the first substrate 4001.
[0185] Note that there is no particular limitation on the
connection method of a driver circuit which is separately formed,
and COG, wire bonding, TAB, or the like can be used. FIG. 14A-1
illustrates an example of mounting the signal line driver circuit
4003 by COG, and FIG. 14A-2 illustrates an example of mounting the
signal line driver circuit 4003 by TAB.
[0186] The pixel portion 4002 and the scanning line driver circuit
4004 provided over the first substrate 4001 each include a
plurality of thin film transistors. FIG. 14B illustrates the thin
film transistor 4010 included in the pixel portion 4002 and the
thin film transistor 4011 included in the scanning line driver
circuit 4004. Insulating layers 4020 and 4021 are provided over the
thin film transistors 4010 and 4011.
[0187] Each of the thin film transistors 4010 and 4011 corresponds
to a reliable 10 thin film transistor in which diffusion of
aluminum atoms to an oxide semiconductor layer is suppressed, and
any of the thin film transistors described in Embodiments 1 and 2
can be used as the thin film transistors 4010 and 4011. In this
embodiment, the thin film transistors 4010 and 4011 are n-channel
thin film transistors.
[0188] A pixel electrode layer 4030 included in the liquid crystal
element 4013 is electrically connected to the thin film transistor
4010. A counter electrode layer 4031 of the liquid crystal element
4013 is formed on the second substrate 4006. A portion where the
pixel electrode layer 4030, the counter electrode layer 4031, and
the liquid crystal layer 4008 overlap with one another corresponds
to the liquid crystal element 4013. Note that the pixel electrode
layer 4030 and the counter electrode layer 4031 are provided with
an insulating layer 4032 and an insulating layer 4033,
respectively, each of which functions as an alignment film. The
liquid crystal layer 4008 is sandwiched between the pixel electrode
layer 4030 and the counter electrode layer 4031 with the insulating
layers 4032 and 4033 interposed therebetween.
[0189] Note that the first substrate 4001 and the second substrate
4006 can be made of glass, metal (typically, stainless steel),
ceramic, or plastic. As plastic, a fiberglass-reinforced plastics
(FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or
an acrylic resin film can be used. Alternatively, a sheet with a
structure in which an aluminum foil is sandwiched between PVF films
or polyester films can be used.
[0190] Reference numeral 4035 denotes a columnar spacer obtained by
selectively etching an insulating film and is provided to control
the distance between the pixel electrode layer 4030 and the counter
electrode layer 4031 (a cell gap). Alternatively, a spherical
spacer may be used. The counter electrode layer 4031 is
electrically connected to a common potential line provided over the
same substrate as the thin film transistor 4010 through conductive
particles. Note that the conductive particles are contained in the
sealant 4005.
[0191] Alternatively, a liquid crystal showing a blue phase for
which an alignment film is unnecessary may be used. A blue phase is
one of the liquid crystal phases, which is generated just before a
cholesteric phase changes into an isotropic phase while temperature
of cholesteric liquid crystal is increased. Since the blue phase is
only generated within a narrow range of temperature, a liquid
crystal composition containing a chiral agent at 5 wt % or more is
used for the liquid crystal layer 4008 in order to improve the
temperature range. The liquid crystal composition which includes a
liquid crystal showing a blue phase and a chiral agent has a short
response time of 10 .mu.s to 100 .mu.s, has optical isotropy, which
makes the alignment process unneeded, and has a small viewing angle
dependence.
[0192] Although an example of a transmissive liquid crystal display
device is shown in this embodiment, an embodiment of the present
invention can also be applied to a reflective liquid crystal
display device or a transflective liquid crystal display
device.
[0193] In this embodiment, an example of the liquid crystal display
device is shown in which a polarizing plate is provided on the
outer surface of the substrate (on the viewer side) and a coloring
layer and an electrode layer used for a display element are
provided on the inner surface of the substrate in this order;
however, the polarizing plate may be provided on the inner surface
of the substrate. The stacked structure of the polarizing plate and
the coloring layer is not limited to that shown in this embodiment
and may be set as appropriate depending on materials of the
polarizing plate and the coloring layer or conditions of
manufacturing steps. Furthermore, a light-blocking film serving as
a black matrix may be provided.
[0194] In this embodiment, in order to reduce the surface roughness
of the thin film transistor and to improve the reliability of the
thin film transistor, the thin film transistor obtained by
Embodiment 1 or 2 is covered with the insulating layers (the
insulating layer 4020 and the insulating layer 4021) serving as a
protective film or a planarizing insulating film. Note that the
protective film is provided to prevent entry of impurities floating
in air, such as an organic substance, a metal substance, or
moisture, and is preferably a dense film. The protective film may
be formed by a sputtering method to be a single-layer film or a
multi-layer film of a silicon oxide film, a silicon nitride film, a
silicon oxynitride film, a silicon nitride oxide film, an aluminum
oxide film, an aluminum nitride film, an aluminum oxynitride film,
and/or an aluminum nitride oxide film. Although this embodiment
shows an example of forming the protective film by a sputtering
method, the present invention is not limited to this method and a
variety of methods may be employed.
[0195] In this embodiment, the insulating layer 4020 having a
multi-layer structure is formed as the protective film. As a first
layer of the insulating layer 4020, a silicon oxide film is formed
by a sputtering method. The use of the silicon oxide film as the
protective film has an effect of preventing a hillock of an
aluminum film used for the source or drain electrode layers.
[0196] The insulating layer is also formed as a second layer of the
protective film. In this embodiment, as a second layer of the
insulating layer 4020, a silicon nitride film is formed by a
sputtering method. The use of the silicon nitride film as the
protective film can prevent mobile ions such as sodium ions from
entering a semiconductor region, thereby suppressing variations in
electric characteristics of the TFT.
[0197] After the protective film is formed, the oxide semiconductor
layer including indium, gallium, and zinc may be annealed (at
300.degree. C. to 400.degree. C.).
[0198] The insulating layer 4021 is formed as the planarizing
insulating film. For the insulating layer 4021, an organic material
having heat resistance, such as polyimide, acrylic, polyimide,
benzocyclobutene, polyamide, or epoxy, can be used. Other than such
organic materials, it is also possible to use a low-dielectric
constant material (a low-k material), a siloxane-based resin, PSG
(phosphosilicate glass), BPSG (borophosphosilicate glass), or the
like. A siloxane-based resin may include as a substituent an
organic group (e.g., an alkyl group or an aryl group) or a fluoro
group. The organic group may include a fluoro group. Note that the
insulating layer 4021 may be formed by stacking a plurality of
insulating films formed of these materials.
[0199] Note that a siloxane-based resin is a resin formed from a
siloxane material as a starting material and having the bond of
Si--O--Si.
[0200] There is no particular limitation on the method for forming
the insulating layer 4021, and the insulating layer 4021 can be
formed, depending on the material, by sputtering, SOG, spin
coating, dipping, spray coating, droplet discharging (e.g.,
ink-jet, screen printing, or offset printing), doctor knife, roll
coater, curtain coater, knife coater, or the like. In the case
where the insulating layer 4021 is formed using a material
solution, the oxide semiconductor layer including indium, gallium,
and zinc may be annealed (at 300.degree. C. to 400.degree. C.) at
the same time of a baking step. The baking step of the insulating
layer 4021 also serves as the annealing step of the oxide
semiconductor layer including indium, gallium, and zinc, whereby a
semiconductor device can be manufactured efficiently.
[0201] The pixel electrode layer 4030 and the counter electrode
layer 4031 can be made of a light-transmitting conductive material
such as indium oxide containing tungsten oxide, indium zinc oxide
containing tungsten oxide, indium oxide containing titanium oxide,
indium tin oxide containing titanium oxide, indium tin oxide
(hereinafter referred to as ITO), indium zinc oxide, or indium tin
oxide to which silicon oxide is added.
[0202] A conductive composition containing a conductive high
molecule (also referred to as a conductive polymer) can be used for
the pixel electrode layer 4030 and the counter electrode layer
4031. The pixel electrode made of the conductive composition
preferably has a sheet resistance of 10000 ohms per square or less
and a transmittance of 70% or more at a wavelength of 550 nm.
Furthermore, the resistivity of the conductive high molecule
contained in the conductive composition is preferably 0.1 .OMEGA.cm
or less.
[0203] As the conductive high molecule, a so-called .pi.-electron
conjugated conductive polymer can be used. For example, it is
possible to use polyaniline or a derivative thereof, polypyrrole or
a derivative thereof, polythiophene or a derivative thereof, or a
copolymer of two or more kinds of them.
[0204] In addition, a variety of signals and a potential are
supplied to the signal line driver circuit 4003 that is formed
separately, and the scanning line driver circuit 4004 or the pixel
portion 4002 from an FPC 4018.
[0205] In this embodiment, a connecting terminal electrode 4015 is
formed using the same conductive film as that of the pixel
electrode layer 4030 included in the liquid crystal element 4013,
and a terminal electrode 4016 is formed using the same conductive
film as that of source or drain electrode layers of the thin film
transistors 4010 and 4011.
[0206] The connecting terminal electrode 4015 is electrically
connected to a terminal included in the FPC 4018 through an
anisotropic conductive film 4019.
[0207] Note that FIGS. 14A-1 and 14A-2 and FIG. 14B illustrate an
example in which the signal line driver circuit 4003 is formed
separately and mounted on the first substrate 4001; however, this
embodiment is not limited to this structure. The scanning line
driver circuit may be separately formed and then mounted, or only
part of the signal line driver circuit or part of the scanning line
driver circuit may be separately formed and then mounted.
[0208] FIG. 15 illustrates an example of a liquid crystal display
module which is formed as a semiconductor device by using a TFT
substrate 2600 manufactured using an embodiment of the present
invention.
[0209] FIG. 15 illustrates an example of a liquid crystal display
module, in which the TFT substrate 2600 and a counter substrate
2601 are bonded to each other with a sealant 2602, and a pixel
portion 2603 including a TFT or the like, a display element 2604
including a liquid crystal layer, and a coloring layer 2605 are
provided between the substrates to form a display region. The
coloring layer 2605 is necessary to perform color display. In the
case of the RGB system, respective coloring layers corresponding to
colors of red, green, and blue are provided for respective pixels.
Polarizing plates 2606 and 2607 and a diffusion plate 2613 are
provided outside the TFT substrate 2600 and the counter substrate
2601. A light source includes a cold cathode tube 2610 and a
reflective plate 2611. A circuit board 2612 is connected to a
wiring circuit portion 2608 of the TFT substrate 2600 through a
flexible wiring board 2609 and includes an external circuit such as
a control circuit or a power source circuit. The polarizing plate
and the liquid crystal layer may be stacked with a retardation
plate interposed therebetween.
[0210] For the liquid crystal display module, a TN (twisted
nematic) mode, an IPS (in-plane-switching) mode, an FFS (fringe
field switching) mode, an MVA (multi-domain vertical alignment)
mode, a PVA (patterned vertical alignment) mode, an ASM (axially
symmetric aligned micro-cell) mode, an OCB (optical compensated
birefringence) mode, an FLC (ferroelectric liquid crystal) mode, an
AFLC (antiferroelectric liquid crystal) mode, or the like can be
used.
[0211] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. Through the
above-described process, a highly reliable liquid crystal display
panel can be manufactured using a highly reliable thin film
transistor.
[0212] This embodiment can be implemented in combination with any
of the structures described in other embodiments, as
appropriate.
Embodiment 6
[0213] In this embodiment, an example of a light-emitting display
device will be described as a semiconductor device of one
embodiment of the present invention. As a display element included
in a display device, a light-emitting element utilizing
electroluminescence is described here. Light-emitting elements
utilizing electroluminescence are classified according to whether a
light-emitting material is an organic compound or an inorganic
compound. In general, the former is referred to as an organic EL
element, and the latter is referred to as an inorganic EL
element.
[0214] In an organic EL element, by application of voltage to a
light-emitting element, electrons and holes are separately injected
from a pair of electrodes into a layer containing a light-emitting
organic compound, and current flows. Then, the carriers (electrons
and holes) are recombined, so that the light-emitting organic
compound is excited. The light-emitting organic compound returns to
a ground state from the excited state, thereby emitting light.
Owing to such a mechanism, this light-emitting element is referred
to as a current-excitation light-emitting element.
[0215] The inorganic EL elements are classified according to their
element structures into a dispersion-type inorganic EL element and
a thin-film inorganic EL element. A dispersion-type inorganic EL
element has a light-emitting layer where particles of a
light-emitting material are dispersed in a binder, and its light
emission mechanism is donor-acceptor recombination type light
emission that utilizes a donor level and an acceptor level. A
thin-film inorganic EL element has a structure where a
light-emitting layer is sandwiched between dielectric layers, which
are further sandwiched between electrodes, and its light emission
mechanism is localized type light emission that utilizes
inner-shell electron transition of metal ions. Note that
description is made here using an organic EL element as a
light-emitting element.
[0216] FIG. 16 illustrates an example of a pixel structure which
can be driven by a digital time grayscale method, as an example of
a semiconductor device to which an embodiment of the present
invention is applied.
[0217] The structure and operation of a pixel which can be driven
by a digital time grayscale method will be described. An example is
shown here in which one pixel includes two n-channel transistors
that use an oxide semiconductor layer including indium, gallium,
and zinc described in Embodiment 1 or 2 in a channel formation
region.
[0218] A pixel 6400 includes a switching transistor 6401, a driving
transistor 6402, a light-emitting element 6404, and a capacitor
6403. A gate of the switching transistor 6401 is connected to a
scan line 6406, a first electrode (one of a source electrode and a
drain electrode) of the switching transistor 6401 is connected to a
signal line 6405, and a second electrode (the other of the source
electrode and the drain electrode) of the switching transistor 6401
is connected to a gate of the driving transistor 6402. The gate of
the driving transistor 6402 is connected to a power supply line
6407 through the capacitor 6403, a first electrode of the driving
transistor 6402 is connected to the power supply line 6407, and a
second electrode of the driving transistor 6402 is connected to a
first electrode (pixel electrode) of the light-emitting element
6404. A second electrode of the light-emitting element 6404
corresponds to a common electrode 6408. The common electrode 6408
is electrically connected to a common potential line provided over
the same substrate.
[0219] Note that the second electrode (the common electrode 6408)
of the light-emitting element 6404 is set to a low power supply
potential. The low power supply potential is lower than a high
power supply potential which is supplied to the power supply line
6407. For example, GND or 0 V may be set as the low power supply
potential. The difference between the high power supply potential
and the low power supply potential is applied to the light-emitting
element 6404 to flow current in the light-emitting element 6404,
whereby the light-emitting element 6404 emits light. Thus, each
potential is set so that the difference between the high power
supply potential and the low power supply potential is higher than
or equal to a forward threshold voltage of the light-emitting
element 6404.
[0220] When the gate capacitance of the driving transistor 6402 is
used as a substitute for the capacitor 6403, the capacitor 6403 can
be omitted. The gate capacitance of the driving transistor 6402 may
be formed between a channel region and a gate electrode.
[0221] In the case of using a voltage-input voltage driving method,
a video signal is input to the gate of the driving transistor 6402
to make the driving transistor 6402 completely turn on or off. That
is, the driving transistor 6402 operates in a linear region, and
thus, a voltage higher than the voltage of the power supply line
6407 is applied to the gate of the driving transistor 6402. Note
that a voltage higher than or equal to (power supply line
voltage+V.sub.th of the driving transistor 6402) is applied to the
signal line 6405.
[0222] In the case of using an analog grayscale method instead of
the digital time grayscale method, the same pixel structure as in
FIG. 16 can be employed by inputting signals in a different
way.
[0223] In the case of using the analog grayscale method, a voltage
higher than or equal to (forward voltage of the light-emitting
element 6404+V.sub.th of the driving transistor 6402) is applied to
the gate of the driving transistor 6402. The forward voltage of the
light-emitting element 6404 refers to a voltage to obtain a desired
luminance, and includes at least a forward threshold voltage. By
inputting a video signal to allow the driving transistor 6402 to
operate in a saturation region, current can flow in the
light-emitting element 6404. In order to allow the driving
transistor 6402 to operate in the saturation region, the potential
of the power supply line 6407 is higher than a gate potential of
the driving transistor 6402. Since the video signal is an analog
signal, a current in accordance with the video signal flows in the
light-emitting element 6404, and the analog grayscale method can be
performed.
[0224] Note that the pixel structure is not limited to that
illustrated in FIG. 16. For example, the pixel in FIG. 16 can
further include a switch, a resistor, a capacitor, a transistor, a
logic circuit, or the like.
[0225] Next, structures of the light-emitting element will be
described with reference to FIGS. 17A to 17C. A cross-sectional
structure of a pixel will be described by taking an n-channel
driving TFT as an example. Driving TFTs 7001, 7011, and 7021 used
for semiconductor devices illustrated in FIGS. 17A to 17C can be
manufactured in a manner similar to the thin film transistor
described in Embodiment 1 or 2 and are highly reliable thin film
transistors in each of which second conductive layers formed using
a high-melting-point metal material or barrier layers including
aluminum oxide as a main component are provided between an oxide
semiconductor layer including indium, gallium, and zinc and first
conductive layers including aluminum as a main component in order
to suppress diffusion of aluminum atoms to the oxide semiconductor
layer.
[0226] In order to extract light emitted from the light-emitting
element, at least one of the anode and the cathode is required to
transmit light. A thin film transistor and a light-emitting element
are formed over a substrate. A light-emitting element can have a
top emission structure in which light is extracted through the
surface opposite to the substrate; a bottom emission structure in
which light is extracted through the surface on the substrate side;
or a dual emission structure in which light is extracted through
the surface opposite to the substrate and the surface on the
substrate side. The pixel structure of an embodiment of the present
invention can be applied to a light-emitting element having any of
these emission structures.
[0227] A light-emitting element having a top emission structure
will be described with reference to FIG. 17A.
[0228] FIG. 17A is a cross-sectional view of a pixel in the case
where the driving TFT 7001 is of an n-type and light is emitted
from a light-emitting element 7002 to an anode 7005 side. In FIG.
17A, a cathode 7003 of the light-emitting element 7002 is
electrically connected to the driving TFT 7001, and a
light-emitting layer 7004 and the anode 7005 are stacked in this
order over the cathode 7003. The cathode 7003 can be made of a
variety of conductive materials as long as they have a low work
function and reflect light. For example, Ca, Al, CaF, MgAg, AlLi,
or the like is preferably used. The light-emitting layer 7004 may
be formed using a single layer or a plurality of layers stacked.
When the light-emitting layer 7004 is formed using a plurality of
layers, the light-emitting layer 7004 is formed by stacking an
electron-injecting layer, an electron-transporting layer, a
light-emitting layer, a hole-transporting layer, and a
hole-injecting layer in this order over the cathode 7003. Not all
of these layers need to be provided. The anode 7005 is 10 made of a
light-transmitting conductive material such as indium oxide
including tungsten oxide, indium zinc oxide including tungsten
oxide, indium oxide including titanium oxide, indium tin oxide
including titanium oxide, indium tin oxide (hereinafter referred to
as ITO), indium zinc oxide, or indium tin oxide to which silicon
oxide is added.
[0229] The light-emitting element 7002 corresponds to a region
where the cathode 7003 and the anode 7005 sandwich the
light-emitting layer 7004. In the case of the pixel illustrated in
FIG. 17A, light is emitted from the light-emitting element 7002 to
the anode 7005 side as indicated by an arrow.
[0230] Next, a light-emitting element having a bottom emission
structure will be described with reference to FIG. 17B. FIG. 17B is
a cross-sectional view of a pixel in the case where the driving TFT
7011 is of an n-type and light is emitted from a light-emitting
element 7012 to a cathode 7013 side. In FIG. 17B, the cathode 7013
of the light-emitting element 7012 is formed over a
light-transmitting conductive film 7017 which is electrically
connected to the driving TFT 7011, and a light-emitting layer 7014
and an anode 7015 are stacked in this order over the cathode 7013.
A light-blocking film 7016 for reflecting or blocking light may be
formed to cover the anode 7015 when the anode 7015 has a
light-transmitting property. For the cathode 7013, various
materials can be used, like in the case of FIG. 17A, as long as
they are conductive materials having a low work function. Note that
the cathode 7013 is formed to have a thickness that can transmit
light (preferably, approximately 5 nm to 30 nm). For example, an
aluminum film with a thickness of 20 nm can be used as the cathode
7013. Similarly to the case of FIG. 17A, the light-emitting layer
7014 may be formed using either a single layer or a plurality of
layers stacked. The anode 7015 is not required to transmit light,
but can be made of a light-transmitting conductive material like in
the case of FIG. 17A. As the light-blocking film 7016, a metal
which reflects light can be used for example; however, it is not
limited to a metal film. For example, a resin to which black
pigments are added can also be used.
[0231] The light-emitting element 7012 corresponds to a region
where the cathode 7013 and the anode 7015 sandwich the
light-emitting layer 7014. In the case of the pixel illustrated in
FIG. 17B, light is emitted from the light-emitting element 7012 to
the cathode 7013 side as indicated by an arrow.
[0232] Next, a light-emitting element having a dual emission
structure will be described with reference to FIG. 17C. In FIG.
17C, a cathode 7023 of a light-emitting element 7022 is formed over
a light-transmitting conductive film 7027 which is electrically
connected to the driving TFT 7021, and a light-emitting layer 7024
and an anode 7025 are stacked in this order over the cathode 7023.
Like in the case of FIG. 17A, the cathode 7023 can be made of a
variety of conductive materials as long as they have a low work
function. Note that the cathode 7023 is formed to have a thickness
that can transmit light. For example, a film of Al having a
thickness of 20 nm can be used as the cathode 7023. Like in FIG.
17A, the light-emitting layer 7024 may be formed using either a
single layer or a plurality of layers stacked. The anode 7025 can
be made of a light-transmitting conductive material like in the
case of FIG. 17A.
[0233] The light-emitting element 7022 corresponds to a region
where the cathode 7023, the light-emitting layer 7024, and the
anode 7025 overlap with one another. In the case of the pixel
illustrated in FIG. 17C, light is emitted from the light-emitting
element 7022 to both the anode 7025 side and the cathode 7023 side
as indicated by arrows.
[0234] Although an organic EL element is described here as a
light-emitting element, an inorganic EL element can also be
provided as a light-emitting element.
[0235] In this embodiment, the example is described in which a thin
film transistor (a driving TFT) which controls the driving of a
light-emitting element is electrically connected to the
light-emitting element; however, a structure may be employed in
which a TFT for current control is connected between the driving
TFT and the light-emitting element.
[0236] The structure of the semiconductor device described in this
embodiment is not limited to those illustrated in FIGS. 17A to 17C
and can be modified in various ways based on the spirit of
techniques of an embodiment of the present invention.
[0237] Next, the appearance and a cross section of a light-emitting
display panel (also referred to as a light-emitting panel), which
is one mode of the semiconductor device according to an embodiment
of the present invention, will be described with reference to FIGS.
18A and 18B. FIG. 18A is a top view of a panel in which thin film
transistors with high electric characteristics, in each of which
second conductive layers formed using a high-melting-point metal
material or barrier layers including aluminum oxide as a main
component are provided between an oxide semiconductor layer
including indium, gallium, and zinc and first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer, and a
light-emitting element are sealed between a first substrate and a
second substrate with a sealant. FIG. 18B is a cross-sectional view
taken along line H-I of FIG. 18A.
[0238] A sealant 4505 is provided to surround a pixel portion 4502,
signal line driver circuits 4503a and 4503b, and scanning line
driver circuits 4504a and 4504b, which are provided over a first
substrate 4501. In addition, a second substrate 4506 is provided
over the pixel portion 4502, the signal line driver circuits 4503a
and 4503b, and the scanning line driver circuits 4504a and 4504b.
Accordingly, the pixel portion 4502, the signal line driver
circuits 4503a and 4503b, and the scanning line driver circuits
4504a and 4504b are sealed together with a filler 4507, by the
first substrate 4501, the sealant 4505, and the second substrate
4506. It is preferable that a display device be thus packaged
(sealed) with a protective film (such as a bonding film or an
ultraviolet curable resin film) or a cover material with high
air-tightness and little degasification so that the display device
is not exposed to the outside air.
[0239] The pixel portion 4502, the signal line driver circuits
4503a and 4503b, and the scanning line driver circuits 4504a and
4504b formed over the first substrate 4501 each include a plurality
of thin film transistors, and a thin film transistor 4510 included
in the pixel portion 4502 and a thin film transistor 4509 included
in the signal line driver circuit 4503a are illustrated as an
example in FIG. 18B.
[0240] Each of the thin film transistors 4509 and 4510 is a thin
film transistor with high electric characteristics, in which second
conductive layers formed using a high-melting-point metal material
or barrier layers including aluminum oxide as a main component are
provided between an oxide semiconductor layer including indium,
gallium, and zinc and first conductive layers including aluminum as
a main component in order to suppress diffusion of aluminum atoms
to the oxide semiconductor layer, and any of the thin film
transistors described in Embodiments 1 and 2 can be used as the
thin film transistors 4509 and 4510. In this embodiment, the thin
film transistors 4509 and 4510 are n-channel thin film
transistors.
[0241] Moreover, reference numeral 4511 denotes a light-emitting
element. A first electrode layer 4517 that is a pixel electrode
included in the light-emitting element 4511 is electrically
connected to a source electrode layer or a drain electrode layer of
the thin film transistor 4510. Note that a structure of the
light-emitting element 4511 is not limited to the stacked structure
shown in this embodiment, which includes the first electrode layer
4517, an electroluminescent layer 4512, and the second electrode
layer 4513. The structure of the light-emitting element 4511 can be
changed as appropriate depending on the direction in which light is
extracted from the light-emitting element 4511, or the like.
[0242] A partition wall 4520 is made of an organic resin film, an
inorganic insulating film, or organic polysiloxane. It is
particularly preferable that the partition wall 4520 be formed of a
photosensitive material to have an opening over the first electrode
layer 4517 so that a sidewall of the opening is formed as an
inclined surface with continuous curvature.
[0243] The electroluminescent layer 4512 may be formed using a
single layer or a plurality of layers stacked.
[0244] A protective film may be formed over the second electrode
layer 4513 and the partition wall 4520 in order to prevent oxygen,
hydrogen, moisture, carbon dioxide, or the like from entering the
light-emitting element 4511. As the protective film, a silicon
nitride film, a silicon nitride oxide film, a DLC film, or the like
can be formed.
[0245] A variety of signals and potentials are supplied to the
signal line driver circuits 4503a and 4503b, the scanning line
driver circuits 4504a and 4504b, or the pixel portion 4502 from
FPCs 4518a and 4518b.
[0246] In this embodiment, a connection terminal electrode 4515 is
formed using the same conductive film as the first electrode layer
4517 included in the light-emitting element 4511, and a terminal
electrode 4516 is formed using the same conductive film as the
source and drain electrode layers included in the thin film
transistors 4509 and 4510.
[0247] The connection terminal electrode 4515 is electrically
connected to a terminal of the FPC 4518a through an anisotropic
conductive film 4519.
[0248] The second substrate 4506 located in the direction in which
light is extracted from the light-emitting element 4511 needs to
have a light-transmitting property. In that case, a
light-transmitting material such as a glass plate, a plastic plate,
a polyester film, or an acrylic film is used.
[0249] As the filler 4507, an ultraviolet curable resin or a
thermosetting resin can be used, in addition to an inert gas such
as nitrogen or argon. For example, PVC (polyvinyl chloride),
acrylic, polyimide, an epoxy resin, a silicone resin, PVB
(polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used.
In this embodiment, nitrogen is used for the filler 4507.
[0250] If needed, an optical film, such as a polarizing plate, a
circularly polarizing plate (including an elliptically polarizing
plate), a retardation plate (a quarter-wave plate or a half-wave
plate), or a color filter, may be provided as appropriate on a
light-emitting surface of the light-emitting element. Furthermore,
the polarizing plate or the circularly polarizing plate may be
provided with an anti-reflection film. For example, anti-glare
treatment by which reflected light can be diffused by projections
and depressions on the surface so as to reduce the glare can be
performed.
[0251] The signal line driver circuits 4503a and 4503b and the
scanning line driver circuits 4504a and 4504b may be mounted as
driver circuits formed using a single crystal semiconductor film or
a polycrystalline semiconductor film over a substrate separately
prepared. Alternatively, only the signal line driver circuits or
part thereof, or only the scanning line driver circuits or part
thereof may be separately formed and mounted. This embodiment is
not limited to the structure illustrated in FIGS. 18A and 18B.
[0252] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. By mounting a
reliable thin film transistor in which diffusion of aluminum atoms
to the oxide semiconductor layer is suppressed, a highly reliable
display device can be manufactured. This embodiment can be
implemented in combination with any of the structures described in
other embodiments, as appropriate.
Embodiment 7
[0253] A display device of one embodiment of the present invention
can be applied to electronic paper. Electronic paper can be used
for electronic appliances of a variety of fields as long as they
can display data. For example, electronic paper can be applied to
an e-book reader (electronic book), a poster, an advertisement in a
vehicle such as a train, or displays of various cards such as a
credit card. Examples of the electronic appliances are illustrated
in FIGS. 19A and 19B and FIG. 20.
[0254] FIG. 19A illustrates a poster 2631 using electronic paper.
In the case where an advertising medium is printed paper, the
advertisement is replaced by hands; however, by using electronic
paper to which an embodiment of the present invention is applied,
the advertising display can be changed in a short time.
Furthermore, stable images can be obtained without display defects.
Note that the poster may have a configuration capable of wirelessly
transmitting and receiving data.
[0255] FIG. 19B illustrates an advertisement 2632 in a vehicle such
as a train. In the case where an advertising medium is printed
paper, the advertisement is replaced by hands; however, by using
electronic paper to which an embodiment of the present invention is
applied, the advertising display can be changed in a short time
with less manpower. Furthermore, stable images can be obtained
without display defects. Note that the advertisement in a vehicle
may have a configuration capable of wirelessly transmitting and
receiving data.
[0256] FIG. 20 illustrates an example of an e-book reader 2700. For
example, the e-book reader 2700 includes two housings, a housing
2701 and a housing 2703. The housing 2701 and the housing 2703 are
combined with a hinge 2711 so that the e-book reader 2700 can be
opened and closed with the hinge 2711 as an axis. With such a
structure, the e-book reader 2700 can be operated like a paper
book.
[0257] A display portion 2705 and a display portion 2707 are
incorporated in the housing 2701 and the housing 2703,
respectively. The display portion 2705 and the display portion 2707
may display one image or different images. In the case where the
display portion 2705 and the display portion 2707 display different
images, for example, text can be displayed on a display portion on
the right side (the display portion 2705 in FIG. 20) and graphics
can be displayed on a display portion on the left side (the display
portion 2707 in FIG. 20).
[0258] FIG. 20 illustrates an example in which the housing 2701 is
provided with an operation portion and the like. For example, the
housing 2701 is provided with a power switch 2721, an operation key
2723, a speaker 2725, and the like. With the operation key 2723,
pages can be turned. Note that a keyboard, a pointing device, and
the like may be provided on the same surface as the display portion
of the housing. Furthermore, an external connection terminal (an
earphone terminal, a USB terminal, a terminal that can be connected
to various cables such as an AC adapter and a USB cable, or the
like), a recording medium insertion portion, and the like may be
provided on the back surface or the side surface of the housing.
Moreover, the e-book reader 2700 may have a function of an
electronic dictionary.
[0259] The e-book reader 2700 may have a configuration capable of
wirelessly transmitting and receiving data. Through wireless
communication, desired book data or the like can be purchased and
downloaded from an electronic book server.
[0260] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. By mounting a
reliable thin film transistor in which diffusion of aluminum atoms
to the oxide semiconductor layer is suppressed, a highly reliable
display device can be manufactured.
Embodiment 8
[0261] A semiconductor device according to an embodiment of the
present invention can be applied to a variety of electronic
appliances (including an amusement machine) Examples of electronic
appliances are a television set (also referred to as a television
or a television receiver), a monitor of a computer or the like, a
camera such as a digital camera or a digital video camera, a
digital photo frame, a cellular phone (also referred to as a mobile
phone or a mobile phone set), a portable game console, a portable
information terminal, an audio reproducing device, a large-sized
game machine such as a pachinko machine, and the like.
[0262] FIG. 21A illustrates an example of a television set 9600. In
the television set 9600, a display portion 9603 is incorporated in
a housing 9601. Images can be displayed on the display portion
9603. Here, the housing 9601 is supported by a stand 9605.
[0263] The television set 9600 can be operated by an operation
switch of the housing 9601 or a separate remote controller 9610.
Channels and volume can be controlled by an operation key 9609 of
the remote controller 9610 so that an image displayed on the
display portion 9603 can be controlled. Furthermore, the remote
controller 9610 may be provided with a display portion 9607 for
displaying data output from the remote controller 9610.
[0264] Note that the television set 9600 is provided with a
receiver, a modem, and the like. With the receiver, a general
television broadcast can be received. Furthermore, when the
television set 9600 is connected to a communication network by
wired or wireless connection via the modem, one-way (from a
transmitter to a receiver) or two-way (between a transmitter and a
receiver, between receivers, or the like) data communication can be
performed.
[0265] FIG. 21B illustrates an example of a digital photo frame
9700. For example, in the digital photo frame 9700, a display
portion 9703 is incorporated in a housing 9701. Various images can
be displayed on the display portion 9703. For example, the display
portion 9703 can display data of an image shot by a digital camera
or the like to function as a normal photo frame.
[0266] Note that the digital photo frame 9700 is provided with an
operation portion, an external connection portion (a USB terminal,
a terminal that can be connected to various cables such as a USB
cable, or the like), a recording medium insertion portion, and the
like. Although they may be provided on the same surface as the
display portion, it is preferable to provide them on the side
surface or the back surface for the design of the digital photo
frame 9700. For example, a memory storing data of an image shot by
a digital camera is inserted in the recording medium insertion
portion of the digital photo frame, whereby the image data can be
downloaded and displayed on the display portion 9703.
[0267] The digital photo frame 9700 may have a configuration
capable of wirelessly transmitting and receiving data. Through
wireless communication, desired image data can be downloaded to be
displayed.
[0268] FIG. 22A is a portable amusement machine including two
housings, a housing 9881 and a housing 9891. The housings 9881 and
9891 are connected 15 with a connection portion 9893 so as to be
opened and closed. A display portion 9882 and a display portion
9883 are incorporated in the housing 9881 and the housing 9891,
respectively. In addition, the portable amusement machine
illustrated in FIG. 22A includes a speaker portion 9884, a
recording medium insertion portion 9886, an LED lamp 9890, an input
means (an operation key 9885, a connection terminal 9887, a sensor
9888 (a sensor having a function of measuring force, displacement,
position, speed, acceleration, angular velocity, rotational
frequency, distance, light, liquid, magnetism, temperature,
chemical substance, sound, time, hardness, electric field, current,
voltage, electric power, radiation, flow rate, humidity, gradient,
oscillation, odor, or infrared rays), or a microphone 9889), and
the like. It is needless to say that the structure of the portable
amusement machine is not limited to the above and other structures
provided with at least a semiconductor device according to an
embodiment of the present invention may be employed. The portable
amusement machine may include other accessory equipment as
appropriate. The portable amusement machine illustrated in FIG. 22A
has a function of reading a program or data stored in a recording
medium to display it on the display portion, and a function of
sharing information with another portable amusement machine by
wireless communication. The portable amusement machine illustrated
in FIG. 22A can have various functions without limitation to the
above.
[0269] FIG. 22B illustrates an example of a slot machine 9900 which
is a large-sized amusement machine. In the slot machine 9900, a
display portion 9903 is incorporated in a housing 9901. In
addition, the slot machine 9900 includes an operation means such as
a start lever or a stop switch, a coin slot, a speaker, and the
like. It is needless to say that the structure of the slot machine
9900 is not limited to the above and other structures provided with
at least a semiconductor device according to an embodiment of the
present invention may be employed. The slot machine 9900 may
include other accessory equipment as appropriate.
[0270] FIG. 23 illustrates an example of a cellular phone 1000. The
cellular phone 1000 is provided with a display portion 1002
incorporated in a housing 1001, operation buttons 1003, an external
connection port 1004, a speaker 1005, a microphone 1006, and the
like.
[0271] When the display portion 1002 of the cellular phone 1000
illustrated in FIG. 23 is touched with a finger or the like, data
can be input into the mobile phone 1000. Furthermore, operations
such as making calls and composing mails can be performed by
touching the display portion 1002 with a finger or the like.
[0272] There are mainly three screen modes of the display portion
1002. The first mode is a display mode mainly for displaying
images. The second mode is an input mode mainly for inputting data
such as text. The third mode is a display-and-input mode in which
two modes of the display mode and the input mode are combined.
[0273] For example, in the case of making a call or composing a
mail, a text input mode mainly for inputting text is selected for
the display portion 1002 so that text displayed on a screen can be
input. In that case, it is preferable to display a keyboard or
number buttons on almost all the area of the screen of the display
portion 1002.
[0274] When a detection device including a sensor for detecting
inclination, such as a gyroscope or an acceleration sensor, is
provided inside the cellular phone 1000, display on the screen of
the display portion 1002 can be automatically switched by
determining the direction of the cellular phone 1000 (whether the
cellular phone 1000 is placed horizontally or vertically for a
landscape mode or a portrait mode).
[0275] The screen mode is switched by touching the display portion
1002 or operating the operation buttons 1003 of the housing 1001.
Alternatively, the screen mode may be switched depending on the
kind of images displayed on the display portion 1002. For example,
when a signal of an image displayed on the display portion is of
moving image data, the screen mode is switched to the display mode.
When the signal is of text data, the screen mode is switched to the
input mode.
[0276] Furthermore, in the input mode, when input by touching the
display portion 1002 is not performed for a certain period after a
signal is detected by the optical sensor in the display portion
1002, the screen mode may be controlled so as to be switched from
the input mode to the display mode.
[0277] The display portion 1002 may function as an image sensor.
For example, an image of a palm print, a fingerprint, or the like
is taken by touching the display portion 1002 with the palm or the
finger, whereby personal authentication can be performed.
Furthermore, by providing a backlight or sensing light source
emitting a near-infrared light for the display portion, an image of
a finger vein, a palm vein, or the like can also be taken.
[0278] In the thin film transistor described in Embodiment 1 or 2,
the second conductive layers formed using a high-melting-point
metal material or the barrier layers including aluminum oxide as a
main component are provided between the oxide semiconductor layer
including indium, gallium, and zinc and the first conductive layers
including aluminum as a main component in order to suppress
diffusion of aluminum atoms to the oxide semiconductor layer; thus,
the thin film transistor has high reliability. By mounting a
reliable thin film transistor in which diffusion of aluminum atoms
to the oxide semiconductor layer is suppressed, a highly reliable
electronic appliance can be manufactured.
[0279] This application is based on Japanese Patent Application
serial No. 2008-264497 filed with Japan Patent Office on Oct. 10,
2008, the entire contents of which are hereby incorporated by
reference.
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