U.S. patent application number 13/588620 was filed with the patent office on 2012-12-13 for display device, method of manufacturing display device, and electronic apparatus.
This patent application is currently assigned to SONY CORPORATION. Invention is credited to Masumitsu Ino.
Application Number | 20120314162 13/588620 |
Document ID | / |
Family ID | 38593036 |
Filed Date | 2012-12-13 |
United States Patent
Application |
20120314162 |
Kind Code |
A1 |
Ino; Masumitsu |
December 13, 2012 |
DISPLAY DEVICE, METHOD OF MANUFACTURING DISPLAY DEVICE, AND
ELECTRONIC APPARATUS
Abstract
A display device including: a first substrate with a pixel
switch and drivers mounted thereon; a second substrate disposed in
facing relation to the first substrate; a material layer held
between the first substrate and the second substrate and having
peripheral edges sealed by a seal member, the material layer having
an electrooptical effect; and a semiconductor chip mounted as a COG
component on the first substrate, the semiconductor chip having a
control system configured to control the drivers; wherein the
semiconductor chip having a thickness equal to the total thickness
of the seal member and the second substrate or larger than the
thickness of the seal member and smaller than the total
thickness.
Inventors: |
Ino; Masumitsu; (Kanagawa,
JP) |
Assignee: |
SONY CORPORATION
Tokyo
JP
|
Family ID: |
38593036 |
Appl. No.: |
13/588620 |
Filed: |
August 17, 2012 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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11684867 |
Mar 12, 2007 |
8274633 |
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13588620 |
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Current U.S.
Class: |
349/96 ;
257/E33.056; 438/26 |
Current CPC
Class: |
G02F 1/13363 20130101;
G02F 1/1368 20130101; G02F 1/13452 20130101; G02F 1/13454 20130101;
H01J 9/20 20130101; G02F 1/133308 20130101; G02F 1/133528 20130101;
G02F 2201/50 20130101; G02F 1/1339 20130101 |
Class at
Publication: |
349/96 ; 438/26;
257/E33.056 |
International
Class: |
G02F 1/1339 20060101
G02F001/1339; G02F 1/136 20060101 G02F001/136; H01L 33/48 20100101
H01L033/48; G02F 1/1335 20060101 G02F001/1335 |
Foreign Application Data
Date |
Code |
Application Number |
Mar 14, 2006 |
JP |
2006-069539 |
Claims
1. A display device comprising: a first substrate with a pixel
switch and drivers mounted thereon; a second substrate disposed in
facing relation to said first substrate; a material layer having an
electrooptical effect; a first polarizing plate and phase
difference plate combination disposed between said first substrate
and said material layer; a second polarizing plate and phase
difference plate combination disposed between said second substrate
and said material layer; a seal member holding said material layer
between said first and second polarizing plate and phase difference
plate combinations thereby to seal said material layer; and a
semiconductor chip mounted as a COG component on said first
substrate, said semiconductor chip having a control system
configured to control said drivers; wherein, said semiconductor
chip has a thickness equal to or smaller than the total thickness
of said first and second polarizing plate and phase difference
plate combinations, said material layer, and said second
substrate.
2. The display device according to claim 1, wherein said seal
member is disposed between said first and second polarizing plate
and phase difference plate combinations.
3. The display device according to claim 1, wherein: said first and
second polarizing plate and phase difference plate combinations are
disposed inwardly of a region in which said material layer is
sealed by said seal member, and said seal member being disposed
between said first substrate and said second substrate alongside of
said first and second polarizing plate and phase difference plate
combinations.
4. The display device according to claim 1, further comprising a
protective fixing member disposed on at least a portion of said
first substrate laterally of said semiconductor chip.
5. The display device according to claim 2, further comprising a
protective fixing member disposed on at least a portion of said
first substrate laterally of said semiconductor chip.
6. The display device according to claim 3, further comprising a
protective fixing member disposed on at least a portion of said
first substrate laterally of said semiconductor chip.
7. A method of manufacturing a display device having a first
substrate with a pixel switch and drivers mounted thereon, a second
substrate disposed in facing relation to said first substrate, and
a material layer held between said first substrate and said second
substrate and sealed by a seal member, the method comprising: a
first step of mounting a semiconductor chip having a control system
configured to control said drivers, as a COG component on said
first substrate parallel to a region in which said seal member and
said second substrate are stacked; a second step of filling a space
around said semiconductor chip with a protective fixing member
thereby to secure said first substrate and said semiconductor chip
to each other; and a third step of simultaneously polishing said
second substrate and said semiconductor chip to the same thickness
as each other.
8. The electronic apparatus having a display device, said display
device comprising: a first substrate with a pixel switch and
drivers mounted thereon; a second substrate disposed in facing
relation to said first substrate; a material layer having an
electrooptical effect; a first polarizing plate and phase
difference plate combination disposed between said first substrate
and said material layer; a second polarizing plate and phase
difference plate combination disposed between said second substrate
and said material layer; a seal member holding said material layer
between said first and second polarizing plate and phase difference
plate combinations thereby to seal said material layer; and a
semiconductor chip mounted as a COG component on said first
substrate, said semiconductor chip having a control system
configured to control said drivers, wherein, said semiconductor
chip has a thickness equal to or smaller than the total thickness
of said first and second polarizing plate and phase difference
plate combinations, said material layer, and said second substrate.
Description
RELATED APPLICATION DATA
[0001] This application is a division of U.S. patent application
Ser. No. 11/684,867, filed on Mar. 12, 2007, the entirety of which
is incorporated herein by reference to the extent permitted by law.
The present invention claims priority to and contains subject
matter related to Japanese Patent Application No. JP 2006-069539
filed in the Japan Patent Office on Mar. 14, 2006, the entire
contents of which being incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a display device, a method
of manufacturing such a display device, and an electronic apparatus
for use in a portable terminal such as a cellular phone, a PDA
(Personal Digital Assistant), or the like which is required to be
of a low profile.
[0004] 2. Description of the Related Art
[0005] One of the most important concerns for designing portable
terminals is to make themselves low in profile. If a liquid crystal
display device for use in a portable terminal display is thick,
then it presents an obstacle to efforts to make the portable
terminal low in profile. Therefore, there are growing demands for
low-profile liquid crystal display devices.
[0006] FIGS. 18A and 18B of the accompanying drawings schematically
show a cross-sectional structure of a general liquid crystal
display device. FIG. 18A shows an overall cross-sectional structure
of a liquid crystal panel 100, and FIG. 18B shows the
cross-sectional structure in greater detail.
[0007] As shown in FIGS. 18A and 18B, the liquid crystal panel 100
includes a transparent insulating substrate (hereinafter referred
to as "TFT (Thin Film Transistor) glass substrate") 101 supporting
thereon pixel switches and a driver circuit therefor which are
constructed of TFTs, a transparent insulating substrate
(hereinafter referred to as "facing glass substrate") 102 disposed
in facing relation to the TFT glass substrate 101, and a liquid
crystal display (LCD) layer 106 held between the TFT glass
substrate 101 and the facing glass substrate 102 and sealed by a
seal member 105.
[0008] In an attempt to make the liquid crystal panel 100 low in
profile, a semiconductor chip 107 including a control circuit for
controlling the driver circuit is mounted as a COG (Chip On Glass)
component on the TFT glass substrate 101. The semiconductor chip
107 will hereinafter be referred to as "COG chip 107".
[0009] The use of the COG chip 107 allows design efforts to be made
to reduce the total thickness of the facing glass substrate 102,
the TFT glass substrate 101, the seal member 105, and polarizing
plate and phase difference plate combinations 103, 104 mounted
respectively on the facing glass substrate 102 and the TFT glass
substrate 101 and also to make the COG 107 thin.
[0010] The thickness T1 (e.g., 390 .mu.m) of the COG chip 107 has
been designed to be greater than the total thickness T2 (195
.mu.m+80 .mu.m=275 .mu.m) of the polarizing plate and phase
difference plate combination 104, the facing glass substrate 102,
and the seal member 105 (T1>T2). In FIG. 18A, the liquid crystal
panel 100 has an overall thickness T0.
[0011] Many proposals have been made to reduce the thickness of
liquid crystal display devices.
[0012] For example, a liquid crystal display device has a liquid
crystal display panel whose opposite surfaces are polished to make
itself thin, so that a plurality of liquid crystal display panels
can be stacked together for displaying images (see Japanese Patent
No. 3290379, paragraphs [0007] through [0013], FIG. 1, referred to
as Patent Document 1). After a liquid crystal display panel has
been polished into a low profile, a COG chip is connected thereto
(see Japanese Patent Laid-open No. Hei 11-104954, paragraphs [0007]
through [0009], FIG. 3, referred to as Patent Document 2). The
thickness of a COG chip is smaller than the total thickness of a
facing glass substrate and a seal member which seals an LCD layer
(see Japanese Patent Laid-open No. 2001-350421, paragraphs [0007]
through [0008], FIG. 7, referred to as Patent Document 3).
Polarizing plate and phase difference plate combinations are in the
form of polymer films mounted on a facing glass substrate and a TFT
glass substrate by an adhesive (see Japanese Patent Laid-open No.
2003-121641, paragraphs [0006] through [0007], referred to as
Patent Document 4). In order to increase the mechanical strength of
a glass substrate in a mounting area for a TCP (Tape Carrier
Package), the thickness of the glass substrate in a display area is
reduced, and the thickness of the glass substrate in the TCP
mounting area is increased (see Japanese Patent Laid-open No.
2003-241171, paragraphs [0007] through [0009], FIG. 1, referred to
as Patent Document 5).
[0013] According to Patent Document 1, however, since a TCP is used
as an external terminal, no consideration for the mounting of a COG
chip has been made. If a COG chip is mounted on a TFT glass
substrate, then the height of the COG chip is greater than the
thickness of a facing glass substrate, making it difficult to
reduce the thickness of the liquid crystal panel.
[0014] According to Patent Document 2, the height of the COG chip
may not be made equal to or smaller than the height of a facing
glass substrate. The disclosed liquid crystal panel is not suitable
for making a liquid crystal display device compact.
[0015] As shown in FIGS. 18A and 18B, the liquid crystal panel 100
is fitted with a metal frame 200 serving as a protector for
protecting the liquid crystal panel 100 and as a light shield for
preventing light from leaking around the liquid crystal panel
100.
[0016] The metal frame 200 is vertically spaced from the liquid
crystal panel 100 by a space T6. The reasons for the space T6 are
that if the metal frame 200 contacts the liquid crystal panel 100,
then the TFT glass substrate 101 and the facing glass substrate 102
are deformed, producing cell gap nonuniformities or irregularities
in display area, and if the metal frame 200 contacts the COG chip
107, then the COG chip 107 presses the TFT glass substrate 101,
tending to increase the contact resistance of the pad for the COG
chip 107 or peel off the pad for the COG chip 107.
[0017] If the TFT glass substrate 101 and the facing glass
substrate 102 cannot ignore the thickness of the COG chip 107, then
the thickness of the space T6 is determined by the thickness of the
COG chip 107 which includes the driver circuit outside of the
display area, rather than by being limited by the device (pixel
switch) structure in the display area.
[0018] According to Patent Document 3, the liquid crystal panel is
made low in profile by making the thickness of the COG chip smaller
than the total thickness of the facing glass substrate and the seal
member which seals the LCD layer.
[0019] Actually, however, the liquid crystal panel includes
polarizing plate and phase difference plate combinations, and
Patent Document 3 fails to show that the thickness of the COG chip
is smaller than the total thickness including the thickness of the
polarizing plate and phase difference plate combinations. Depending
on the thickness of the polarizing plate and phase difference plate
combinations, the metal frame which mechanically protects the
peripheral edges of the liquid crystal panel may possibly contact
the COG chip. To avoid possible contact between the metal frame and
the COG chip, an extra space needs to be provided between the
liquid crystal panel and the metal frame.
[0020] According to Patent Document 4, polarizing plate and phase
difference plate combinations are simultaneously formed of
polyester films to produce a low-profile liquid crystal panel.
However, the thickness of the films may not be reduced to a minimum
because the adhesive and the films need to have a certain level of
mechanical strength. Therefore, the proposal according to Patent
Document 4 is not effective to manufacture desired low-profile
liquid crystal panels.
[0021] According to Patent Document 5, the polishing process is
complex and involves an increased number of steps. In addition, the
area surrounding the pad area needs to be thicker than the TFT
glass substrate and the facing glass substrate.
[0022] As a result, though the structure proposed in Patent
Document 5 is applicable to large-size liquid crystal displays as
large as at least 6 inches, it may not be incorporated in smaller
liquid crystal display modules because small-size, high-definition
liquid crystal display devices as large as at most 6 inches require
a polished area other than the pad area.
SUMMARY OF THE INVENTION
[0023] According to the embodiments of the present invention, it is
desirable to provide a display device which employs a display panel
that is lower in profile and has a thickness determined by a device
structure in a display area thereof, a method of manufacturing such
a display device, and an electronic apparatus.
[0024] According to an embodiment of the present invention, there
is provided a display device including a first substrate with a
pixel switch and drivers mounted thereon, a second substrate
disposed in facing relation to the first substrate, a material
layer held between the first substrate and the second substrate and
having peripheral edges sealed by a seal member, the material layer
having an electrooptical effect, and a semiconductor chip mounted
as a COG component on the first substrate, the semiconductor chip
having a control system for controlling the drivers, the
semiconductor chip having a thickness equal to the total thickness
of the seal member and the second substrate or larger than the
thickness of the seal member and smaller than the total
thickness.
[0025] According to another embodiment of the present invention,
there is provided a display device including a first substrate with
a pixel switch and drivers mounted thereon, a second substrate
disposed in facing relation to the first substrate, a material
layer held between the first substrate and the second substrate and
having peripheral edges sealed by a seal member, the material layer
having an electrooptical effect, a semiconductor chip mounted as a
COG component on the first substrate, the semiconductor chip having
a control system for controlling the drivers, and a protective
fixing member disposed on at least a portion of the first substrate
laterally of the semiconductor chip, the semiconductor chip having
a thickness equal to or smaller than the distance from a surface of
the first substrate which faces the material layer to a surface of
the second substrate which faces away from the material layer.
[0026] According to yet another embodiment of the present
invention, there is provided a display device including a first
substrate with a pixel switch and drivers mounted thereon, a second
substrate disposed in facing relation to the first substrate, a
material layer held between the first substrate and the second
substrate and having peripheral edges sealed by a seal member, the
material layer having an electrooptical effect, a polarizing plate
and phase difference plate combination disposed on the second
substrate remotely from the material layer, and a semiconductor
chip mounted as a COG component on the first substrate, the
semiconductor chip having a control system for controlling the
drivers, the semiconductor chip having a thickness smaller than the
total thickness of the seal member, the second substrate, and the
polarizing plate and phase difference plate combination.
[0027] Preferably, the display device further includes a protective
fixing member disposed on at least a portion of the first substrate
laterally of the semiconductor chip.
[0028] According to another embodiment of the present invention,
there is provided a display device including a first substrate with
a pixel switch and drivers mounted thereon, a second substrate
disposed in facing relation to the first substrate, a material
layer having an electrooptical effect, a first polarizing plate and
phase difference plate combination disposed between the first
substrate and the material layer, a second polarizing plate and
phase difference plate combination disposed between the second
substrate and the material layer, a seal member holding the
material layer between the first and second polarizing plate and
phase difference plate combinations thereby to seal the material
layer, and a semiconductor chip mounted as a COG component on the
first substrate, the semiconductor chip having a control system for
controlling the drivers, the semiconductor chip having a thickness
equal to or smaller than the total thickness of the first and
second polarizing plate and phase difference plate combinations,
the material layer, and the second substrate.
[0029] Preferably, the seal member is disposed between the first
and second polarizing plate and phase difference plate
combinations.
[0030] Preferably, the first and second polarizing plate and phase
difference plate combinations are disposed inwardly of a region in
which the material layer is sealed by the seal member, the seal
member being disposed between the first substrate and the second
substrate alongside of the first and second polarizing plate and
phase difference plate combinations.
[0031] According to further embodiment of the present invention,
there is provided a method of manufacturing a display device having
a first substrate with a pixel switch and drivers mounted thereon,
a second substrate disposed in facing relation to the first
substrate, and a material layer held between the first substrate
and the second substrate and sealed by a seal member, including the
steps of mounting a semiconductor chip having a control system for
controlling the drivers, as a COG component on the first substrate
parallel to a region in which the seal member and the second
substrate are stacked, filling a space around the semiconductor
chip with a protective fixing member thereby to secure the first
substrate and the semiconductor chip to each other, and
simultaneously polishing the second substrate and the semiconductor
chip to the same thickness as each other.
[0032] According to yet further embodiment of the present
invention, there is provided an electronic apparatus having a
display device, the display device including a first substrate with
a pixel switch and drivers mounted thereon, a second substrate
disposed in facing relation to the first substrate, a material
layer held between the first substrate and the second substrate and
having peripheral edges sealed by a seal member, the material layer
having an electrooptical effect, and a semiconductor chip mounted
as a COG component on the first substrate, the semiconductor chip
having a control system for controlling the drivers, the
semiconductor chip having a thickness equal to the total thickness
of the seal member and the second substrate or larger than the
thickness of the seal member and smaller than the total
thickness.
[0033] According to another embodiment of the present invention,
there is provided an electronic apparatus having a display device,
the display device including a first substrate with a pixel switch
and drivers mounted thereon, a second substrate disposed in facing
relation to the first substrate, a material layer held between the
first substrate and the second substrate and having peripheral
edges sealed by a seal member, the material layer having an
electrooptical effect, a polarizing plate and phase difference
plate combination disposed on the second substrate remotely from
the material layer, and a semiconductor chip mounted as a COG
component on the first substrate, the semiconductor chip having a
control system for controlling the drivers, the semiconductor chip
having a thickness smaller than the total thickness of the seal
member, the second substrate, and the polarizing plate and phase
difference plate combination.
[0034] According to yet another embodiment of the present
invention, there is provided an electronic apparatus having a
display device, the display device including a first substrate with
a pixel switch and drivers mounted thereon, a second substrate
disposed in facing relation to the first substrate, a material
layer having an electrooptical effect, a first polarizing plate and
phase difference plate combination disposed between the first
substrate and the material layer, a second polarizing plate and
phase difference plate combination disposed between the second
substrate and the material layer, a seal member holding the
material layer between the first and second polarizing plate and
phase difference plate combinations thereby to seal the material
layer, and a semiconductor chip mounted as a COG component on the
first substrate, the semiconductor chip having a control system for
controlling the drivers, the semiconductor chip having a thickness
equal to or smaller than the total thickness of the first and
second polarizing plate and phase difference plate combinations,
the material layer, and the second substrate.
[0035] The above and other features and advantages of the present
invention will become apparent from the following description when
taken in conjunction with the accompanying drawings which
illustrate a preferred embodiment of the present invention by way
of example.
BRIEF DESCRIPTION OF THE DRAWINGS
[0036] FIGS. 1A and 1B are cross-sectional views of a liquid
crystal display device according to a first embodiment of the
present invention;
[0037] FIG. 2 is a cross-sectional view showing a first application
of the liquid crystal display device according to the first
embodiment;
[0038] FIG. 3 is a cross-sectional view showing a second
application of the liquid crystal display device according to the
first embodiment;
[0039] FIG. 4 is a cross-sectional view showing a third application
of the liquid crystal display device according to the first
embodiment;
[0040] FIG. 5 is a cross-sectional view of a liquid crystal display
device according to a second embodiment of the present
invention;
[0041] FIG. 6 is a cross-sectional view showing a first application
of the liquid crystal display device according to the second
embodiment;
[0042] FIG. 7 is a cross-sectional view showing a second
application of the liquid crystal display device according to the
second embodiment;
[0043] FIG. 8 is a cross-sectional view showing a third application
of the liquid crystal display device according to the second
embodiment;
[0044] FIG. 9 is a cross-sectional view showing a fourth
application of the liquid crystal display device according to the
second embodiment;
[0045] FIG. 10 is a cross-sectional view showing a fifth
application of the liquid crystal display device according to the
second embodiment;
[0046] FIGS. 11A and 11B are cross-sectional views illustrative of
a polishing process of a method of manufacturing the liquid crystal
display device according to the embodiments;
[0047] FIG. 12 is a circuit diagram, partly in block form, of a
driver circuit for use in the liquid crystal display devices
according to the first and second embodiments;
[0048] FIGS. 13A and 13B are cross-sectional views of thin film
transistors for use in the liquid crystal display devices according
to the first and second embodiments;
[0049] FIG. 14 is a table showing specifications achieved by a
low-profile liquid crystal display device according to the
embodiments of the present invention;
[0050] FIG. 15 is a cross-sectional view showing a basic structure
of an EL display device which includes no protective fixing
member;
[0051] FIG. 16 is a cross-sectional view showing a basic structure
of an EL display device which includes a protective fixing
member;
[0052] FIG. 17 is a perspective view of a cellular phone as a
portable electronic apparatus which can incorporate a display
device according to an embodiment of the present invention; and
[0053] FIGS. 18A and 18B are cross-sectional views of a general
liquid crystal display device.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
First Embodiment
[0054] FIGS. 1A and 1B show in cross section a liquid crystal
display device according to a first embodiment of the present
invention. Specifically, FIG. 1A shows an overall cross-sectional
structure of a liquid crystal panel of the liquid crystal display
device according to the first embodiment, and FIG. 1B shows the
cross-sectional structure in greater detail. According to the first
embodiment, the liquid crystal panel has a liquid crystal layer as
a material layer having an electrooptical effect.
[0055] As shown in FIGS. 1A and 1B, the liquid crystal display
device, generally denoted by 1, includes a TFT (Thin Film
Transistor) glass substrate 11 as a first transparent insulating
substrate supporting thereon pixel switches and a driver circuit
therefor which are constructed of TFTs, a facing glass substrate 12
as a second transparent insulating substrate disposed in facing
relation to the TFT glass substrate 11, polarizing plate and phase
difference plate combinations 13, 14 mounted respectively on the
TFT glass substrate 11 and the facing glass substrate 12, a liquid
crystal layer (material layer) 16 held between the TFT glass
substrate 11 and the facing glass substrate 12 and having
peripheral edges sealed by a seal member 15, and a semiconductor
chip (COG chip) 17 including a control circuit for controlling the
driver circuit and mounted as a COG component on the TFT glass
substrate 11.
[0056] The COG chip 17 has a thickness T1 smaller than the total
thickness T2 of the facing glass substrate 12, the polarizing plate
and phase difference plate combination 14 mounted on the facing
glass substrate 12, and the seal member 15 (T1<T2). Because
T1<T2, a metal frame 18 of the liquid crystal display device 1
is prevented from contacting the liquid crystal panel.
[0057] The COG chip 17 and the facing glass substrate 12 are
simultaneously polished by a polishing material of alumina to
equalize the thickness T1 of the COG chip 17 and the total
thickness T3 of the facing glass substrate 12 and the seal member
15 (T1=T3). Specifically, each of the thickness T1 and the
thickness T3 may be set to 80 .mu.m, for example. Details of the
process of polishing the COG chip 17 and the facing glass substrate
12 will be described later with reference to FIG. 11A.
[0058] As shown in FIG. 1A, the liquid crystal display device 1
also includes the metal frame 18 attached to liquid crystal panel
referred to above and an OLED (Organic Light-Emitting Diode)
backlight 19. Backlight emitted by the OLED backlight 19 is
diffused by a diffusion sheet 31 and illuminates the liquid crystal
panel from its rear side to allow the liquid crystal panel to
display clear images through a color filter substrate, not shown.
The outer surface of the OLED backlight 19 is covered with a
protective film 32.
[0059] FIGS. 2 through 4 show first through third applications,
respectively, of the liquid crystal display device 1 according to
the first embodiment.
[0060] Those of the components shown in FIGS. 2 through 4 which are
identical to those shown in FIG. 1 are denoted by identical
reference characters.
[0061] According to the first application shown in FIG. 2, the COG
chip 17 has a thickness smaller than the total thickness of the
facing glass substrate 12 and the seal member 15.
[0062] Specifically, since the COG chip 17 can independently be
mounted after the facing glass substrate 12, the seal member 15,
and the TFT glass substrate 11 are formed, the liquid crystal panel
can be fabricated such that the thickness T1 of the COG chip 17 and
the total thickness T3 of the facing glass substrate 12 and the
seal member 15 are related to each other as T1<T3.
[0063] For example, the thickness T1 may be set to 60 .mu.m and the
thickness T3 to 80 .mu.m. The TFT glass substrate 11 and the facing
glass substrate 12 may be polished to the thickness of 80
.mu.m.
[0064] According to the third application shown in FIG. 3, a
protective fixing member 30 is disposed between the COG chip 17 and
the combination of the facing glass substrate 12 and the seal
member 15. Specifically, the protective fixing member 30 is
disposed around the COG chip 17.
[0065] The thickness T1 of the COG chip 17 and the total thickness
T3 of the facing glass substrate 12 and the seal member 15 are
equal to each other (T1=T3).
[0066] The protective fixing member 30 is made of a silicon resin,
a polyimide resin, or an ultraviolet-curable resin. The protective
fixing member 30 serves to prevent the pad of the COG chip 17 from
being displaced horizontally and vertically. The thickness T1 and
the thickness T3 may be set to 60 .mu.m.
[0067] According to the third application shown in FIG. 4 which
also includes the protective fixing member 30, the thickness T1 of
the COG chip 17 is smaller than the total thickness T2 of the
facing glass substrate 12, the polarizing plate and phase
difference plate combination 14 provided on the facing glass
substrate 12, and the seal member 15 (T1<T2), and is also
smaller than the total thickness T3 of the facing glass substrate
12 and the seal member 15 (T1<T3).
[0068] The polarizing plate and phase difference plate combination
13 may be disposed between the TFT glass substrate 11 and the
liquid crystal layer 16, and the polarizing plate and phase
difference plate combination 14 may be disposed between the liquid
crystal layer 16 and the facing glass substrate 12.
[0069] According to the first embodiment, the thickness of the COG
chip 17 mounted on the TFT glass substrate 11 is smaller than the
total thickness of the facing glass substrate 12, the polarizing
plate and phase difference plate combination 14, and the seal
member 15, thereby making the liquid crystal panel low in profile.
The thickness of the liquid crystal panel is finally determined by
the device structure in the display area thereof.
[0070] Since the COG chip 17 and the liquid crystal panel are
reduced in thickness by the same polishing process, the fabrication
process is simplified. The percentage of defective display devices
is low because a plurality of processes are not required for
reducing the thickness of the COG chip 17 and the liquid crystal
panel.
[0071] The polarizing plate and phase difference plate combinations
13, 14 may be disposed within the glass substrates 11, 12. With
such a structure, since the polarizing plate and phase difference
plate combinations 13, 14 are not required to be applied as films,
the overall fabrication process is shortened.
[0072] As the protective fixing member 30 is disposed around the
COG chip 17, moisture and mobile ions are prevented from entering
the COG chip 17, the TFT glass substrate 11, and the facing glass
substrate 12. As a result, images displayed on the liquid crystal
panel are free of display irregularities and metal interconnects in
the liquid crystal panel are prevented from being corroded, so that
the display device is made highly reliable for a long period of
time.
Second Embodiment
[0073] FIG. 5 shows in cross section a liquid crystal display
device according to a second embodiment of the present
invention.
[0074] As shown in FIG. 5, the liquid crystal display device,
generally denoted by 2, includes: a TFT glass substrate 21 as a
first transparent insulating substrate supporting thereon pixel
switches and a driver circuit therefor which are constructed of
TFTs; a facing glass substrate 22 as a second transparent
insulating substrate disposed in facing relation to the TFT glass
substrate 21; a liquid crystal layer 26 positioned between the TFT
glass substrate 21 and the facing glass substrate 22 and having
peripheral edges sealed by a seal member 25; polarizing plate and
phase difference plate combinations 23, 24 disposed between the TFT
glass substrate 21 and the liquid crystal layer 26 and between the
liquid crystal layer 26 and the facing glass substrate 22; the
liquid crystal layer 26 being held between the polarizing plate and
phase difference plate combinations 23, 24, and a COG chip 27
including a control circuit for controlling the driver circuit and
mounted as a COG component on the TFT glass substrate 21.
[0075] The polarizing plate and phase difference plate combinations
23, 24 are formed as spin films or evaporated films in a process of
forming TFT devices in the facing glass substrate 22 or the TFT
glass substrate 21. After the above process is finished, the TFT
glass substrate 21 and the facing glass substrate 22 are joined to
each other with the seal member 25 interposed therebetween, and the
liquid crystal layer 26 is sealed. Therefore, the polarizing plate
and phase difference plate combinations 23, 24 can be formed in the
lower and upper glass substrates 21, 22. The liquid crystal display
device 2 can thus be made lower in profile.
[0076] In the liquid crystal panel, the polarizing plate and phase
difference plate combinations 23, 24 are formed in the TFT glass
substrate 21 and the facing glass substrate 22, and the liquid
crystal layer 26 is sealed between the polarizing plate and phase
difference plate combinations 23, 24. Since the COG chip 27, the
facing glass substrate 22, the polarizing plate and phase
difference plate combination 23, the seal member 25, and the
polarizing plate and phase difference plate combination 24 are
polished simultaneously. Therefore, the thickness T1 of the COG
chip 27 is equal to the total thickness T4 of the facing glass
substrate 22, the polarizing plate and phase difference plate
combination 23, the seal member 25, and the polarizing plate and
phase difference plate combination 24 (T1=T4).
[0077] FIGS. 6 through 10 show first through fifth applications,
respectively, of the liquid crystal display device 2 according to
the second embodiment.
[0078] According to the first application shown in FIG. 6, the
protective fixing member 30 is disposed between the COG chip 27 and
the combination of the facing glass substrate 22, the polarizing
plate and phase difference plate combination 24, the seal member
25, and the polarizing plate and phase difference plate combination
23, so that thickness T1 is equal to the thickness T4 (T1=T4).
Specifically, the protective fixing member 30 is disposed around
the COG chip 27. The protective fixing member 30 is made of the
material described above and functions in the manner described
above.
[0079] According to the second and third applications shown in
FIGS. 7 and 8, the polarizing plate and phase difference plate
combinations 23, 24 are disposed inwardly of the seal member 25.
With this arrangement, the thickness T1 of the COG chip 27 is equal
to the total thickness T4 of the facing glass substrate 22 and the
seal member 25 (T1=T4). Each of the thickness T1 and the thickness
T4 is set to 80 .mu.m, for example.
[0080] In the third application shown in FIG. 8, the protective
fixing member 30 is disposed between the COG chip 27 and the
combination of the facing glass substrate 22 and the seal member
25, and disposed around the COG chip 27.
[0081] In FIGS. 7 and 8, the polarizing plate and phase difference
plate combinations 23, 24 are disposed inwardly of the seal member
25 by which the liquid crystal layer 26 is sealed. The seal member
25 extends between the TFT glass substrate 21 and the facing glass
substrate 22 and is disposed laterally of the polarizing plate and
phase difference plate combinations 23, 24 and the liquid crystal
layer 26. With this structure, the bonding strength of the entire
assembly is high.
[0082] According to the fourth and fifth applications shown in
FIGS. 9 and 10, the thickness of the COG chip 27 and the total
thickness of the facing glass substrate 22, the polarizing plate
and phase difference plate combinations 23, 24, and the seal member
25 are reduced independently of each other.
[0083] Therefore, the COG chip 27 whose thickness has been reduced
can be mounted on the liquid crystal panel whose thickness has been
reduced. The thickness T1 of the COG chip 27 is smaller than the
total thickness T2 of the facing glass substrate 22, the polarizing
plate and phase difference plate combination 24, and the seal
member 25 (T1<T2).
[0084] According to the second embodiment, as described above, the
thickness of the COG chip 27 mounted on the TFT glass substrate 21
is smaller than the total thickness of the facing glass substrate
22, the polarizing plate and phase difference plate combination 24,
and the seal member 25, making the liquid crystal panel lower in
profile. The thickness of the liquid crystal panel is finally
determined by the device structure in the display area thereof.
[0085] Since the COG chip 27 and the liquid crystal panel can be
reduced in thickness by the same polishing process, the fabrication
process is simplified. The percentage of defective display devices
is low because a plurality of processes are not required for
reducing the thickness of the COG chip 27 and the liquid crystal
panel.
[0086] The polarizing plate and phase difference plate combinations
23, 24 are disposed within the glass substrates 21, 22. With such a
structure, since the polarizing plate and phase difference plate
combinations 23, 24 are not required to be applied as films, the
overall fabrication process is shortened.
[0087] As the protective fixing member 30 is disposed around the
COG chip 27, moisture and mobile ions are prevented from entering
the COG chip 27, the TFT glass substrate 21, and the facing glass
substrate 22. As a result, images displayed on the liquid crystal
panel are free of display irregularities and metal interconnects in
the liquid crystal panel are prevented from being corroded, so that
the display device is made highly reliable for a long period of
time.
[0088] A process of manufacturing a liquid crystal display device
according to the second embodiment will be described below.
[0089] FIG. 11A is illustrative of a process of polishing a liquid
crystal panel according to the present invention, and FIG. 11B is
illustrative of a process of polishing a liquid crystal panel in
related art.
[0090] In FIGS. 11A and 11B, a liquid crystal panel 50 is polished
by polishing disks 51, 52 with abrasive particles 53 of alumina.
The polishing disks 51, 52 apply a polishing pressure to the liquid
crystal panel 50 as indicated by the thick arrows.
[0091] In the polishing process, the COG chip 17 (27), the
protective fixing member 30, the TFT glass substrate 11 (21), and
the facing glass substrate 12 (22) are polished to regions
indicated by the dot-and-dash lines AA, BB until the thickness T1
of the COG chip 17 (27) and the combined thickness T3 of the facing
glass substrate 12 (22) and the seal member 15 (25) are equal to
each other (T1=T3 (0.08 mm)).
[0092] In FIG. 11A, after the liquid crystal panel having a
thickness of 0.7 mm and the COG chip 17 (27) having a thickness of
390 .mu.m are mounted in place, the protective fixing member 30 is
placed around the COG chip 17 (27) and between the COG chip 17 (27)
and the facing glass substrate 12 (22), and the liquid crystal
panel 50 and the COG chip 17 (27) are secured to each other.
Thereafter, the COG chip 17 (27), the protective fixing member 30,
the TFT glass substrate 11 (21), and the facing glass substrate 12
(22) start being polished with the abrasive particles 53 of
alumina. The liquid crystal panel 50 and the COG chip 17 (27) are
simultaneously polished until finally the thickness of the facing
glass substrate 12 (22) of the liquid crystal panel 50 and the
thickness of the COG chip 17 (27) are equal to each other.
[0093] Since the facing glass substrate 12 (22) is not provided on
the COG chip 17 (27), the polishing pressure is prevented from
being lowered. The thickness of the TFT glass substrate 11 (21)
after it has been polished is 0.08 mm, for example.
[0094] According to the process of polishing the liquid crystal
panel in related art shown in FIG. 11B, the COG chip 17 (27) is
polished with no protective fixing member 30 being disposed
therearound. Therefore, when the TFT glass substrate 11 (21) is
thinned to a thickness smaller than 0.1 mm, the portion of the TFT
glass substrate 11 (21) which serves as the pad for the COG chip 17
(27) is deformed and curved as indicated by the arrow X under the
pressure from the polishing disk 51, resulting in a reduction in
the polishing pressure. At this time, the COG chip 17 (27) has not
yet been mounted in position. Therefore, the portion of the TFT
glass substrate 11 (21) which serves as the pad for the COG chip 17
(27) increases in thickness. Stated otherwise, the TFT glass
substrate 11 (21) suffers thickness irregularities.
[0095] As a result, since the TFT glass substrate 11 (21) tends to
break if a polishing pressure is applied thereto, the pressure
applied when the COG chip 17 (27) is to be mounted cannot be
increased. Consequently, the contact resistance of the pad at the
COG chip 17 (27) increases, failing to provide a normal connection
between the COG chip 17 (27) and the liquid crystal panel 50.
[0096] According to the manufacturing process shown in FIG. 11A,
inasmuch as a polishing pressure can be applied from both the
polishing disks 51, 52 to the TFT glass substrate 11 (21) and the
facing glass substrate 12 (22), it is possible to polish the TFT
glass substrate 11 (21) and the facing glass substrate 12 (22) to
uniform thicknesses.
[0097] Finally, the total thickness of the facing glass substrate
12 (22) and the seal member 15 (25) may be reduced to 0.08 mm, and
the thickness of the COG chip 17 (27) may be reduced to 0.08
mm.
[0098] In the process of manufacturing the liquid crystal display
device according to the present embodiment, as described above, the
COG chip 17 (27) and the liquid crystal panel 50 can be thinned
down in the same polishing process. Accordingly, the fabrication
process can be simplified, and the percentage of defective display
devices is low because a plurality of processes are not required
for reducing the thickness of the COG chip 17 (27) and the liquid
crystal panel 50.
[0099] FIG. 12 shows a circuit arrangement of a driver circuit of
TFTs for use in the liquid crystal display devices according to the
first and second embodiments, and a time-division switch employed
in the driver circuit. Specifically, FIG. 12 shows a
time-division-energized active-matrix liquid crystal display
device.
[0100] As shown in FIG. 12, the time-division-energized
active-matrix liquid crystal display device includes: a pixel
switch 72 of pixels 71 arranged in rows and columns; a vertical
driver 73 for successively selecting rows of pixels 71 of a pixel
switch 72; a horizontal driver 74 for writing pixel signals in the
pixels 71 of each of the selected rows; a time-division switch 75
for energizing the pixels 71 in a time-division fashion; and a
control system 76 for controlling the vertical driver 73, the
horizontal driver 74, and the time-division switch 75. The pixel
switch 72, the vertical driver 73, the horizontal driver 74, the
time-division switch 75, and the control system 76 are mounted on a
LCD panel 77.
[0101] The pixels 71 include respective TFTs 80 having respective
gate electrodes connected to gate lines 78-1 through 78-m and
respective source electrodes connected to signal lines 79-1 through
79-n, respective liquid crystal cells 81 having pixel electrodes
connected respectively to the drain electrodes of the TFTs 80, and
respective auxiliary capacitors 82 having electrodes connected
respectively to the drain electrodes of the TFTs 80.
[0102] In each of the pixels 71, the liquid crystal cell 81 has a
facing electrode connected to a common line 83, and the auxiliary
capacitor 82 has the other electrode also connected to the common
line 83. A DC voltage is applied as a common voltage VCOM to the
common line 83.
[0103] A time-division energization process will be described
below. The signal lines of the pixel switch 72 are divided into a
plurality of blocks, each of which includes a plurality of adjacent
signal lines. The horizontal driver 74 outputs from its output
terminals respective signal voltages in a time sequence to the
signal lines in each of the blocks. The time-division switch 75,
which is connected to the signal lines in each of the blocks,
samples in a time-division fashion the signal voltages output in a
time sequence from the horizontal driver 74, and applies the
sampled signal voltages to the signal lines.
[0104] To perform the time-division energization process, the
horizontal driver 74 outputs signal voltages in a time sequence to
the signal lines in each of the blocks.
[0105] The time-division switch 75 includes analog switches
(transmission switches) for sampling in a time-division fashion the
signal voltages output in a time sequence from the horizontal
driver 74. The time-division switch 75 has analog switches
associated respectively with output terminals of the horizontal
driver 74. In the illustrated embodiment, the time-division switch
75 performs a three-time-division process based on R (red), G
(green), and B (blue) signals.
[0106] Specifically, the time-division switch 75 has three CMOS
analog switches 75-1, 75-2, 75-3 in the form of parallel P-channel
MOS and N-channel MOS transistors. The analog switches 75-1, 75-2,
75-3 may be of a PMOS or NMOS configuration rather than the CMOS
configuration.
[0107] In the time-division switch 75, the three analog switches
75-1, 75-2, 75-3 have respective input terminals connected in
common and respective output terminals connected respectively to
the input terminals of three signal lines 79-1, 79-2, 79-3. The
input terminals of the analog switches 75-1, 75-2, 75-3 are
supplied with a signal voltage output from the horizontal driver
74.
[0108] Six control lines 89-1 through 89-6 are connected to the
analog switches 75-1, 75-2, 75-3 such that two control lines are
connected to each analog switch. The analog switch 75-1 has two
control input terminals (the gates of the CMOS transistors)
connected to respective control lines 89-1, 89-2. The analog switch
75-2 has two control input terminals connected to respective
control lines 89-3, 89-4. The analog switch 75-3 has two control
input terminals connected to respective control lines 89-5,
89-6.
[0109] Gate selection signals S1 through S3, XS1 through XS3 for
successively selecting the three analog switches 75-1, 75-2, 75-3
are given from a timing controller (TC) 90, to be described later,
to the six control lines 89-1 through 89-6. The gate selection
signals XS1 through XS3 are an inversion of the gate selection
signals S1 through S3, respectively.
[0110] The gate selection signals S1 through S3, XS1 through XS3
successively turn on the three analog switches 75-1, 75-2, 75-3 in
synchronism with the signal voltages output in a time sequence from
the horizontal driver 74. The analog switches 75-1, 75-2, 75-3
sample the signal voltages output in a time sequence from the
horizontal driver 74 in a three-time-division fashion during a 1H
period, and supply the sampled signal voltages to the corresponding
signal lines 79-1, 79-2, 79-3.
[0111] The control system 76 for controlling the vertical driver
73, the horizontal driver 74, and the time-division switch 75 has a
timing controller (TC) 90, a reference voltage generator 91, and a
DC/DC converter 92. The timing controller 90, the reference voltage
generator 91, and the DC/DC converter 92 are mounted, together with
the vertical driver 73, the horizontal driver 74, and the
time-division switch 75, on the LCD panel 77.
[0112] FIGS. 13A and 13B show cross-sectional structures of TFTs
for use in the liquid crystal display devices according to the
first and second embodiments.
[0113] A horizontal driver and a selector are constructed of
polysilicon TFTs, and a COG chip is used as a driver IC for
converting a high-rate digital signal into an analog signal and
supplying it as an image signal to a liquid crystal panel.
[0114] As shown in FIGS. 13A and 13B, polysilicon TFTs used as
pixel transistors making up a pixel switch and transistors making
up a driver include bottom-gate polysilicon TFTs having a gate
electrode disposed beneath an oxide film and top-gate polysilicon
TFTs having a gate electrode disposed over an oxide film. The
cross-sectional structures of these polysilicon TFTs are
illustrated respectively in FIGS. 13A and 13B.
[0115] The bottom-gate polysilicon TFT shown in FIG. 13A includes:
a TFT glass substrate 41; a gate electrode 42 disposed on the TFT
glass substrate 41; a gate insulating film 43 disposed on the gate
electrode 42; a polysilicon (Poly-Si) layer 44 disposed on the gate
insulating film 43; and an interlayer insulating film 45 disposed
on the polysilicon layer 44.
[0116] A source region 46 and a drain region 47, each including an
N+ diffused layer, are disposed on the gate insulating layer 43
laterally of the gate electrode 42. The source region 46 and the
drain region 47 are connected respectively to a source electrode 48
and a drain electrode 49.
[0117] The top-gate polysilicon TFT shown in FIG. 13B includes a
glass substrate 51, a polysilicon layer 52 disposed on the glass
substrate 51, a gate insulating film 53 disposed on the polysilicon
layer 52, a gate electrode 54 disposed on the gate insulating film
53, and an interlayer insulating film 55 disposed on the gate
electrode 54.
[0118] A source region 56 and a drain region 57, each including an
N+ diffused layer, are disposed on the glass substrate 51 laterally
of the polysilicon layer 52. The source region 56 and the drain
region 57 are connected respectively to a source electrode 58 and a
drain electrode 59.
[0119] According to the embodiments of the present invention, the
thickness of a semiconductor chip (the COG chip 17, 27) mounted as
a COG component on a first transparent insulating substrate (the
TFT glass substrate 11, 21) is smaller than the total thickness of
a second transparent insulating substrate (the facing glass
substrate 12, 22), polarizing plate and phase difference plate
combinations (13, 14, 23, 24), and a seal member (15, 25), thereby
making the liquid crystal panel low in profile. The thickness of
the liquid crystal panel is finally determined by the device
structure in the display area thereof.
[0120] FIG. 14 shows specifications achieved by a low-profile
liquid crystal panel for liquid crystal display device according to
the present invention. In FIG. 14, the thicknesses of components of
a liquid crystal panel in related art and an inventive liquid
crystal panel are shown for comparison in a specification
comparison table.
[0121] As shown in FIG. 14, if the COG chip 17 (27) becomes
thinner, then since the thickness of the liquid crystal module
depends on the thickness of the liquid crystal panel, the total
thickness of the liquid crystal module including the metal frame 18
is reduced from 1.022 mm to 0.89 mm.
[0122] According to the embodiments of the present invention, as
described above, the thickness of the COG chip 17 (27) mounted as a
COG component on the TFT glass substrate 11 (21) is smaller than
the total thickness of the facing glass substrate 12 (22), the
polarizing plate and phase difference plate combinations 14 (24),
and the seal member 15 (25), thereby making the liquid crystal
panel low in profile. The thickness of the liquid crystal panel is
finally determined by the device structure in the display area
thereof.
[0123] Since the COG chip 17 (27) and the liquid crystal panel are
reduced in thickness by the same polishing process, the fabrication
process is simplified. The percentage of defective display devices
is low because a plurality of processes are not required for
reducing the thickness of the COG chip 17 (27) and the liquid
crystal panel.
[0124] The polarizing plate and phase difference plate combinations
23, 24 may be disposed within the glass substrates 21, 22. With
such a structure, since the polarizing plate and phase difference
plate combinations 23, 24 are not required to be applied as films,
the overall fabrication process is shortened.
[0125] As the protective fixing member 30 is disposed around the
COG chip 17 (27), moisture and mobile ions are prevented from
entering the COG chip 17 (27), the TFT glass substrate 11 (21), and
the facing glass substrate 12 (22). As a result, images displayed
on the liquid crystal panel are free of display irregularities and
metal interconnects in the liquid crystal panel are prevented from
being corroded, so that the display device is made highly reliable
for a long period of time.
[0126] In order to reduce the weight of the liquid crystal display
device as well as to reduce the thickness thereof, the TFT glass
substrate 11 and the facing glass substrate 12 may be replaced with
respective first and second transparent insulating substrates made
of an organic material such as PET (PolyEthylene Terephthalate),
PES (PolyEtherSulfone), acrylic resin, plastics, or the like.
[0127] In the above embodiments, the present invention has been
described as being applied to liquid crystal display devices.
However, the principles of the present invention are also
applicable to other display devices including an EL display device
including electroluminescence (EL) as electrooptical elements in
respective pixels.
[0128] FIGS. 15 and 16 show EL display devices 1A according to the
present invention. As shown in FIGS. 15 and 16, the EL display
devices 1A are free of polarizing plate and phase difference plate
combinations, and have an EL layer 16A as a material layer instead
of a liquid crystal layer.
[0129] Other details of the EL display devices shown in FIGS. 15
and 16 are similar to those of the liquid crystal display devices
according to the above embodiments.
[0130] The EL display device 1A shown in FIG. 15 includes no
protective fixing member, whereas the EL display device 1A shown in
FIG. 16 includes a protective fixing member. In FIGS. 15 and 16,
the thickness of the COG chip 17 is equal to or smaller than the
total thickness of the facing glass substrate 12 and the seal
member 15. If the thickness of the COG chip 17 is smaller than the
total thickness of the facing glass substrate 12 and the seal
member 15, then the thickness of the COG chip 17 is preferably
greater than the thickness of the seal member 15.
[0131] The thickness of the COG chip 17 may be equal to or smaller
than the distance from the surface of the TFT glass substrate 11
which faces the EL layer 16A to the surface of the facing glass
substrate 12 which faces away from the EL layer 16A.
[0132] The display device according to the present invention can be
used as a display device for use with OA apparatuses including
personal computers, word processors, etc. and home appliances
including TV receivers, etc. Particularly, the display device
according to the present invention is preferable for use as display
units of electronic apparatuses which may be portable terminals
including cellular phones, PDAs (Personal Digital Assistants), etc.
whose overall assemblies are required to be low in profile.
[0133] FIG. 17 shows in perspective a portable terminal as a
cellular phone which can incorporate a display device according to
an embodiment of the present invention.
[0134] As shown in FIG. 17, the cellular phone has a speaker 94, a
display unit 95, a control pad 96, and a microphone 97 which are
mounted on a front face of a casing 93 and arranged in a downward
succession. The display unit 95 may include the display device 1,
1A, or 2.
[0135] Since the cellular phone incorporates the display device
according to the present invention, the overall assembly thereof
can be of a low profile because the display device is of a low
profile.
[0136] Although certain preferred embodiments of the present
invention have been shown and described in detail, it should be
understood that various changes and modifications may be made
therein without departing from the scope of the appended
claims.
* * * * *