U.S. patent application number 13/311539 was filed with the patent office on 2012-11-08 for booting method of main chip.
This patent application is currently assigned to NOVATEK MICROELECTRONICS CORP.. Invention is credited to Chia-Hung HSIN.
Application Number | 20120284497 13/311539 |
Document ID | / |
Family ID | 47091054 |
Filed Date | 2012-11-08 |
United States Patent
Application |
20120284497 |
Kind Code |
A1 |
HSIN; Chia-Hung |
November 8, 2012 |
BOOTING METHOD OF MAIN CHIP
Abstract
A booting method of a main chip includes the following steps.
The main chip searches a current block of a NAND Flash for reading
a boot table from a current page of the current block and verifying
a boot header of the boot table. When the boot header passes the
verification, the main chip checks whether ID of the boot table and
ID of the NAND Flash are the same. When the IDs of the boot table
and the NAND Flash are the same, the main chip reads a next page of
the current block and checks whether data stored in the current
page and in the next page is the same. When the data stored in the
current page and in the next page is the same, the main chip reads
configuration information of the boot table to initialize the NAND
Flash and boots.
Inventors: |
HSIN; Chia-Hung; (Hsinchu
City, TW) |
Assignee: |
NOVATEK MICROELECTRONICS
CORP.
Hsinchu
TW
|
Family ID: |
47091054 |
Appl. No.: |
13/311539 |
Filed: |
December 5, 2011 |
Current U.S.
Class: |
713/2 |
Current CPC
Class: |
G06F 3/0604 20130101;
G06F 3/0679 20130101; G06F 3/0632 20130101; G06F 9/4401
20130101 |
Class at
Publication: |
713/2 |
International
Class: |
G06F 15/177 20060101
G06F015/177 |
Foreign Application Data
Date |
Code |
Application Number |
May 5, 2011 |
TW |
100115845 |
Claims
1. A booting method of a main chip, comprising: utilizing the main
chip to search a current block of a NAND Flash for reading a boot
table from a current page of the current block and verifying a boot
header of the boot table; utilizing the main chip to check whether
identification (ID) of the boot table and ID of the NAND Flash are
the same when the boot header passes the verification; utilizing
the main chip to read a next page of the current block and check
whether data stored in the current page and in the next page is the
same when the ID of the boot table and ID of the NAND Flash are the
same; and utilizing the main chip to read configuration information
of the boot table to initialize the NAND Flash and boots when the
data stored in the current page and in the next page is the
same.
2. The booting method according to claim 1, wherein the
configuration information at least includes page size, block size
or an error correction code type.
3. The booting method according to claim 1, further comprising:
utilizing the main chip to search a next block for reading the boot
table from the next block and verifying the boot header when the
boot header fails the verification.
4. The booting method according to claim 1, further comprising:
utilizing the main chip to search a next block for reading the boot
table from the next block and verifying the boot header when the ID
of the boot table and ID of the NAND Flash are different.
5. The booting method according to claim 1, further comprising:
utilizing the main chip to read another page and check whether data
stored in the another page is the same with data stored in the
current page or in the next page when the data stored in the
current page and in the next page is different.
Description
[0001] This application claims the benefit of Taiwan application
Serial No. 100115845, filed May 5, 2011, the subject matter of
which is incorporated herein by reference.
BACKGROUND
[0002] 1. Technical Field
[0003] The invention relates in general to a booting method of a
main chip.
[0004] 2. Background
[0005] In a general booting process utilizing a NAND Flash,
configuration of the NAND Flash, including page size, block size
and a error correction code (ECC) type, has to be shown to a main
chip, so that the main chip can initialize the NAND Flash and then
send instructions to read the NAND Flash.
[0006] Traditionally, the configuration information of the NAND
Flash is obtained in two ways. In the first way, 5 general purpose
I/O (GPIO) pins of the main chip are utilized to connect to the
NAND Flash to obtain the configuration information. Two of the GPIO
pins are utilized to obtain information of the page size, another
two of the GPIO pins are utilized to obtain information of the
block size, and the remain one of the GPIO pins is utilized to
obtain information of the ECC type. Then, the main chip is able to
initialize the NAND Flash according to the configuration
information obtained by the GPIO pins. However, utilization of the
GPIO pins makes the cost of package remain high.
[0007] In the second way, a boot table including identifications
(IDs) of the current NAND Flashes and corresponding configuration
information may be created, and then recorded in a read only memory
(ROM). When the NAND Flash is utilized to boot, the main chip may
read the ID form the NAND Flash and then look it up in the boot
table in the ROM accordingly, so as to obtain the corresponding
configuration information. Afterwards, the main chip can initialize
the NAND Flash according to the configuration information obtained
from the boot table. However, the boot table only records existing
NAND Flashes, thus lack of expandability and unable to support the
future new NAND Flashes.
SUMMARY
[0008] The disclosure is directed to a booting method of a main
chip, capable of supporting all types of NAND Flash by placing a
corresponding boot table in the NAND Flash and booting in software
algorithm.
[0009] According to a first aspect of the present disclosure, a
booting method of a main chip is provided. The booting method of
the main chip includes the following steps. The main chip searches
a current block of a NAND Flash for reading a boot table from a
current page of the current block and verifying a boot header of
the boot table. When the boot header passes the verification, the
main chip checks whether identification (ID) of the boot table and
ID of the NAND Flash are the same. When the ID of the boot table
and ID of the NAND Flash are the same, the main chip reads a next
page of the current block and checks whether data stored in the
current page and in the next page is the same. When the data stored
in the current page and in the next page is the same, the main chip
reads configuration information of the boot table to initialize the
NAND Flash and boots.
[0010] The invention will become apparent from the following
detailed description of the preferred but non-limiting embodiments.
The following description is made with reference to the
accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1 shows a flow chart showing a booting method of a main
chip according to an embodiment.
DETAILED DESCRIPTION OF THE INVENTION
[0012] The disclosure proposes a booting method of a main chip,
capable of supporting all types of NAND Flash by placing a
corresponding boot table in the NAND Flash and booting in software
algorithm.
[0013] Referring to FIG. 1, a flow chart showing a booting method
of a main chip according to an embodiment is shown. The booting
method of the main chip disclosed in FIG. 1 substantially utilizes
a NAND Flash to boot. The NAND Flash includes M blocks, each
including N pages, M and N being positive integers. Data recorded
in each page in the single block of the NAND Flash is substantially
the same.
[0014] In step S100, the main chip searches an X-th block of the
NAND Flash for reading a boot table from a Y-th page, X and Y being
non-negative integers respectively smaller than M and N. In the
disclosure, the boot table includes a boot hear, an identification
(ID), and configuration information of the NAND Flash corresponding
to the ID, for example. The configuration information at least
includes page size, block size or error correction code
[0015] (ECC) type of the NAND Flash. In the disclosure, the boot
table stores in the first 1024 bytes of at least two blocks of the
NAND Flash, for example. Besides, traditional data loss problems
easily caused by storing data in the NAND Flash are overcome by
utilizing the ECC.
[0016] In step S110, the main chip verifies the boot header of the
boot table. The verification is such as to determine whether the
boot header includes a verification string "BootFromNAND". When the
boot header fails the verification, representing that the current
X-th block is not a boot block, it proceeds to step S120, and 1 is
added to X. Then, in step S125, whether X is equal to M is
determined. If not, it backs to step S100 to search a next block.
When the boot header passes the verification, it represents that
the X-th block is the boot block. If X is equal to M, it represents
that all block are not the boot block, and it proceeds to an
end.
[0017] Proceeding to step S130, the main chip reads ID of the NAND
Flash from the NAND Flash, and checks whether the ID of the boot
table and the ID of the NAND Flash are the same. When the ID of the
boot table is different from the ID of the NAND Flash, it
represents that data recorded in the boot table of the X-the block
may be wrong. Thus it proceeds to step S120, and 1 is added to X
and then it backs to step S100 to search the a next boot block to
read a correct boot table.
[0018] When the ID of the boot table is the same as the ID of the
NAND Flash, it proceeds to step S140, and the main chip reads data
in a (Y+1)-th page. The Y-th page and the (Y+1)-th page in the same
X-th block should store the same data on the basis of
characteristics of the NAND Flash. Thus in step S150, the main chip
checks whether data stored in the Y-th page and the (Y+1)-th page
is the same. If not, it proceeds to step S152, and 1 is added to Y.
Then it proceeds to step S152, whether Y is equal to N is
determined. If Y is not equal to N, steps S140 and S150 are
repeated until there are two pages storing the same data. On the
basis of characteristics of the NAND Flash, the steps S140 and S150
further raise data accuracy of the NAND Flash in the disclosure.
When Y is equal to N, it represents that there is still no the same
data as the end page of the current block is searched. Thus, it
backs to step S120 to search the next block.
[0019] When data stored in the different pages, the Y-th page and
the (Y+1)-th page for example, is the same, the main chip reads the
configuration information recorded in the boot table of the same
page data to initialize the NAND Flash in step S160. Afterwards, in
step S170, the main chip starts to boot. It is observed that, in
the booting method of the main chip disclosed above, the boot table
built in the NAND Flash only needs to record the ID and the
configuration information of the NAND Flash itself. Compared with
the traditional boot table built in the ROM recording the IDs and
the configuration information of numerous existing different types
of NAND Flashes, the disclosed booting method of the main chip
saves huge memory space.
[0020] The a booting method of a main chip proposed in the
disclosure places the corresponding boot table in the NAND Flash,
thus huge memory space is saved and the lack of expandability is
solved. Meanwhile, the ECC, such as every 512 bits data
corresponding to 15 bits ECC, is utilized in the disclosure to
raise the data accuracy, hence the traditional data loss problems
easily caused by storing data in the NAND Flash are overcome. In
addition, the booting method of the main chip in the disclosure
substantially boots in software algorithm without using additional
GPIO pins, thus the pins are saved and the packing cost is
reduced.
[0021] While the invention has been described by way of example and
in terms of a preferred embodiment, it is to be understood that the
invention is not limited thereto. On the contrary, it is intended
to cover various modifications and similar arrangements and
procedures, and the scope of the appended claims therefore should
be accorded the broadest interpretation so as to encompass all such
modifications and similar arrangements and procedures.
* * * * *