U.S. patent application number 13/473622 was filed with the patent office on 2012-09-06 for computer system with dual bios.
This patent application is currently assigned to ASUSTeK COMPUTER INC.. Invention is credited to Yu-Chen Lee, Chao-Chung Wu.
Application Number | 20120226897 13/473622 |
Document ID | / |
Family ID | 41164950 |
Filed Date | 2012-09-06 |
United States Patent
Application |
20120226897 |
Kind Code |
A1 |
Wu; Chao-Chung ; et
al. |
September 6, 2012 |
COMPUTER SYSTEM WITH DUAL BIOS
Abstract
A computer system including a first memory unit, a second memory
unit and a switch unit is provided. The first memory unit stores a
first BIOS. The second memory unit stores a second BIOS. The switch
unit has a first configuration and a second configuration. Upon the
computer system being started, the switch unit receives an enable
signal. When the switch unit is in the first configuration, the
enable signal is provided to the first memory unit to start the
first basic input/output system. When the switch unit is in the
second configuration, the enable signal is provided to the second
memory unit to start the second basic input/output system.
Inventors: |
Wu; Chao-Chung; (Taipei,
TW) ; Lee; Yu-Chen; (Taipei, TW) |
Assignee: |
ASUSTeK COMPUTER INC.
Taipei City
TW
|
Family ID: |
41164950 |
Appl. No.: |
13/473622 |
Filed: |
May 17, 2012 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
12402485 |
Mar 11, 2009 |
8205069 |
|
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13473622 |
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Current U.S.
Class: |
713/2 |
Current CPC
Class: |
G06F 11/1666 20130101;
G06F 11/20 20130101; G06F 9/441 20130101; G06F 9/4401 20130101;
G06F 11/1456 20130101 |
Class at
Publication: |
713/2 |
International
Class: |
G06F 9/00 20060101
G06F009/00 |
Foreign Application Data
Date |
Code |
Application Number |
Apr 14, 2008 |
TW |
97113491 |
Claims
1. A computer system comprising: a first memory unit storing a
first basic input/output system; a second memory unit storing a
second basic input/output system, wherein the first memory unit and
the second memory unit are two independent storages in the computer
system; a switch unit comprising a first switch circuit, a second
switch circuit and a selection element connected to the first
switch circuit and second switch circuit; wherein, upon the
computer system being started, the switch unit receives an enable
signal from a microcontroller, such that when the selection element
outputs a first selection signal to the first switch circuit, the
enable signal is provided through the first switch circuit to the
first memory unit to start the first basic input/output system,
wherein when the selection element outputs a second selection
signal to the second switch circuit, the enable signal is provided
through the second switch circuit to the second memory unit to
start the second basic input/output system.
2. The computer system according to claim 1, wherein the first
switch circuit has an input terminal receiving the enable signal
and an output terminal coupled to the first memory unit, and the
first switch circuit comprises: a first transistor, having a drain
to be served as the input terminal of the first switch circuit, and
a source to be served as the output terminal of the first switch
circuit; a second transistor, having a drain coupled to a gate of
the first transistor, a source coupled to a ground voltage, and a
gate receiving the first selection signal; and a first resistor,
having a first terminal receiving a second reference voltage and a
second terminal coupled to the gate of the first transistor.
3. The computer system according to claim 2, wherein the second
switch circuit has an input terminal receiving the enable signal
and an output terminal coupled to the second memory unit, and the
second switch circuit comprises: a third transistor, having a drain
to be served as the input terminal of the second switch circuit,
and a source to be served as the output terminal of the second
switch circuit; a fourth transistor, having a drain coupled to a
gate of the third transistor, a source coupled to the ground
voltage, and a gate receiving the second selection signal; and a
fourth resistor, having a first terminal receiving the second
reference voltage and a second terminal coupled to the gate of the
third transistor.
4. The computer system according to claim 1, wherein the selection
element is a 4-terminal jumper.
5. The computer system according to claim 1, wherein the
microcontroller further comprises a transmitting interface for
outputting the enable signal, a clock signal and a data output
signal.
6. The computer system according to claim 5, wherein the
transmitting interface is a serial peripheral interface.
7. The computer system according to claim 1, wherein the
microcontroller is a south bridge chip or an embedded
controller.
8. A computer system comprising: a first memory unit storing a
first basic input/output system; a second memory unit storing a
second basic input/output system, wherein the first memory unit and
the second memory unit are two independent storages in the computer
system; a switch unit comprising a first switch circuit, a second
switch circuit and a selection element connected to the first
switch circuit and second switch circuit; wherein, upon the
computer system being started, the switch unit receives an enable
signal from a microcontroller, such that when the selection element
outputs a first selection signal to the first switch circuit, the
enable signal is provided through the first switch circuit to the
first memory unit to start the first basic input/output system,
wherein when the selection element outputs a second selection
signal to the second switch circuit, the enable signal is provided
through the second switch circuit to the second memory unit to
start the second basic input/output system, wherein the first
switch circuit has an input terminal receiving the enable signal
and an output terminal coupled to the first memory unit, and the
second switch circuit has an input terminal receiving the enable
signal and an output terminal coupled to the second memory
unit.
9. A computer system comprising: a first memory unit storing a
first basic input/output system; a second memory unit storing a
second basic input/output system, wherein the first memory unit and
the second memory unit are two independent storages in the computer
system; a switch unit comprising a first switch circuit, a second
switch circuit and a selection element connected to the first
switch circuit and second switch circuit, wherein the selection
element has a first terminal coupled to a ground voltage, a second
terminal coupled to a first reference voltage through a first
resistor and coupled to the first switch circuit, a third terminal
coupled to the ground voltage, and a fourth terminal coupled to the
first reference voltage through a second resistor and coupled to
the second switch circuit, wherein when the first and the second
terminals of the selection element are connected with each other,
the selection element outputs a first selection signal to the first
switch circuit, and then the enable signal is provided through the
first switch circuit to the first memory unit to start the first
basic input/output system, wherein when the third and the fourth
terminals of the selection element are connected with each other,
the selection element outputs a second selection signal to the
second switch circuit, and then the enable signal is provided
through the second switch circuit to the second memory unit to
start the second basic input/output system.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation application of and claims
the priority benefit of a prior application Ser. No. 12/402,485,
filed on Mar. 11, 2009, now pending. The prior application Ser. No.
12/402,485 claims the priority benefit of Taiwan application serial
no. 97113491, filed on Apr. 14, 2008. The entirety of each of the
above-mentioned patent applications is hereby incorporated by
reference herein and made a part of this specification.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention generally relates to a computer
system, and more particularly, to a computer system with dual basic
input/output systems (hereinafter briefly referred to as
"BIOS").
[0004] 2. Description of Related Art
[0005] In existing motherboards with dual-BIOS, the two BIOSes are
independent systems, each of which can be used to boot the computer
system. The computer system determines to use which BIOS to boot
the computer system according to a setting of the BIOS. In one
practical implementation, upon the computer system being started,
data of the BIOS used to boot the computer system is first loaded
to a random access memory (RAM) and the BIOS is then used to boot
the computer system. The computer system turns to use the other
BIOS to boot the system only when the BIOS loaded to the RAM fails
to boot the system.
[0006] In addition, in existing motherboards with dual-BIOS, data
can be written from one BIOS to the other. In other words, data of
one BIOS can be backed up to the other BIOS. In one practical
implementation, upon the computer system being started, the
computer system enters a setting interface and the BIOS backup is
performed by BIOS firmware in response to a BIOS backup instruction
inputted by a user.
[0007] It can be seen from the foregoing discussion that, when the
preset BIOS is damaged which causes the system boot to fail, the
user can select the other BIOS to boot the system and, after the
system has been booted, the BIOS backup can be performed to repair
the damaged BIOS. However, in the conventional implementations, the
computer system turns to use the other BIOS to boot the system only
when the system boot fails, which makes it impossible for the user
to select a desired BIOS to boot the computer system prior to the
start of the computer system. In addition, in the conventional
implementations, the computer system is able to backup the BIOS
only after the system has been booted.
SUMMARY OF THE INVENTION
[0008] The present invention provides a computer system including a
first memory unit, a second memory unit, and a switch unit. The
first memory unit stores a first basic input/output system (BIOS).
The second memory unit stores a second BIOS. The switch unit has a
first configuration and a second configuration. Upon the computer
system being started, the switch unit receives an enable signal.
When the switch unit is in the first configuration, the enable
signal is provided to the first memory unit to start the first
basic input/output system. When the switch unit is in the second
configuration, the enable signal is provided to the second memory
unit to start the second basic input/output system.
[0009] The present invention provides a computer system including a
first memory unit, a second memory unit, a register, and a
microcontroller. The first memory unit stores a first BIOS. The
second memory unit stores a second BIOS. The register records a
setting. The microcontroller controls an enable signal to be
outputted to the first or second memory unit according to the
setting in the register when the computer system is started.
[0010] The present invention provides a computer system including a
first memory unit, a second memory unit, a switch, and a
microcontroller. The first memory unit stores a first BIOS. The
microcontroller is coupled to the first memory unit, the second
memory unit and the switch. The microcontroller reads the first
BIOS in the first memory unit and stores the first BIOS in the
second memory unit when the microcontroller detects that the switch
is closed.
[0011] The present invention includes a switch unit such that the
internal configuration of the switch unit can be changed prior to
starting of the computer system. After the computer system starts,
the computer system determines the BIOS used to boot the computer
system according to the internal configuration of the switch unit.
In addition, the present invention includes a microcontroller that
enables the computer to backup the BIOS prior to the starting of
the computer.
[0012] In order to make the aforementioned and other features and
advantages of the present invention more comprehensible,
embodiments accompanied with figures are described in detail
below.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] FIG. 1 illustrates a block diagram of a computer system
according to a first embodiment of the present invention.
[0014] FIG. 2 illustrates a block diagram of a computer system
according to a second embodiment of the present invention.
[0015] FIG. 3 illustrates a block diagram of a computer system
according to a third embodiment of the present invention.
[0016] FIG. 4 illustrates a block diagram of a computer system
according to a fourth embodiment of the present invention.
DESCRIPTION OF THE EMBODIMENTS
[0017] The present invention will now be described more fully
hereinafter with reference to the accompanying drawings, in which
four embodiments of the invention are shown. As will be described,
embodiments of the present invention allow for user selection of a
desired BIOS to boot a computer system as well as backup of BIOS
prior to system boot.
First Embodiment
[0018] FIG. 1 illustrates a block diagram of a computer system
according to a first embodiment of the present invention. Referring
to FIG. 1, the computer system 100 includes a first memory unit
110, a second memory unit 120, and a switch unit 130. For ease of
description of the present embodiment, it is assumed that the first
memory unit 110 and the second memory unit 120 store a first BIOS
and a second BIOS, respectively, and the switch unit 130 is a
4-terminal jumper.
[0019] As shown in FIG. 1, the switch unit 130 includes a first
terminal T11, a second terminal T12, a third terminal T13, and a
fourth terminal T14. The switch unit 130 has a first configuration
and a second configuration. When the switch unit 130 is in the
first configuration, the first terminal T11 is electrically
conductive with the second terminal T12. When the switch unit 130
is in the second configuration, the third terminal T13 is
electrically conductive with the fourth terminal T14.
[0020] Upon the computer system 100 being started, the computer
system 100 outputs an enable signal S.sub.E to the switch unit 130.
The switch unit 130 determines to provide the enable signal S.sub.E
to the first memory unit 110 or the second memory unit 120
according to the current internal configuration of the switch unit
130. For example, when the switch unit 130 is in the first
configuration where the first terminal T11 is electrically
conductive with the second terminal T12, the enable signal S.sub.E
is provided to the first memory unit 110 such that the computer
system 100 can be booted using the first BIOS. When the switch unit
130 is in the second configuration where the third terminal T13 is
electrically conductive with the fourth terminal T14, the enable
signal S.sub.E is provided to the second memory unit 120 such that
the computer system 100 can be booted using the second BIOS.
[0021] The memory chip storing the BIOS is controlled by a south
bridge chip on a motherboard or an embedded controller and is
connected through a 4-pin serial peripheral interface (SPI) based
on current technology. Taking the SPI protocol as an example, the
four pins are used to transmit a clock signal, a chip select
signal, data output and input signals, respectively. The chip
select signal is outputted from the controlling end (South bridge
chip or embedded controller) to notify the controlled end (memory
chip) to start operation. Therefore, when the present embodiment is
carried out by the current computer technology, the computer system
100 can be connected to the south bride chip on the motherboard or
an embedded controller, the chip select signal can be used as the
enable signal S.sub.E of the present embodiment, and the switch
unit 130 determines whether to provide the chip select signal to
the first memory unit 110 or the second memory unit 120 so as to
enable the first memory unit 110 or the second memory unit 120. The
clock signal, data output and input signals can be directly
outputted to the first memory unit 110 or the second memory unit
120.
[0022] In the present embodiment, the switch unit 130 determines
which BIOS is used to boot the computer system 100 according to the
internal configuration. In other words, prior to the start of the
computer system 100, the user may use a conductive plate to
electrically connect the first terminal T11 to the second terminal
T12 of the switch unit 130, or electrically connect the third
terminal T13 to the fourth terminal T14 of the switch unit 130, to
thereby decide which BIOS is used to boot the system. In the
present embodiment, the switch unit 130 is implemented as a jumper.
It should be understood, however, that the switch unit may also be
a press button or a slide switch.
Second Embodiment
[0023] FIG. 2 illustrates a block diagram of a computer system
according to a second embodiment of the present invention.
Referring to FIG. 2, the computer system 200 includes a first
memory unit 210, a second memory unit 220, and a switch unit 230.
For ease of description of the present embodiment, it is assumed
that the first memory unit 210 and the second memory unit 220 store
a first BIOS and a second BIOS, respectively.
[0024] As shown in FIG. 2, the switch unit 230 includes a first
switch circuit 240, a second switch circuit 250, and a selection
element 260. The first switch circuit 240 has an input terminal Ti1
and an output terminal To1. The second switch circuit 250 has an
input terminal Ti2 and an output terminal To2. The input terminal
Ti1 of the first switch circuit 240 and the input terminal Ti2 of
the second switch circuit 250 receive an enable signal S.sub.E. The
output terminal To1 of the first switch circuit 240 and the output
terminal To2 of the second switch circuit 250 are coupled to the
first memory unit 210 and the second memory unit 220,
respectively.
[0025] The selection element 260 has a first terminal T21, a second
terminal T22, a third terminal T23, and a fourth terminal T24. The
first terminal T21 and the third terminal T23 are coupled to a
ground voltage GND. The second terminal T22 is coupled to the first
switch circuit 240 and a resistor R21. The fourth terminal T24 is
coupled to the second switch circuit 250 and a resistor R22. One
end of the resistor R21 is coupled to the second terminal T22 and
the other end of the resistor R21 is coupled to a first reference
voltage Vd1. One end of the resistor R22 is coupled to the fourth
terminal T24 and the other end of the resistor R22 is coupled to
the first reference voltage Vd1.
[0026] The first switch circuit 240 includes a first transistor M1,
a second transistor M2, and a resistor R23. A first source/drain of
the first transistor M1 receives the enable signal S.sub.E and is
used as the input terminal Ti1 of the first switch circuit 240. A
second source/drain of the first transistor M1 is coupled to the
first memory unit 210 and is used as the output terminal To1 of the
first switch circuit 240. A gate of the first transistor M1 is
coupled to the resistor R21 and the second transistor M2. A first
source/drain of the second transistor M2 of the first switch
circuit 240 is coupled to the resistor R23. A second source/drain
of the second transistor M2 is coupled to the ground voltage GND. A
gate of the second transistor M2 is coupled to the second terminal
T22 of the selection element 260. One end of the resistor R23 is
coupled to the gate of the first transistor M1 and the first
source/drain of the second transistor M2, and the other end of the
resistor R23 is coupled to a second reference voltage Vd2. In
addition, the second switch circuit 250 includes a third transistor
M3, a fourth transistor M4, and a resistor R24. In the present
embodiment, the internal components of the second switch circuit
250 are constructed and arranged in a similar way as described in
the first switch circuit 240 and therefore are not repeated
herein.
[0027] In the present embodiment, when the first terminal T21 is
coupled to the second terminal T22 of the selection unit 260 and
the third terminal T23 is disconnected from the fourth terminal
T24, the second terminal T22 of the selection unit 260 outputs a
first selection signal (i.e., the ground voltage GND) to the switch
circuit 240. At this time, the gate of the second transistor M2
receives the ground voltage OND causing the second transistor M2 to
turn off and the first transistor M2 to turn on, such that the
enable signal S.sub.E is outputted to the first memory unit 210.
Besides, because the third terminal T23 and the fourth terminal T24
are still disconnected at this time, the fourth transistor M4
receives the first reference voltage Vd1 through the resistor R22
causing the fourth transistor M4 to turn on and the third
transistor M3 to turn off, thereby preventing the enable signal
S.sub.E from being outputted to the second memory unit 220.
[0028] Likewise, when the third terminal T23 is coupled to the
fourth terminal T24 of the selection unit 260 and the first
terminal T21 is disconnected from the second terminal T22, the
enable signal S.sub.E is outputted to the second memory unit 220
and prevented from being outputted to the first memory unit 210 as
well.
[0029] It can be seen from the above circuit operation that the
user uses a conductive plate to determine the internal
configuration of the selection unit 260 to control the selection
unit 260 to output a selection signal to the switch circuit 240 or
250, thereby controlling the enable signal to be provided to the
first memory unit 210 or to the second memory unit 220 and hence
allowing the user to select the BIOS stored in the first memory
unit 210 or the BIOS stored in the second memory unit 220 to boot
the computer system. In other words, the present embodiment allows
the user to select the BIOS used to boot the computer system prior
to the start of the computer. Besides, the selection unit 260 is
implemented as, for example, a 4-terminal jumper in the present
embodiment and could also be a button or a slide switch in
alternative embodiments.
[0030] In addition, the computer system 200 of the present
embodiment may further include a microcontroller (not shown). The
microcontroller has a transmitting interface for outputting an
enable signal, a clock signal, data output and input signals, and
the like. The enable signal is outputted to the switch unit 230.
The clock signal, data output and input signals are directly
outputted to the memory units 210 and 220. Upon the computer system
200 being started, the microcontroller outputs the enable signal to
the switch unit 230. It is then determined by the switch unit 230
whether to output the enable signal to the first memory unit 210 or
the second memory unit 220 to control the selection of the BIOS
used to boot the computer system 200. The microcontroller may, for
example, be the south bridge chip or an embedded controller and the
transmitting interface may, for example, be SPI based on the
current technology.
Third Embodiment
[0031] FIG. 3 illustrates a block diagram of a computer system
according to a third embodiment of the present invention. Referring
to FIG. 3, the computer system 300 includes a first memory unit
310, a second memory unit 320, a microcontroller 330, and a
register 340. The first memory unit 310 stores a first BIOS and the
second memory unit 320 stores a second BIOS. The register 340
records a setting. The microcontroller 330 controls an output of
the enable signal SE to one of the first memory unit 310 and the
second memory unit 320 to determine whether to use the first BIOS
or the second BIOS to boot the computer system 300 according to the
setting in the register.
[0032] The setting in the register 340 is set, for example, through
a setting interface. For example, the setting in the register 340
is 0 or 1. When the setting is 0, it represents that the first BIOS
is used to boot the computer system 300. The microcontroller 330
controls the enable signal S.sub.E to be outputted to the first
memory unit 310 upon starting of the computer system 300. On the
contrary, when the setting in the register 340 is 1, the
microcontroller 330 controls the enable signal S.sub.E to be
outputted to the second memory unit 320. The setting interface is,
for example, a BIOS setup menu.
Fourth Embodiment
[0033] FIG. 4 illustrates a block diagram of a computer system
according to a fourth embodiment of the present invention.
Referring to FIG. 4, the computer system 400 includes a first
memory unit 410, a second memory unit 420, a microcontroller 430,
and a switch 440. It is assumed that the first memory unit 410
stores a first BIOS. It is also assumed that a standby power has
been already supplied to the microcontroller 430, the first memory
unit 410 and the second memory unit 420 prior to the starting of
the computer system 400.
[0034] The microcontroller 430 controls input/output of the first
memory unit 410 and the second memory unit 420. In addition, the
microcontroller 430 is able to detect whether the switch 440 is
closed. Prior to the starting of the computer system 400, the
microcontroller 430 uses the standby power to control the first
memory unit 410 to backup the first BIOS data in the first memory
unit 410 to the second memory unit 420 when the switch 440 is
closed.
[0035] As shown in FIG. 4, the microcontroller 430 has a first
control terminal Tc1, a second control terminal Tc2, a data output
terminal Tso, a data input terminal Tsi, and a clock signal
terminal Tclk. Each of the data output terminal Tso, data input
terminal Tsi and clock signal terminal Tclk of the microcontroller
430 is coupled to both the first memory unit 410 and the second
memory unit 420. The first control terminal Tc1 is coupled to the
first memory unit 410 and the second control terminal Tc2 is
coupled to the second memory unit 420.
[0036] When the first control terminal Tc1 of the microcontroller
430 outputs a first enable signal S.sub.E1 to the first memory unit
410, the first memory unit 410 and the microcontroller 430 transmit
data therebetween through the data output terminal Tso, data input
terminal Tsi and clock signal terminal Tclk. At this time, the
second memory unit 420 ignores the signals transmitted through the
data output terminal Tso, data input terminal Tsi and clock signal
terminal Tclk. In other words, at this time, the first memory unit
410 can output the internal first BIOS data to the microcontroller
430.
[0037] When the second control terminal Tc2 of the microcontroller
430 outputs a second enable signal S.sub.E2 to the second memory
unit 420, the second memory unit 420 and the microcontroller 430
transmit data therebetween through the data output terminal Tso,
data input terminal Tsi and clock signal terminal Tclk. At this
time, the first memory unit 410 ignores the signals transmitted
through the data output terminal Tso, data input terminal Tsi and
clock signal terminal Tclk. In other words, at this time, the
microcontroller 430 can output the first BIOS data, which was
transmitted from the first memory unit 410, to the second memory
unit 420, thus storing the first BIOS into the second memory unit
420 to backup the first BIOS. If the second memory unit 420 also
stores a second BIOS, the second BIOS can also be backed up to the
first memory unit 410 in a similar way as described above.
[0038] However, if a user mistakingly triggers the switch 440, the
microcontroller 430 then operates to backup the BIOS as described
above, which causes the BIOS data to be erroneously written into
the memory unit. To avoid this miswriting problem, the
microcontroller 430 of the present embodiment further includes a
first detection terminal Td1 and a second detection terminal Td2.
The two detection terminals Td1 and Td2 provide the microcontroller
430 with a double-check mechanism to determine whether to backup
the BIOS.
[0039] With continuous reference to FIG. 4, the switch 440 has a
first terminal T41 and a second terminal T42. The first terminal
T41 is coupled to a ground voltage GND. The second terminal T42 is
coupled to the microcontroller 430 and a resistor R41. One end of
the resistor R41 is coupled to the second terminal T42 of the
switch 440 and the other end of the resistor R41 receives a
reference voltage Vd3. When the switch 440 is closed, the first
terminal T41 is electrically coupled to the second terminal T42
causing the first detection terminal Td1 of the microcontroller 430
to be at the ground voltage. When the switch 440 is opened, the
first terminal T41 is disconnected from the second terminal T42
causing the first detection terminal Td1 of the microcontroller 430
to be approximately at the reference voltage Vd3.
[0040] In addition, the computer system 400 of FIG. 4 further
includes a switch element 450 having a first terminal T43 and a
second terminal T44. The first terminal T43 is coupled to the
ground voltage GND. The second terminal T44 is coupled to the
second detection terminal Td2 of the microcontroller 430 and a
resistor R42. One end of the resistor R42 is coupled to the second
terminal T44 of the switch element 450, and the other end of the
resistor R42 receives a reference voltage Vd4. When the first
terminal T43 is electrically connected to the second terminal T44
of the switch element 450, the second detection terminal Td2 of the
microcontroller 430 is caused to be at the ground voltage. When the
first terminal T43 is disconnected from the second terminal T44 of
the switch element 450, the second detection terminal Td2 of the
microcontroller 430 is caused to be approximately at the reference
voltage Vd4.
[0041] In the present embodiment, the microcontroller 430 can
activate the BIOS backup when, for example, the microcontroller 430
detects that the detection terminals Td1 and Td2 are both at the
ground voltage at the same time. Alternatively, the BIOS backup is
activated when the second detection terminal Td2 is continuously at
the ground voltage GND and the first detection terminal Td1 is
maintained at the ground voltage GND for a specific time period
(e.g., two or three seconds). In the present embodiment, the switch
element 450 is implemented as, for example, a 2-terminal jumper and
the switch 440 is implemented as, for example, a press button. In
other words, the microcontroller 430 activates the BIOS backup only
when a conductive plate is used to interconnect the terminals T43
and T44 of the switch element 450 and, at the same time, the button
has been pressed to close the switch for more than a specific
time.
[0042] In the foregoing embodiments, the microcontroller may be a
south bridge chip on the motherboard or an embedded controller, and
the memory units may be a flash memory or another type of
non-volatile memory.
[0043] In summary, the present invention has at least the following
advantages:
[0044] 1. The present invention includes a switch unit such that
the internal configuration of the switch unit can be changed prior
to starting of the computer system. Upon the computer system being
started, the computer system determines the BIOS used to boot the
computer system according to the internal configuration of the
switch unit. Therefore, users can select the BIOS used to boot the
computer system prior to the starting of the computer system.
[0045] 2. The present invention includes a microcontroller that
enables the computer to backup the BIOS prior to the starting of
the computer.
[0046] It will be apparent to those skilled in the art that various
modifications and variations can be made to the structure of the
present invention without departing from the scope or spirit of the
invention. In view of the foregoing, it is intended that the
present invention cover modifications and variations of this
invention provided they fall within the scope of the following
claims and their equivalents.
* * * * *