U.S. patent application number 13/106851 was filed with the patent office on 2011-12-29 for passivated upstanding nanostructures and methods of making the same.
This patent application is currently assigned to ZENA TECHNOLOGIES, INC.. Invention is credited to Munib Wober, Young-June Yu.
Application Number | 20110315988 13/106851 |
Document ID | / |
Family ID | 45351678 |
Filed Date | 2011-12-29 |
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United States Patent
Application |
20110315988 |
Kind Code |
A1 |
Yu; Young-June ; et
al. |
December 29, 2011 |
PASSIVATED UPSTANDING NANOSTRUCTURES AND METHODS OF MAKING THE
SAME
Abstract
Described herein is a device comprising: a substrate; one or
more of a nanostructure extending essentially perpendicularly from
the substrate; wherein the nanostructure comprises a core of a
doped semiconductor, an first layer disposed on the core, and a
second layer of an opposite type from the core and disposed on the
first layer.
Inventors: |
Yu; Young-June; (Cranbury,
NJ) ; Wober; Munib; (Topsfield, MA) |
Assignee: |
ZENA TECHNOLOGIES, INC.
Cambridge
MA
|
Family ID: |
45351678 |
Appl. No.: |
13/106851 |
Filed: |
May 12, 2011 |
Related U.S. Patent Documents
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Application
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Filing Date |
Patent Number |
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12573582 |
Oct 5, 2009 |
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13106851 |
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12575221 |
Oct 7, 2009 |
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12573582 |
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12633323 |
Dec 8, 2009 |
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12575221 |
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12633318 |
Dec 8, 2009 |
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12633323 |
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12633313 |
Dec 8, 2009 |
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12633318 |
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12633305 |
Dec 8, 2009 |
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12633313 |
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12982269 |
Dec 30, 2010 |
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12633305 |
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12966573 |
Dec 13, 2010 |
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12982269 |
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12967880 |
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12966573 |
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12974499 |
Dec 21, 2010 |
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12967880 |
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12945492 |
Nov 12, 2010 |
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12974499 |
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13047392 |
Mar 14, 2011 |
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12945492 |
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13048635 |
Mar 15, 2011 |
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13047392 |
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Current U.S.
Class: |
257/52 ; 257/458;
257/E21.09; 257/E29.003; 257/E31.061; 438/478; 977/762;
977/954 |
Current CPC
Class: |
H01L 31/145 20130101;
H01L 31/107 20130101; H01L 33/06 20130101; H01L 27/156 20130101;
H01L 31/1055 20130101; H01L 31/035227 20130101; Y02E 10/547
20130101; H01L 27/14 20130101; H01L 31/105 20130101; H01L 27/1446
20130101; H01L 27/14643 20130101; H01L 31/02168 20130101; H01L
31/02161 20130101; H01L 27/1462 20130101; H01L 31/02322 20130101;
H01L 31/028 20130101; H01L 31/022408 20130101 |
Class at
Publication: |
257/52 ; 438/478;
257/458; 257/E29.003; 257/E21.09; 257/E31.061; 977/762;
977/954 |
International
Class: |
H01L 29/04 20060101
H01L029/04; H01L 21/20 20060101 H01L021/20; H01L 31/105 20060101
H01L031/105 |
Claims
1. A device comprising: a substrate; one or more of a nanostructure
extending essentially perpendicularly from the substrate; wherein
the nanostructure comprises a core of a doped semiconductor of a
first type, a first layer comprising a lightly doped amorphous
semiconductor or an intrinsic amorphous semiconductor, and a second
layer comprising a heavily doped amorphous semiconductor layer of a
second type opposite from the first type, wherein the first layer
is disposed on the core and the second layer is disposed on the
first layer.
2. The device of claim 1, wherein the first layer is configured to
passivate at least a surface of the core.
3. The device of claim 1, wherein the first layer is disposed
isotropically over at least an end portion of the core away from
the substrate.
4. The device of claim 3, wherein the second layer is disposed
isotropically over at least a portion of the first layer.
5. The device of claim 1, wherein the first layer is disposed on an
end surface of the core away from the substrate.
6. The device of claim 5, wherein the second layer is disposed on
the first layer.
7. The device of claim 6, wherein the first layer and the second
layer are coextensive with the core in at least a direction
parallel to the substrate.
8. The device of claim 5, wherein sidewalls of the core are at
least partially covered by an electrically insulating layer.
9. The device of claim 8, wherein the first layer and the second
layer are coextensive with the electrically insulating layer in at
least a direction parallel to the substrate.
10. (canceled)
11. (canceled)
12. The device of claim 1, wherein the core comprises one or more
doped semiconductor material selected from the group consisting of
doped silicon, doped germanium, doped III-V group compound
semiconductor, doped II-VI group compound semiconductor, and doped
quaternary semiconductor; wherein the first layer comprises one or
more intrinsic amorphous semiconductor material selected from the
group consisting intrinsic amorphous silicon, intrinsic amorphous
germanium, intrinsic amorphous III-V group compound semiconductor
and intrinsic amorphous II-VI group compound semiconductor; and
wherein the second layer comprises one or more heavily doped
amorphous semiconductor material selected from the group consisting
heavily doped amorphous silicon, heavily doped amorphous germanium,
heavily doped amorphous III-V group compound semiconductor and
heavily doped amorphous II-VI group compound semiconductor.
13. (canceled)
14. The device of claim 1, wherein the core is lightly doped.
15. (canceled)
16. (canceled)
17. The device of claim 1, wherein the first layer has a thickness
of about 2 nm to about 100 nm.
18. (canceled)
19. The device of claim 1, wherein the second layer has a thickness
of at least about 10 nm.
20. The device of claim 1, wherein the second layer, the first
layer and the core form a p-i-n junction.
21. (canceled)
22. The device of claim 1, wherein the nanostructure is a nanowire
or a nanoslab.
23. A method of manufacturing the device of claim 1, comprising
depositing the first layer on the core by atomic layer deposition
(ALD) or chemical vapor deposition (CVD); and depositing the second
layer on the first layer by ALD or CVD.
24-176. (canceled)
177. A device comprising: a substrate; one or more of a
nanostructure extending essentially perpendicularly from the
substrate; wherein the nanostructure comprises a core and a
passivation layer, the passivation layer configured to passivate at
least a surface of the core and configured to form a p-i-n junction
with the core.
178. The device of claim 177, wherein the passivation layer
comprises an amorphous material.
179. A device comprising: a substrate; one or more of a
nanostructure extending essentially perpendicularly from the
substrate; wherein the nanostructure comprises a core and a
passivation layer, the passivation layer configured to passivate at
least a surface of the core; wherein the device is configured to
convert light to electricity.
180. The device of claim 179, wherein the passivation layer is
configured to form a p-i-n junction with the core and the p-i-n
junction is functional to convert light to electricity.
181. (canceled)
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part of and claims the
benefit of the earlier filing date of co-pending U.S. patent
application Ser. Nos. 12/573,582, 12/575,221, 12/633,323,
12/633,318, 12/633,313, 12/633,305, 12/982,269, 12/966,573,
12/967,880, 12/974,499, 12/945,492, 13/047,392, and 13/048,635, the
entire contents of each of which are incorporated herein by
reference.
[0002] This application is related to U.S. patent application Ser.
Nos. 61/266,064, 61/357,429, 61/360,421, 12/204,686 (granted as
U.S. Pat. No. 7,646,943), 12/270,233, 12/472,264, 12/472,271,
12/478,598, 12/633,297, 12/621,497, 12/648,942, 12/910,664,
12/966,514, and 12/966,535, and the disclosures each of which are
hereby incorporated by reference in their entirety.
BACKGROUND
[0003] Semiconductor surface is often a source of defects that
adversely affect the electric, optical and chemical properties of
the semiconductor. A suitable passivation technique eliminates the
defects or prevent the adverse effects of the defects.
SUMMARY
[0004] Described herein is a device comprising: a substrate; one or
more of a nanostructure extending essentially perpendicularly from
the substrate; wherein the nanostructure comprises a core of a
doped semiconductor, an intrinsic amorphous semiconductor layer
disposed on the core, and a heavily doped amorphous semiconductor
layer of an opposite type from the core and disposed on the
intrinsic amorphous semiconductor layer.
[0005] Also described herein is a device comprising: a substrate;
one or more of a nanostructure extending essentially
perpendicularly from the substrate; wherein the nanostructure
comprises a core and a passivation layer, the passivation layer
comprising an amorphous material, configured to passivate at least
a surface of the core and configured to form a p-i-n junction with
the core.
BRIEF DESCRIPTION OF THE FIGURES
[0006] FIGS. 1A-1C each show a partial cross-sectional view of a
nanostructure.
[0007] FIG. S1A shows a nanostructure on a substrate.
[0008] FIG. S1B shows simulated absorptance of the nanostructure of
FIG. S1A.
[0009] FIG. S1C shows optional couplers on the nanostructure.
[0010] FIGS. S2A and S2B show a perspective view and a top view of
an image sensor according an embodiment.
[0011] FIG. S9 shows a block diagram of a solar-blind image
sensor.
[0012] FIG. S10 shows a schematic of the SBUV detector being used
as fore optics.
[0013] FIG. P1 is a perspective view of the device according one
embodiment.
[0014] FIG. P2 shows a schematic of nanostructures in one subpixel
when light with different polarization impinges thereon.
[0015] FIG. P12 shows a top view and a perspective view of a
nanostructure in the device of FIG. P1, wherein the feature has
metal layers on its sidewalls.
[0016] FIG. V2A is a schematic cross sectional view of a
photovoltaic device according to an embodiment.
[0017] FIG. V5 shows a schematic of light concentration in the
structures of the photovoltaic device.
[0018] FIG. V6 shows an exemplary top cross sectional view of the
photovoltaic device.
[0019] FIG. V7 shows an exemplary perspective view of the
photovoltaic device.
[0020] FIG. V8B shows schematics of drawing electrical current from
the photovoltaic device of FIG. V2A.
[0021] FIG. V9 shows an alternative stripe-shaped structures of the
photovoltaic device.
[0022] FIG. V10 shows an alternative mesh-shaped structures of the
photovoltaic device.
[0023] FIG. W2A is a schematic cross sectional view of a
photovoltaic device according to an embodiment.
[0024] FIGS. W11A and WFIG. 11B show a process of making vias.
[0025] FIG. W12A and FIG. W12B show top views of exemplary
vias.
[0026] FIG. W8B shows schematics of drawing electrical current from
the photovoltaic device of FIG. W2A.
[0027] FIG. M1 shows a schematic perspective view of an array of
nanostructures, according to an embodiment.
[0028] FIG. M2 shows a schematic cross-sectional view of the array
of nanostructures of FIG. M1, according to an embodiment.
[0029] FIG. M3 shows an alternative schematic cross-sectional view
of the array of nanostructures of FIG. M1, according to an
embodiment.
[0030] FIG. M4 shows yet another schematic cross-sectional view of
the array of nanostructures of FIG. M1, according to an
embodiment.
[0031] FIG. M5 shows simulated fluorescence spectra of two
exemplary arrays of nanostructures in axial directions thereof.
[0032] FIG. M6 shows simulated fluorescence spectra of several
exemplary arrays of nanostructures in axial directions thereof, all
of which have a same pitch of 637 nm and different radii.
[0033] FIG. M7 shows a schematic light distribution of an air mode
of the array of nanostructures.
[0034] FIG. M8 shows a simulated fluorescence spectrum of an
exemplary array of nanostructures in axial directions thereof,
wherein the fluorescent nanostructures are embedded in oxide.
[0035] FIG. M9 shows a simulated fluorescence spectrum of an
exemplary array of nanostructures in axial directions thereof,
wherein the fluorescent nanostructures have a cladding layer.
[0036] FIG. M10 shows a simulated fluorescence spectrum of an
exemplary array of nanostructures in axial directions thereof,
wherein the fluorescent nanostructures have a cladding layer and
wherein the array of nanostructures of FIG. M10 has dimensions to
scale with the array of nanostructures of FIG. M9 and a peak
position at 637 nm.
[0037] FIGS. S4 and S5 show an apparatus comprising the image
sensor, according to an embodiment.
[0038] FIG. S6 shows another apparatus comprising the image sensor,
according to an embodiment.
[0039] FIGS. S7A and S7B show schematics of a pixel of the image
sensor, the pixel having more than one nanopillar sized to absorb
and/or detect light of different wavelength or color, according to
embodiments.
[0040] FIG. SS2 shows a cross sectional view of an embodiment of an
image sensor having a microlens.
[0041] FIG. SS3 shows an embodiment of an array of nanowires within
a single cavity of the image sensor of an embodiment.
[0042] FIG. SS4 shows a schematic of a top view of a device
containing image sensors of the embodiments disclosed herein, each
image sensor having two outputs representing the complementary
colors.
[0043] FIG. SS5 shows a response of the single wire of diameter 65
nm in a 1200 nm cavity as a function of wavelength with
illumination incident at 0 and 10 degrees from the vertical.
[0044] FIG. SS6 shows a response of an array of 5 wires of diameter
60 nm in a 1200 nm cavity as a function of wavelength with
illumination incident at 0 and 10 degrees from the vertical.
[0045] FIG. SS7 shows a response of the single wire of diameter 65
nm in a 600 nm cavity as a function of wavelength with illumination
incident at 0 and 10 degrees from the vertical.
[0046] FIG. F1A shows a schematic cross-sectional view of an image
sensor according to an embodiment.
[0047] FIG. F1B shows a schematic top view of the image sensor of
FIG. F1A.
[0048] FIG. F1C shows exemplary absorption spectra of two nanowires
in two subpixels in a pixel of the image sensor of FIG. F1A and a
photodiode on the substrate of the image sensor of FIG. F1A.
[0049] FIG. F2A shows a schematic cross-sectional view of an image
sensor according to an embodiment.
[0050] FIG. F2B shows a schematic top view of the image sensor of
FIG. F2A.
[0051] FIG. F2C shows exemplary absorption spectra of three
nanowires in three subpixels in a pixel of the image sensor of FIG.
F2A and the substrate of the image sensor of FIG. F2A.
[0052] FIG. F2D shows exemplary absorption spectra of four
nanowires in four subpixels in a pixel of the image sensor of FIG.
F2A and the substrate of the image sensor of FIG. F2A.
[0053] FIG. F3 shows a schematic of couplers and an infrared
filter.
[0054] FIG. F4 shows exemplary color-matching functions of three
subpixels in the image sensor, and color-matching functions the CIE
standard observer.
[0055] FIG. D2 illustrates a simplified cross sectional view of an
embodiment of a pixel with a nanowire structured photodetector with
front side illumination.
[0056] FIG. D2b illustrates an aspect of the embodiment illustrated
in FIG. D2 with a binary microlens on the NW structured
photodetector.
[0057] FIG. D3 illustrates simplified cross section view of an
embodiment of a pixel with a nanowire structured photodetector with
backside illumination.
[0058] FIG. D4 illustrates an embodiment having a CMOS pixel with a
nanowire and a vertical photogate (VPG).
[0059] FIG. D5b, illustrates a potential profile of an
embodiment.
[0060] FIG. D8 illustrates a cross section view of an embodiment
with a dual photodiode structure in which the p doped NW is coated
with an n+ epitaxial layer to form a p-n junction.
[0061] FIG. D9 illustrates an embodiment of a CMOS pixel with a
nanowire structured photogate detector.
[0062] FIG. D10 illustrates an embodiment of a CMOS active pixel
with nanowire structured p-i-n photodiodes and vertical photogates
around the NR.
[0063] FIG. D11 illustrates another embodiment of a CMOS active
pixel with nanowire structured p-i-n photodiodes and vertical
photogates around the NR.
[0064] FIG. D12 illustrates an embodiments of a back-side
illuminated image sensor.
[0065] FIG. D13 illustrates an embodiments of another back-side
illuminated image sensor.
[0066] FIGS. D23C and D23D show illustrative embodiments of a
cross-sectional view of a waveguide structure, such as a nanowire,
containing backside-illuminated image sensor with nanowires located
on the backside of the image sensor.
DETAILED DESCRIPTION
[0067] The terms "passivation" and "passivate" as used herein means
a process of eliminating dangling bonds (i.e., unsatisfied valence
on immobilized atoms). The term "image sensor" as used herein means
a device that converts an optical image to an electric signal. The
term "color image sensor" as used herein means an image sensor
capable of converting an optical image in the visible spectrum
(i.e. a color image) to an electric signal. The term "transparent"
as used herein means a transmittance of at least 70%. The term
"polarized light" as used herein means light with polarization.
"Linear polarization" as used herein means the electric field of
light is confined to a given plane along the direction of
propagation of the light. "Circular polarization" as used herein
means the electric field of light does not change strength but only
changes direction in a rotary type manner. "Elliptical
polarization" as used herein means electric field of light
describes an ellipse in any fixed plane intersecting, and normal
to, the direction of propagation of the light. The term
"photovoltaic device" as used herein means a device that can
generate electrical power by converting light such as solar
radiation into electricity. That the structures are single
crystalline as used herein means that the crystal lattice of the
entire structures is continuous and unbroken throughout the entire
structures, with no grain boundaries therein. An electrically
conductive material can be a material with essentially zero band
gap. The electrical conductivity of an electrically conductive
material is generally above 103 S/cm. A semiconductor can be a
material with a finite band gap up to about 3 eV and general has an
electrical conductivity in the range of 103 to 10-8 S/cm. An
electrically insulating material can be a material with a band gap
greater than about 3 eV and generally has an electrical
conductivity below 10-8 S/cm. The term "structures essentially
perpendicular to the substrate" as used herein means that angles
between the structures and the substrate is greater than zero,
preferably greater than 5.degree., more preferably are from
85.degree. to 90.degree.. The term "recess" as used herein means a
hollow space in the substrate and is open to a space outside the
substrate. A group III-V compound material as used herein means a
compound consisting of a group III element and a group V element. A
group III element can be B, Al, Ga, In, TI, Sc, Y, the lanthanide
series of elements and the actinide series of elements. A group V
element can be V, Nb, Ta, Db, N, P, As, Sb and Bi. A group II-VI
compound material as used herein means a compound consisting of a
group II element and a group VI element. A group II element can be
Be, Mg, Ca, Sr, Ba and Ra. A group VI element can be Cr, Mo, W, Sg,
O, S, Se, Te, and Po. A quaternary material is a compound
consisting of four elements. The term "mesh" as used herein means a
web-like pattern or construction. The term "overhanging portion" as
used herein means a portion of the structures that project over the
sidewall of the recesses. The term "contour of a top surface of the
structures" as used herein means the edge of the top surface of the
structures. The term "electrode" as used herein means a conductor
used to establish electrical contact with the photovoltaic device.
The term "continuous" as used herein means having no gaps, holes,
or breaks. The term "p-i-n junction" as used herein means a
structure of a lightly doped or intrinsic semiconductor region
sandwiched between a p-type semiconductor region and an n-type
semiconductor region. The p-type and n-type regions can be heavily
doped for Ohmic contacts. The term "p-n junction" as used herein
means a structure with a p-type semiconductor region and an n-type
semiconductor region in contact with each other. The term "gate
electrode" as used herein means an electrode operable to control
electrical current flow by a voltage applied on the gate electrode.
The term "nanopillar" as used herein means a structure that has a
size constrained to at most 1000 nm in two dimensions and
unconstrained in the other dimension. The term "nanopillar" can
also mean a structure that has a size constrained to at most 10
microns in two dimensions and unconstrained in the other dimension.
The term "gate line" as used herein means an electrode or a
conductor line operable to transmit an electrical signal to the
gate electrodes. The term "multiplexer" as used herein means a
device that performs multiplexing; it selects one of many analog or
digital input signals and forwards the selected input into a single
line. An analog-to-digital converter (abbreviated ADC, A/D or A to
D) is a device that converts a continuous quantity to a discrete
digital number. A digital-to-analog converter (DAC or D-to-A) is a
device that converts a digital (usually binary) code to an analog
signal (current, voltage, or electric charge). The term
"foreoptics" as used herein means optical components (e.g., lenses,
mirrors) placed in an optical path before the image sensor.
[0068] An intrinsic semiconductor, also called an undoped
semiconductor or i-type semiconductor, is a substantially pure
semiconductor without any significant dopant species present. A
heavily doped semiconductor is a semiconductor with such a high
doping level that the semiconductor starts to behave electrically
more like a metal than as a semiconductor. A lightly doped
semiconductor is a doped semiconductor but not have a doping level
as high as a heavily doped semiconductor. In a lightly doped
semiconductor, dopant atoms create individual doping levels that
can often be considered as localized states that can donate
electrons or holes by thermal promotion (or an optical transition)
to the conduction or valence bands respectively. At high enough
impurity concentrations (i.e. heavily doped) the individual
impurity atoms may become close enough neighbors that their doping
levels merge into an impurity band and the behavior of such a
system ceases to show the typical traits of a semiconductor, e.g.
its increase in conductivity with temperature. A "single
crystalline" semiconductor as used herein means that the crystal
lattice of the semiconductor is continuous and unbroken, with no
grain boundaries therein. A semiconductor being "multi-crystalline"
as used herein means that the semiconductor comprises grains of
crystals separated by grain boundaries. A semiconductor being
"amorphous" as used herein means that the semiconductor has a
disordered atomic structure.
[0069] FIGS. 1A-1C each show a partial cross-sectional view of a
nanostructure 1 extending essentially perpendicularly from a
substrate 20.
[0070] As shown in a partial cross-sectional view of FIG. 1A, a
nanostructure 1, according to an embodiment, extends essentially
perpendicularly from a substrate 20 and comprises a core 11 of a
doped semiconductor material, an intrinsic amorphous semiconductor
layer 12 disposed isotropically over at least an end portion 14
away from the substrate 20, and a heavily doped amorphous
semiconductor layer 13 of an opposite type from the core 11 and
disposed isotropically over at least a portion of the intrinsic
amorphous semiconductor layer 12.
[0071] As shown in a partial cross-sectional view of FIG. 1B, a
nanostructure 1, according to an embodiment, extends essentially
perpendicularly from a substrate 20 and comprises a core 11 of a
doped semiconductor material, an intrinsic amorphous semiconductor
layer 12 disposed on an end surface 16 away from the substrate 20,
and a heavily doped amorphous semiconductor layer 13 of an opposite
type from the core 11 and disposed on the intrinsic amorphous
semiconductor layer 12. Preferably, the intrinsic amorphous
semiconductor layer 12 and the heavily doped amorphous
semiconductor layer 13 are coextensive with the core 11 in at least
a direction parallel to the substrate 20. Preferably, sidewalls of
the core 11 are at least partially covered by an electrically
insulating layer 15.
[0072] As shown in a partial cross-sectional view of FIG. 1C, a
nanostructure 1, according to an embodiment, extends essentially
perpendicularly from a substrate 20 and comprises a core 11 of a
doped semiconductor material, an intrinsic amorphous semiconductor
layer 12 disposed on an end surface 16 away from the substrate 20,
and a heavily doped amorphous semiconductor layer 13 of an opposite
type from the core 11 and disposed on the intrinsic amorphous
semiconductor layer 12. Preferably, sidewalls of the core 11 are at
least partially covered by an electrically insulating layer 15.
Preferably, the intrinsic amorphous semiconductor layer 12 and the
heavily doped amorphous semiconductor layer 13 are coextensive with
the electrically insulating layer 15 in at least a direction
parallel to the substrate 20.
[0073] The substrate 20 can comprise any suitable material:
semiconductor (e.g., silicon), insulator (e.g., glass), metal
(e.g., gold). The substrate 20 can comprise any suitable electronic
components such as transistors, interconnects, vias, diodes,
amplifiers, etc.
[0074] The core 11 can comprise any suitable doped semiconductor
material, such as doped silicon, doped germanium, doped III-V group
compound semiconductor (e.g., gallium arsenide, gallium nitride,
etc.), doped II-VI group compound semiconductor (e.g., cadmium
selenide, cadmium sulfide, cadmium telluride, zinc oxide, zinc
selenide, etc.), or doped quaternary semiconductor (e.g., copper
indium gallium selenide). The core 11 is preferably substantially
crystalline semiconductor material. The core 11 is preferably
lightly doped. The core 11 can comprise a p-n junction or a p-i-n
junction therein.
[0075] The intrinsic amorphous semiconductor layer 12 can comprise
any suitable intrinsic amorphous semiconductor material, such as
intrinsic amorphous silicon, intrinsic amorphous germanium,
intrinsic amorphous III-V or II-VI group compound semiconductor.
The intrinsic amorphous semiconductor layer 12 preferably has a
thickness of about 2 nm to about 100 nm, more preferably about 2 nm
to about 30 nm. The intrinsic amorphous semiconductor layer 12 is
configured to passivate at least a surface of the core 11. The
intrinsic amorphous semiconductor layer 12 can be deposited by any
suitable method such as atomic layer deposition (ALD) or chemical
vapor deposition (CVD).
[0076] The heavily doped amorphous semiconductor layer 13 can
comprise any suitable heavily doped amorphous semiconductor
material, such as heavily doped amorphous silicon, heavily doped
amorphous germanium, heavily doped amorphous III-V or II-VI group
compound semiconductor. The heavily doped amorphous semiconductor
layer 13 being an opposite type from the core 11 means that if the
core is p-type, the heavily doped amorphous semiconductor layer 13
is n-type and that if the core is n-type, the heavily doped
amorphous semiconductor layer 13 is p-type. The heavily doped
amorphous semiconductor layer 13 preferably has a thickness of at
least about 10 nm, for example, from about 10 nm to about 200 nm.
The heavily doped amorphous semiconductor layer 13 can be deposited
by any suitable method such as atomic layer deposition (ALD) or
chemical vapor deposition (CVD).
[0077] The heavily doped amorphous semiconductor layer 13, the
intrinsic amorphous semiconductor layer 12 and the core 11 form a
p-i-n junction.
[0078] The electrically insulating layer 15 can comprise any
suitable material, such as HfO.sub.2, SiO.sub.2, Al.sub.2O.sub.3,
Si.sub.3N.sub.4, etc.
[0079] The nanostructure 1 can be a nanowire or a nanoslab. The
term "nanowire" used herein means a structure whose dimension in a
direction perpendicular to the substrate (hereafter referred to as
the "normal direction") is substantially greater than dimensions of
the structure in any direction perpendicular to the normal
direction (hereafter referred to as a "transverse direction") and
the dimensions in the transverse directions are less than 1000 nm.
The term "nanoslab" used herein means a structure whose dimensions
in the normal direction and in the transverse direction are
substantially greater than a dimension of the structure in a
direction perpendicular to both the normal direction and the
transverse direction (hereafter referred to as the "thickness
direction") and the dimension in the thickness direction is less
than 1000 nm. A nanoslab can have any suitable shape in a
cross-section parallel to the substrate, such as a rectangle, an
ellipse, convex-convex (i.e. like a double-convex lens),
concave-concave (i.e. like a double-concave lens), plano-convex
(i.e. like a plano-convex lens), plano-concave (i.e. like a
plano-concave lens).
[0080] According to an embodiment, the nanostructure 1 is
configured as a solar blind ultra violet (SBUV) detector. The SBUV
region is the range of wavelengths in which the earth atmosphere
absorbs essentially all UV radiation from the sun to the earth. For
example, the wavelength region of 300 nm to 200 nm is within the
SBUV region. A device that detects radiation only in the SBUV
region and rejects visible and infrared radiation is called an SBUV
detector or an SBUV sensor.
[0081] Sunlight does not interfere or blind a SBUV detector of the
embodiments herein. Therefore, the SBUV detector of the embodiments
herein is particularly useful for detecting manmade radiation
sources that emit in the SBUV region and enjoys a very low false
alarm rate. Such manmade radiation sources can include exhaust
plumes of shoulder launched surface to air missiles (SLSAM), fire
and flame, or any other UV emitting source including hydrogen
flames. An SBUV detector of the embodiments herein can function at
all lightning conditions including full daylight, without
interference from the solar radiation and with very high signal to
background ratio.
[0082] According to an embodiment, the SBUV detector comprises a
substrate having a plurality of regions defined thereon (hereafter
referred to as "pixels"). In each pixel, the SBUV detector
comprises a plurality of nanostructures 1 extending essentially
perpendicularly from the substrate. The nanostructures 1 in the
SBUV detector are nanowires. The plurality of nanostructures 1 can
be equally or unequally spaced from each other, arranged in a
regular array or in random. The plurality of nanostructures 1 are
configured to react only to radiations in the SBUV region and not
to react to radiations outside the SBUV region. Here, the term
"react" is meant to broadly encompass absorbing, reflecting,
coupling to, detecting, interacting with, converting to electrical
signals, etc.
[0083] FIG. S1A shows one of the plurality of nanostructures 1 (a
nanowire in the SBUV) on an SBUV S10. For brevity, only one
nanostructure 1 is shown but the SBUV S10 can comprise a plurality
of nanostructures 1, such as more than 1000, or more than 1000000.
The nanostructures 1 extend essentially perpendicularly from a
substrate S130. Each of the nanostructures 1 preferably comprises a
cladding S120 surrounding the nanostructures 1. The substrate S130
is preferably a metal. The nanostructures 1 preferably have higher
refractive index than the cladding S120. The term "cladding" or
"clad" as used herein means a layer of substance surrounding the
nanostructures 1.
[0084] FIG. S1B shows simulated absorptance of the SBUV detector
S10 of UV light with wavelengths between 100 and 400 nm, incident
in the normal direction. FIG. S1B clearly shows that absorptance of
the SBUV detector S10 of UV light with wavelengths between 140 and
290 nm is greater than 50% and absorptance of UV light drops
quickly to almost zero outside wavelength region of 140-290 nm.
FIG. S1B indicate that the SBUV detector S10 indeed only reacts to
radiations in the SBUV region. As shown in FIG. S1C, each of the
nanostructures 1 can further comprise a coupler S140 disposed on an
end of the nanostructures 1 away from the substrate S130 (hereafter
referred to as the "receiving end"). The term "coupler" as used
herein means a layer effective to guide light into the
nanostructures 1.
[0085] According to an embodiment, the nanostructures 1 are
nanowires and have a diameter of from about 5 nm to about 30 nm,
preferably about 20 nm. According to an embodiment, the
nanostructures 1 have a diameter of from about 5 nm to about 150
nm. The cladding S130 has a thickness of about 10 nm to about 200
nm, preferably about 30 nm. Pitch of the nanostructures 1 (i.e.
center-to-center distance of one of the plurality of nanowires to a
nearest neighbor thereof) is from about 0.2 .mu.m to about 2 .mu.m.
Height (i.e. dimension in the normal direction) of the
nanostructures 1 is from about 0.1 .mu.m to about 5 .mu.m. Each
pixel can have one or more nanostructures 1.
[0086] FIG. S2A and FIG. S2B shows a perspective view and a top
view, respectively, of the SBUV detector S10. For brevity, only
four pixels (regions enclosed by dotted rectangles) are shown. The
nanostructures 1 preferably detect UV radiation in the SBUV region
by converting it to an electrical signal. For example, each
nanostructure 1 can comprise a photodiode (such as an avalanche
photodiode) or form a photodiode (such as an avalanche photodiode)
with the substrate S130. The SBUV detector S10 can further comprise
electrical components configured to detect the electrical signal
from the nanostructures 1, for example, Readout Integrated Circuits
(ROIC) in the substrate S130, an electrode S150 disposed between
and electrically connected to all the nanostructures 1 on each
pixel, a common electrode S160 disposed on and electrically
connected to the receiving ends of all the nanostructures 110 in
the entire SBUV detector S10. Preferably, the SBUV detector S10 can
detect electrical signals from the nanostructures 1 in different
pixels separately.
[0087] According to one embodiment as shown in FIG. S9, the SBUV
detector S10 can be integrated with electronic circuitry into a
solar-blind image sensor. The electronic circuitry can include
address decoders, a correlated double sampling circuit (CDS), a
signal processor, a multiplexor and a high voltage supply (e.g. a
DC high voltage supply capable of supplying at least 50 V, 100 V,
200 V or higher) for driving the nanostructures 1. The electronic
circuitry is functional to detect the electrical signal generated
by the nanostructures 1.
[0088] The SBUV detector S10 can also be used as fore optics in a
light detector apparatus as shown in the schematic in FIG. S10.
[0089] Polarization is a property of certain types of waves that
describes the orientation of their oscillations. Electromagnetic
waves including visible light can exhibit polarization. By
convention, the polarization of light is described by specifying
the orientation of the light's electric field at a point in space
over one period of the oscillation. When light travels in free
space, in most cases it propagates as a transverse wave, i.e. the
polarization is perpendicular to the light's direction of travel.
In this case, the electric field may be oriented in a single
direction (linear polarization), or it may rotate as the wave
travels (circular or elliptical polarization). In the latter cases,
the oscillations can rotate either towards the right or towards the
left in the direction of travel. Depending on which rotation is
present in a given wave it is called the wave's chirality or
handedness. Polarization of fully polarized light can be
represented by a Jones vector. The x and y components of the
complex amplitude of the electric field of light travel along
z-direction, E.sub.x(t) and E.sub.y(t), are represented as
( E x ( t ) E y ( t ) ) = E 0 ( E 0 x ( kz - .omega. t + .phi. x )
E 0 y ( kz - .omega. t + .phi. x ) ) = E 0 ( kz - .omega. t ) ( E 0
x .phi. x E 0 y .phi. y ) ( E 0 x .phi. x E 0 y .phi. y )
##EQU00001##
is the Jones vector. Polarization of light with any polarization,
including unpolarized, partially polarized, and fully polarized
light, can be described by the Stokes parameters, which are four
mutually independent parameters.
[0090] A device that can detect polarization of light, or even
measure the light's Jones vector or Stokes parameters can be useful
in many application.
[0091] According to an embodiment, the device comprises a substrate
having a plurality of regions defined thereon (hereafter referred
to as "subpixels"; a group of related "subpixels" may be referred
to as a "pixel"). In each subpixel, the device comprises a
plurality of nanostructures 1 being nanoslabs. The plurality of
nanostructures 1 can be equally or unequally spaced from each
other. The plurality of nanostructures 1 in different subpixels are
functional to react differently to light with a same polarization.
Here, the term "react" is meant to broadly encompass absorbing,
reflecting, coupling to, detecting, interacting with, converting to
electrical signals, etc. The plurality of nanostructures 1 in a
first subpixel extends in a first transverse direction; the
plurality of nanostructures 1 in a second subpixel extends in a
second transverse direction, wherein the first and second pixels
are adjacent and the first transverse direction is different from
the second transverse direction.
[0092] FIG. P1 shows a device P10 according to one embodiment. For
brevity, two subpixels P10a and P10b of a substrate P110 are
illustrated. The device P10, however, can comprise a plurality of
pixels such as more than 100, more than 1000, more than 1000000.
The subpixels preferably have a pitch of about 1 micron to 100
microns (more preferably 5 microns). In each of the subpixels P10a
and P10b, the device P10 comprises a plurality of nanostructures 1
(e.g. at least 2 features), respectively. The nanostructures 1 in
the subpixel P10a and the nanostructures 1 in the subpixel P10b
extend in different transverse directions. The nanostructures 1
preferably have a pitch (i.e. spacing between adjacent features 100
in the thickness direction thereof) of about 0.5 to 5 microns
(further preferably about 1 micron), a height (i.e. dimension in
the normal direction) of about 0.3 to 10 microns (further
preferably about 5 micron) and an aspect ratio (i.e. ratio of a
dimension in the transverse direction to a dimension in the
thickness direction) of at least 4:1, preferably at least 10:1.
Each of the nanostructures 1 forms a p-i-n diode with the substrate
P110, the p-i-n diode being functional to convert at least a
portion of light impinged thereon to an electrical signal. The
device P10 preferably further comprises electrical components
configured to detect the electrical signal from the nanostructures
1, for example, a transparent electrode disposed on each subpixel
and electrically connected to all nanostructures 1 therein. The
transparent electrode on each subpixel preferably is separate from
the transparent electrode on adjacent subpixels. A reflective
material can be deposited on areas of the substrate P110 between
the nanostructures 1. The substrate P110 can have a thickness in
the normal direction of about 5 to 700 microns (preferably 120
microns).
[0093] FIG. P2 shows a schematic of the nanostructures 1 in one
subpixel when light with different polarization impinges thereon.
For light P15a with a wavelength of about 400 nm and a linear
polarization essentially in the thickness direction of the
nanostructures 1, the absorptance of the nanostructures 1 is about
35%. In contrast, for light P15b with the same wavelength as light
P15a and a linear polarization essentially in the transverse
direction of the nanostructures 1, the absorptance of the
nanostructures 1 is about 95%.
[0094] According to one embodiment as shown in FIG. P10, the device
P10 can be integrated with electronic circuitry into a polarization
detector array. The electronic circuitry can include address
decoders in both directions of the detector array, a correlated
double sampling circuit (CDS), a signal processor, a multiplexor.
The electronic circuitry is functional to detect the electrical
signal converted by the nanostructures 100 from at least a portion
of light impinged thereon. The electric circuitry can be further
functional to calculate an interpolation of electrical signals from
several subpixels, the features on which extend in the same
transverse direction. Other function of the electronic circuitry
can include a gain adjustment, a calculation of Stoke's parameters.
In particular, the subpixels can be arranged into a group (i.e.
pixel). For example, in FIG. P10, a subpixel A and subpixels B, C
and D can be arranged adjacent to each other and referred to as a
pixel, wherein features on the subpixels B, C and D extend in
transverse directions at 45.degree., 90.degree. and -45.degree.
relative to a transverse direction in which features on the
subpixel A extend.
[0095] According to an embodiment as shown in FIG. P12, the
nanostructures 100 can each comprise a metal layer on each sidewall
(i.e. surface extending in the transverse direction and the normal
direction). The metal layer preferably has a thickness of about 5
nm to about 100 nm, more preferably about 50 nm. The metal layer
substantially covers the entire sidewall and the metal layer does
not extend to either end of the nanostructures in the normal
direction.
[0096] A photovoltaic device, also called a solar cell is a solid
state device that converts the energy of sunlight directly into
electricity by the photovoltaic effect. Assemblies of cells are
used to make solar modules, also known as solar panels. The energy
generated from these solar modules, referred to as solar power, is
an example of solar energy.
[0097] The photovoltaic effect is the creation of a voltage (or a
corresponding electric current) in a material upon exposure to
light. Though the photovoltaic effect is directly related to the
photoelectric effect, the two processes are different and should be
distinguished. In the photoelectric effect, electrons are ejected
from a material's surface upon exposure to radiation of sufficient
energy. The photovoltaic effect is different in that the generated
electrons are transferred between different bands (i.e. from the
valence to conduction bands) within the material, resulting in the
buildup of a voltage between two electrodes.
[0098] Photovoltaics is a method for generating electric power by
using solar cells to convert energy from the sun into electricity.
The photovoltaic effect refers to photons of light--packets of
solar energy--knocking electrons into a higher state of energy to
create electricity. At higher state of energy, the electron is able
to escape from its normal position associated with a single atom in
the semiconductor to become part of the current in an electrical
circuit. These photons contain different amounts of energy that
correspond to the different wavelengths of the solar spectrum. When
photons strike a PV cell, they may be reflected or absorbed, or
they may pass right through. The absorbed photons can generate
electricity. The term photovoltaic denotes the unbiased operating
mode of a photodiode in which current through the device is
entirely due to the light energy. Virtually all photovoltaic
devices are some type of photodiode.
[0099] A conventional solar cell often has opaque electrodes on a
surface that receives light. Any light incident on such opaque
electrodes is either reflected away from the solar cell or absorbed
by the opaque electrodes, and thus does not contribute to
generation of electricity. Therefore, a photovoltaic device that
does not have this drawback is desired.
[0100] FIG. V2A shows a schematic cross-section of a photovoltaic
device V200, according to another embodiment. The photovoltaic
device V200 comprises a substrate V205, a plurality of
nanostructures 1 essentially perpendicular to the substrate V205
and one or more recesses V230 between the nanostructures 1. Each
recess V230 has a sidewall V230a and a bottom wall V230b. The
bottom wall V230b has a planar reflective layer V232. The sidewall
V230a does not have any planar reflective layer V232. A continuous
cladding layer 240 is disposed over an entire the nanostructures 1.
The photovoltaic device V200 can further comprise a coupling layer
V260 disposed on the cladding layer V240 and only directly above
the top surface V220a.
[0101] The nanostructures 1 can have any cross-sectional shape. For
example, the nanostructures 1 can be cylinders or prisms with
elliptical, circular, rectangular, polygonal cross-sections. The
nanostructures 1 can also be strips as shown in FIG. V9, or a mesh
as shown in FIG. V10. According to one embodiment, the
nanostructures 1 are pillars with diameters from 50 nm to 5000 nm,
heights from 1000 nm to 20000 nm, a center-to-center distance
between two closest pillars of 300 nm to 15000 nm. Preferably, the
nanostructures 1 have an overhanging portion V224 along an entire
contour of the top surface V220a of the nanostructures 1.
[0102] Each recess V230 preferably has a rounded or beveled inner
edge between the sidewall V230a and the bottom wall V230b.
[0103] The planar reflective layer V232 can be any suitable
material, such as ZnO, Al, Au, Ag, Pd, Cr, Cu, Ti, a combination
thereof, etc. The planar reflective layer V232 preferably is an
electrically conductive material, more preferably a metal. The
planar reflective layer V232 preferably has a reflectance of at
least 50%, more preferably has a reflectance of at least 70%, most
preferably has a reflectance of at least 90%, for visible light of
any wavelength. The planar reflective layer V232 has a thickness of
preferably at least 5 nm, more preferably at least 20 nm. The
planar reflective layer V232 in all the recesses V230 is preferably
connected. The planar reflective layer V232 is functional to
reflect light incident thereon to the nanostructures 1 so the light
is absorbed by the nanostructures 1. The planar reflective layer
V232 preferably is functional as an electrode of the photovoltaic
device V200.
[0104] The cladding layer V240 is substantially transparent to
visible light, preferably with a transmittance of at least 50%,
more preferably at least 70%, most preferably at least 90%. The
cladding layer V240 can be made of an electrically conductive
material. The cladding layer V240 preferably is made of a
transparent conductive oxide, such as ITO (indium tin oxide), AZO
(aluminum doped zinc oxide), ZIO (zinc indium oxide), ZTO (zinc tin
oxide), etc. The cladding layer V240 can have a thickness of 50 nm
to 5000 nm. The cladding layer V240 preferably forms an Ohmic
contact with the nanostructures 1. The cladding layer V240
preferably forms an Ohmic contact with the planar reflective layer
V232. The cladding layer V240 preferably is functional as an
electrode of the photovoltaic device V200.
[0105] The substrate V205 preferably has a flat surface V250
opposite the nanostructures 1. The flat surface V250 can have a
doped layer V251 of the opposite conduction type from the core 11
of the nanostructures 1, i.e. if the core 11 is n type, the doped
layer V251 is p type; if the core 11 is p type, the doped layer
V251 is n type. The doped layer V251 is electrically connected to
each of the nanostructures 1. The flat surface V250 can also have a
metal layer V252 disposed on the doped layer V251. The metal layer
V252 forms an Ohmic contact with the doped layer V251. The
substrate V205 preferably has a thickness of at least 50 microns.
Total area of the planar reflective layer V232 is preferable at
least 40% of a surface area of the flat surface 250.
[0106] The coupling layer V260 can be of the same material as the
cladding layer V240 or different material from the cladding layer
V240. As shown in FIG. V5, refractive index of the core 11 of the
nanostructure 1 n.sub.1, refractive index of the cladding layer
V240 n.sub.2, refractive index of the coupling layer V260 n.sub.3,
refractive index of the space between the nanostructures 1 n.sub.4,
preferably satisfy relations of n.sub.1>n.sub.2>n.sub.4 and
n.sub.1>n.sub.3>n.sub.4, which lead to enhanced light
concentration in the nanostructures 1.
[0107] In one embodiment, the nanostructures 1 are pillars arranged
in an array, such as a rectangular array, a hexagonal array, a
square array, concentric ring. Each pillar is about 5 microns in
height. A pitch of the nanostructures 1 is from 300 nm to 15
microns. The cladding layer V240 is about 175 nm thick.
[0108] FIG. V6 shows an exemplary top cross sectional view of the
photovoltaic device V200. FIG. V7 shows an exemplary perspective
view of the photovoltaic device V200.
[0109] A method of converting light to electricity comprises:
exposing the photovoltaic device V200 to light; reflecting light to
the nanostructures 1 using the planar reflective layer V232;
absorbing the light and converting the light to electricity using
the nanostructures 1; drawing an electrical current from the
photovoltaic device V200. As shown in FIG. V8B, the electrical
current can be drawn from the metal layer V252 and/or the planar
reflective layer V232 in the photovoltaic device V200.
[0110] FIG. W2A shows a schematic cross-section of a photovoltaic
device W200, according to another embodiment. The photovoltaic
device W200 comprises a substrate W205, a plurality of
nanostructures 1 essentially perpendicular to the substrate W205,
one or more recesses W230 between the nanostructures 1 and an
electrode layer W280. Each recess W230 is filled with a transparent
material W240. Each recess W230 has a sidewall W230a and a bottom
wall W230b. The bottom wall W230b has a planar reflective layer
W232. The sidewall W230a does not have any planar reflective layer.
The transparent material W240 preferably has a surface coextensive
with the top surface W220a of the nanostructures 1. The
photovoltaic device W200 further comprises an electrode layer W280
disposed on the transparent material W240 and the nanostructures 1.
The photovoltaic device W200 can further comprise a coupling layer
W260 disposed on the electrode layer W280 and only directly above
the top surface W220a.
[0111] The nanostructures 1 can have any cross-sectional shape. For
example, the nanostructures 1 can be cylinders or prisms with
elliptical, circular, rectangular, polygonal cross-sections. The
nanostructures 1 can also be strips as shown in FIG. V9, or a mesh
as shown in FIG. V10. According to one embodiment, the
nanostructures 1 are pillars with diameters from 50 nm to 5000 nm,
heights from 1000 nm to 20000 nm, a center-to-center distance
between two closest pillars of 300 nm to 15000 nm. Preferably, the
nanostructures 1 have an overhanging portion W224 along an entire
contour of the top surface W220a of the nanostructures 1.
[0112] Each recess W230 preferably has a rounded or beveled inner
edge between the sidewall W230a and the bottom wall W230b.
[0113] The planar reflective layer W232 can be any suitable
material, such as ZnO, Al, Au, Ag, Pd, Cr, Cu, Ti, Ni, a
combination thereof, etc. The planar reflective layer W232
preferably is an electrically conductive material, more preferably
a metal. The planar reflective layer W232 preferably has a
reflectance of at least 50%, more preferably has a reflectance of
at least 70%, most preferably has a reflectance of at least 90%,
for visible light of any wavelength. The planar reflective layer
W232 has a thickness of preferably at least 5 nm, more preferably
at least 20 nm. The planar reflective layer W232 in all the
recesses W230 is preferably connected. The planar reflective layer
W232 is functional to reflect light incident thereon to the
nanostructures 1 so the light is absorbed by the nanostructures 1.
The planar reflective layer W232 preferably is functional as an
electrode of the photovoltaic device W200.
[0114] The transparent material W240 is substantially transparent
to visible light, preferably with a transmittance of at least 50%,
more preferably at least 70%, most preferably at least 90%. The
transparent material W240 can be an electrically conductive
material. The transparent material W240 preferably is made of a
transparent conductive oxide, such as ITO (indium tin oxide), AZO
(aluminum doped zinc oxide), ZIO (zinc indium oxide), ZTO (zinc tin
oxide), etc. The transparent material W240 preferably forms an
Ohmic contact with the heavily doped amorphous semiconductor layer
13 of the nanostructures 1. The transparent material W240
preferably forms an Ohmic contact with the planar reflective layer
W232. The transparent material W240 preferably is functional as an
electrode of the photovoltaic device W200. The transparent material
W240 can also be a suitable electrically insulating material such
as SiO.sub.2 or a polymer.
[0115] The substrate W205 preferably has a flat surface W250
opposite the nanostructures 1. The flat surface W250 can have a
doped layer W251 of the opposite conduction type from the core 11
of the nanostructures 1, i.e. if the core 11 is n type, the doped
layer W251 is p type; if the core 11 is p type, the doped layer
W251 is n type. The doped layer W251 is electrically connected to
each of the nanostructures 1. The flat surface W250 can also have a
metal layer W252 disposed on the doped layer W251. The metal layer
W252 forms an Ohmic contact with the doped layer W251. The
substrate W205 preferably has a thickness of at least 50 microns.
Total area of the planar reflective layer W232 is preferable at
least 40% of a surface area of the flat surface W250.
[0116] The electrode layer W280 can be the same material as the
transparent material W240 or different material from the
transparent material W240. The electrode layer W280 is
substantially transparent to visible light, preferably with a
transmittance of at least 50%, more preferably at least 70%, most
preferably at least 90%. The electrode layer W280 is an
electrically conductive material. The electrode layer W280
preferably is a transparent conductive oxide, such as ITO (indium
tin oxide), AZO (aluminum doped zinc oxide), ZIO (zinc indium
oxide), ZTO (zinc tin oxide), etc. The electrode layer W280
preferably forms an Ohmic contact with the heavily doped amorphous
semiconductor layer 13. The electrode layer W280 preferably is
functional as an electrode of the photovoltaic device W200.
[0117] The coupling layer W260 can be the same material as the
transparent material W240 or different material from the
transparent material W240. As shown in FIG. W5, refractive index of
the core 11 of the nanostructure 1 n.sub.1, refractive index of the
transparent material W240 n.sub.2, refractive index of the coupling
layer W260 n.sub.3, preferably satisfy relations of
n.sub.1>n.sub.2 and n.sub.1>n.sub.3, which lead to enhanced
light concentration in the nanostructures 1.
[0118] In one embodiment, the nanostructures 1 are pillars arranged
in an array, such as a rectangular array, a hexagonal array, a
square array, concentric ring. Each pillar is about 5 microns in
height. A pitch of the nanostructures 1 is from 300 nm to 15
microns.
[0119] As shown in FIG. W11B, the photovoltaic device W200 can
further comprise at least one via W599 in the transparent material
W240 and between the electrode layer W280 and the planar reflective
layer W232, wherein the at least one via W599 is an electrically
conductive material, preferably an electrically conductive
transparent material (e.g. ITO, AZO, etc.) and the at least one via
electrically connects the electrode layer W280 and the planar
reflective layer W232. As shown in FIG. W11A, the via W599 can be
made by etching a recess W598 through the electrode layer W280 and
the transparent material W240 until the planar reflective layer
W232 is exposed and then filling the recess W598 to form the via
W599. As shown in FIGS. W12A and W12B, the vias W599 can be any
suitable shape such as rod-shaped or bar-shaped.
[0120] A method of converting light to electricity comprises:
exposing the photovoltaic device W200 to light; reflecting light to
the structures W220 using the planar reflective layer W232;
absorbing the light and converting the light to electricity using
the structures W220; drawing an electrical current from the
photovoltaic device W200. As shown in FIG. W8B, the electrical
current can be drawn from the metal layer W252 and the planar
reflective layer W232, in the photovoltaic device W200.
[0121] According to an embodiment, a nanostrucuted LED with an
optical feedback comprising a substrate, a nanostructure 1 in the
form of a nanowire protruding from a first side the substrate, an
active region to produce light, a optical sensor and a electronic
circuit, wherein the optical sensor is configured to detect at
least a first portion of the light produced in the active region,
and the electronic circuit is configured to control an electrical
parameter that controls a light output of the active region. The
nanostructured LED in one example implementation, may further
comprise a volume element epitaxially connected to the
nanostructure 1. The volume element could provide a high doping
degree for the formation of the active region, typically within or
close to the nanostructure 1. Preferably, the nanostructured LED
without optical feedback would be the combination of the substrate,
the nanostructure 1 and a volume element, wherein a portion of the
nanostructure 1 and a portion of the volume element are configured
to form the active region. The volume element could be a
cylindrical bulb, but is not limited to a cylindrical bulb with a
dome-shaped top, a spherical/ellipsoidal, and pyramidal. The volume
element can extend in three dimensions; can have a large volume,
and a large surface. The volume element/nanostructure architecture
enhances both electrical and optical performance of a LED. By using
different material compositions in the nanostructure 1 and the
volume element, the nanostructure 1 material composition can be
chosen to propagate into the volume element in order to decrease
the optical disturbance by the connection with the nanostructure
1.
[0122] The nanostructure 1, a part of the nanostructure 1, or a
structure in connection with the nanostructure 1, could form a
waveguide directing at least a portion of the light produced in the
active region in a given direction.
[0123] The nanostructure 1 and the volume element could be embedded
in a low index material like SiO.sub.2. In one possible
implementation the low index region (e.g., a cover layer) is in
turn enclosed by a cylindrical ring of metal to provide optical
isolation of the each LED from its neighbors. This metal ring may
also aid in the local removal of heat generated by each LED.
[0124] A nanostructured LED makes it possible to use a very large
fraction of the light produced by the LED. This is at least partly
achieved by the nanostructure 1 being used as a waveguide,
directing the light produced in the junction out of the
surface.
[0125] The use of the nanostructure 1 as a waveguide offers a
possibility to direct light in well defined directions. By using
concepts from the area of fiber optics light beams can be focused,
or dispersed, depending on the intended use. In this case a concave
surface on the nanostructure 1 and the silica surrounding it would
help provide a focused beam of light suitable for a display
system.
[0126] The nanostructured LED allows for inclusions of
heterostructures as well as areas of different doping within the
nanostructure 1, facilitating optimization of electrical and/or
optical properties.
[0127] According to an embodiment, the nanostructured LED can
comprise an optical feedback loop to create a uniformity of light
emission for precise control of the light output of an LED or the
uniformity of multiple LEDs arranged in a two dimensional grid for
display purposes. Such a feedback loop would include an optical
sensor to measure a fraction of the light output of the LED in real
time and an electronic circuit to use the measurement to adjust the
operating point of the LED.
[0128] An embodiment could include a nanostructured LED grown on a
substrate that already has an embedded photodiode such as pinned
photodiode. The light from the nanostructured LED is partially
transmitted to the substrate where a photodiode measures and
provides a signal proportional to the intensity of the light
generated by the LED. This signal in turn is used in a feedback
loop to control the bias point of the LED such that a stable light
output is maintained at the desired intensity.
[0129] The nanostructured LED with optical feedback (NWLOF) could
further comprise a partially reflective layer on the substrate
surrounding and/or within the nanostructure 1, wherein the
partially reflective layer is configured to allow a first portion
of the light to transmit through the partially reflective layer to
the optical sensor and to allow at least a second portion of the
light to reflect from a surface of the partially reflective
layer.
[0130] The NWLOF could further comprise one or more cladding layers
surrounding the nanostructure 1, wherein the one or more cladding
layers are configured such that the nanostructure 1 is configured
to form a waveguide. The NWLOF could further comprise a low-index
material having a lower refractive index surrounding the
nanostructure 1 and a metal layer surrounding the low-index
material.
[0131] The NWLOF could further comprise a volume element, wherein a
portion of the nanostructure 1 and a portion of the volume element
are configured to form the active region.
[0132] A nanostructured LED according to the embodiments comprises
of an upstanding nanostructure 1. For the purpose of this
application an upstanding nanostructure 1 should be interpreted as
a nanostructure 1 protruding essentially perpendicularly from the
substrate, the upstanding nanostructure 1 for example being grown
from the substrate, preferably by as vapor-liquid-solid (VLS) grown
nanostructures 1. The angle with the substrate will typically be a
result of the materials in the substrate and the nanostructure 1,
the surface of the substrate and growth conditions. By controlling
these parameters it is possible to produce nanostructures 1
pointing in only one direction, for example vertical, or in a
limited set of directions.
[0133] According to the embodiments, a part of the nanostructure 1
or structure formed from the nanostructure 1 could be used as a
waveguide directing and confining at least a portion of the light
created in the nanostructured LED in a direction given by the
upstanding nanostructure 1. The waveguiding nanostructured LED
structure could include a high refractive index nanostructure 1
with one or more surrounding cladding with refractive indices less
than that of the nanostructure 1. The structure could be either
circular symmetrical or close to being circular symmetrical. Light
waveguiding in circular symmetrical structures are well know for
fiber-optic applications and many parallels can be made to the area
of rare-earth-doped fiber optic devices. However, one difference is
that fiber amplifier are optically pumped to enhance the light
guided through them while the described nanostructured LED can be
seen as an efficient light to electricity converter and vice
versa.
[0134] Preferably, an output of the optical sensor is an input to
the electronic circuit. Preferably, the electrical parameter
comprises voltage or current. Preferably, the electronic circuit is
configured to control voltage or current such that the light output
is maintained substantially constant irrespective of a temperature
of the active region within an operating temperature range of the
active region. Preferably, the optical sensor comprises a pn or
p-i-n photodiode having a performance characteristic that is
substantially insensitive to a temperature in an operating
temperature range of the active region. Preferably, at least a
portion of the light produced in the active region is directed in a
direction given by the nanostructure 1. Preferably, the
nanostructure 1 is configured to both produce light and form a
waveguide.
[0135] Preferably, the volume element comprises a doping layer
configured to provide a p or n region and a well layer. Preferably,
the optical sensor comprises a pinned photodiode in the substrate.
Preferably, the one or more cladding layers are configured to
provide a graded refractive index such that a refractive index of
the nanostructure 1 is higher than that of the one or more cladding
layer. Preferably, the NWLOF comprises a plurality of the
nanostructures 1 comprising different materials emit different
ranges of wavelengths of the light. Preferably, the NWLOF comprises
a plurality of the nanostructures 1 comprising different diameters
that form waveguides for different ranges of wavelengths of the
light. Preferably, the NWLOF comprises a plurality of the
nanostructures 1 comprising different materials emit different
ranges of wavelengths of the light and the NWLOF comprises a
plurality of the nanostructures 1 comprising different diameters
that form waveguides for different ranges of wavelengths of the
light. Preferably, the nanostructure 1 and the volume element are
arranged to direct the light through the nanostructure 1 and the
substrate such that the light is emitted from a second side of the
substrate opposite the first side. Preferably, the volume element
is configured to spread the light by dispersion at a junction
between the nanostructure 1 and the volume element. Preferably, the
electronic circuit comprises a controller configured to calibrate
the electrical parameter. Preferably, the controller comprises
memory, the memory comprising values for controlling the electrical
parameter so that the light output is set by the values stored in
the memory. Preferably, the controller comprises memory; wherein
the controller is configured to calibrate the electrical parameter
to cause the light output to more closely match a target output
based on target values of the light output stored in the memory.
Preferably, the target values represent current values for
different colors of the light. Preferably, the target values
represent target brightness levels.
[0136] The waveguiding properties of the nanostructure 1 can be
improved in different ways. The nanostructure 1 could have a first
effective refractive index, n.sub.w, and a cladding surrounding at
least a portion of the nanostructure 1 could have a second
effective refractive index, n.sub.c, and by assuring that the first
refractive index is larger than the second refractive index,
n.sub.w>n.sub.c, good wave-guiding properties could be provided
to the nanostructure 1. The waveguiding properties may be further
improved by introducing an optically active cladding.
[0137] The high index material in the nanostructure 1 could, for
example, be silicon nitride having a refractive index of about 2.0.
The lower index cladding layer material could, for example, be a
glass, plasma enhanced Si.sub.3N.sub.4, plasma enhanced SiO.sub.2,
SiO.sub.2.
[0138] For a LED operating in different wavelengths from the
visible to the IR and deep in the micrometer wavelengths, a variety
of materials can be used, such as: Si, GaAs (p), InAs, Ge, ZnO,
InN, GaInN, GaN AlGaInN, InP, InAsP, GaInP, InGaP:Si, InGaP:Zn,
GaInAs, AlInP, GaAlInP, GaAlInAsP, GaInSb, InSb among others. To
create CMOS circuits, Si and doped Si materials are preferable.
[0139] In one embodiment, the typical values of the refractive
indexes for III-V semiconductor nanostructure 1 material are in the
range from 2.5 to 5.5 when combined with glass type of cladding
material (such as SiO.sub.2 or Si.sub.3N.sub.4) having refractive
indexes ranging from 1.4 to 2.3, satisfying the waveguiding
requirement, n.sub.w>n.sub.c.
[0140] One consideration in the optimization of light extraction is
to make the Numerical Aperture (NA) vary along the nanostructure 1
structure to optimize light extraction from the structure. In
general, it is ideal to have the NA be highest when the light
generation takes place furthest away from the exit location. This
will maximize the light captured and guided toward the exit, in
contrast, closer to the exit end of the structure, the NA can be
made smaller since light generated will radiate in random
directions and most of the radiate light will hit the top and side
of the top part of the structure and exit. Having a lower NA in the
top part of the structure also minimizes the light captures and
guide back down through the structure that may not be ideal unless
a reflector is inserted in the bottom of the structure. A low NA
can be obtained by surrounding the III-V nanostructure 1 core with
another III-V cladding of different composition with slightly less
refractive index.
[0141] A nanostructured LED according to some embodiments could
comprise a substrate and a nanostructure 1 epitaxially grown from
the substrate. A portion of the nanostructure 1 is enclosed by a
volume element. The volume element is preferably epitaxially
connected to the nanostructure 1. A portion of or all of the
nanostructure 1 could be arranged to act as a waveguiding portion
directing at least a portion of the impinging light in a direction
given by the elongated direction of the nanostructure 1, and will
be referred to as a waveguide. The nanostructure 1 could have a
diameter in the order of 50 nm to 500 nm. The length of the
nanostructure 1 could be of the order of 1 to 10 .mu.m.
[0142] The materials of the different members of the nanostructured
LED are chosen so that the nanostructure 1 will have good
waveguiding properties vis-a-vis the surrounding materials, i.e.
the refractive index of the material in the nanostructure 1 should
preferably be larger than the refractive indices of the surrounding
materials.
[0143] If the nanostructure 1 has a first refracting index,
n.sub.w, the material surrounding the nanostructure 1 in wave guide
portion, typically a cover layer, a second refractive index,
n.sub.c, and the a volume element, a third refractive n.sub.ve,
then n.sub.w>n.sub.c and n.sub.w>n.sub.ve. Typical values for
the nanostructured LED are n.sub.w.about.4, n.sub.c.about.1.5 and
n.sub.ve.about.3.
[0144] In addition, the nanostructure 1 may be provided with one or
more layers. For example an optical layer may be introduced
specifically to improve the waveguiding properties of the
nanostructure 1, in manners similar to what is well established in
the area of fiber optics. The optical layer typically has a
refractive index in between the refractive index of the
nanostructure 1 and the surrounding cladding region material.
Alternatively the intermediate layer has a graded refractive index,
which has been shown to improve light transmission in certain
cases. If an optical layer is utilized, the refractive index of the
nanostructure 1, n.sub.w, should define an effective refractive
index for both the nanostructure 1 and the layers.
[0145] The ability to grow nanostructures 1 with well defined
diameters could be to optimize the waveguiding properties of the
nanostructure 1 with regards to the wavelength of the light
confined in the nanostructured LED. The diameter of the
nanostructure 1 could be chosen so as to have a favorable
correspondence to the wavelength of the desired light. Preferably
the dimensions of the nanostructure 1 are such that a uniform
optical cavity, optimized for the specific wavelength of the
produced light, is provided along the nanostructure 1. The
nanostructure 1 generally is sufficiently wide to capture the
desired light. A rule of thumb would be that diameter must be
larger than .lamda./2n.sub.w, wherein .lamda. is the wavelength of
the desired light and n.sub.w is the refractive index of the
nanostructure 1. As an example a diameter of about 60 nm may be
appropriate to confine blue light only and one 80 nm may be
appropriate for to confine both blue and green light in a silicon
nanostructure 1.
[0146] In the infrared and near infrared a diameter above 100 nm
would be sufficient. An approximate preferred upper limit for the
diameter of the nanostructure 1 is given by the growth constrains,
and could be in the order of 500 nm. The length of the
nanostructure 1 is typically and preferably in the order of 1-10
.mu.m, providing enough volume for the active region.
[0147] A reflective layer could be in one embodiment, provided on
the substrate and extending under the wire. The reflective layer is
preferably provided in the form of a multilayered structure
comprising repeated layers of silicates for example, or as a metal
film.
[0148] An alternative approach to getting a reflection in the lower
end of the nanostructure 1 could be to arrange a reflective layer
in the substrate underneath the nanostructure 1. Yet another
alternative could be to introduce reflective means within the
waveguide. Such reflective means can be a multilayered structure
provided during the growth process of the nanostructure 1, the
multilayered structure comprising repeated layers of for example
SiN.sub.x/SiO.sub.x (dielectric) or GaAs/AlGaAs (semiconductor).
Such repeated layers with controlled thickness could also serve as
optical grating filters to precisely control the output wavelength
of the LED to mitigate wavelength drift for example with
temperature.
[0149] In a further embodiment, a major part of the produced light
is directed by the waveguide of the nanostructure 1 in a downward
direction through the substrate. The light can be directed through
the entire thickness of the substrate, or alternatively the
substrate could be provided with a cut out beneath the base of the
nanostructure 1 in order to reduce the thickness of the substrate
and thereby reduce the scattering or absorption of light in the
substrate. The substrate is preferably made of transparent
material. A portion, or preferably the entire outer surface of the
volume element may be covered by a reflective layer that increases
the radiation of the produced light through the waveguide. The
reflective layer, for example formed of a metal, may additionally
serve as a contact. Part of the nanostructure 1 and the substrate
could optionally covered by a protective layer of SiC or SiN, for
example.
[0150] In an embodiment, the volume element can be arranged to be a
dispersive element, giving a light radiation that is essentially
evenly distributed over a wide angle. Such device can be well
suited for illuminating purposes wherein an even illumination is
required. The active region may be arranged in the nanostructure 1
but alternatively may be within the volume element, and above the
upper end of the nanostructure 1, or radially outwards of the
nanostructure 1 and possibly above. The nanostructure 1 should
preferably at its lower end be provided with some of the reflective
means, for example a reflective material within the nanostructure
1, in order to redirect light upwards. The geometry of the volume
element can be designed to further disperse the light. Dispersion
is provided at the junction between the nanostructure 1 waveguide
and the volume element and further at the edge formed by the upper
boundary of the volume element. The height and width of the volume
element can be chosen so that the edge disperses light further. One
embodiment can be optimized for providing a collected and
directionally oriented beam. The nanostructure 1 of relatively
large diameter, preferably above 150 nm, can extend to the upper
surface of the volume element. The nanostructure 1 can be provided
with a concave lens like exit surface on the upper end.
[0151] Nanostructures 1, acting as waveguides, can be used to
improve the performance of conventional planar LEDs. In an
embodiment, a plurality of nanostructures 1 can be arranged on the
surface of a planar LED. Light is produced in the active region,
which could be an active layer of the planar LED, for example of
GaAsP. The nanostructures 1 can be epitaxially connected on top of
the planar LED layers in order to get a good matching of the
different parts. The nanostructures 1 may be coated by a cladding
layer protecting the nanostructures 1 and/or improving the
properties, for example Si.sub.3N.sub.4, The surface in between the
nanostructures 1 can be preferably coated with a reflective layer,
for example of Au. At least a part of the light, produced in the
active region, could enter the nanostructures 1 that are acting as
waveguides and leading the light away from the substrate plane.
[0152] A wide range of materials can be used for the different
parts of the nanostructured LED. Suitable materials for LED have to
be matched with suitable materials for the photo diodes based on
the wavelength of the light being emitted/detected by the system.
Both the LED and the photo diode should work as intended in the
wavelength range of light for which the system is configured to
operate.
[0153] In addition, the nanostructure 1 based technology allows for
defect free combinations of materials that otherwise would be
impossible to combine. The III-V semiconductors are of particular
interest due to their properties facilitating high speed and low
power electronics. Suitable materials for the substrate include,
but is not limited to: Si, GaAs, GaP, GaP:Zn, InAs, InP, GaN,
Al.sub.2O.sub.3, SiC, Ge, GaSb, ZnO, InSb, SOI
(silicon-on-insulator), CdS, ZnSe, CdTe. In the case of the present
invention (i.e. for creating display structure in the visible
light), a Si substrate is preferred since it embeds a CMOS
photodiode underneath the LED. For wavelengths between blue and
near IR, Si could be used in the photo diode. For wavelengths
outside the range of light detected by Si, such as IR or UV light,
it is possible to use GaAs in photodiodes for LED in the range of
800-1500 nm, e.g., 850 nm; and InGaAs/InP in the range 1310-1550
nm.
[0154] Suitable materials for the nanostructure 1 include, but is
not limited to: Si, GaAs (p), InAs, Ge, ZnO, InN, GaInN, GaN
AlGaInN, BN, InP, InAsP, GaInP, InGaP:Si, InGaP:Zn, GaInAs, AlInP,
GaAlInP, GaAlInAsP, GaInSb, InSb. The materials of the
nanostructures 1 can be selected to produce red, green and blue
light based on the bandgaps of the materials.
[0155] A stream of photons with a wavelength of 532 nm (green
light) would have an energy of approximately 2.33 eV. Similarly, 1
eV would correspond to a stream of infrared photons of wavelength
1240 nm, and so on.
[0156] The substrate could be an integral part of the device, since
it also contains the photodiodes necessary to detect light that has
not been confined to the nanostructure 1. For this application, the
substrate in addition also contains standard CMOS circuits to
control the biasing, amplification and readout of the LED as well
as any other CMOS circuit deemed necessary and useful. The
substrate includes substrates having active devices therein.
Suitable materials for the substrates include silicon and
silicon-containing materials. Generally, each sensor element of the
embodiment includes a nanostructured LED structure comprising a
nanostructure 1, a cladding enclosing at least a portion of the
nanostructure 1, a coupler and two contacts. Similarly, for light
in higher wavelengths, GaAs circuitry can be used with the
appropriate light emitting materials for those wavelengths.
[0157] In one embodiment, a micro lens could be located on the LED.
The micro lens may comprise any of several optically transparent
lens materials that are known in the art. Non-limiting examples
include optically transparent inorganic materials, optically
transparent organic materials and optically transparent composite
materials. Most common are optically transparent organic materials.
Typically the lens layers could be formed incident to patterning
and reflow of an organic polymer material that has a glass
transition temperature lower than the series of color filter
layers, if present, or the patterned planarizing layer. Polymeric
materials should preferably have a high degree of stability with
temperature to act as micro lenses for LEDs since this device needs
to perform at high temperatures. The micro lens does not require a
new material; simply patterning the clad material to the right
shape forms it.
[0158] FIGS. M1 and M2 are a schematic perspective view and a
schematic cross-sectional view of a nanostructure array M100,
respectively, according to an embodiment. The nanostructure array
M100 comprises a substrate M110, a plurality of fluorescent
nanostructures 1, a reflective layer M140 disposed on the substrate
M110 in areas between the fluorescent nanostructures 1. The
fluorescent nanostructures 1 can be embedded in a material M150.
The term "fluorescent nanostructures" as used herein means
nanostructures that can fluoresce. The term "fluoresce" as used
herein means to exhibit or undergo the phenomenon of fluorescence.
The term "fluorescence" as used herein means the emission of light
by a substance that has absorbed light or other electromagnetic
radiation of a different wavelength. The term "fluoresced light" as
used herein means emitted light from fluorescence of a substance.
In most cases, emitted light has a longer wavelength, and therefore
lower energy, than the absorbed radiation. However, when the
absorbed electromagnetic radiation is intense, it is possible for
one electron to absorb two photons; this two-photon absorption can
lead to emission of radiation having a shorter wavelength than the
absorbed radiation. Fluorescence has many practical applications,
including mineralogy, gemology, chemical sensors, fluorescent
labeling, dyes, biological detectors, and, most commonly,
fluorescent lamps. For example, the common fluorescent lamp relies
on fluorescence. Inside the glass tube is a partial vacuum and a
small amount of mercury. An electric discharge in the tube causes
the mercury atoms to emit ultraviolet light. The tube is lined with
a coating of a fluorescent material, called the phosphor, which
absorbs the ultraviolet and re-emits visible light.
[0159] The substrate M110 can be any suitable material, such as,
silicon, sapphire, glass, silicon oxide, etc. The substrate M110
and the fluorescent nanostructures 1 can be the same material or
different materials. The substrate M110 can have any suitable
thickness such as 0.1-1 mm. Examples of the substrate M110 include
a silicon wafer, a sapphire wafer, and a glass wafer.
[0160] The reflective layer M140 can be any suitable material, such
as ZnO, Al, Au, Ag, Pd, Cr, Cu, a combination thereof, etc. The
reflective layer M140 preferably has a reflectance of at least 50%,
more preferably has a reflectance of at least 70%, most preferably
has a reflectance of at least 90%, for fluoresced light from the
fluorescent nanostructures 1. The reflective layer M140 has a
thickness of preferably at least 5 nm, more preferably at least 20
nm. In addition to the areas between the fluorescent nanostructures
1, the reflective layer M140 can also be disposed on the substrate
M110 in areas under the fluorescent nanostructures 1.
[0161] The material M150 in which the are embedded can be any
suitable material substantially transparent to fluoresced light
from the fluorescent nanostructures 1. For example, the material
M150 can be silicon oxide, silicon nitride or a combination
thereof. A surface M150a of the material M150 can be substantially
coextensive with surfaces M120a of the fluorescent nanostructures 1
such that the surfaces M120a of the fluorescent nanostructures 1
are exposed. Alternatively, the fluorescent nanostructures 1 can be
entirely buried in the material M150 without any exposed surface.
As shown in FIG. M3, the surface M150a of the material M150 can
have a concave shape effective to focus fluoresced light from the
fluorescent nanostructures 1. A refractive index of the material
M150 is preferably smaller than a refractive index of the
fluorescent nanostructures 1. A partial reflective layer M180 can
be deposited on the surface M150a in areas around the surfaces
M120a wherein no portion of the surfaces M120a overlaps the partial
reflective layer M180. The term "partial reflective layer" as used
herein means a layer with a reflectance less than 100%. For
example, a partial reflective layer can be a layer of Ag or Al with
a thickness less than 10 nm.
[0162] The fluorescent nanostructures 1 can comprise one or more
suitable fluorescent material, such as GaN, ZnO, organic
fluorescent materials, or a combination thereof. The fluorescent
nanostructures 1 can also be one or more non-fluorescent material
with one or more fluorescent material embedded therein and covered
thereby, such as diamond with color centers embedded therein.
Fluorescence is the emission of light by a substance that has
absorbed light or other electromagnetic radiation of a different
wavelength from emitted light. In most cases, the emitted light has
a longer wavelength, and therefore lower energy, than the absorbed
radiation. In an example, the fluorescent nanostructures 1 are
diamond with nitrogen vacancy defects as the color centers. The
color centers can be embedded randomly in the fluorescent
nanostructures 1. In a given nanostructure array M100, at least
100%, 75%, 50%, 25%, or 10% of the fluorescent nanostructures 1
have at least one color center. A nitrogen vacancy defect (also
referred to as a nitrogen vacancy center) is one of numerous point
defects in diamond consisting of a substitutional nitrogen atom and
a vacancy in an adjacent site of the diamond lattice. Diamond with
embedded nitrogen vacancy defects can be created by irradiating
nitrogen doped diamond with 1-2 MeV electrons followed by annealing
in vacuum at about 850-1000.degree. C. for about 2-20 hours.
Nitrogen vacancy defects are resistant to photobleaching, i.e.,
fluorescence intensity of nitrogen vacancy defects remains
unchanged after several hours of continuous laser irradiation in
the saturation regime. The saturation regime as used here in means
a range of laser irradiation intensity in which fluorescence
intensity of the nitrogen vacancy defects is independent from the
laser irradiation intensity. Nitrogen vacancy defects can have high
quantum yield at temperatures up to in excess of 500 K. A nitrogen
vacancy defect can fluoresce at wavelengths such as 637 nm and 531
nm, depending on the symmetry of the nitrogen atom of the nitrogen
vacancy defect relative to the diamond lattice. The term "quantum
yield" gives the efficiency of the fluorescence process and is
defined as the ratio of the number of photons emitted to the number
of photons absorbed. The fluorescent nanostructures 1 can have any
cross-sectional shape. For example, the fluorescent nanostructures
1 can be cylinders or prisms with elliptical, circular,
rectangular, polygonal cross-sections.
[0163] As shown in FIG. M4, the fluorescent nanostructures 1 can
have a cladding layer M160 surrounding a sidewall M120b of each of
the fluorescent nanostructures 1. The cladding layer M160 can be
any suitable material substantially transparent to fluoresced light
from the fluorescent nanostructures 1. If the fluorescent
nanostructures 1 are embedded in the material M150, a refractive
index of cladding layer M160 preferably is greater than the
refractive index of the material M150 and smaller than the
refractive index of the fluorescent nanostructures 1.
[0164] The fluorescent nanostructures 1 preferably are arranged in
an array, such as a rectangular array, a hexagonal array, a square
array, concentric ring. The term "pitch" is defined as a distance
of a fluorescent nanostructure 1 to a nearest neighbor of the
fluorescent nanostructure 1 along a direction parallel to the
substrate M110. The term "array" as used herein means a spatial
arrangement having a particular order. The fluorescent
nanostructures 1 preferably have a substantially uniform
length.
[0165] The pitch of the nanostructure array M100 and the radius,
length, material of the fluorescent nanostructures 1, and the
material M150 are selected such that the fluorescent nanostructures
1 fluoresce at a wavelength of a collective mode of the
nanostructure array M100. The pitch of the nanostructure array M100
is preferably 100 nm to 10 microns, more preferably 300 nm to 1
micron. The radius of the fluorescent nanostructures 1 is
preferably 20 to 200 nm, more preferably 30 to 80 nm. The length of
the fluorescent nanostructures 1 is preferably from 100 nm to 10
microns, more preferably from 800 nm to 5 microns. The collective
mode is a mode of the entire nanostructure array M100 instead of a
mode of individual fluorescent nanostructures 1. When the
fluorescent nanostructures 1 fluoresce at the collective mode of
the nanostructure array M100, fluoresced light of the fluorescent
nanostructures 1 is substantially spatially and/or temporally
coherent. Fluoresced light from such an nanostructure array M100
has a much higher intensity than fluoresced light from an
individual fluorescent nanowire and remains coherent. Namely, the
nanostructure array M100 can be a coherent light source. A coherent
light source is a light source whose emitted light is substantially
coherent, temporally, spatially, or both. A coherent light source
can have application such as in quantum communication, in quantum
cryptography, and as laser. The term "mode" as used herein means a
possible standing electromagnetic wave in the nanostructure array
M100. A standing wave, also known as a stationary wave, is a wave
that remains in a constant position. In a stationary medium, a
standing wave can occur as a result of interference between two
waves traveling in opposite directions. Not all standing waves are
possible in a given system. Possible standing waves are dictated by
characteristics of the system, such as, physical dimensions,
shapes, chemical composition and/or characteristics of an
environment in the vicinity of the system. The wavelength of the
standing wave of a mode is called the wavelength of the mode.
[0166] FIG. M5 shows simulated fluorescence spectra of two
exemplary nanostructure arrays in axial directions thereof. The
axial direction of a nanostructure array means the direction
perpendicular to the substrate of the nanostructure array. The
simulation is done using the finite difference time domain (FDTD)
method. The FDTD method is a method of numerically simulating
propagation of light in a structure and can be used to predict
detailed characteristics of the propagation. Both spectra M510 and
M520 show sharp peaks such as the peaks M510a and M520a. These
peaks M510a and M520a are at wavelengths of collective modes of the
exemplary nanostructure arrays, respectively. Spectrum M510 is a
fluorescence spectra of one of the exemplary nanostructure arrays
wherein the fluorescent nanostructures 1 are diamond nanowires and
have a radius of 50 nm and pitch of 500 nm. Spectrum M520 is a
fluorescence spectra of the other one of the exemplary
nanostructure arrays wherein the fluorescent nanostructures 1 are
diamond nanowires, have a radius of 60 nm and pitch of 400 nm. In
both spectra M510 and M520, the highest peaks M510a and M520a are
at wavelengths substantially equal to the pitches of the exemplary
nanostructure arrays, respectively. This observation leads to a
method of designing a nanostructure array that fluoresces at a
wavelength of interest, the method comprising: selecting the
wavelength of interest; selecting a pitch of the nanostructure
array to be substantially equal to the wavelength of interest;
selecting a radius of fluorescent nanowires of the nanostructure
array that maximizes fluorescence intensity of the nanostructure
array at the wavelength of interest; selecting a material of the
fluorescent nanowires such that the fluorescent nanowires fluoresce
at the wavelength of interest.
[0167] FIG. M6 shows results of this method of design for a
wavelength of interest at about 630 nm. Among five nanostructure
arrays all with a pitch of 637 nm but different radii of
fluorescent nanowires, one nanostructure arrays with fluorescent
nanowires with a radius of about 55 nm maximizes fluorescence
intensity of the nanostructure array at the wavelength of
interest.
[0168] Once a pitch of a nanostructure array, a radius and a
material of fluorescent nanowires in the nanostructure array are
determined, for examples, by the methods above, length of the
fluorescent nanowires can be determined in a method as described
below. A MODE solver is used to determine an effective refractive
index n.sub.eff of the nanostructure array at the wavelength of
interest .lamda..sub.air, given the pitch of the nanostructure
array and the radius and material of the fluorescent nanowires
therein. An effective wavelength .lamda..sub.eff is defined as
.lamda..sub.eff=.lamda..sub.air/n.sub.eff. The length of the
fluorescent nanowires is selected to be a multiple of
.lamda..sub.eff, which guarantees that the nanostructure array has
a collective mode at the wavelength of interest.
[0169] A MODE solver can accurately describe light propagation in a
structure of any geometries. FDTD and MODE solvers from Lumerical
Solutions, Inc. located at Vancouver, British Columbia, Canada were
used.
[0170] The collective mode of the nanostructure array can be an air
mode. As shown in FIG. M7, the term "air mode" as used herein means
a mode in which light intensity M700 is substantially zero within
the fluorescent nanostructures 1 and substantially non-zero outside
the fluorescent nanostructures 1.
[0171] FIG. M8 shows a simulated fluorescence spectrum of an
exemplary nanostructure array M100 in axial directions thereof,
using the FDTD method. The fluorescent nanostructures 1 of this
exemplary nanostructure array M100 has a pitch of 637 nm and a
radius of 60 nm. The fluorescent nanostructures 1 of this exemplary
nanostructure array M100 are embedded in a material M150 which is
an oxide. Compared with the spectra of FIG. M6, it can be seen that
embedding the fluorescent nanostructures 1 in the material M150
shifts the radius that maximizes fluorescence intensity of the
nanostructure array M100 from about 55 nm to about 60 nm. A
partially reflective layer M180 can be deposited in areas on the
surface M150a around the fluorescent nanostructures 1 as shown in
FIGS. M2 and M3. The partially reflective layer M180 and the
concave shape of the surface M150a can enhance sharpness of the
peak M800. Sharpness of a peak can be defined by the Q value (Q
factor, or quality factor) defined as center of the peak divided by
a full width at half maximum (FWHM) of the peak. A higher Q value
indicates a sharper peak.
[0172] FIG. M9 shows a simulated fluorescence spectrum of an
exemplary nanostructure array M100 in axial directions thereof,
using the FDTD method. The fluorescent nanostructures 1 of this
exemplary nanostructure array M100 has a pitch of 1 micron, a
radius of 55 nm and a height of 3 microns. The fluorescent
nanostructures 1 have a cladding layer M160 having a thickness of
300 nm. The fluorescent nanostructures 1 are not embedded in a
material M150. The effect of the cladding layer M160 is evident by
comparing the spectrum of FIG. M9 with the spectrum of FIG. M8: the
peak M900 of FIG. M9 is taller than the peak M800 of FIG. M8 and
the peak M900 is shifted to 750 nm from the position of the peak
M800 at 637 nm.
[0173] The peak M900 can be adjusted to 637 nm by scaling the
physical dimensions of the nanostructure array M100 (pitch,
nanowire radius, nanowire length) by a factor of 637 nm/750
nm=0.85. FIG. M10 shows result of this scaling. FIG. M10 shows a
simulated fluorescence spectrum of an exemplary nanostructure array
M100 in axial directions thereof, using the FDTD method. The
fluorescent nanostructures 1 of this exemplary nanostructure array
M100 has a pitch of 0.85 micron (=1 micron.times.0.85), a radius of
47 nm (=55 nm.times.0.85) and a height of 2.55 microns (=3
microns.times.0.85). The fluorescent nanostructures 1 have a
cladding layer M160 having a thickness of 255 nm (=300
nm.times.0.85). Indeed the peak M1000 of FIG. M10 falls at 637
nm.
[0174] The nanostructure array M100 can be used as a light source
such as a laser. According to an embodiment, a light source
comprises one or more of the nanostructure array M100. A method of
using the nanostructure array M100 as a light source comprises
exposing the nanostructure array M100 to a light, wherein the light
preferable has a shorter wavelength than the wavelength of the
wavelength of the collective mode of the nanostructure array at
which the fluorescent nanowires are operable to fluoresce. For
example, if the wavelength of the collective mode is 500 nm, the
light preferably has a wavelength less than 500 nm. The light can
be provided by any suitable source such as LEDs, fluorescent lamps,
mercury-vapor lamps, sodium-vapor lamps, discharge lamps, sunlight,
incandescent lamps and/or laser.
[0175] The nanostructure array M100 can be manufactured using an
exemplary method, according to an embodiment, the exemplary method
comprising: providing a substrate M110 having a layer of
fluorescent material; coating a resist layer on the layer of
fluorescent material; patterning the resist layer using a
lithographic technique such as photolithography, e-beam lithography
or holographic lithography such that a pattern corresponding to the
fluorescent nanostructures 1 is formed in the resist layer; forming
the fluorescent nanostructures 1 by etching the layer of
fluorescent material; depositing the reflective layer M140 using a
suitable deposition technique such as e-beam evaporation, thermal
evaporation, or sputtering.
[0176] Another exemplary method of manufacturing the nanostructure
array M100, according to an embodiment, comprises: providing a
substrate M110; growing the fluorescent nanostructures 1 on the
substrate by a suitable method such as the vapor-liquid-solid (VLS)
method; depositing the reflective layer M140 using a suitable
deposition technique such as e-beam evaporation, thermal
evaporation, or sputtering. The VLS method is a method for the
growth of one-dimensional structures, such as nanowires, from
chemical vapor deposition. Growth of a crystal through direct
adsorption of a gas phase on to a solid surface is generally very
slow. The VLS method circumvents this by introducing a catalytic
liquid alloy phase which can rapidly adsorb a vapor to
supersaturation levels, and from which crystal growth can
subsequently occur from nucleated seeds at the liquid-solid
interface. The physical characteristics of nanowires grown in this
manner depend, in a controllable way, upon the size and physical
properties of the liquid alloy.
[0177] The exemplary methods can also comprise a step of depositing
a fluorescent material on the fluorescent nanostructures 1 by a
suitable technique such as e-beam evaporation, thermal evaporation,
sputtering, chemical vapor deposition (CVD), atomic layer
deposition (ALD), electrochemical deposition, followed by an
optional annealing step.
[0178] The exemplary methods can also comprise a step of embedding
a fluorescent material in the fluorescent nanowires by a suitable
technique such as ion implantation, irradiation with electrons,
followed by an optional annealing step.
[0179] The exemplary methods can also comprise a step of coating a
dielectric nanowire around a fluorescent or an active emitting
material such a nanowire laser. By a suitable technique such as ALD
or CVD.
[0180] The exemplary methods can also comprise a step of coating a
cladding layer surrounding a sidewall M120b of the fluorescent
nanowires, using a suitable technique such as e-beam evaporation,
thermal evaporation, sputtering, chemical vapor deposition (CVD),
atomic layer deposition (ALD), electrochemical deposition.
[0181] The exemplary methods can also comprise a step of filling
space between the fluorescent nanowires with the material M150 by a
suitable technique such as e-beam evaporation, thermal evaporation,
sputtering, chemical vapor deposition (CVD), atomic layer
deposition (ALD), electrochemical deposition, followed by an
optional step of planarization such as chemical-mechanical
planarization (CMP).
[0182] According to an embodiment, an image sensor comprises a
plurality of pixels, each pixel of which has at least a
nanostructure 1 in a form of a nanowire that can convert light
impinging thereon to electrical signals and a gate electrode
surrounding the nanostructure 1 preferably near its lower end (i.e.
the end connected to a substrate). The gate electrode may be
located at another location of the nanostructure 1. The gate
electrodes are functional to individually electrically connect the
nanostructures 1 to or disconnect the nanostructures 1 from
external readout circuitry. The pixels can be arranged in any
suitable pattern such as a square grid, a hexagonal grid, and
concentric rings. The pixels can be fabricated to absorb light in
the ultraviolet (UV), visible (VIS) or infrared (IR) regions and to
generate a detectable electrical signal in response thereto.
[0183] The nanostructures 1 essentially extend perpendicularly from
the substrate, which can also be referred to as "standing-up".
[0184] The image sensor can be configured for various types of uses
such as compact image sensors and spectrophotometers.
[0185] In one embodiment, the pixels are organized into a plurality
of "rows". The pixels in each row are electrically connected in
parallel to a readout line. Pixels in different rows are
electrically connected to different readout lines. The pixels can
be organized into a plurality of "columns" such that the gate
electrodes of the pixels in each column are electrically connected
in parallel to a gate line, the gate electrodes of the pixels in
different columns are electrically connected to different gate
lines, and no two different pixels are connected to a same readout
line and their gate electrodes are connected to a same gate line.
The terms "row" and "column" do not require that pixels are
physically aligned or arranged in any particular way, but rather
are used to describe topological relationship between the pixels,
readout lines and gate lines. An exemplary image sensor according
to this embodiment comprises first, second, third, fourth pixels,
each of which has a gate electrode, a first readout line
electrically connected to the first and second pixels, a second
readout line electrically connected to the third and fourth pixels,
a first gate line electrically connected to the gate electrodes of
the first and third pixels and a second gate line electrically
connected to the gate electrodes of the second and fourth
pixels.
[0186] In one embodiment, each pixel has at least one nanostructure
1. The nanostructures 1 in the pixels can be configured to absorb,
confine and transmit light impinging thereon. For example, the
nanostructures 1 can function as waveguides to confine and direct
light in a direction determined by its physical boundaries.
[0187] In one embodiment, more than one pixels can have a common
electrode electrically connected thereto, for example, for
providing a bias voltage. The common electrode can be a top layer
made of a transparent conductive material, such as ITO (indium tin
oxide) or aluminum doped ZnO (AZO).
[0188] In one embodiment, the readout lines and the gate lines can
have suitable electronic devices connected thereto, such as,
amplifiers, multiplexers, D/A or A/D converters, computers,
microprocessing units, digital signal processors, etc.
[0189] In one embodiment, the nanostructures 1 and the substrate
can comprise suitable semiconductor materials and/or metals such as
Si, GaAs, InAs, Ge, ZnO, InN, GaInN, GaN, AlGaInN, BN, InP, InAsP,
GaInP, InGaP:Si, InGaP:Zn, GaInAs, AlInP, GaAlInP, GaAlInAsP,
GaInSb, InSb, Al, Al--Si, TiSi.sub.2, TiN, W, MoSi.sub.2, PtSi,
CoSi.sub.2, WSi.sub.2, In, AuGa, AuSb, AuGe, PdGe, Ti/Pt/Au,
Ti/Al/Ti/Au, Pd/Au, ITO (InSnO). The nanostructures 1 and the
substrate can be doped by suitable dopants such as GaP, Te, Se, S,
Zn, Fe, Mg, Be, Cd, etc. It should be noted that the use nitrides
such as Si.sub.3N.sub.4, GaN, InN and AlN can facilitate
fabrication of image sensors that can detect light in wavelength
regions not easily accessible by conventional techniques. Doping
levels of the nanostructures 1 and the substrate can be up to
10.sup.20 atoms/cm.sup.3. Other suitable materials are
possible.
[0190] Methods of fabrication of the image sensor can include
shallow trench isolation (STI), also known as "Box Isolation
Technique." STI is generally used on CMOS process technology nodes
of 250 nanometers and smaller. Older CMOS technologies and non-MOS
technologies commonly use isolation based on Local Oxidation of
Silicon (LOCOS). STI is typically created early during the
semiconductor device fabrication process, before transistors are
formed. Steps of the STI process include, for instance, etching a
pattern of trenches in the substrate, depositing one or more
dielectric materials (such as silicon dioxide) to fill the
trenches, and removing the excess dielectric using a technique such
as chemical-mechanical planarization.
[0191] The nanostructures 1 can be formed by a dry etching process,
such as a deep etching process, or a Bosch process, in combination
with a suitable lithography technique (e.g. photolithography,
e-beam lithography, holographic lithography). The nanostructures 1
can also be formed by a Vapor Liquid Solid (VLS) method. Diameters
of the nanostructures 1 can be from 10 to 2000 nm, preferably 50 to
150 nm, more preferably 90 to 150 nm. Lengths of the nanpillars can
be from 10 nm to 10000 nm, preferably 1000 nm to 8000 nm, more
preferably 4000 nm to 6000 nm. The nanostructures 1 can have any
suitable cross-sectional shape such as a circle, a square, a
hexagon.
[0192] The nanostructures 1 can be sized to selectively absorb a
wavelength region of interest, for instance, as described in
co-pending U.S. Patent Application Ser. No. 61/357,429 filed Jun.
22, 2010, herein incorporation by reference in its entirety.
Absorptance can be adjusted by varying the nanostructure 1 spacing
(pitch), particularly to near unity.
[0193] The nanostructures 1 can have a cladding material. The
nanostructures 1 can selectively absorb UV light, red light, green
light, blue light, or IR light.
[0194] The image sensor can have large number of nanostructures 1,
for instance, a million or more.
[0195] A method of using the image sensor comprises: (a) exposing
the pixels to light; (b) reading electrical signals from a pixel by
connecting at least one nanopillar in the pixel to external readout
circuitry using the gate electrode surrounding the at least one
nanopillar of the pixel. The electrical signals can be electric
charge accumulated on the nanopillar, a change of electrical
current through the nanopillar, or a change of electrical impedance
of the nanopillar.
[0196] FIGS. S4 and S5 show an apparatus comprising the image
sensor and a control circuit. The control circuit comprises a
decoder S410 and a trans-impedance amplifier (TIA) and multiplexer
circuit S420. The image sensor and the control circuit can be
formed as an integrated circuit or chip. To control or address the
nanopillars, a gate voltage can be selectively applied to one of
the gate lines S1570 at a time to allow electrical current through
those nanopillars connected to that particular gate line S1570 and
the readout lines S1021 can be used to read electrical current from
each of those nanopillars. In this way, a row-by-row (i.e. gate
line by gate line) addressing scheme may be executed. The TIA and
multiplexer circuit S420 is connected to each readout line S1021
and can include a multiplexer to sequentially output electrical
current one each readout line S1021 to a single terminal. The TIA
and multiplexer circuit S420 can amplify the electrical current
from each readout line S1021 and convert it into a voltage signal.
The decoder array S410 is connected to each gate line S1570 and can
include a multiplexer to sequentially apply gate voltages to each
gate line S1570. The TIA and multiplexer circuit S420 and the
decoder array S410 can be synchronized by a common timing signal
from a timing pulse input. A controller can be used to generate the
timing signal. The control circuit can further comprise other
functional components, such as, for example, an analog-to-digital
converter, an exposure controller, and a bias voltage circuit, etc.
An exemplary TIA can be OPA381; an exemplary multiplexer can be
ADG732, and an exemplary decoder can be SN74154 (all from Texas
Instruments Inc). It will be appreciated, of course, that other
readout circuitry components may also be used.
[0197] The control circuit can be connected to the image sensor by
any suitable interconnect techniques, such as wire-bonding,
flip-chip bonding or bump bonding.
[0198] The readout lines S1021 and the gate lines S1570 can be
parallel as shown in FIG. S4 or can have a "fan-out" shape as shown
in FIG. S5. As will be appreciated the fan out shaped electrodes
provide greater room for connections to external circuitry.
[0199] The image sensor described herein can be used as various
image sensors, including contact image sensors (CIS). Contact image
sensors are capable of resolving features of a size approximately
equal to the size of the pixel. The size of the pixel may be
determined by the size of the nanopillar and the surrounding region
in which the evanescent field propagates. CISs are a relatively
recent technological innovation in the field of optical flatbed
scanners that are rapidly replacing charge-coupled devices (CCDs)
in low power and portable applications. As the name implies, CISs
place the image sensor in near direct contact with an object to be
scanned in contrast to using mirrors to bounce light to a
stationary sensor, as is the case in conventional CCD scanners. A
CIS typically consists of a linear array of detectors, covered by a
focusing lens and flanked by red, green, and blue LEDs for
illumination. Usage of LEDs allows the CIS to be relatively power
efficient, with many scanners being powered through the minimal
line voltage supplied, for instance, via a universal serial bus
(USB) connection. CIS devices typically produce lower image quality
compared to CCD devices; in particular, the depth of field is
limited, which poses a problem for material that is not perfectly
flat. However, a CIS contact sensor is typically modularized. All
the necessary optical elements may be included in a compact module.
Thus, a CIS module can help to simplify the inner structure of a
scanner. Further, a CIS contact sensor is typically smaller and
lighter than a CCD line sensor. With a CIS, the scanner can be
portable with a height around 30 mm.
[0200] A CIS can include an elongate optical assembly comprising
illumination, optical imaging, and detection systems. The
illumination source illuminates a portion of the object (commonly
referred to as a "scan region"), whereas the optical imaging system
collects light reflected by the illuminated scan region and focuses
a small area of the illuminated scan region (commonly referred to
as a "scan line") onto the pixels of the CIS. The pixels convert
light incident thereon into electrical signals. Image data
representative of the entire object then may be obtained by
sweeping the CIS across the entire object.
[0201] A method of scanning an object using a CIS essentially
comprises three steps: first, the pixels of the CIS convert
reflected light they receive from the object into analog electrical
signals; second, the analog electrical signals are amplified;
third, the amplified analog electrical signals are converted to
digital electrical signals by an analog-to-digital (A/D) converter.
The digital signals may then be further processed and/or stored as
desired.
[0202] FIG. S6 shows a schematic of an apparatus S600 in accordance
with an embodiment. The apparatus S600 comprises foreoptics S610,
the image sensor S620, a readout circuit (ROC) S630, and a
processor S640. A housing may enclose and protect one of more the
foregoing components of the apparatus S600 from excessive or
ambient light, the environment (e.g., moisture, dust, etc.),
mechanical damage (e.g., vibration, shock), etc.
[0203] Light (L) from a scene (S) emanates toward the apparatus
S600. For clarity, only L from S impinging upon the apparatus S600
is depicted (although it will be appreciated that L from S
propagates in all directions).
[0204] The foreoptics S610 may be configured to receive L from S
and focus or collimate the received L onto the image sensor S620.
For instance, foreoptics S610 may include one or more of: a lens,
an optical filter, a polarizer, a diffuser, a collimator, etc.
[0205] The pixels in the image sensor S620 may include nanopillars
of different sizes (e.g. from about 50 to 200 nm) for selective
detection of light across a wavelength regions of interest.
[0206] The ROC S630 may be connected to the image sensor S620 and
is configured to receive output therefrom.
[0207] The processor S640 is configured to receive output from the
ROC S630. The processor S640 may, in some instances, be configured
to provide defect correction, linearity correction, data scaling,
zooming/magnification, data compression, color discrimination,
filtering, and/or other imaging processing, as desired.
[0208] In one embodiment, the processor S640 may include hardware,
such as Application Specific Integrated Circuits (ASICs), Field
Programmable Gate Arrays (FPGAs), digital signal processors (DSPs),
or other integrated formats. However, those skilled in the art will
recognize that the processor S640 may, in whole or in part, can be
equivalently implemented in integrated circuits, as one or more
computer programs having computer-executable instructions or code
running on one or more computers (e.g., as one or more programs
running on one or more computer systems), as one or more programs
running on one or more processors (e.g., as one or more programs
running on one or more microprocessors), as firmware, or as
virtually any combination thereof, and that designing the circuitry
and/or writing the code for the software and/or firmware would be
well within the skill of one skilled in the art in light of this
disclosure. In addition, those skilled in the art will appreciate
that the mechanisms of the subject matter described herein are
capable of being distributed as a program product in a variety of
forms, and that an illustrative embodiment of the subject matter
described herein applies regardless of the particular type of
computer-readable medium used to actually carry out the
distribution.
[0209] In some implementations, the apparatus S600 may also be
configured as a spectrophotometer to measure intensity of
reflection or absorption at one more wavelengths.
[0210] Depending on the construction of the image sensor S620,
light at different wavelengths may be detected nanopillars at
different locations and with different sizes. A three- or
four-nanopillar pixel may be fabricated. Of course, pixels having
additional pillars are also possible.
[0211] FIGS. S7A and S7B show an exemplary three-nanopillar pixel
and an exemplary four-nanopillar pixel according to embodiments.
These pixels may be incorporated into the image sensor.
[0212] FIG. S7A shows a pixel S710 including three nanopillars R,
G, B, having different sizes configured to absorb and/or detect
red, green, and blue light, respectively, according to an
embodiment. For instance, the R, G, B nanopillars can have sizes
effective to absorb and/or detect light of about 650 nm, 510 nm,
and 475 nm in wavelength, respectively. The diameter of the pixel
S710 may be 10 .mu.m or less. The pixel S710 may be used in
traditional shadow masked based display device.
[0213] FIG. S7B shows a pixel S720 including four nanopillars R, G,
B, G, having different sizes configured to absorb and/or detect
red, green, and blue light, respectively, according to an
embodiment. Two of the nanopillars, G, absorb and/or detect green
light. The diameter of the pixel S720 may be 10 .mu.m or less.
[0214] A cladding may, in some instance, surround at least one
pixel of the image sensor to increase light absorption. The
cladding of pixel S710 and S720 may be formed, for instance, from
hafnium oxide or silicon nitride.
[0215] The term excitons refer to electron hole pairs.
[0216] An active element is any type of circuit component with the
ability to electrically control electron and/or hole flow
(electricity controlling electricity or light, or vice versa).
Components incapable of controlling current by means of another
electrical signal are called passive elements. Resistors,
capacitors, inductors, transformers, and even diodes are all
considered passive elements. Active elements include in embodiments
disclosed herein, but are not limited to, an active waveguide,
transistors, silicon-controlled rectifiers (SCRs), light emitting
diodes, and photodiodes. A waveguide is a system or material
designed to confine and direct electromagnetic radiation of
selective wavelengths in a direction determined by its physical
boundaries. Preferably, the selective wavelength is a function of
the diameter of the waveguide. An active waveguide is a waveguide
that has the ability to electrically control electron and/or hole
flow (electricity controlling electricity or light, or vice versa).
This ability of the active waveguide, for example, is one reason
why the active waveguide could be considered to be "active" and
within the genus of an active element.
[0217] An optical pipe is an element to confine and transmit an
electromagnetic radiation that impinges on the optical pipe. The
optical pipe can include a core and a cladding. The core could be a
nanostructure 1. The optical pipe could be configured to separate
wavelengths of an electromagnetic radiation beam incident on the
optical pipe at a selective wavelength through the core and the
cladding, wherein the core is configured to be both a channel to
transmit the wavelengths up to the selective wavelength and an
active element to detect the wavelengths up to the selective
wavelength transmitted through the core. A core and a cladding are
generally complimentary components of the optical pipe and are
configured to separate wavelengths of an electromagnetic radiation
beam incident on the optical pipe at a selective wavelength through
the core and cladding.
[0218] An embodiment relates to an image sensor comprising one or
more nanostructure 1 on a substrate of a cavity, the nanostructure
1 being configured to transmit a first portion of an
electromagnetic radiation beam incident on the sensor, and the
substrate comprising an anti-reflective material that absorbs a
second portion of the electromagnetic radiation beam incident on
the sensor, wherein the first portion is substantially different
from the second portion, wherein the anti-reflective material
absorbs at least 68 percent of optical light incident on the
anti-reflective material, and wherein the anti-reflective material
does not disrupt an electronic surface properties of epitaxial
silicon to cause surface current leakage or provide sites for
recombination of carriers generated by photons when the
anti-reflective material is contacted with epitaxial silicon.
[0219] Preferably, the second portion comprises at least a portion
of electromagnetic radiation that comes out from the nanostructures
1. Preferably, the anti-reflective material is in an
anti-reflective layer on a front side of the substrate that is
exposed to the electromagnetic radiation beam incident on the
sensor.
[0220] Preferably, the sensor comprises a plurality of
nanostructures 1 in each of the cavity.
[0221] Preferably, the nanostructure 1 is configured to separate
wavelengths of the electromagnetic radiation beam incident on the
nanowire at a selective wavelength.
[0222] Preferably, the first portion comprises electromagnetic
radiation of wavelengths of light of a certain color and the second
portion comprises electromagnetic radiation of wavelengths of light
of a complementary color.
[0223] Preferably, the sensor is configured to have an array
optical response that substantially resembles a human eye optical
response.
[0224] Preferably, the sensor comprises a plurality of nanowires
and is configured to have a substantially minor change in an array
optical response with a 10.degree. change in a direction of the
electromagnetic radiation beam incident on the sensor.
[0225] Preferably, the anti-reflective layer comprises a plurality
of anti-reflective films configured to absorb electromagnetic
radiation of a plurality of wavelengths.
[0226] Preferably, each of the nanostructures 1 is configured to
separate wavelengths of the electromagnetic radiation beam incident
on the nanostructure 1 through at a selective wavelength, the
sensor further comprising a pair of photosensitive elements
comprising a central photosensitive element and a peripheral
photosensitive element, wherein the central photosensitive element
is operably coupled to the nanostructure 1 and the peripheral
photosensitive element is operably coupled to the substrate around
the nanostructure 1.
[0227] Preferably, the nanostructure 1 is configured to be an
active element to detect wavelengths of electromagnetic radiation
transmitted through the nanowire.
[0228] Preferably, the active element is configured to be a
photodiode, a charge storage capacitor, or combinations
thereof.
[0229] Preferably, the anti-reflective material absorbs at least
about 90 percent of optical light incident on the anti-reflective
material. Preferably, the anti-reflective material reduces a
surface leakage current.
[0230] Preferably, the plurality of nanostructures 1 are located so
as to create a regular or semi-regular tessellation wherein a shape
is repeated over a plane without any gaps or overlaps. A regular
tessellation means a tessellation made up of congruent regular
polygons. Regular means that the sides of the polygon are all the
same length. Congruent means that the polygons are all the same
size and shape. A regular polygon has 3 or 4 or 5 or more sides and
angles, all equal. A semi-regular tessellation has two properties:
(1) it is formed by regular polygons; and (2) the arrangement of
polygons at every vertex point is identical.
[0231] Preferably, the tessellation is a regular tessellation such
as a triangular tessellation, a square tessellation, a hexagonal
tessellation or combinations thereof.
[0232] Another embodiment relates to a device comprising the sensor
having a plurality of nanostructures 1 in each of the cavity, with
each of the nanostructures 1 configured to separate wavelengths of
the electromagnetic radiation beam incident on the nanostructure 1
through at a selective wavelength, the sensor further comprising a
pair of photosensitive elements comprising a central photosensitive
element and a peripheral photosensitive element, wherein the
central photosensitive element is operably coupled to the
nanostructure 1 and the peripheral photosensitive element is
operably coupled to the substrate around the nanostructure 1. The
device could be an image sensor.
[0233] Preferably, the nanostructure 1 comprises a waveguide.
[0234] The device could further comprise a passivation layer around
the waveguide.
[0235] The device could further comprise a metal layer around the
waveguide.
[0236] Preferably, the device comprises no color or IR filter.
[0237] Preferably, the nanostructure 1 has an index of refraction
(n.sub.1), and a cladding surrounding the nanostructure 1 has a
cladding index of refraction (n.sub.2), wherein n.sub.1>n.sub.2,
n.sub.1=n.sub.2, or n.sub.1<n.sub.2.
[0238] Preferably, the selective wavelength is a function of the
diameter of the waveguide.
[0239] The device could further comprise at least a pair of metal
contacts with at least one of the metal contacts being contacted to
the waveguide.
[0240] Another embodiment relates to a device comprising the sensor
having the nanostructure 1 configured to be an active element to
detect wavelengths of electromagnetic radiation transmitted through
the nanowire. The device could be an image sensor.
[0241] Preferably, the waveguide is configured to convert energy of
the electromagnetic radiation transmitted through the waveguide and
to generate excitons.
[0242] Preferably, the waveguide comprises a p-i-n junction that is
configured to detect the excitons generated in the waveguide.
[0243] The device could further comprise an insulator layer around
the waveguide and a metal layer around the insulator layer to form
a capacitor that is configured to collect the excitons generated in
the waveguide and store charge in the capacitor.
[0244] The device could further comprise metal contacts that
connect to the metal layer and waveguide to control and detect the
charge stored in the capacitor.
[0245] The device could further comprise a cladding around the
nanostructure 1, and the substrate comprises a peripheral
photosensitive element, wherein the peripheral photosensitive
element is operably coupled to the cladding.
[0246] Preferably, the substrate comprises an electronic
circuit.
[0247] The device could further comprise a lens structure or an
optical coupler over the nanostructure 1, wherein the lens
structure or the optical coupler is operably coupled to the
nanostructure 1.
[0248] The device could further comprise a stack surrounding the
nanostructure 1, the stack comprising metallic layers embedded in
dielectric layers.
[0249] Preferably, a surface of the stack comprises a reflective
surface.
[0250] Preferably, the anti-reflective material is not located on
the nanostructure 1 or on a back-side of the substrate opposite to
a front side of the substrate that is exposed to the
electromagnetic radiation beam incident on the sensor.
[0251] Preferably, a wall surface of the cavity has a reflective
surface.
[0252] Preferably, a wall surface of the nanostructure 1 has a
reflective surface.
[0253] Another embodiment relates to an image sensor comprising a
plurality of nanostructures 1 on a substrate of a cavity, the
nanostructure 1 being configured to transmit a first portion of an
electromagnetic radiation beam incident on the sensor, the
substrate absorbs a second portion of the electromagnetic radiation
beam incident on the sensor, wherein the first portion is
substantially different from the second portion.
[0254] Yet another embodiment relates to an image sensor comprising
a nanostructure 1 on a substrate of a cavity, the nanowire being
configured to transmit a first portion of an electromagnetic
radiation beam incident on the sensor, the substrate absorbs a
second portion of the electromagnetic radiation beam incident on
the sensor, wherein the first portion is substantially different
from the second portion, and the ratio of a diameter of the cavity
to a diameter of the nanostructure 1 is at less than about 10.
[0255] In yet other embodiments, a plurality of nanostructures 1
are arranged on a regular tessellation.
[0256] In yet other embodiments, as shown in FIG. SS2, a coupler
that may take the shape of a micro lens efficiently could be
located on the nanostructure 1 to collect and guide the
electromagnetic radiation into the nanostructure 1. As shown in
FIG. SS2, the nanostructure 1 has a refractive index n.sub.1
surrounded by a cladding of refractive index n.sub.2.
[0257] In the configuration of FIG. SS2, it is possible to
eliminate pigmented color filters that absorb about 2/3 of the
light that impinges on the image sensor. The nanostructure 1
functions as an active waveguide and the cladding of the optical
pipe could function as a passive waveguide with a peripheral
photosensitive element surrounding the core to detect the
electromagnetic radiation transmitted through the passive waveguide
of the cladding. Passive waveguides do not absorb light like color
filters, but can be designed to selectively transmit selected
wavelengths.
[0258] A waveguide, whether passive or active, has a cutoff
wavelength that is the lowest frequency that the waveguide can
propagate. The diameter of the nanostructure 1 serves as the
control parameter for the cutoff wavelength of the nanostructure
1.
[0259] The nanostructure 1 could also serve as a photodiode by
absorbing the confined light, generating electron hole pairs
(excitons) and detecting the excitons.
[0260] The stacking layers in FIG. SS2 comprise dielectric
material-containing and metal-containing layers. The dielectric
materials include as but not limited to oxides, nitrides and
oxynitrides of silicon having a dielectric constant from about 4 to
about 20, measured in vacuum. Also included, and also not limiting,
are generally higher dielectric constant gate dielectric materials
having a dielectric constant from about 20 to at least about 100.
These higher dielectric constant dielectric materials may include,
but are not limited to hafnium oxides, hafnium silicates, titanium
oxides, barium-strontium titanates (BSTs) and lead-zirconate
titanates (PZTs).
[0261] The dielectric material-containing layers may be formed
using methods appropriate to their materials of composition.
Non-limiting examples of methods include thermal or plasma
oxidation or nitridation methods, chemical vapor deposition methods
(including atomic layer chemical vapor deposition methods) and
physical vapor deposition methods.
[0262] The metal-containing layers could function as electrodes.
Non-limiting examples include certain metals, metal alloys, metal
silicides and metal nitrides, as well as doped polysilicon
materials (i.e., having a dopant concentration from about
1.times.10.sup.18 to about 1.times.10.sup.22 dopant atoms per cubic
centimeter) and polycide (i.e., doped polysilicon/metal silicide
stack) materials. The metal-containing layers may be deposited
using any of several methods. Non-limiting examples include
chemical vapor deposition methods (also including atomic layer
chemical vapor deposition methods) and physical vapor deposition
methods. The metal-containing layers could comprise a doped
polysilicon material (having a thickness typically in the range
1000 to 1500 Angstrom).
[0263] The dielectric and metallization stack layer comprises a
series of dielectric passivation layers. Also embedded within the
stack layer are interconnected metallization layers. Components for
the pair of interconnected metallization layers include, but are
not limited to contact studs, interconnection layers,
interconnection studs.
[0264] The individual metallization interconnection studs and
metallization interconnection layers that could be used within the
interconnected metallization layers may comprise any of several
metallization materials that are conventional in the semiconductor
fabrication art. Non-limiting examples include certain metals,
metal alloys, metal nitrides and metal silicides. Most common are
aluminum metallization materials and copper metallization
materials, either of which often includes a barrier metallization
material, as discussed in greater detail below. Types of
metallization materials may differ as a function of size and
location within a semiconductor structure. Smaller and lower-lying
metallization features typically comprise copper containing
conductor materials. Larger and upper-lying metallization features
typically comprise aluminum containing conductor materials.
[0265] The series of dielectric passivation layers may also
comprise any of several dielectric materials that are conventional
in the semiconductor fabrication art. Included are generally higher
dielectric constant dielectric materials having a dielectric
constant from 4 to about 20. Non-limiting examples that are
included within this group are oxides, nitrides and oxynitrides of
silicon. For example, the series of dielectric layers may also
comprise generally lower dielectric constant dielectric materials
having a dielectric constant from about 2 to about 4. Included but
not limiting within this group are hydrogels such as silicon
hydrogel, aerogels like silicon Al, or carbon aerogel,
silsesquioxane spin-on-glass dielectric materials, fluorinated
glass materials, organic polymer materials, and other low
dielectric constant materials such as doped silicon dioxide (e.g.,
doped with carbon, fluorine), and porous silicon dioxide.
[0266] Typically, the dielectric and metallization stack layer
comprises interconnected metallization layers and discrete
metallization layers comprising at least one of copper
metallization materials and aluminum metallization materials. The
dielectric and metallization stack layer also comprises dielectric
passivation layers that also comprise at least one of the generally
lower dielectric constant dielectric materials disclosed above. The
dielectric and metallization stack layer could have an overall
thickness from about 1 to about 4 microns. It may comprise from
about 2 to about 4 discrete horizontal dielectric and metallization
component layers within a stack.
[0267] The layers of the stack layer could be patterned to form
patterned dielectric and metallization stack layer using methods
and materials that are conventional in the semiconductor
fabrication art, and appropriate to the materials from which are
formed the series of dielectric passivation layers. The dielectric
and metallization stack layer may not be patterned at a location
that includes a metallization feature located completely therein.
The dielectric and metallization stack layer may be patterned using
wet chemical etch methods, dry plasma etch methods or aggregate
methods thereof. Dry plasma etch methods as well as e-beam etching
if the dimension needs to be very small, are generally preferred
insofar as they provide enhanced sidewall profile control when
forming the series of patterned dielectric and metallization stack
layer.
[0268] The planarizing layer may comprise any of several optically
transparent planarizing materials. Non-limiting examples include
spin-on-glass planarizing materials and organic polymer planarizing
materials. The planarizing layer could extend above the optical
pipe such that the planarizing layer would have a thickness
sufficient to at least planarize the opening of the optical pipe,
thus providing a planar surface for fabrication of additional
structures within the CMOS image sensor. The planarizing layer
could be patterned to form the patterned planarizing layer.
[0269] Optionally, there could be a series of color filter layers
located upon the patterned planarizing layer. The series of color
filter layers, if present, would typically include either the
primary colors of red, green and blue, or the complementary colors
of yellow, cyan and magenta. The series of color filter layers
would typically comprise a series of dyed or pigmented patterned
photoresist layers that are intrinsically imaged to form the series
of color filter layers. Alternatively, the series of color filter
layers may comprise dyed or pigmented organic polymer materials
that are otherwise optically transparent, but extrinsically imaged
while using an appropriate mask layer. Alternative color filter
materials may also be used. The filter could also be filter for a
black and white, or IR sensors wherein the filter cuts off visible
and pass IR predominantly.
[0270] The spacer layer could be one or more layers made of any
material that physically, but not optically, separates the stacking
layers from the micro lens. The spacer layer could be formed of a
dielectric spacer material or a laminate of dielectric spacer
materials, although spacer layers formed of conductor materials are
also known. Oxides, nitrides and oxynitrides of silicon are
commonly used as dielectric spacer materials. Oxides, nitrides and
oxynitrides of other elements are not excluded. The dielectric
spacer materials may be deposited using methods analogous,
equivalent or identical to the methods described above. The spacer
layer could be formed using a blanket layer deposition and etchback
method that provides the spacer layer with the characteristic
inward pointed shape.
[0271] The micro lens may comprise any of several optically
transparent lens materials that are known in the art. Non-limiting
examples include optically transparent inorganic materials,
optically transparent organic materials and optically transparent
composite materials. Most common are optically transparent organic
materials. Typically the lens layers could be formed incident to
patterning and reflow of an organic polymer material that has a
glass transition temperature lower than the series of color filter
layers 12, if present, or the patterned planarizing layer 11.
[0272] As shown in FIG. SS2, the high index material in the core
could, for example, be silicon nitride having a refractive index of
about 2.0. The lower index cladding layer material could be, for
example, glass, plasma enhanced silicon nitride, plasma enhanced
silicon oxide.
[0273] Optionally, a micro lens could be located on the
nanostructure 1 near the incident electromagnetic radiation beam
receiving end of the image sensor. The function of the micro lens
or in more general terms is to be a coupler, i.e., to couple the
incident electromagnetic radiation beam into the nanostructure 1.
If one were to choose a micro lens as the coupler in this
embodiment, its distance from the nanostructure 1 would be much
shorter than to the photosensitive element, so the constraints on
its curvature are much less stringent, thereby making it
implementable with existing fabrication technology.
[0274] The shape of the nanostructure 1 could be different for
different embodiments. In one configuration, the nanostructure 1
could cylindrical, that is, the diameter of the nanostructure 1
remains the substantially the same throughout the length of the
nanostructure 1. In another configuration, the nanostructure 1
could conical, where the upper diameter of the cross sectional area
of the nanostructure 1 could be greater or smaller than the lower
diameter of the cross sectional area of the nanostructure 1. The
terms "upper" and "lower" refer to the ends of the nanostructure 1
located closer to the incident electromagnetic radiation beam
receiving and exiting ends of the image sensor. Other shapes
include a stack of conical sections.
[0275] By nesting nanostructures 1 that function as waveguides and
using a micro lens coupler as shown in FIG. SS2, an array of image
sensors could be configured to obtain complementary colors having
wavelengths of electromagnetic radiation separated at a cutoff
wavelength in the core and cladding of each nanostructure 1 of
every image sensor. The complementary colors are generally two
colors when mixed in the proper proportion produce a neutral color
(grey, white, or black). This configuration also enables the
capture and guiding of most of the electromagnetic radiation
incident beam impinging on the micro lens to the photosensitive
elements (i.e., photodiodes) located at the lower end of the
nanostructure 1. Two adjacent or substantially adjacent image
sensors with different color complementary separation can provide
complete information to reconstruct a full color scene according to
embodiments described herein. This technology of embodiments
disclosed herein can further supplant pigment based color
reconstruction for image sensing which suffers from the
inefficiency of discarding (through absorption) the non selected
color for each pixel.
[0276] Each physical pixel of a device containing an image sensor
of the embodiments disclosed herein would have two outputs
representing the complementary colors, e.g., cyan (or red)
designated as output type 1 and yellow (or blue) designated as
output type 2. These outputs would be arranged as follows:
1212121212121212 2121212121212121 1212121212121212 ##EQU00002##
[0277] Each physical pixel would have complete luminance
information obtained by combining its two complementary outputs. As
a result, the same image sensor can be used either as a full
resolution black and white or full color sensor.
[0278] In the embodiments of the image sensors disclosed herein,
the full spectrum of wavelengths of the incident electromagnetic
radiation beam (e.g., the full color information of the incident
light) could be obtained by the appropriate combination of two
adjacent pixels either horizontally or vertically as opposed to 4
pixels for the conventional Bayer pattern.
[0279] Depending on minimum transistor sizes, each pixel containing
an image sensor of the embodiments disclosed herein could be as
small as 1 micron or less in pitch and yet have sufficient
sensitivity. This could open the way for contact imaging of very
small structures such as biological systems.
[0280] An embodiment of a compound pixel comprises a system of two
pixels, each having a core of a different diameter such that cores
have diameters d.sub.1 and d.sub.2 for directing light of different
wavelengths (.lamda..sub.B and .lamda..sub.R). The two cores also
serve as photodiodes to capture light of wavelengths .lamda..sub.B
and .lamda..sub.R. The claddings of the two image sensors serve for
transmitting the light of wave length .lamda..sub.w-B and
.lamda..sub.w-R. The light of wave length .lamda..sub.w-B and
.lamda..sub.w-R transmitted through the cladding is detected by the
peripheral photosensitive elements surrounding the cores. Note that
(w) refers to the wavelength of white light. Signals from the 4
photodiodes (two located in the cores and two located in or on the
substrate surrounding the core) in the compound pixel are used to
construct color.
[0281] A nanostructured photodiode (PD) according to an embodiments
comprise a substrate and an upstanding nanostructure 1 protruding
from the substrate. A p-n junction giving an active region to
detect light may be present within the structure. The nanostructure
1, a part of the nanostructure 1, or a structure in connection with
the nanostructure 1, forms a waveguide directing and detecting at
least a portion of the light that impinges on the device. In
addition the waveguide doubles up as spectral filter that enables
the determination of the color range of the impinging light.
[0282] A nanostructured PD according to the embodiments comprises
of an upstanding nanostructure 1. For the purpose of this
application an upstanding nanostructure 1 should be interpreted as
a nanostructure 1 protruding from the substrate in some angle, the
upstanding nanostructure 1 for example being grown from the
substrate, preferably by as vapor-liquid-solid (VLS) grown
nanostructures 1.
[0283] According to the embodiments, a part of the nanostructure 1
or structure formed from the nanostructure 1 is used as a waveguide
directing and confining at least a portion of the light impinging
on the nanostructured PD in a direction given by the upstanding
nanostructure 1. The waveguiding nanostructured PD structure could
include a high refractive index core with one or more surrounding
cladding with refractive indices less than that of the core. The
structure is either circular symmetrical or close to being circular
symmetrical. Light waveguiding in circular symmetrical structures
are well know for fiber-optic applications and many parallels can
be made to the area of rare-earth-doped fiber optic devices.
However, one difference is that fiber amplifier are optically
pumped to enhance the light guided through them while the described
nanostructured PD can be seen as an efficient light to electricity
converter. One well known figure of merit is the so called
Numerical Aperture, NA. The NA determines the angle of light
captured by the waveguide. The NA and angle of captured light is an
important parameter in the optimization of a new PD structure.
[0284] For a PD operating in IR and above IR, using GaAs is good,
but for a PD operating in the visible light region, silicon would
be preferable. For example to create circuits, Si and doped Si
materials are preferable. Similarly, for a PD working in the
visible range of light, one would prefer to use Si.
[0285] In one embodiment, the typical values of the refractive
indexes for III-V semiconductor core material are in the range from
2.5 to 5.5 when combined with glass type of cladding material (such
as SiO.sub.2 or Si.sub.3N.sub.4) having refractive indexes ranging
from 1.4 to 2.3. A larger angle of capture means light impinging at
larger angles can be coupled into the waveguide for better capture
efficiency.
[0286] One consideration in the optimization of light capture is to
provide a coupler into the nanostructure 1 structure to optimize
light capture into the structure. In general, it would be preferred
to have the NA be highest where the light collection takes place.
This would maximize the light captured and guided into the PD.
[0287] A nanostructured PD according to the embodiments could
comprise a substrate and a nanostructure 1 epitaxially grown from
the substrate in an defined angle .theta.. A portion of or all of
the nanostructure 1 could be arranged to act as a waveguiding
portion directing at least a portion of the impinging light in a
direction given by the elongated direction of the nanostructure 1,
and will be referred to as a waveguide. In one possible
implementation, two contact could be provided on the nanostructure
1 for example one on top or in a wrapping configuration on the
circumferential outer surface and the other contact could be
provided in the substrate. The substrate and part of the upstanding
structure may be covered by a cover layer, for example as a thin
film as illustrated or as material filling the space surrounding
the nanostructured PD.
[0288] The nanostructure 1 could have a diameter in the order of 50
nm to 500 nm, The length of the nanostructure 1 could be of the
order of 1 to 10 .mu.m. The p-n junction results in an active
region arranged in the nanostructure 1. Impinging photons in the
nanostructure 1 are converted to electron hole pairs and in one
implementation are subsequently separated by the electric fields
generated by the p-n junction along the length of the nanostructure
1. The materials of the different members of the nanostructured PD
are chosen so that the nanostructure 1 will have good waveguiding
properties vis-a-vis the surrounding materials, i.e. the refractive
index of the material in the nanostructure 1 should preferably be
larger than the refractive indices of the surrounding
materials.
[0289] In addition, the nanostructure 1 may be provided with one or
more layers. A first layer, may be introduced to improve the
surface properties (i.e., reduce charge leakage) of the
nanostructure 1. Further layers, for example an optical layer may
be introduced specifically to improve the waveguiding properties of
the nanostructure 1, in manners similar to what is well established
in the area of fiber optics. The optical layer typically has a
refractive index in between the refractive index of the
nanostructure 1 and the surrounding cladding region material.
Alternatively the intermediate layer has a graded refractive index,
which has been shown to improve light transmission in certain
cases. If an optical layer is utilized the refractive index of the
nanostructure 1, n.sub.w, should define an effective refractive
index for both the nanostructure 1 and the layers.
[0290] The ability to grow nanostructures 1 with well defined
diameters, as described above and exemplified below, could be to
optimize the waveguiding properties of the nanostructure 1 or at
least the waveguide with regards to the wavelength of the light
confined and converted by the nanostructured PD. The diameter of
the nanostructure 1 is chosen so as to have a favorable
correspondence to the wavelength of the desired light. Preferably
the dimensions of the nanostructure 1 are such that a uniform
optical cavity, optimized for the specific wavelength of the
produced light, is provided along the nanostructure 1. The core
nanostructure 1 must be sufficiently wide to capture the desired
light. A rule of thumb would be that diameter must be larger than
.lamda./2n.sub.w, wherein .lamda. is the wavelength of the desired
light and n.sub.w is the refractive index of the nanostructure 1.
As an example a diameter of about 60 nm may be appropriate to
confine blue light only and one 80 nm may be appropriate for to
confine both blue and green light only in a silicon nanostructure
1.
[0291] In the infra-red and near infra-red a diameter above 100 nm
would be sufficient. An approximate preferred upper limit for the
diameter of the nanostructure 1 is given by the growth constrains,
and is in the order of 500 nm. The length of the nanostructure 1 is
typically and preferably in the order of 1-10 .mu.m, providing
enough volume for the light conversion region
[0292] A reflective layer is in one embodiment, provided on the
substrate and extending under the wire. The purpose of the
reflective layer is to reflect light that is guided by the wire but
has not been absorbed and converted to carriers in the
nanostructured PD. The reflective layer is preferably provided in
the form of a multilayered structure comprising repeated layers of
silicates for example, or as a metal film. If the diameter of the
nanostructure 1 is sufficiently smaller than the wavelength of the
light a large fraction of the directed light mode will extend
outside the waveguide, enabling efficient reflection by a
reflective layer surrounding the narrow the nanostructure 1
waveguide
[0293] An alternative approach to getting a reflection in the lower
end of the waveguide core is to arrange a reflective layer in the
substrate underneath the nanostructure 1. Yet another alternative
is to introduce reflective means within the waveguide. Such
reflective means can be a multilayered structure provided during
the growth process of the nanostructure 1, the multilayered
structure comprising repeated layers of for example
SiN.sub.x/SiO.sub.x (dielectric).
[0294] To form the p-n junction useful for light detection at least
part of the nanostructure is preferably doped. This can be done by
either changing dopants during the growth of the nanostructure 1 or
using a radial shallow implant method on the nanostructure 1 once
it is grown.
[0295] Considering systems where nanostructure 1 growth is locally
enhanced by a substance, as vapor-liquid-solid (VLS) grown
nanostructures 1, the ability to alter between radial and axial
growth by altering growth conditions enables the procedure
(nanostructure 1 growth, mask formation, and subsequent selective
growth) can be repeated to form nanostructure 1/3D-sequences of
higher order. For systems where nanostructure 1 growth and
selective growth are not distinguished by separate growth
conditions it may be better to first grow the nanostructure 1 along
the length and by different selective growth steps grow different
types of 3D regions.
[0296] Depending on the intended use of the nanostructured PD,
availability of suitable production processes, costs for materials
etc., a wide range of materials can be used for the different parts
of the structure. The III-V semiconductors are of particular
interest due to their properties facilitating high speed and low
power electronics. Suitable materials for the substrate include,
but is not limited to: Si, GaAs, GaP, GaP:Zn, GaAs, InAs, InP, GaN,
Al.sub.2O.sub.3, SiC, Ge, GaSb, ZnO, InSb, SOI
(silicon-on-insulator), CdS, ZnSe, CdTe. Suitable materials for the
nanostructure 1 110 include, but is not limited to: Si, GaAs (p),
InAs, Ge, ZnO, InN, GaInN, GaN AlGaInN, BN, InP, InAsP, GaInP,
InGaP:Si, InGaP:Zn, GaInAs, AlInP, GaAlInP, GaAlInAsP, GaInSb,
InSb. Possible donor dopants for e.g. GaP, Te, Se, S, etc, and
acceptor dopants for the same material are Zn, Fe, Mg, Be, Cd,
etc.
[0297] The appropriateness of low resistivity contact materials are
dependent on the material to be deposited on, but metal, metal
alloys as well as non-metal compounds like Al, Al--Si, TiSi.sub.2,
TiN, W, MoSi.sub.2, PtSi, CoSi.sub.2, WSi.sub.2, In, AuGa, AuSb,
AuGe, PdGe, Ti/Pt/Au, Ti/Al/Ti/Au, Pd/Au, ITO (InSnO), etc. and
combinations of e.g. metal and ITO can be used.
[0298] The substrate is an integral part of the device, since it
also contains the photodiodes necessary to detect light that has
not been confined to the nanostructure 1. The substrate in addition
also contains standard CMOS circuits to control the biasing,
amplification and readout of the PD as well as any other CMOS
circuit deemed necessary and useful. The substrate include
substrates having active devices therein. Suitable materials for
the substrates include silicon and silicon-containing materials.
Generally, each sensor element of the embodiments include a
nanostructured PD structure comprise a nanostructure 1, a cladding
enclosing at least a portion of the nanostructure 1, a coupler and
two contacts.
[0299] The fabrication of the nanostructured PDs on silicon is
possible to the degree that the nanostructures 1 are uniformly
aligned the (111) direction normal to the substrates and
essentially no nanostructures 1 are grown in the three declined
(111) directions that also extends out from the substrate. The well
aligned growth of III-V nanostructures 1 in predefined array
structures on silicon substrates, is preferred for successful large
scale fabrication of optical devices, as well as most other
applications.
[0300] PD devices build on silicon nanostructures 1 are of high
commercial interest due to their ability to detect light of
selected wavelengths not possible with other material combinations.
In addition they allow the design of a compound photodiode that
allows the detection of most of the light that impinges on a image
sensor.
[0301] In other embodiments, there could be multiple nanostructures
1 in a single deep cavity as shown in FIG. SS3 wherein at the
bottom is a silicon substrate on which there is an array of
nanostructures 1 over which is a coupler (shown as an oval), and
over the coupler is a region (shown as rectangular box) through
which light comes in to the coupler.
[0302] The recognition of color and luminance by the embodiments of
the image sensors could be done by color reconstruction. Each
compound pixel has complete luminance information obtained by
combining its two complementary outputs. As a result, the same
image sensor can be used either as a full resolution black and
white or full color sensor.
[0303] The color reconstruction could be done to obtain full color
information by the appropriate combination of two adjacent pixels,
which could be one embodiment of a compound pixel, either
horizontally or vertically. The support over which color
information is obtained is less than the dimension of two pixels as
opposed to 4 for the Bayer pattern.
[0304] Each physical pixel of a device containing an image sensor
of the embodiments disclosed herein would have two outputs
representing the complementary colors, e.g., cyan, red (C, R)
designated as output type 1 or yellow, blue (Y, B) designated as
output type 2 as shown in FIG. SS4. These four outputs of two
pixels of a compound pixel can be resolved to reconstruct a full
color scene of an image viewed by a device containing the image
sensors of the embodiments described herein.
[0305] Example: Angle Dependence an Image Sensor Having a Single
and Multiple Nanostructures 1
[0306] A nanostructure 1 capacitor-photodiode has the properties of
converting incoming light into charge stored in the capacitor. The
efficiency with which light is coupled into the nanostructure 1,
however, is dependent on the angle of the incident light.
Simulations indicate that the efficiency decreases with increasing
departure of the angle from normal incidence. Light that fails to
couple to the nanostructure 1 could eventually end up either in the
substrate or be reflected out of the cavity altogether. With
increasing departure from normal incidence, the response of the
nanostructure 1 decreases but that of the substrate increases. This
could lead to errors to in scene color recognition and
illumination, particularly for a non telecentric lens.
[0307] A nanostructure 1 array capacitor-photodiode could display a
significantly reduced angular dependence in its response. In
addition to optical response, the optimal number of nanostructures
1 in a single cavity could depend on the process and fabrication of
the nanostructure 1 capacitor-photodiode. Simulations indicate five
nanostructures 1 in a single cavity could dramatically reduce
angular dependence as shown in FIGS. SS5 and SS6. The units of the
y axis are arbitrary as the simulation results shown in FIGS. 5 and
6 is the show the relative change in the response as a function of
wavelength with different angle of light incidence. The diameter of
the cavity containing the single or array of nanostructures 1 whose
simulation results are shown in FIGS. SS5 and SS6 was 1200 nm.
Also, in arriving at the simulations whose results are shown in
FIGS. SS5 and SS6, it was assumed that all light not absorbed by
the nanostructure 1 would to be absorbed in the substrate.
[0308] FIG. SS5 shows a plot entitled "wire.sub.--65 nm_angle_plot"
simulating absorption in a 65 nm nanostructure 1 located
concentrically in a cavity of 1200 nm and by the substrate. The
solid line is the response of the single wire of diameter 65 nm as
a function of wavelength with illumination incident in a
perpendicular direction and the dashed line is the same response
but for a wire illuminated at 10 degrees from vertical. The dotted
line is the response of the substrate for vertical illumination and
the dash dot line is the same for illumination at 10 degrees. The
term response refers to the ability to absorb incident light.
[0309] FIG. SS5 shows the following features of a single
nanostructure 1 capacitor-photodiode in a cavity: (1) the response
of the single nanostructure 1 has a maximum around 480 nm
wavelength of light; (2) the response of the single nanostructure 1
changes substantially with a change in the angle of light incidence
from perpendicular to the nanostructure 1 to 10 degrees from the
perpendicular axis; (3) the response of the substrate has a maximum
around 550 nm wavelength of light; and (4) the response of the
substrate is greater for the angle of light incidence of 10 degrees
from the perpendicular axis than for the angle of light incidence
perpendicular to the nanostructure 1.
[0310] FIG. SS6 shows a plot entitled "array.sub.--60
nm_angle_plot." The solid line is the response of an array of 5
nanostructures 1 each of diameter 60 nm as a function of wavelength
with illumination incident in a perpendicular direction and the
dashed line is the same response but for an array illuminated at 10
degrees from vertical. The dotted line is the response of the
substrate for vertical illumination and the dash dot line is the
same for illumination at 10 degrees. The term response refers to
the ability to absorb incident light.
[0311] The 5 nanostructures 1 were arranged in a diamond with 4
nanostructures 1 located at the four corners of the diamond and one
nanostructure 1 located at the center of the diamond, which was
also the center of the cavity of diameter 1200 nm. The distance
between the central nanostructure 1 and each of the four corner
nanostructures 1 was 300 nm.
[0312] FIG. SS6 shows the following features of a single
nanostructure 1 photodiode in a cavity: (1) the response of the
single nanostructure 1 has a maximum around 480 nm wavelength of
light; (2) the response of the single nanostructure 1 does not
change substantially with a change in the angle of light incidence
from perpendicular to the nanostructure 1 to 10 degrees from the
perpendicular axis; (3) the response of the substrate has a maximum
around 550 nm wavelength of light, but the magnitude of the
response of the substrate is substantially smaller than that of the
response of the substrate of a single nanostructure 1
capacitor-photodiode in a cavity; and (4) the response of the
substrate is almost the same for the angle of light incidence of 10
degrees from the perpendicular axis as that for the angle of light
incidence perpendicular to the nanostructure 1.
[0313] Example: an Array of Nanostructures 1 with Anti-Reflective
Material on the Substrate
[0314] Whenever a ray of light moves from one medium to another
(for example, when light enters a sheet of glass after travelling
through air), some portion of the light is reflected from the
surface (known as the interface) between the two media. The
strength of the reflection depends on the refractive indices of the
two media as well as the angle of the surface to the beam of light.
The exact value can be calculated using the Fresnel equations.
[0315] When the light meets the interface at normal incidence
(perpendicularly to the surface), the intensity of light reflected
is given by the reflection coefficient or reflectance, R:
R = ( n 0 - n s n 0 + n s ) 2 ##EQU00003##
where n.sub.0 and n.sub.s are the refractive indices of the first
and second media, respectively. The value of R varies from 0.0 (no
reflection) to 1.0 (all light reflected) and is usually quoted as a
percentage. Complementary to R is the transmission coefficient or
transmittance, T. If absorption and scattering are neglected, then
the value T is always 1-R. Thus if a beam of light with intensity I
is incident on the surface, a beam of intensity RI is reflected,
and a beam with intensity TI is transmitted into the medium.
[0316] Applying these principles to the embodiments of the
invention, in an example, if the index of refraction of Si for red
light is 4 and that of the cavity filled with SiO.sub.2 is about
1.5, R would then be equal to about 0.2. This means that 20% of the
incident power is reflected at the substrate and is not
detected.
[0317] Strategies for minimizing the reflection of incident light
on the substrate of the cavity are to provide an anti-reflective
material in or on the substrate of the cavity. An anti-reflective
material could be in the form of a coating and acts to reduce the
reflection at the surface, allowing a higher level of visible light
transmission. Anti-reflective or antireflection (AR) coatings are a
type of optical coating applied to the surface of optical devices
to reduce reflection. This improves the efficiency of the system
since less light is lost. The methods for implementing
anti-reflective coatings include the use of alternating layers of a
low-index material like silica and a higher-index material to
obtain reflectivity as low as 0.1% at a single wavelength or over a
range of wavelengths.
[0318] In one embodiment, the anti-reflective material could work
near a single light frequency. Other embodiments could use a green
antireflective coating, for example, on the substrate of the cavity
containing the blue absorbing nanostructure 1, and a red
anti-reflective coating with a cyan absorbing nanostructure 1.
[0319] Many AR coatings have transparent thin film structures with
alternating layers of contrasting refractive index. Layer
thicknesses are chosen to produce destructive interference in the
beams reflected from the interfaces, and constructive interference
in the corresponding transmitted beams. This makes the structure's
performance change with wavelength and incident angle, so that
color effects often appear at oblique angles. A wavelength range
must be specified when designing or ordering such coatings, but
good performance can often be achieved for a relatively wide range
of frequencies: usually a choice of IR, visible, or UV is
offered.
[0320] A simple interference AR coating could be a single
quarter-wave layer of transparent material whose refractive index
is the square root of the substrate's refractive index. This
theoretically gives zero reflectance at the center wavelength and
decreased reflectance for wavelengths in a broad band around the
center. By using alternating layers of a low-index material like
silica and a higher-index material it is possible to obtain
reflectivities as low as 0.1% at a single wavelength.
[0321] One embodiment of the AR coating could be ultraviolet
anti-reflection (UAR) coating. This ultraviolet anti-reflection
coating could reduce surface reflection from quartz, fused silica,
semiconductor silicon substrates to less than 0.3% from 0.2 to 0.3
microns. UAR coatings are designed to promote effective
transmission of light in the ultraviolet wavelengths.
[0322] Anti-reflective coatings include several different
sub-layers comprising many different materials such as, but not
limited to, Al.sub.2O.sub.3, ZrO.sub.3, MgF.sub.2, SiO.sub.2,
cryolite, LiF. ThF.sub.4, CeF.sub.3, PbF.sub.2, ZnS, ZnSc, Si, Te,
MgO, Y.sub.2O.sub.3, Sc.sub.2O.sub.3, SiO, HfO.sub.2, ZrO.sub.2,
CeO.sub.2, Nb.sub.2O.sub.3, Ta.sub.2O.sub.5, and TiO.sub.2. The
thickness of each sublayer is often related to an even whole number
division of the wavelength of light that is most preferred to be
transmitted through the coated material.
[0323] Another embodiment of an anti-reflective coating could be a
treated silicon layer. An untreated silicon layer absorbs about
67.4 percent of light shone upon it--meaning that nearly one-third
of that light is reflected away. In the embodiments of the
invention, a silicon surface could be treated with a nanoengineered
reflective coating such that the material could absorb 90 or more
of the optical light directed onto the material. For example, the
nanoengineered anti-reflective material of Lin disclosed in
"Realization of a Near Perfect Antireflection Coating for Silicon
Solar Energy," published in November 2008 by the journal Optics
Letters, which is incorporated herein in its entirety by reference,
absorbed 96.21 percent of light shone upon it.
[0324] The new coating could also successfully tackle the tricky
challenge of angles. Typical antireflective coatings are engineered
to transmit light of one particular wavelength. The new coating
could stack multiple layers, for example seven layers, one on top
of the other, in such a way that each layer enhances the
antireflective properties of the layer below it. These additional
layers also help to bend the flow of light to an angle that
augments the coating's antireflective properties. This means that
each layer not only transmits light, it also helps to capture any
light that may have otherwise been reflected off of the layers
below it.
[0325] For example, the seven layers, each with a height of 50
nanometers to 100 nanometers, could be made up of silicon dioxide
and titanium dioxide nanorods positioned at an oblique angle such
that light is captured between the nanorods. The nanorods could be
attached to a silicon substrate via chemical vapor disposition. The
new coating could be affixed to nearly any photovoltaic materials,
including III-V multi-junction and cadmium telluride.
[0326] Example: Effect of Cavity Size on the Angle Dependence of a
Single Nanostructure 1
[0327] A nanostructure 1 capacitor-photodiode in a smaller cavity
could display a significantly reduced angular dependence in its
response when the ratio of a diameter of the cavity to a diameter
of the nanostructure 1 is at less than about 10, preferably less
than about 9, more preferably less than 8, and most preferably less
than 7.
[0328] Simulations indicate a nanostructure 1 of 65 nm in a single
cavity of 600 nm could dramatically reduce angular dependence as
shown in FIG. SS7 as compared to the angular dependence of
nanostructure 1 of 65 nm in a single cavity of 1200 nm shown in
FIG. SS5. In arriving at the simulations whose results are shown in
FIGS. SS5 and 7, it was assumed that all light not absorbed by the
nanostructure 1 would to be absorbed in the substrate.
[0329] FIG. SS7 shows a plot entitled "wire.sub.--65 nm_angle_plot"
simulating absorption in a 65 nm nanostructure 1 located
concentrically in a cavity of 600 nm and by the substrate. The
solid line is the response of the single wire of diameter 65 nm as
a function of wavelength with illumination incident in a
perpendicular direction and the dashed line is the same response
but for a wire illuminated at 10 degrees from vertical. The dotted
line is the response of the substrate for vertical illumination and
the dash dot line is the same for illumination at 10 degrees. The
term response refers to the ability to absorb incident light.
[0330] FIG. SS7 shows the following features of a single
nanostructure 1 capacitor-photodiode in a cavity: (1) the response
of the single nanostructure 1 has a maximum around 480 nm
wavelength of light; (2) the response of the single nanostructure 1
does not change substantially with a change in the angle of light
incidence from perpendicular to the nanostructure 1 to 10 degrees
from the perpendicular axis; (3) the response of the substrate has
a maximum around 600 nm wavelength of light; and (4) the response
of the substrate is substantially the same for the angle of light
incidence of 10 degrees from the perpendicular axis and for the
angle of light incidence perpendicular to the nanostructure 1.
[0331] The human eye has photoreceptors (called cone cells) for
medium- and high-brightness color vision, with sensitivity peaks in
short (S, 420-440 nm), middle (M, 530-540 nm), and long (L, 560-580
nm) wavelengths (there is also the low-brightness monochromatic
"night-vision" receptor, called rod cell, with peak sensitivity at
490-495 nm). Thus, in principle, three parameters describe a color
sensation. The tristimulus values of a color are the amounts of
three primary colors in a three-component additive color model
needed to match that test color. The tristimulus values are most
often given in the CIE 1931 color space, in which they are denoted
X, Y, and Z.
[0332] In the CIE XYZ color space, the tristimulus values are not
the S, M, and L responses of the human eye, but rather a set of
tristimulus values called X, Y, and Z, which are roughly red, green
and blue, respectively (note that the X, Y, Z values are not
physically observed red, green, blue colors. Rather, they may be
thought of as `derived` parameters from the red, green, blue
colors). Two light sources, made up of different mixtures of
various wavelengths, may appear to be the same color; this effect
is called metamerism. Two light sources have the same apparent
color to an observer when they have the same tristimulus values, no
matter what spectral distributions of light were used to produce
them.
[0333] Due to the nature of the distribution of cones in the eye,
the tristimulus values depend on the observer's field of view. To
eliminate this variable, the CIE defined the standard
(colorimetric) observer. Originally this was taken to be the
chromatic response of the average human viewing through a 2.degree.
angle, due to the belief that the color-sensitive cones resided
within a 2.degree. arc of the fovea. Thus the CIE 1931 Standard
Observer is also known as the CIE 1931 2.degree. Standard Observer.
A more modern but less-used alternative is the CIE 1964 10.degree.
Standard Observer, which is derived from the work of Stiles and
Burch, and Speranskaya.
[0334] The color matching functions are the numerical description
of the chromatic response of the observer as described above.
[0335] The CIE has defined a set of three color-matching functions,
called, x(.lamda.), y(.lamda.), and z(.lamda.), which can be
thought of as the spectral sensitivity curves of three linear light
detectors that yield the CIE XYZ tristimulus values X, Y, and Z.
These functions are known collectively as the CIE standard
observer.
[0336] The tristimulus values for a color with a spectral power
distribution I(.lamda.) are given in terms of the standard observer
by:
X = .intg. 0 .infin. I ( .lamda. ) x _ ( .lamda. ) .lamda. , Y =
.intg. 0 .infin. I ( .lamda. ) y _ ( .lamda. ) .lamda. , Z = .intg.
0 .infin. I ( .lamda. ) z _ ( .lamda. ) .lamda. , ##EQU00004##
wherein .lamda. is the wavelength of the equivalent monochromatic
light (measured in nanometers).
Examples
[0337] FIG. F1A shows a schematic partial cross-sectional view of
an image sensor F100, according to an embodiment. The image sensor
F100 comprises a substrate F110, one or more pixels F150. At least
one pixel F150 comprises a clad F140 and a plurality of subpixels
embedded in the clad F140. Two subpixels F151 and F152 are shown in
FIG. F1A as an example. Each of the subpixels comprises a
nanostructure 1 (e.g. a nanowire F151a in the subpixel F151 and a
nanowire F152a in the subpixel F152) extending essentially
perpendicularly from the substrate F110. Space between the pixels
F150 is preferably filled with a material F160. Each pixel F150 can
further comprise one or more photodiodes F120 located between the
substrate F110 and the nanowires F151a and F152a.
[0338] The substrate F110 can comprise any suitable material such
as silicon, silicon oxide, silicon nitride, sapphire, diamond,
silicon carbide, gallium nitride, germanium, indium gallium
arsenide, lead sulfide, and/or a combination thereof.
[0339] The photodiode F120 can be any suitable photodiode. The
photodiode F120 can have a p-n junction of a p-i-n junction and any
suitable circuitry. The photodiode F120 preferably has a footprint
that completely encloses a footprint of the clad F140.
[0340] The clad F140 can comprise any suitable material, such as
silicon nitride, silicon oxide, and/or a combination thereof. The
clad 140 is preferably substantially transparent to visible light,
preferably with a transmittance of at least 50%, more preferably at
least 70%, most preferably at least 90%. In one example, the clad
F140 is silicon nitride and has a cylindrical shape with a diameter
of about 300 nm.
[0341] The material F160 can comprise any suitable material such as
silicon dioxide. A refractive index of the material F160 is
preferably smaller than a refractive index of the clad F140.
[0342] The nanostructures 1 (e.g. nanowires F151a and F152a) in the
subpixels (e.g. F151 and F152) have refractive indexes equal to or
greater than the refractive index of the clad F140. The
nanostructures 1 (e.g. nanowires F151a and F152a) and the
photodiode F120 have different absorption spectra. For example, the
nanowire F151a has strong absorptance in blue wavelengths, as shown
by an exemplary absorption spectrum F181 in FIG. F1C; the nanowire
F152a has a strong absorptance in green wavelengths, as shown by an
exemplary absorption spectrum F182 in FIG. F1C; the photodiode F120
has strong absorptance in red wavelengths, as shown by an exemplary
absorption spectrum F180 in FIG. F1C. The nanowires can have
different diameters and/or different materials. Each nanowire in
one pixel F150 preferably has a distance of at least 100 nm,
preferable at least 200 nm, to a nearest neighboring nanowire in
the same pixel. The nanowires can be positioned at any suitable
positions in the clad F140.
[0343] The nanostructures 1 (e.g. nanowires F151a and F152a) in the
subpixels (e.g. 151 and 152) are operable to generate electrical
signals upon receiving light. One exemplary nanowire is a
photodiode with a p-n or p-i-n junction therein, details of which
can be found in U.S. patent application Publication Ser. Nos.
12/575,221 and 12/633,305, each of which is hereby incorporated by
reference in its entirety. The electrical signals can comprise an
electrical voltage, an electrical current, an electrical
conductance or resistance, and/or a change thereof. The nanowires
can have a surface passivation layer.
[0344] Substantially all visible light (e.g. >50%, >70%, or
>90%) impinged on the image sensor F100 is absorbed by the
subpixels (e.g. 151 and 152) and the photodiode F120. The subpixels
and the photodiode absorb light with different wavelengths.
[0345] The image sensor F100 can further comprise electronic
circuitry F190 operable to detect electrical signals from the
subpixels and the photodiode F120.
[0346] In one specific example, each pixel F150 has two subpixels
F151 and F152. Each subpixel F151 and F152 has only one
nanostructure 1 (e.g. nanowires F151a and F152a), respectively. The
nanowire F151a comprises silicon, has a radius of about 25 nm, and
has a strong absorptance in blue wavelengths. The nanowire F152a
comprises silicon, has a radius of about 40 nm and has a strong
absorptance in cyan wavelengths. The nanowires F151a and F152a are
about 200 nm apart but embedded in the same clad F140. Each of the
pixels F150 can have more than two subpixels according to an
embodiment. The nanowires can comprise other suitable materials
such as mercury cadmium telluride. The nanowires can have other
suitable radii from 10 nm to 250 nm.
[0347] FIG. F1B shows a schematic partial top view of the image
sensor F100. As shown in exemplary FIG. F1B, the pixels F150 can
have different orientations, which reduces or eliminates effects of
directions of incident light.
[0348] In one embodiment, the subpixels F151 and F152 and the
photodiode F120 in each pixel F150 of the image sensor F100 has
color matching functions substantially the same as the color
matching functions of the CIE 1931 2.degree. Standard Observer or
the CIE 1964 10.degree. Standard Observer.
[0349] FIG. F2A shows a schematic partial cross-sectional view of
an image sensor F200, according to an embodiment. The image sensor
F200 comprises a substrate F210, one or more pixels F250. The
substrate F210 preferably does not comprise any photodiode therein.
At least one pixel F250 comprises a clad F240 and a plurality of
subpixels embedded in the clad F240. Three subpixels F251, F252 and
F253 are shown in FIG. F2A as an example. Each of the subpixels
comprises a nanostructure 1 (e.g. a nanowire F251a in the subpixel
F251, a nanowire F252a in the subpixel F252 and a nanowire F253a in
the subpixel F253) extending essentially perpendicularly from the
substrate F210. Space between the pixels F250 is preferably filled
with a material F260.
[0350] The substrate F210 can comprise any suitable material such
as silicon, silicon oxide, silicon nitride, sapphire, diamond,
silicon carbide, gallium nitride, germanium, indium gallium
arsenide, lead sulfide and/or a combination thereof.
[0351] The clad F240 can comprise any suitable material, such as
silicon nitride, silicon oxide, etc. The clad F240 is preferably
substantially transparent to visible light, preferably with a
transmittance of at least 50%, more preferably at least 70%, most
preferably at least 90%. In one example, the clad F240 is silicon
nitride and has a cylindrical shape with a diameter of about 300
nm.
[0352] The material F260 can comprise any suitable material such as
silicon dioxide. A refractive index of the material F260 is
preferably smaller than a refractive index of the clad F240.
[0353] The nanostructures 1 (e.g. nanowires 251a, 252a and 253a) in
the subpixels (e.g. F251, F252 and F253) have refractive indexes
equal to or greater than the refractive index of the clad F240. The
nanowires and the substrate F210 have different absorption spectra.
For example, the nanowire F251a has strong absorptance in blue
wavelengths, as shown by an exemplary absorption spectrum F281 in
FIG. F2C; the nanowire F252a has a strong absorptance in green
wavelengths, as shown by an exemplary absorption spectrum F282 in
FIG. F2C; the nanowire F253a has a strong absorptance across the
entire visible spectrum, as shown by an exemplary absorption
spectrum F283 in FIG. F2C; the substrate F210 has a strong
absorptance in red wavelengths, as shown by an exemplary absorption
spectrum F280 in FIG. F2C. The nanowires can have different
diameters and/or different materials. Each nanowire in one pixel
F250 preferably has a distance of at least 100 nm, preferable at
least 200 nm, to a nearest neighboring nanowire in the same pixel.
The nanowires in the clad F240 can be positioned at any suitable
positions in the clad F240. The nanowires can have a surface
passivation layer. The nanowires can comprise other suitable
materials such as mercury cadmium telluride. The nanowires can have
other suitable radii from 10 nm to 250 nm.
[0354] The nanostructures 1 (e.g. nanowires F251a, F252a and F253a)
in the subpixels (e.g. F251, F252 and F253) are operable to
generate electrical signals upon receiving light. One exemplary
nanowire is a photodiode with a p-n or p-i-n junction therein,
details of which can be found in U.S. patent application
Publication Ser. Nos. 12/575,221 and 12/633,305, each of which is
hereby incorporated by reference in its entirety. The electrical
signals can comprise an electrical voltage, an electrical current,
an electrical conductance or resistance, and/or a change
thereof.
[0355] Substantially all visible light impinged on the image sensor
F200 is absorbed by the subpixels (e.g. F251, F252 and F253). The
subpixels absorb light with different wavelengths.
[0356] The image sensor F200 can further comprise electronic
circuitry F290 operable to detect electrical signals from the
subpixels.
[0357] In one specific example, each pixel F250 has three subpixels
F 251, F252 and F253. Each subpixel F251, F252 and F253 has only
one nanowire F251a, F252a and F253a, respectively. The nanowire
F251a comprises silicon, has a radius of about 25 nm, and has a
strong absorptance in blue wavelengths. The nanowire F252a
comprises silicon, has a radius of about 40 nm and has a strong
absorptance in green wavelengths. The nanowire F253a comprises
silicon, has a radius of about 45 nm and has a strong absorptance
across the entire visible spectrum. The nanowires F251a, F252a and
F253a are about 200 nm apart but embedded in the same clad F240.
The clad F240 is cylindrical in shape with a diameter of about 400
nm. Each of the pixels F250 can have more than three subpixels
according to an embodiment.
[0358] In another specific example, each pixel F250 has four
subpixels F251, F252, F253 and F254. Each subpixel F251, F252, F253
and F254 has only one nanostructure 1 (e.g., nanowire F251a, F252a,
F253a and F254a respectively). The nanowire F251a comprises
silicon, has a radius of about 25 nm, and has a strong absorptance
in blue wavelengths. The nanowire F252a comprises silicon, has a
radius of about 40 nm and has a strong absorptance in green
wavelengths. The nanowire F253a comprises silicon, has a radius of
about 45 nm and has a strong absorptance across the entire visible
spectrum. The nanowire F254a comprises silicon, has a radius of
about 35 nm and has a strong absorptance in blue green wavelength
(e.g. 400 to 550 nm). The nanowires F251a, F252a, F253a and F254a
are about 200 nm apart but embedded in the same clad F240. The clad
F240 is cylindrical in shape with a diameter of about 400 nm. FIG.
F2D shows exemplary absorption spectra F291, F292, F293 and F294 of
the nanowires F251a, F252a, F253a and F254a, respectively.
[0359] FIG. F2B shows a schematic partial top view of the image
sensor F200. As shown in exemplary FIG. F2B, the pixels F250 can
have different orientations, which reduces or eliminates effects of
directions of incident light.
[0360] According to an embodiment, the image sensor F100 or F200
can further comprise couplers F350 above each pixel F150 or F250,
as shown in FIG. F3. Each of the couplers F350 preferably has
substantially the same footprint as the pixel underneath and has a
convex surface. The coupler F350 is effective to focus
substantially all visible light impinged thereon into the clad F140
or F240.
[0361] According to an embodiment, as shown in FIG. F3, the image
sensor F100 or F200 can further comprise an infrared filter F360,
which is operable to prevent infrared light, such as light with
wavelengths above 650 nm, from reaching the pixels. According to an
embodiment, the image sensor F100 or F200 does not comprise an
infrared filter.
[0362] According an embodiment, the nanowires can be made by a dry
etching process or a Vapor Liquid Solid (VLS) growth method. Of
course, it will be appreciated that other materials and/or
fabrication techniques may also be used for fabricating the
nanowires in keeping with the scope of the invention. For instance,
nanowires fabricated from an indium arsenide (InAs) wafer or
related materials could be used for IR applications.
[0363] The nanowires can also be made to have a strong absorption
in wavelengths not in the visible spectrum, such as in the
ultraviolet (UV) or infrared (IR) spectra. In an embodiment, each
nanowire can have transistor therein or thereon.
[0364] In one embodiment, the subpixels F251, F252 and F253 in each
pixel F250 of the image sensor F200 has color matching functions
substantially the same as the color matching functions of the CIE
1931 2.degree. Standard Observer or the CIE 1964 10.degree.
Standard Observer.
[0365] FIG. F4 shows exemplary color-matching functions F451, F452
and F453 of the subpixels F251, F252 and F253, respectively. The
color-matching functions F461, F462 and F463 are the x(.lamda.),
y(.lamda.), and z(.lamda.) of the CIE standard observer.
[0366] The image sensor F100 or F200 can be used to sense and
capture images. A method of sensing an image comprises projecting
the image onto the image sensor FS100 or F200 using any suitable
optics such as lenses and/or mirrors; detecting an electrical
signal from the nanowire in each subpixel in each pixel using
suitable circuitry; calculating a color of each pixel from the
electrical signals of the subpixels therein.
[0367] FIG. D2 shows a simplified cross section view of a pixel in
an imaging device. Each pixel includes a readout circuit D100
formed on a semiconductor substrate D101 with metal lines D103
above the substrate. As a photosensitive element, a nanostructure 1
is formed standing up from the substrate. Photo absorption takes
place along the length of the nanostructure 1. The output of the
nanostructure 1 can be connected to the readout circuit D100
located in the substrate. Since the footprint of the nanostructure
1 is small, more than one nanostructure 1 can be formed in a pixel.
The role of the long vertical structure of the nanostructure 1 is
to absorb a certain bandwidth of light energy and generate a
corresponding electrical signal and/or to guide the unabsorbed
light energy to the substrate diode with minimum loss, thus
performing as a waveguide. At the top end of the nanostructure 1,
an optical coupler (e.g., a lens) D105 could be formed to couple
the incident light into the nanostructure 1 with minimum energy
loss or reflections. In this embodiment, a micro lens may be used
as a coupler. The microlens may be, but not limited to, a spherical
ball lens. The coupling efficiency of a spherical ball lens is
typically higher than 90%. In another aspect, a binary microlens
may be used as shown in FIG. D2b.
[0368] FIG. D3 shows a simplified cross section view of a pixel
which has a nanostructure 1 at the back side of a thinned
semiconductor substrate. The nanostructure 1 generates photo
charges by absorbing light energy in a certain bandwidth and
dumping the charges into the thinned substrate. The charges are
then collected by readout circuits D100 in the thinned substrate
using an electrical field. Also, the nanowire guides and couples
unabsorbed light into the substrate D108. An advantage of employing
a nanostructure 1 at the back side of the substrate D108 is the
ease of fabricating the nanowires. When forming nanowires at the
front side, it is necessary to remove the thick dielectric layers
D104 illustrated in FIG. D2 in a region where the nanostructure 1
is supposed to be constructed. In contrast, the embodiment
disclosed in FIG. D3 could be made without this removal step.
Further, the nanostructure 1 may fabricated without modifying front
side structure of the CMOS devices. This embodiment includes both
front side metal and insulating layers D106 and backside metal and
insulating layers D107. Further, as in the front side embodiment, a
micro lens of an optical coupler D105 may be coupled to the
nanostructure 1.
[0369] A nanostructure 1 could be configured in a variety of
photodetector configurations. These configurations include: a photo
conductor, a photodiode, or a photogate device. A photo conductor
is a photo sensitive device whose resistivity varies as a function
of incident light. A photodiode is a p-n diode or a p-i-n diode
which generates electron-hole pairs as a photo charge. A photogate
device is a MOS (metal-oxide-semiconductor) device with a biased
gate that creates a potential well in the semiconductor and
accumulates photo charge in the potential well. In the following
embodiments, various configurations of photodiodes, photogate
devices, or combinations of a photodiode and a photogate detector
are implemented as photo detecting elements.
[0370] FIG. D4 shows a cross sectional view of a CMOS pixel with a
nanostructure 1 configured as photogate device. In this embodiment,
there are two photodetectors per pixel, the nanostructure 1 and a
substrate diode. The nanostructure 1 with a dielectric cladding
layer and a vertical gate. The role of the vertical gate
surrounding the nanostructure 1 is to deplete the nanostructure 1
and create a potential well at the nanostructure 1 as shown in FIG.
D5b by applying a slight bias voltage to the vertical gate. Further
increase of the bias voltage would invert the surface region of the
nanostructure 1. As a result, the nanostructure 1 acts similarly to
a pinned photodiode, however, without impurity doping.
[0371] The electrical potential of the nanostructure 1 is not
constant along the axial direction C1-C2 of the nanostructure 1.
This is because the top end of the nanostructure 1 is open and
influenced most by the gate bias while the bottom end of the
nanostructure 1 is connected to the N-well that has positive bias
voltage during reset and holds the bias after reset.
[0372] In the substrate, a p-n junction diode may be formed between
the p-type substrate and n-well region. A p+ layer covers the
n-well surface except the nanostructure 1 junction. This p+ shape
allows receiving the photo charges coming from the nanostructure 1
and suppress the dark current due to the surface states of the
substrate. Since light passing through the nanostructure 1 can
illuminate the substrate diode, photo charges are generated in the
substrate diode and collected in the potential well. Consequently,
the potential well collects the charges both from the NW and the
substrate diode. Compared to conventional CMOS pixels which utilize
only a fraction of incident photons, this embodiment can enhance
the quantum efficiency by utilizing most of the incident
photons.
[0373] The n-well of the substrate photo diode is lightly doped so
that the n-region can be easily depleted with a low bias voltage.
The depleted n-well is preferred for a complete charge transfer
from the substrate diode to the sense node when the transfer gate
is turned on. Complete charge transfer allows for a low noise
readout of the photo charges similar to CCD devices.
[0374] The sense node is formed with n+ diffusion in the substrate.
The sense node is connected to an amplifying transistor, e.g., a
transistor configured as a source follower transistor. A select
switch transistor may be used to control the connection of the
amplifier output to an output node. A reset transistor may also be
connected to the sense node so that sense node is biased to VDD
when the reset gate is activated. When the transfer gate is
activated, the n-well is electrically connected to the sense node.
Then, the n-well becomes positively biased and a potential gradient
in the nanostructure 1 is established between the n-well potential
and the vertical photogate bias voltage. FIG. D8 shows a cross
section view of a dual photodiode structure.
[0375] FIG. D9 shows an embodiment of a CMOS pixel with a
nanostructure 1. This embodiment includes two vertical photogates
(VP Gate1, VP Gate 2) around the NW, a substrate photodiode, and a
readout circuit. The readout circuit includes a transfer gate (TX),
a reset gate (RG), a source follower transistor, and a pixel select
switch. The buffer amplifier in FIG. D9 represents the source
follower transistor and the pixel select switch for simplification.
In this embodiment, an upstanding nanowire is formed with an n-,
i.e. lightly doped n-type or an intrinsic semiconductor so that the
nanostructure 1 can be easily depleted with a low negative bias
voltage from VP Gate 1. Preferably, a negative bias voltage from
the vertical photogate VP Gate 1 could cause accumulation of holes
at the surface of the nanostructure 1 to suppress dark current due
to the surface states of the nanostructure 1 as illustrated in the
FIG. D5b.
[0376] The second vertical photogate VP Gate 2 could be an on/off
switch. This switch could be configured to separate the photo
charges generated in the nanostructure 1 from the photo charges
integrated in the substrate photodiode. Photo charges are
integrated in both the nanostructure 1 and substrate photodiode at
the same time. The photo charges, however, are integrated in
separate potential wells because the off-state of the second
photogate VP Gate 2 forms a potential barrier between the NW and
substrate photodiode. In this manner, signal from the nanostructure
1 and the substrate photodiodes do not mix together. These two
photodiodes can be used to collect charges created by radiations of
different wavelengths.
[0377] The vertical photogates implemented in this embodiment allow
the ability to easily modify the potential profile in the
nanostructure 1 without using a complicated ion implantation
process. The conventional photogate pixel suffers from very poor
quantum efficiency and poor blue response. The conventional
photogate is normally made of polysilicon which covers the top
surface of the substrate photodiode and absorbs short wavelengths
near the blue light, thereby reducing the blue light reaching the
photodiode. The vertical photogate, in contrast, does not block the
light path. This is because the vertical photogate (VPG) does not
lie laterally across the photodiode to control the potential
profile in the semiconductor.
[0378] Additionally, as the pixel size of the image sensors scales
down, the aperture size of the image sensor becomes comparable to
the wavelength of light propagated. For a conventional planar type
photodiode, this results in poor quantum efficiency (QE). The
combination of a VPG structure with nanostructure 1, however,
allows for an ultra small pixel with good QE.
[0379] The pixel of the present embodiment uses a two step process
to read out the signals separately between the nanostructure 1 and
substrate photodiodes. In the first step, the signal charges in the
substrate photodiodes are read out. Then, the n- region in the
substrate is depleted. In the second step, the second photogate VP
Gate 2 may be first turned on. Next, the signal charges in the
nanostructure 1 are read out.
[0380] A device of this embodiment may be operated in a "snapshot"
operation. In a "snapshot" operation, preferably all of the
photogates VP gate 2 in the pixel array are turned on or off at the
same time. The same could be true for the transfer gate TX. To
accomplish this, the second photogate VP Gates 2 are all connected
with a global connection. Further, all the transfer gates TX are
connected with a second global connection.
[0381] Generally, global operation of the reset gate RG should be
avoided for practical reasons. In a pixel array, it is a common
practice to globally reset the array row by row. If the snapshot
operation is not used, individual pixel operation is possible. In
this case, it is not necessary to have global connections.
[0382] FIG. D10 and FIG. D11 show embodiments of CMOS active pixels
with nanowire structured p-i-n photodiodes and vertical photogates
around the nanostructure 1. The nanostructure 1 can have one or
more vertical photogates comprising epitaxially grown layers such
as conductive layers and metal layers.
[0383] In one embodiment such as that shown in FIG. D10, the pixel
could include two photodiodes, a nanostructure 1 photodiode and a
substrate photodiode. This embodiment also includes two vertical
photogates (VP Gate', VP Gate 2), a transfer gate (TX) and a reset
gate (RG). Preferably, both of the photodiodes are lightly doped.
This is because a lightly doped region can be easily depleted with
a low bias voltage.
[0384] The surface region of the substrate photodiode could be
prone to defects due to process induced damage caused during
fabrication and to lattice stress associated with the nanostructure
1. These defects may serve as a source for dark current.
[0385] Preferably, the substrate is connected to ground, that is,
zero voltage. In this embodiment, the reset drain is preferably
doped n+ and is positively biased. When the transfer gate TX and
reset gate are on, the n- region in the substrate becomes
positively biased. This reset operation results in the n- region
being depleted due to a reverse bias condition between the p
substrate and n- region. When the transfer gate TX and reset gate
RG are off, the n- region retains its positive bias, forming a
floating capacitor with respect to the p-sub region.
[0386] The first vertical photogate VP Gate 1 could be configured
to control the potential in the nanostructure 1 so that a potential
gradient can be formed between the NW photodiode and the substrate
photodiode. In this way, photo charges in the nanostructure 1 can
drift quickly to the n- region of the substrate during readout. The
second vertical photogate VP Gate 2 could be an on/off switch.
[0387] FIG. D12 and FIG. D13 show embodiments of back-side
illuminated image sensors. The nanostructure 1 could be formed at
the back side of a p-substrate. The substrate may be thinned by
removing semiconductor substrate material over the area containing
the pixel array. For example, a p-substrate can be thinned to a
thickness between 3 and 50 microns, more preferably, between 6 and
20 microns. The substrate photodiode could now get all of its light
from the back-side and not from the side containing all the metal
lines as in conventional image sensors.
[0388] The front side could include a 4-T readout circuit including
a transfer gate TX, a reset switch with a reset gate RG, a source
follower amplifier, and a select switch. The readout circuits also
could be configured as a 3-T pixel circuit including, a reset
switch with a reset gate RG, a source follower amplifier, and a
select switch. In the front side, a substrate photodiode may be
formed with a shallow p+ layer as shown in FIG. D12 and FIG. D13.
The purpose of having p+ at both sides of the substrate is to
suppress dark current. A buried p layer could be placed underneath
the n+ diffusion layer to block incoming charge flow from the
backside and deflect the charges toward the n- region. Preferably,
doping of the buried p layer is higher than that of the p-
substrate, but not as high as that of the p+ layer. The front side
photodiode is not for photo absorption, but rather for collecting
the charges coming from the nanostructure 1 and from the backside
p- substrate where photon absorption takes place. The nanostructure
1 could have a dielectric layer (cladding layer) surrounding the NW
and two vertical photogates, one for the switch and the other for
controlling the potential in the NW.
[0389] Typically, in the embodiments of FIG. D12 and FIG. D13, a
two step process is used to read out the signal charges separately
from each of the photodiodes. The first step would be to read out
the charges from the substrate diode at the front side. Immediately
after this, by turning on the VP Gate 1, the charges from the
nanostructure 1 would be read out.
[0390] Preferably, the embodiments of FIG. D12 and FIG. D13 should
have a shallow p+ layer at the backside substrate with a hole in
the center so that the p+ layer does not block the charges coming
from the backside nanostructure 1. Also, preferably, at the front
side there should be a lightly doped n-well or n- layer underneath
the shallow p+ layer so that n-well could be easily depleted.
[0391] FIG. D13 shows an alternative embodiment of a backside
illuminated CMOS pixel. In this embodiment, instead of having
vertical photogate for the nanostructure 1, the p+ layer could be
coated at the outer shell of the NW to help create a built-in
electric field in the nanostructure 1. With this configuration,
photo charges can easily drift in the upward direction. The
features of the back-side illumination CMOS pixel are similar to
those of the pixel of FIG. D12.
[0392] FIG. D23C is an embodiment showing nanostructures 1 on the
back-side of a fully processed wafer containing substrate
photodiodes. FIG. D23D is an embodiment showing nanostructures 1 on
the back-side of a fully processed wafer containing substrate
photodiodes. The substrate photodiodes absorb the radiation that
was not allowed to propagate in the nanowires. Examples of the
structures of the backside thinned image sensor having photodiodes
therein are shown in FIG. D24A and FIG. D24B.
[0393] The foregoing detailed description has set forth various
embodiments of the devices and/or processes by the use of diagrams,
flowcharts, and/or examples. Insofar as such diagrams, flowcharts,
and/or examples contain one or more functions and/or operations, it
will be understood by those within the art that each function
and/or operation within such diagrams, flowcharts, or examples can
be implemented, individually and/or collectively, by a wide range
of hardware, software, firmware, or virtually any combination
thereof.
[0394] Those skilled in the art will recognize that it is common
within the art to describe devices and/or processes in the fashion
set forth herein, and thereafter use engineering practices to
integrate such described devices and/or processes into data
processing systems. That is, at least a portion of the devices
and/or processes described herein can be integrated into a data
processing system via a reasonable amount of experimentation.
[0395] The subject matter described herein sometimes illustrates
different components contained within, or connected with, other
components. It is to be understood that such depicted architectures
are merely exemplary, and that in fact many other architectures can
be implemented which achieve the same functionality. In a
conceptual sense, any arrangement of components to achieve the same
functionality is effectively "associated" such that the desired
functionality is achieved. Hence, any two components herein
combined to achieve a particular functionality can be seen as
"associated with" each other such that the desired functionality is
achieved, irrespective of architectures or intermediate
components.
[0396] With respect to the use of substantially any plural and/or
singular terms herein, those having skill in the art can translate
from the plural to the singular and/or from the singular to the
plural as is appropriate to the context and/or application. The
various singular/plural permutations may be expressly set forth
herein for sake of clarity.
[0397] All references, including but not limited to patents, patent
applications, and non-patent literature are hereby incorporated by
reference herein in their entirety.
[0398] While various aspects and embodiments have been disclosed
herein, other aspects and embodiments will be apparent to those
skilled in the art. The various aspects and embodiments disclosed
herein are for purposes of illustration and are not intended to be
limiting, with the true scope and spirit being indicated by the
following claims.
* * * * *