U.S. patent application number 13/209882 was filed with the patent office on 2011-12-08 for compound seminconductor structure.
This patent application is currently assigned to FUJITSU LIMITED. Invention is credited to Kenji Imanishi, Toshihide Kikkawa.
Application Number | 20110297957 13/209882 |
Document ID | / |
Family ID | 38580826 |
Filed Date | 2011-12-08 |
United States Patent
Application |
20110297957 |
Kind Code |
A1 |
Kikkawa; Toshihide ; et
al. |
December 8, 2011 |
COMPOUND SEMINCONDUCTOR STRUCTURE
Abstract
A method for manufacturing a compound semiconductor structure,
includes (a) selecting a conductive SiC substrate in accordance
with color and resistivity and (b) epitaxially growing a GaN series
compound semiconductor layer on the selected conductive SiC
substrate. The step (a) preferably selects a conductive SiC
substrate whose main color is green, whose conductivity type is
n-type and whose resistivity is 0.08 52 cm to 1.times.10.sup.5
.OMEGA.cm, or whose main color is black, whose conductivity type is
p-type and whose resistivity is 1.times.10.sup.3 .OMEGA.cm to
1.times.10.sup.5.OMEGA.cm, or whose main color is blue, whose
conductivity type is p-type and whose resistivity is 10 .OMEGA.cm
to 1.times.10.sup.5 .OMEGA.cm. The step (b) preferably includes
(b-1) growing an AlInGaN layer having a thickness not thinner than
10 .mu.m on the conductive SiC substrate by hydride VPE.
Inventors: |
Kikkawa; Toshihide;
(Kawasaki, JP) ; Imanishi; Kenji; (Kawasaki,
JP) |
Assignee: |
FUJITSU LIMITED
Kawasaki-shi
JP
|
Family ID: |
38580826 |
Appl. No.: |
13/209882 |
Filed: |
August 15, 2011 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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12248357 |
Oct 9, 2008 |
8030164 |
|
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13209882 |
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PCT/JP2006/307566 |
Apr 10, 2006 |
|
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12248357 |
|
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Current U.S.
Class: |
257/76 ;
257/E29.091 |
Current CPC
Class: |
H01L 21/02425 20130101;
H01L 21/0262 20130101; H01L 29/66462 20130101; H01L 21/02378
20130101; H01L 21/02458 20130101; H01L 21/0254 20130101; H01L
29/2003 20130101; H01L 29/7787 20130101 |
Class at
Publication: |
257/76 ;
257/E29.091 |
International
Class: |
H01L 29/205 20060101
H01L029/205 |
Claims
1. A compound semiconductor structure comprising: a conductive SiC
substrate whose main color is green, whose conductivity type is
n-type and whose resistivity is 0.08 .OMEGA.cm to 1.times.10.sup.5
.OMEGA.cm, or whose main color is black, whose conductivity type is
p-type and whose resistivity is 1.times.10.sup.3 .OMEGA.cm to
1.times.10.sup.5 .OMEGA.cm, or whose main color is blue, whose
conductivity type is p-type and whose resistivity is 10 .OMEGA.cm
to 1.times.10.sup.5 .OMEGA.cm; and an AlInGaN layer having a
thickness not thinner than 10 .mu.m and formed on said conductive
SiC substrate.
2. The compound semiconductor structure according to claim 1,
wherein said SiC substrate is green, and an absorption coefficient
at a peak wavelength of an optical absorption band around 0.6 .mu.m
is not larger than two times of an absorption coefficient at a
wavelength of 0.5 .mu.m.
3. The compound semiconductor structure according to claim 1,
wherein said AlInGaN layer is an AlN layer.
4. The compound semiconductor structure according to claim 1,
wherein said AlInGaN layer contains Cl.
5. The compound semiconductor structure according to claim 1,
further comprising: an i-type GaN layer, an i-type AlGaN layer and
an n-type AlGaN layer laminated on and above said AlInGaN
layer.
6. A compound semiconductor structure comprising: a conductive SiC
substrate whose main color is green, whose conductivity type is
n-type and whose resistivity is 0.08 .OMEGA.cm to 1.times.10.sup.5
.OMEGA.cm, or whose main color is black, whose conductivity type is
p-type and whose resistivity is 1.times.10.sup.3 .OMEGA.cm to
1.times.10.sup.5 .OMEGA.cm, or whose main color is blue, whose
conductivity type is p-type and whose resistivity is 10 .OMEGA.cm
to 1.times.10.sup.5 .OMEGA.cm; an AlInGaN layer having a thickness
not thinner than 10 .mu.m and formed on said conductive SiC
substrate; an i-type GaN layer, an i-type AlGaN layer and an n-type
AlGaN layer laminated on and above said AlInGaN layer; a pair of
source/drain electrodes in ohmic contact with said n-type AlGaN
layer; an n-type GaN layer formed on said n-type AlGaN layer
between said pair of source/drain electrodes; an SiN film deposited
on said n-type GaN layer; an opening formed through said SiN film
between said pair of source/drain electrodes; and a gate electrode
in Schottky contact with said n-type GaN layer via said
opening.
7. The compound semiconductor structure according to claim 6,
wherein said SiC substrate is green, and an absorption coefficient
at a peak wavelength of an optical absorption band around 0.6 .mu.m
is not larger than two times of an absorption coefficient at a
wavelength of 0.5 .mu.m.
8. The compound semiconductor structure according to claim 6,
wherein said AlInGaN layer is an AlN layer.
9. The compound semiconductor structure according to claim 6,
wherein said AlInGaN layer contains Cl.
Description
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application is a divisional of application Ser. No.
12/248,357, filed Oct. 9, 2008, which claims the benefit of
priority of PCT/JP2006/307566, filed on Apr. 10, 2006, the entire
contents of which are incorporated herein by reference.
BACKGROUND
[0002] 1. Field
[0003] The present invention relates to a compound semiconductor
structure and its manufacture method, and more particularly to a
GaN series compound semiconductor structure using a conductive SiC
substrate and its manufacture method. Here,
[0004] GaN series compound semiconductor is represented by
Al.sub.xIn.sub.y Ga.sub.1-x-yN (0.ltoreq.x.ltoreq.1.0,
0.ltoreq.y.ltoreq.1.0).
[0005] 2. Description of the Related Art
[0006] Compound semiconductor devices using GaN or GaN series
compound semiconductor are under vigorous development. GaN has a
wide band gap of 3.4 eV and can operate at high voltages. Various
semiconductor devices can be manufactured by forming a hetero
junction using GaN series compound semiconductor. Metal organic
chemical vapor deposition (MOCVD) is mainly used as a crystal
growth method.
[0007] GaN has a high breakdown voltage, and is expected to be
applied to usage requiring high voltage and high speed operation
such as a high electron mobility transistor (HEMT) used at a base
station of mobile phones. A variety of GaN-HEMTs have been reported
which use as an electron transport layer a GaN layer of GaN/AlGaN
crystals grown on a substrate such as sapphire, SiC, GaN and
Si.
[0008] JP-A-2002-352956 proposes a GaN series HEMT having a high
on-breakdown voltage and improved I-V characteristics, which is
manufactured for example by laminating on a c-plane sapphire
substrate an i-type GaN electron transport layer, an i-type AlGaN
spacer layer, an Si-doped n-type AlGaN electron supply layer and an
Si-doped n-type GaN protective layer by MOCVD, depositing an SiN
layer by CVD, forming openings through the SiN layer, and forming
source/drain ohmic electrodes and a gate Schottky electrode.
[0009] JP-A-2004-221325 proposes a HEMT which is manufactured by
laminating on an SiC substrate an i-type GaN electron transport
layer, an i-type AlGaN spacer layer, an Si-doped n-type AlGaN
electron supply layer and an Si-doped n-type GaN cap layer, forming
source/drain ohmic electrodes, thereafter depositing a first SiN
protective film by CVD, forming an opening through the first SiN
protective film, and forming a gate Schottky electrode, and further
forming a second SiN protective film. This structure can suppress
current collapse, i.e., a change in an on-resistance during
operation.
[0010] A breakdown voltage in current-off state in excess of 300 V
is presently reported. Best output characteristics are obtained by
a GaN-HEMT using an SiC substrate. A high thermal conductivity of
SiC contributes to this performance. When a high speed operation
GaN device is to be manufactured, a semi-insulating SiC substrate
is used in order to restrict parasitic capacitance.
SUMMARY
[0011] According to one aspect of the present invention, there is
provided a compound semiconductor structure comprising: [0012] a
conductive SiC substrate whose main color is green, whose
conductivity type is n-type and whose resistivity is 0.08 .OMEGA.cm
to 1.times.10.sup.5 .OMEGA.cm, or whose main color is black, whose
conductivity type is p-type and whose resistivity is
1.times.10.sup.3 .OMEGA.cm to 1.times.10.sup.5 .OMEGA.cm, or whose
main color is blue, whose conductivity type is p-type and whose
resistivity is 10 .OMEGA.cm to 1.times.10.sup.5 .OMEGA.cm; and
[0013] an AlInGaN layer having a thickness not thinner than 10
.mu.m and formed on the conductive SiC substrate.
[0014] According to another aspect of the present invention, there
is provided a method for manufacturing a compound semiconductor
structure, comprising: [0015] (a) selecting a conductive SiC
substrate in accordance with color and resistivity; and [0016] (b)
epitaxially growing a GaN series compound semiconductor layer on
the selected conductive SiC substrate.
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] FIG. 1A is a cross sectional view showing the structure of a
GaN-HEMT using a conductive SiC substrate according to an
embodiment, and FIG. 1B is a table showing the characteristics of a
conductive SiC substrate;
[0018] FIGS. 2A and 2B are schematic cross sectional views of a
hydride VPE system and an MOCVD system, respectively;
[0019] FIG. 3 is a graph showing a power density at each run when
conductive SiC substrates selected without a selection criterion
are used and when conductive SiC substrates selected in accordance
with a selection criterion are used;
[0020] FIGS. 4A, 4B and 4C show a table showing resistivities of
green conductive SiC substrates, a graph showing absorption
coefficients dependent upon resistivities, and a graph showing a
relation between a resistivity and a surface temperature during
crystal growth, respectively;
[0021] FIGS. 5A and 5B are graphs showing a trap concentration and
a sheet resistivity of a grown layer dependent upon a resistivity
of a conductive SiC substrate;
[0022] FIGS. 6A, 6B and 6C are graphs showing I-V characteristics
of GaN-HEMTs formed on conductive SiC substrates and on a
semi-insulating SiC substrate;
[0023] FIG. 7 is a graph showing regions of resistivity as the
selection criterion for conductive SiC substrates derived from
power density of HEMTs.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0024] A semi-insulating SiC substrate is very expensive,
presenting a possibility that this high cost may hinder prevail of
GaN-HEMTs. A conductive SiC substrate is available less expensively
than a semi-insulating SiC substrate. If GaN series compound
semiconductor devices having good characteristics can be
manufactured using conductive SiC substrates, this contributes to
prevail of GaN-HEMTs.
[0025] If a conductive SiC substrate is used, a GaN series compound
semiconductor device having a high thermal conductivity of SiC can
be manufactured less expensively. However, using a conductive
substrate increases parasitic capacitance of a semiconductor device
and hinders high speed operation. Parasitic capacitance can be
reduced by intervening a thick semi-insulating or high resistivity
compound semiconductor layer between a conductive substrate and
constituent elements of a semiconductor device.
[0026] FIG. 1A is a schematic cross sectional view showing the
structure of a GaN-HEMT device. A semi-insulating or high
resistivity AlN buffer layer 103 is grown thick on a (0001) single
crystal conductive SiC substrate 101. It is known that metal
organic chemical vapor deposition (MOCVD) and hydride vapor phase
epitaxy (VPE) are typically used as a crystal growth method of
growing GaN series compound semiconductor.
[0027] FIGS. 2A and 2B schematically show the structures of a
hydride VPE system and an MOCVD system.
[0028] FIG. 2A is a schematic cross sectional view showing the
structure of a hydride VPE system. A high frequency coil 31 for
induction heating is wound around a quartz reaction tube 30, and a
carbon susceptor 32 for placing thereon a substrate 1 is disposed
in the quartz reaction tube. Two gas introducing pipes 34 and 35
are connected to the upstream end of the reaction tube 30 shown
left in FIG. 2A, and a gas exhaust pipe 36 is connected to the
downstream end of the reaction tube 30. A boat 38 is disposed in
the reaction tube 30 at an upstream position of the susceptor 32,
and a source 39 of a group III element for a compound to be grown
is accommodated in the boat. For example, the source is Al if AlN
is to be grown, and Ga if GaN is to be grown. Ammonia NH.sub.3 as N
source gas is introduced via the gas introducing pipe 34, and HCl
is introduced via the gas introducing pipe 35. HCl reacts with the
group III element source 39 in the boat 38 to form group III
element chloride AlCl. Source gases AlCl and NH.sub.3 are
transported to the substrate and allow reaction on the substrate
surface to grow AlN. Surplus gas is exhausted via the gas exhaust
pipe 36 to a detoxification tower.
[0029] FIG. 2B is a schematic cross sectional view showing the
structure of an MOCVD system. A high frequency coil 41 is disposed
outside a quartz reaction tube 40, and a carbon susceptor 42 for
placing thereon a substrate 1 is disposed in the reaction tube 40.
Two gas introducing pipes 44 and 45 are connected to the reaction
tube 40 on the upstream side to supply source gases for compound.
For example, NH.sub.3 as N source gas is introduced via the gas
introducing pipe 44, and organic group III element compound source
material such as trimethylaluminum or trimethylgallium as group III
element source gas is introduced via the gas introducing pipe 45.
Crystal growth progresses on the substrate 1, and surplus gas is
exhausted via the gas exhaust pipe 46 to a detoxification tower. If
MOCVD is to be performed in a low pressure atmosphere, the gas
exhaust pipe 46 is connected to a vacuum pump, and an exhaust port
of the vacuum pump is coupled to a detoxification tower.
[0030] MOCVD is a method having been used widely as a compound
semiconductor crystal growth method, and can obtain good
crystallinity. Various techniques for impurity doping and thickness
control have been established. However, a growth speed is 1
.mu.m/hour (H) at the most.
[0031] Hydride VPE uses chloride as a group III element source. A
growth speed is extremely high to the extent that a growth speed of
several tens .mu.m/hour is possible. A grown crystal layer has a
high possibility of containing chlorine (Cl) dependent upon the
source gas. For growing a compound semiconductor layer with a
thickness of the order of 10 .mu.m or more, a growth speed of MOCVD
is too slow, and hydride VPE capable of estblishing a high growth
speed is suitable.
[0032] For forming a GaN-HEMT on a conductive SiC substrate, it is
desirable to first grow a semi-insulating or high resistivity AlN
layer 103 with a thickness of 10 .mu.m or more, e.g., a thickness
of 20 .mu.m to 50 .mu.m, on a conductive SiC substrate by hydride
VPE. As a thick AlN layer is grown by hydride VPE, dislocation is
reduced and crystallinity can be improved. Thereafter, a HEMT
constituting lamination is grown by MOCVD.
[0033] As shown in FIG. 1A, an AlN layer 103 is grown to a
thickness of about 25 .mu.m on a (0001) plane single crystal
conductive SiC substrate 101 by hydride VPE. A hydride VPE system
has a structure as shown in FIG. 2A, and a group III element source
material in the boat 38 is Al. The conditions of hydride VPE are:
[0034] Pressure: normal pressure, [0035] Gas flow rate: HCl 100 ccm
(cubic centimeter per minute), [0036] NH.sub.3 10 LM (litter per
minute), [0037] Temperature: 1100.degree. C.
[0038] A resistivity of an AlN layer can be set extremely high,
e.g., higher than 1E5 (1.times.10.sup.5) .OMEGA.cm.
[0039] A HEMT structure lamination is grown on the AlN buffer layer
103 by MOCVD.
[0040] An MOCVD system having the structure shown in FIG. 2B is
used, and the conditions of MOCVD are, for example, as follows:
Source materials and flow rates: [0041] Trimethylgallium (TMG) 50
sccm (standard ccm), [0042] Trimethylaluminum (TMA) (if necessary)
5 sccm, [0043] Ammonia (NH.sub.3) 20 SLM (standard LM), [0044]
N-type impurity: silane (SiH.sub.4), [0045] P-type impurity:
biscyclopenta-dienyl-magnesium (Cp2Mg), [0046] Pressure: 100 torr,
[0047] Temperature: 1100.degree. C.
[0048] By supplying TMG and NH.sub.3 (and not supplying TMA), a GaN
layer 104 having a thickness of, e.g., 3 .mu.m, is grown on the AlN
buffer layer 103. This GaN layer 104 is a non-doped layer, and
forms a region of an active layer in which two-dimensional electron
gas transports.
[0049] After the GaN layer 104 is grown, supply of TMA as Al source
gas starts to grow a non-doped AlGaN layer 105 having a thickness
of, e.g., 5 nm, and in succession, silane (SiH.sub.4) as source gas
of n-type impurity is introduced to grow an n-type AlGaN layer 106
of 20 nm thick. A doping amount of Si impurity in the n-type AlGaN
layer 106 is, for example, about 4.times.10.sup.18 cm.sup.-3. The
non-doped AlGaN layer 105 serves as a spacer layer and isolates the
n-type AlGaN layer 106 from the active layer 104. The n-type AlGaN
layer 106 serves as an electron supply layer to supply electron
carriers to the active layer 104. In this manner, the basic
structure of HEMT is formed.
[0050] Further, stopping supply of TMA, an n-type GaN layer 107 as
a protective layer is grown on the n-type AlGaN layer 106. A doping
amount of Si is, for example, about 5.times.10.sup.18 cm.sup.-3.
The n-type AlGaN layer 106 is therefore covered with the n-type GaN
layer 107 having a lower resistivity.
[0051] The substrate is taken out from the MOCVD system, an
isolation region is formed by recess etching using BCl.sub.3, and
thereafter an SiN film 108 is deposited by plasma CVD. Openings for
source/drain contact regions are formed through the SiN film, and
the n-type GaN layer is etched and removed by dry etching using
Cl.sub.2.
[0052] For example, a Ta layer of 10 nm thick is formed, an Al
layer of 300 nm thick is formed on the Ta layer, and they are
patterned to form a source electrode S and a drain electrode D.
These electrodes can be patterned, for example, by lift-off method.
Annealing is performed at 600.degree. C. to form ohmic contacts.
The SiN film 108 in a gate contact region is etched, and for
example, an Ni layer of 20 nm thick and an Au layer of 400 nm thick
are formed and patterned to form a gate electrode. This electrode
can be formed, for example, also by lift-off method. The gate
electrode forms a Schottky contact.
[0053] By growing the semi-insulating AlN layer 103 thick, at least
to a thickness of 10 .mu.m, it can be expected that parasitic
capacitance of HEMT can be suppressed. The AlN layer also has the
effects of reducing dislocation and improving crystallinity with
the growth of the AlN layer. In the context of this point, it is
particularly preferable to grow the AlN layer not thinner than 20
.mu.m. Although an upper limit of thickness is determined by a warp
and crack of a wafer, an upper limit of, e.g., 50 .mu.m, may be
selected. A current collapse phenomenon of a change in an
on-resistance during operation can be avoided by forming the GaN
protective layer and SiN layer on and above the n-type AlGaN
electron supply layer.
[0054] SiC has a high thermal conductivity and is expected to
realize high breakdown voltage and high speed operation. However,
GaN-HEMT devices formed actually by growing a GaN series compound
semiconductor crystal layers on a conductive SiC substrate had no
reproductivity.
[0055] FIG. 3 shows measurement results of a power density per unit
gate width at each experimental run. A curve c0 shows experiment
results. There was a large variation and the devices cannot be
brought into practical use. The present inventors have studied the
reason why expected performance was not able to be realized.
[0056] A semi-insulating SiC substrate is transparent, whereas a
conductive SiC substrate presents various coloring. This coloring
is caused by various impurities contained in the substrate. A black
substrate attributable to B shows p-type conductivity, a green
substrate attributable to N shows n-type conductivity, and a blue
substrate attributable to Al shows p-type conductivity. Color of a
conductive SiC substrate is governed by concentrations of
impurities and energy levels, and the color becomes stronger as the
resistivity is lower.
[0057] FIGS. 4A and 4B show some examples of a green substrate.
FIG. 4A is a table showing examples of resistivity. Samples S1 have
a resistivity around 0.12 ohm-cm, samples S2 has a resistivity
around 0.08 ohm-cm, samples S3 have a resistivity around 0.04-0.06
ohm-cm, and samples S4 have a resistivity aound 0.01-0.02 ohm-cm.
FIG. 4B is a graph showing optical absorption spectra of examples
S1-S4 of the green substrate. The abscissa represents a wavelength
in the unit of .mu.m, and the ordinate represents an absorption
coefficient in the unit of cm.sup.-1. Spectra identified with
symbols S1-54 correspond to samples S1-S4 shown in FIG. 4A. An
absorption band having a peak near a wavelength of 0.6 .mu.m is
observed. It can be understood that the lower a resistivity, the
higher a peak absorption coefficient is. In spectra S4 and S3, the
peak absorption coefficient is more than twice the absorption
coefficient at 0.5 .mu.m. In spectra S2 and S1, the peak absorption
coefficient is at most around 30 cm.sup.-1, and is less than twice
the absorption coefficient at 0.5 .mu.m.
[0058] A GaN series compound semiconductor layer is usually grown
at a temperature of 1000.degree. C. or higher, e.g., in an
incandescent state at 1100.degree. C. Heat source is radiation heat
from the carbon susceptor 32, or 42 shown in FIG. 2A, or 2B. It can
be considered that if a conductive SiC substrate shows absorption
near at a wavelength of, e.g., 0.6 .mu.m, at least a portion of
radiation heat from the carbon susceptor will be absorbed in the
SiC substrate. In this case, it can therefore be considered that a
temperature of the uppermost surface of the substrate during
crystal growth may be lowered.
[0059] FIG. 4C is a graph showing measurement results of an actual
temperature of a crystal growth surface at each resistivity of the
green SiC substrate, under the setting of crystal growth at a
surface temperature of 1100.degree. C. An abscissa represents a
resistivity of the SiC substrate, and the ordinate represents a
temperature at the uppermost growth surface. It clearly shows that
as the resistivity of a substrate is lowed, the surface temperature
is lowed. If the amount of the lowered temperature is within
10.degree. C., countermeasure could be taken by finely adjusting
the growth temperature. However, if the temperature lowering is
more than 10.degree. C., crystal uniformity and good device
characteristics could not be obtained even when the temperature is
forced to be raised. This may be ascribed to that the conditions of
crystal growth in a growth system change greatly. Namely, a
presently usable range is a range indicated by hatching in the
graph, i.e., a resistivity range of 0.08 .OMEGA.cm or higher.
[0060] An epitaxial layer was grown on each green SiC substrate
having a different resistivity, and a trap concentration was
measured. A HEMT structure was formed and a sheet resistivity was
measured.
[0061] FIGS. 5A and 5B are graphs showing relation between a trap
concentration and sheet resistivity of respective SiC substrates
having different resistivities. FIG. 5A indicates that as a
resistivity of an SiC substrate lowers, a trap concentration
increases. It is considered that a trap concentration increases if
carbon is captured in crystal or point defects increase. It also
indicates that trap formation cannot be suppressed even if
temperature setting is adjusted.
[0062] FIG. 5B indicates that as resistivity of the SiC substrate
lowers, sheet resistivity increases. It is considered that as traps
increase, two-dimensional electron gas reduces and a sheet
resistivity increases.
[0063] These results also indicate that good device characteristics
can be obtained if a resistivity of a green SiC substrate is not
lower than 0.08 .OMEGA.cm.
[0064] FIGS. 6A, 6B and 6C show I-V characteristics of GaN-HEMTs
formed on green SiC substrates having resistivities of 0.06
.OMEGA.cm, 0.08 .OMEGA.cm and semi-insulating (resistivity larger
than 1E5 .OMEGA.cm). For a substrate having resistivity of 0.08
.OMEGA.cm, growth setting temperature was 1100.degree. C. For a
substrate having a resistivity of 0.06 .OMEGA.cm, growth setting
temperature was further raised from 1100.degree. C. to 1120.degree.
C. to adjust a surface temperatures. The SiC substrate having the
resistivity of 0.08 .OMEGA.cm showed I-V characteristics
approximately similar to those of the semi-insulating substrate. It
is clear that a drain current reduces for the substrate having
resistivity of 0.06 .OMEGA.cm.
[0065] FIG. 7 shows results of on-wafer power measurement on each
device having a gate width of 1 mm. Power density equivalent to a
range of the semi-insulating SiC substrate could be obtained for
green substrates having resistivity of 0.08 .OMEGA.cm or higher,
for blue substrates having resistivity of 10 .OMEGA.cm or higher,
and for black substrates having resistivity of 1E3 .OMEGA.cm or
higher.
[0066] Resistivity of 1E5 .OMEGA.cm or higher is in a
semi-insulating region, and no cost merit is enjoyed. It can
therefore be said that an upper resistivity limit of a conductive
SiC substrate in each color is 1E5 .OMEGA.cm.
[0067] FIG. 1B is a table collectively showing color, resistivity
range, and peak wavelength of optical absorption band, of usable
conductive substrate. There is a difference between optical
absorption peak wavelengths corresponding to respective colors.
Resistivity ranges establishing selection criterion are also
different for the respective colors. For green conductive SiC
substrate, conductive substrates having resistivity of 0.08
.OMEGA.cm to 1E5 .OMEGA.cm may be selected. For blue conductive SiC
substrates, conductive substrates having resistivity of 10
.OMEGA.cm to 1E5 .OMEGA.cm may be selected. For black conductive
SiC substrates, conductive substrates having resistivity of 1E3
.OMEGA.cm to 1E5 .OMEGA.cm may be selected.
[0068] A curve c1 shown in FIG. 3 indicates a power concentration
at each run when conductive SiC substrates are selected in
accordance with the above-described selection criteria and
thereafter a GaN-HEMT structure shown in FIG. 1A is formed on each
substrate. It can be seen that variation reduces considerably and
uniform characteristics are obtained. In this manner, it is
possible to manufacture GaN-HEMT at low cost which is capable of
high voltage and high speed operation, when a conductive SiC
substrate is selected in accordance with the selection criteria
shown in FIG. 1B, the selected substrate is used as the conductive
SiC substrate 101 shown in FIG. 1A, and a GaN-HEMT structure is
formed thereon.
[0069] Although manufacture of GaN-HEMT has been described by way
of example, GaN series compound semiconductor of Al.sub.xIn.sub.y
Ga.sub.i-x-yN (0.ltoreq.x.ltoreq.1.0, 0.ltoreq.y.ltoreq.1.0)
including AlN, GaN and AlGaN will be possible to be grown on a
conductive single crystal SiC substrate. Products of GaN series
compound semiconductor wafers may also be provided such as a wafer
with a grown AlN buffer layer, and a wafer with a lamination of a
GaN layer/a non-doped AlGaN layer/n-type AlGaN layer/n-type GaN
layer or part of these layers grown on an AlN buffer layer. These
semiconductor device and semiconductor wafer are collectively
called herein a semiconductor structure.
[0070] Although manufacture of GaN-HEMT has been described by way
of example, electronic devices to be manufactured are not limited
to HEMT, but other electronic devices and optical devices may also
be manufactured.
[0071] It will be apparent for those skilled in the art that
various modifications, improvements, substitutions, combinations
and the like are possible.
[0072] It is possible to provide GaN series compound semiconductor
devices and wafers therefor.
* * * * *