U.S. patent application number 12/781744 was filed with the patent office on 2011-11-17 for configurable coding system and method of multiple eccs.
This patent application is currently assigned to SKYMEDI CORPORATION. Invention is credited to CHUANG CHENG, Yu-Shuen TANG.
Application Number | 20110283164 12/781744 |
Document ID | / |
Family ID | 44912800 |
Filed Date | 2011-11-17 |
United States Patent
Application |
20110283164 |
Kind Code |
A1 |
TANG; Yu-Shuen ; et
al. |
November 17, 2011 |
CONFIGURABLE CODING SYSTEM AND METHOD OF MULTIPLE ECCS
Abstract
A configurable coding system and method of multiple error
correcting codes (ECCs) for a memory device or devices are
disclosed. The system includes an ECC codec that selectively
performs different error corrections with different parameters. The
system also includes means for providing a selected parameter to
the ECC codec for initializing the ECC codec. The parameter used
for initializing the ECC codec is an error-free parameter.
Inventors: |
TANG; Yu-Shuen; (HSINCHU,
TW) ; CHENG; CHUANG; (HSINCHU, TW) |
Assignee: |
SKYMEDI CORPORATION
HSINCHU
TW
|
Family ID: |
44912800 |
Appl. No.: |
12/781744 |
Filed: |
May 17, 2010 |
Current U.S.
Class: |
714/773 ;
714/752; 714/763; 714/E11.034 |
Current CPC
Class: |
H03M 13/3707 20130101;
H03M 13/6511 20130101; G06F 11/1016 20130101; G06F 11/10 20130101;
H03M 13/1105 20130101; H03M 13/353 20130101; H03M 13/6516 20130101;
H03M 13/6513 20130101; H03M 13/1102 20130101; H03M 13/152
20130101 |
Class at
Publication: |
714/773 ;
714/752; 714/763; 714/E11.034 |
International
Class: |
H03M 13/05 20060101
H03M013/05; G06F 11/10 20060101 G06F011/10 |
Claims
1. A configurable coding system of multiple error correcting codes
(ECCs), comprising: an ECC codec configured to selectively perform
different error corrections with different parameters; and means
for providing a selected parameter to the ECC codec for
initializing the ECC codec; wherein the parameter used for
initializing the ECC codec is an error-free parameter.
2. The system of claim 1, wherein the ECC codec comprises an
encoder, a decoder or their combination.
3. The system of claim 1, wherein the ECC codec performs error
correction for the data of at least one page of a non-volatile
memory, the data of at least one block of a non-volatile memory,
the data of at least one non-volatile memory or their
combination.
4. The system of claim 3, wherein the non-volatile memory is a
flash memory.
5. The system of claim 1, wherein said means comprises: at least
one plurality of error-free storage device configured to store the
error-free parameters respectively, wherein the selected error-free
parameter is loaded from the storage device to the ECC codec before
performing the error correction.
6. The system of claim 5, wherein the storage device is a static
random access memory (SRAM) or a read only memory (ROM).
7. The system of claim 1, wherein said means comprises: an external
memory device configured to store the different parameters; and a
supplementary codec configured to select and load one of the stored
parameters from the external memory device; wherein the
supplementary codec corrects the loaded parameter based on a
built-in parameter, thereby generating the error-free parameter to
be provided to the ECC codec.
8. The system of claim 7, wherein the external memory device is a
non-volatile memory.
9. The system of claim 1, wherein said means comprises: an
error-free storage device configured to store an error-free fixed
parameter to be loaded to the ECC codec to initialize the ECC
codec; and an external memory device configured to store the
different parameters; wherein the ECC codec selects and loads one
of the stored parameters from the external memory device, and
corrects the loaded parameter based on the fixed parameter, thereby
generating the error-free parameter.
10. The system of claim 9, wherein the storage device is a static
random access memory (SRAM) or a read only memory (ROM), and the
external memory device is a non-volatile memory.
11. A configurable coding method of multiple error correcting codes
(ECCs), comprising: storing a plurality of different parameters;
providing a selected parameter to an ECC codec for initializing the
ECC codec; and selectively performing an error correction based on
the selected parameter; wherein the parameter used for initializing
the ECC codec is an error-free parameter.
12. The method of claim 11, wherein the ECC codec performs
encoding, decoding or their combination.
13. The method of claim 11, wherein the error correction is
performed for the data of at least one page of a non-volatile
memory, the data of at least one block of a non-volatile memory,
the data of at least one non-volatile memory or their
combination.
14. The method of claim 13, wherein the non-volatile memory is a
flash memory.
15. The method of claim 11, wherein the plurality of different
parameters are stored in at least one error-free storage devices,
wherein the selected error-free parameter is loaded from the
storage device to the ECC codec before performing the error
correction.
16. The method of claim 15, wherein the storage device is a static
random access memory (SRAM) or a read only memory (ROM).
17. The method of claim 11, wherein the plurality of different
parameters are stored in an external memory device, and a
supplementary codec is configured to select and load one of the
stored parameters from the external memory device; wherein the
supplementary codec corrects the loaded parameter based on a
built-in parameter, thereby generating the error-free parameter to
be provided to the ECC codec.
18. The method of claim 17, wherein the external memory device is a
non-volatile memory.
19. The method of claim 11, wherein the plurality of different
parameters are stored in an external memory device, and an
error-free storage device is configured to store an error-free
fixed parameter to be loaded to the ECC codec to initialize the ECC
codec; wherein the ECC codec selects and loads one of the stored
parameters from the external memory device, and corrects the loaded
parameter based on the fixed parameter, thereby generating the
error-free parameter.
20. The method of claim 19, wherein the storage device is a static
random access memory (SRAM) or a read only memory (ROM), and the
external memory device is a non-volatile memory.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention generally relates to coding, and more
particularly to a configurable coding system and method of multiple
error correcting codes (ECCs) for a memory device or devices.
[0003] 2. Description of Related Art
[0004] The encoder/decoder or codec usually accompanies a
non-volatile memory device such as a flash memory, which is
error-prone, in order to correct error occurred during the memory
access. The flash memory has evolved into many different types with
varieties of information lengths and parity lengths. In some
applications, there is a need for a flash controller to support
different types of flash memory in the same chip, such that the
data correctness may be assured no matter what type of flash is
involved. In other words, the codec has to be configurable for
multiple error correcting codes (ECCs).
[0005] However, multiple ECCs leads to multiple parameters for
initializing the codec, while some parameters may be quite large in
size. This may enlarge the circuit area of the codec or the flash
controller. Further, storing the parameters in the codec or the
controller may make the circuit design inflexible.
[0006] For the reason that conventional encoder/decoder could not
effectively and economically provide multiple ECCs for the flash
memory, a need has arisen to propose a novel coding system and
method for relieving the codec of the burden of storing a large
amount of parameters without incurring substantive cost.
SUMMARY OF THE INVENTION
[0007] In view of the foregoing, it is an object of the embodiment
of the present invention to provide a configurable coding system
and method of multiple ECCs for a memory device or devices in order
to provide error-free parameters effectively and economically.
[0008] According to a first embodiment, an ECC codec is configured
to selectively perform different error corrections with different
parameters. At least one error-free storage device is configured to
store error-free parameters, wherein a selected error-free
parameter is loaded from the storage device to the ECC codec for
initializing the ECC codec.
[0009] According to a second embodiment, an ECC codec is configured
to selectively perform different error corrections with different
parameters. An external memory device is configured to store the
different parameters. A supplementary codec is configured to select
and load one of the stored parameters from the external memory
device, and then corrects the loaded parameter based on a built-in
parameter, thereby generating an error-free parameter to be
provided to the ECC codec for initializing the ECC codec.
[0010] According to a third embodiment, an ECC codec is configured
to selectively perform different error corrections with different
parameters. An error-free storage device is configured to store an
error-free fixed parameter to be loaded to the ECC codec to
initialize the ECC codec. An external memory device is configured
to store the different parameters. The ECC codec selects and loads
one of the stored parameters from the external memory device, and
corrects the loaded parameter based on the fixed parameter, thereby
generating an error-free parameter.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1A shows a block diagram of a configurable codec of
multiple error correcting codes (ECCs) for memory devices according
to one embodiment of the present invention;
[0012] FIG. 1B shows a block diagram of a configurable codec of
multiple ECCs for a memory device according to an alternative
embodiment to FIG. 1A;
[0013] FIG. 2A shows a block diagram of a configurable coding
system of multiple ECCs for memory devices according to a first
specific embodiment of the present invention;
[0014] FIG. 2B shows a flow diagram of a configurable coding method
of multiple ECCs for memory devices according to the first specific
embodiment;
[0015] FIG. 2C shows a block diagram of a configurable coding
system of multiple ECCs for memory devices according to an
alternative embodiment to the first specific embodiment of FIG.
2A;
[0016] FIG. 2D shows a flow diagram of a configurable coding method
of multiple ECCs for a memory device or devices according to the
alternative embodiment of FIG. 2C;
[0017] FIG. 3A shows a block diagram of a configurable coding
system of multiple ECCs for memory devices according to a second
specific embodiment of the present invention;
[0018] FIG. 3B shows a flow diagram of a configurable coding method
of multiple ECCs for memory devices according to the second
specific embodiment;
[0019] FIG. 4A shows a block diagram of a configurable coding
system of multiple ECCs for memory devices according to a third
specific embodiment of the present invention; and
[0020] FIG. 4B shows a flow diagram of a configurable coding method
of multiple ECCs for memory devices according to the third specific
embodiment.
DETAILED DESCRIPTION OF THE INVENTION
[0021] FIG. 1A shows a block diagram of a configurable codec 10 of
multiple error correcting codes (ECCs) for memory devices 12a-12n
according to one embodiment of the present invention. In the
embodiment, the codec 10 is configurable for correcting error(s)
using one of the multiple ECCs. For example, the codec 10 may be
switched to the first ECC for the first memory device 12a at one
time, and the same codec 10 may then be switched to the second ECC
for the second memory device 12b at another time. The codec 10 may
be a part of a controller 1, or may be separate from the controller
1. The controller 1 or the codec 10 may be further controlled, for
example, by a computer 14. The memory devices 12a-12n, in the
embodiment, may be error-prone memory devices such as flash memory
devices that rely on ECC to correct bits that fail during normal
device operation.
[0022] In the embodiment, the codec 10 primarily includes an
encoder 100 and/or a decoder 102. In other words, the codec 10 may
include both the encoder 100 and the decoder 102, or may include
only the encoder 100, or may include only the decoder 102.
[0023] FIG. 1B shows a block diagram of a configurable codec 10 of
multiple ECCs for a memory device 12 according to an alternative
embodiment to FIG. 1A. In the embodiment, the memory device 12
comprises an array of non-volatile memory cells divided into a
plurality of blocks, each of which contains a plurality of pages.
The codec 10 may be configured to use different ECCs to correct
error(s) of corresponding pages (or blocks) respectively.
[0024] FIG. 2A shows a block diagram of a configurable coding
system 20 of multiple ECCs for a memory device or devices such as
non-volatile memories (22a-22n) (e.g., flash memory) according to a
first specific embodiment of the present invention. FIG. 2B shows a
flow diagram of a configurable coding method of multiple ECCs for
memory devices according to the first specific embodiment.
[0025] In the embodiment, the coding system 20 includes an ECC
codec 200 that is configurable of performing different error
corrections for the distinct non-volatile memories (22a-22n). The
coding system 20 further includes a number of error-free storage
devices SD1 to SDn that are utilized to store parameters of
different ECCs respectively, thereby providing error-free
parameter(s) to the ECC codec 200. Each of the error-free storage
devices SD1-SDn, in the embodiment, may be a static random access
memory (SRAM) or a read only memory (ROM). The stored parameter(s)
in each error-free storage device (SD1, SD2 . . . or SDn) are
needed for initializing the ECC codec 200 or configuring status of
the ECC codec 200 with respect to the corresponding error
correction. In the specification, the error-free storage device has
error probability substantially less than the error probability of
an ECC codec. In other words, the probability of occurring error in
the error-free storage device may be neglected in a practical
application.
[0026] In step 201, parameter(s) are stored in the storage devices
SD1-SDn. For example, the parameter(s) may be stored in the
storages devices SD1-SDn such as ROMs before the coding system 20
is shipped out of a factory. Alternatively, the parameter(s) may be
stored in the storage device SD1-SDn such as SRAMs by the computer
14 (FIG. 1A) at the user's end. Subsequently, in step 202, one of
the configurable ECC codes is selected, for example, by a user.
Next, parameter(s) needed for initializing the selected ECC in the
ECC codec 200 are loaded from a corresponding storage device (SD1,
SD2 . . . or SDn) to the ECC codec 200 in step 203a-203n. After
finishing the initialization, in step 204, the ECC codec 200 is
prepared to begin encoding and/or decoding for the data of the
corresponding non-volatile memory (22a, 22b . . . or 22n) or the
corresponding pages (or blocks) of the non-volatile memory (22a,
22b . . . or 22n). For example, if the second ECC (ECC2) is
selected, parameter(s) are then loaded from the second storage
device SD2, and the ECC codec 200 is then prepared to begin
encoding and/or decoding for the data of the second non-volatile
memory 22b. Another example, one of the ECCs is selected,
parameter(s) are then loaded from one of the corresponding storage
device (SD1, SD2 . . . or SDn), and the ECC codec 200 is then
prepared to begin encoding and/or decoding for the data of the at
least one page (or block) of the non-volatile memory (22a, 22b . .
. or 22n).
[0027] According to the first embodiment, the ECC code of the codec
200 may be configured or changed simply by replacing previous
parameter(s) with new parameter(s) loaded from one of the storage
devices SD1-SDn. The ECC codec 200 accordingly will not bear the
burden of storing a large amount of parameters in the ECC codec 200
itself.
[0028] FIG. 2C shows a block diagram of a configurable coding
system 20B of multiple ECCs for a memory device or devices
according to an alternative embodiment to the first specific
embodiment of FIG. 2A. FIG. 2D shows a flow diagram of a
configurable coding method of multiple ECCs for a memory device or
devices according to the alternative embodiment of FIG. 2C.
[0029] In the embodiment, the coding system 20B is similar to the
coding system 20, except that one error-free storage device SD is
utilized to store parameters of different ECCs. In step 201B,
parameters of multiple ECC codes are stored in the storage device
SD. For example, parameters corresponding to different ECCs are
stored at different addresses in the storage device SD.
Subsequently, in step 202B, one of the configurable ECCs is
selected. Next, in steps 203Ba-203Bn, parameter(s) needed for
initializing the selected ECC in the ECC codec 200 are loaded from
the storage device SD, for example, by addressing. After finishing
the initialization, in step 204B, the ECC codec 200 is prepared to
begin encoding and/or decoding for the data of the corresponding
non-volatile memory (22a, 22b . . . or 22n) or the data of the
corresponding pages (or blocks) of the non-volatile memory(22a, 22b
. . . or 22n).
[0030] FIG. 3A shows a block diagram of a configurable coding
system 30 of multiple ECCs for a memory device or devices such as
non-volatile memories (22a-22n) (e.g., flash memory) according to a
second specific embodiment of the present invention. FIG. 3B shows
a flow diagram of a configurable coding method of multiple ECCs for
memory devices according to the second specific embodiment.
[0031] In the embodiment, the coding system 30 includes a first ECC
codec 300A that is configurable of performing different error
corrections for the distinct non-volatile memories (22a-22n). The
coding system 30 further includes a second (or supplementary) ECC
codec 300B that is utilized to load parameter(s), needed for
initializing the first ECC codec 300A, from an (error-prone)
external memory device (e.g., a non-volatile memory). The
non-volatile memory that stores the parameters may be one of the
aforementioned non-volatile memories (22a-22n), or may be another
separate non-volatile memory.
[0032] It is noted that the second ECC codec 300B itself is capable
of correcting error of the loaded parameter(s) without need of
initialization. For example, the second ECC codec 300B has built-in
parameter(s), and is thus capable of performing error correction.
Subsequently, the second ECC codec 300B outputs corrected or
error-free parameter(s) to the first ECC codec 300A.
[0033] In step 301, parameter(s) are stored (or updated) in one or
more (error-prone) non-volatile memories (22a, 22b . . . 22n)
beforehand. Subsequently, in step 302, an associated portion of the
stored parameters is loaded, for example, by a user, from the
non-volatile memory to the second ECC codec 300B. Next, in step
303, the loaded parameter(s) is then subjected to error correction
by the second ECC codec 300B. The corrected parameter(s) are then
forwarded to facilitate the associated initialization of the first
ECC codec 300A in step 304. After finishing the initialization, in
step 305, the first ECC codec 300A is prepared to begin encoding
and/or decoding for the data of the corresponding non-volatile
memory (22a, 22b . . . or 22n). For example, if the loaded
parameter(s) are associated with the second ECC (ECC2), the first
ECC codec 300A is then prepared to begin encoding and/or decoding
for the data of the second non-volatile memory 22b.
[0034] This second embodiment maintains the advantage of the first
embodiment: the ECC codec does not bear the burden of storing a
large amount of parameters. Compared to the first embodiment, as
the parameters of the various ECC codes are stored in a
non-volatile memory, such as an extra space of the non-volatile
memory, in this second embodiment, it is noted that the cost of
storing the parameters in the non-volatile memory is much smaller
than storing the parameters in the error-free storage device(s).
Moreover, the second embodiment has two ECC codecs 300A and 300B to
be utilized. For example, the first ECC codec 300A may be a
low-density parity-check (LDPC) codec, and the second codec 300B
may be a BCH (named after Bose, Ray-Chaudhuri and Hocquenghem)
codec.
[0035] FIG. 4A shows a block diagram of a configurable coding
system 40 of multiple ECCs for a memory device or devices such as
non-volatile memories (22a-22n) (e.g., flash memory) according to a
third specific embodiment of the present invention. FIG. 4B shows a
flow diagram of a configurable coding method of multiple ECCs for
memory devices according to the third specific embodiment.
[0036] In the embodiment, the coding system 40 includes an ECC
codec 400A that is configurable of performing different error
corrections for the distinct non-volatile memories (22a-22n). The
coding system 40 further includes a storage device 400B such as
SRAM or ROM that is utilized to store (error-free) fixed
parameter(s). Based on the fixed parameter(s), the ECC codec 400A
may load and correct parameter(s), needed for initializing the ECC
codec 400A, from an (error-prone) external memory device (e.g., a
non-volatile memory). It is noted that the ECC codec 400A is
capable of correcting error of the loaded parameter(s) with the
fixed parameter(s). The non-volatile memory that stores the
parameters may be one of the aforementioned non-volatile memories
(22a-22n), or may be another separate non-volatile memory.
[0037] In step 401, parameter(s) are stored (or updated) in one or
more (error-prone) non-volatile memories (22a, 22b . . . 22n)
beforehand. Subsequently, in step 402, the ECC codec 400A is
initialized with the fixed parameter(s). Next, in step 403, an
associated portion of the stored parameters is loaded, for example,
by a user, from the non-volatile memory to the ECC codec 400A. In
step 404, the loaded parameter(s) is then subjected to error
correction by the ECC codec 400A based on the fixed parameter(s).
After initializing the ECC codec 400A by the corrected
parameter(s), in step 405, the ECC codec 400A is prepared to begin
encoding and/or decoding for data of the corresponding non-volatile
memory (22a, 22b . . . or 22n). For example, if the loaded
parameter(s) are associated with the second ECC (ECC2), the ECC
codec 400A is then prepared to begin encoding and/or decoding for
the data of the second non-volatile memory 22b.
[0038] This third embodiment maintains the advantage of the first
embodiment: the ECC codec does not bear the burden of storing a
large amount of parameters. In addition, this third embodiment
maintains the advantage of the second embodiment: cost of storing
the parameters in the non-volatile memory is much smaller than
storing the parameters in the error-free storage device(s).
[0039] With respect to the embodiments described above, in an
exemplary embodiment, the LDPC code is selected to perform
encoding/decoding for the data of the corresponding non-volatile
memory. Specifically, a generating matrix is required for encoding
information, and a parity check matrix is required for decoding a
received signal. The parameters needed to initialize the encoder
pertinent to the generating matrix are pretty large for hardware
implementation. Similarly, the parameters needed to initialize the
decoder pertinent to the parity check matrix are also pretty large.
To support multiple ECCs, the system has to store different matrix
for each LDPC ECC. According to the second and the third
embodiments, the matrixes may now be loaded from a non-volatile
memory, thereby making the system design more flexible and reducing
cost of the coding system.
[0040] Although specific embodiments have been illustrated and
described, it will be appreciated by those skilled in the art that
various modifications may be made without departing from the scope
of the present invention, which is intended to be limited solely by
the appended claims.
* * * * *