U.S. patent application number 13/097117 was filed with the patent office on 2011-10-27 for method for manufacturing a silicon wafer.
This patent application is currently assigned to SUMCO CORPORATION. Invention is credited to Hisashi Furuya, Kazuhiro HARADA, Yukio MUROI.
Application Number | 20110263126 13/097117 |
Document ID | / |
Family ID | 44814686 |
Filed Date | 2011-10-27 |
United States Patent
Application |
20110263126 |
Kind Code |
A1 |
HARADA; Kazuhiro ; et
al. |
October 27, 2011 |
METHOD FOR MANUFACTURING A SILICON WAFER
Abstract
Method for manufacturing a silicon wafer free of point defect
agglomerates by processes including adding pure carbon to raw
material of polycrystalline silicon, melting to become a molten
silicon liquid, pulling a single silicon crystal ingot comprising a
perfect domain [P] from the molten silicon liquid by controlling a
ratio of V/G (mm.sup.2/minute .degree. C.), lapping a silicon wafer
cut out from the ingot, beveling the silicon wafer, chemical
etching the beveled wafer so as to be removed damages of a surface
of the wafer, and mirror-polishing the etched wafer, and the pure
carbon is added to the raw material of polycrystalline silicon so
that a density of carbon in the ingot becomes 1.times.10.sup.15 to
5.times.10.sup.15 atoms/cm.sup.3.
Inventors: |
HARADA; Kazuhiro; (Tokyo,
JP) ; Furuya; Hisashi; (Tokyo, JP) ; MUROI;
Yukio; (Tokyo, JP) |
Assignee: |
SUMCO CORPORATION
Tokyo
JP
|
Family ID: |
44814686 |
Appl. No.: |
13/097117 |
Filed: |
April 29, 2011 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
09718659 |
Nov 22, 2000 |
|
|
|
13097117 |
|
|
|
|
Current U.S.
Class: |
438/691 ;
257/E21.215 |
Current CPC
Class: |
C30B 29/06 20130101;
C30B 35/007 20130101; C30B 15/203 20130101 |
Class at
Publication: |
438/691 ;
257/E21.215 |
International
Class: |
H01L 21/306 20060101
H01L021/306 |
Claims
1. A method for manufacturing a silicon wafer being free of point
defect agglomerates comprising; adding pure carbon to raw material
of polycrystalline silicon, melting the raw material to become a
molten silicon liquid, pulling a single silicon crystal ingot
comprising perfect domain [P] from the molten silicon liquid by
controlling a ratio of V/G (mm.sup.2/minute lapping a silicon wafer
cut out from the ingot, beveling the silicon wafer, chemical
etching the beveled wafer so as to be removed damages of a surface
of the wafer, and mirror-polishing the etched wafer, wherein the
pure carbon is added to the raw material of polycrystalline silicon
so that a density of carbon in the ingot becomes 1.times.10.sup.15
to 5.times.10.sup.15 atoms/cm.sup.3, wherein the ingot is pulled by
controlling the ratio of V/G (mm.sup.2/minute .degree. C.) so as to
consist of both domains [P.sub.V] and [P.sub.I]. and so that
domain-[P.sub.V]/domain [P.sub.I] becomes about 1 in area ratio,
wherein the silicon wafer is manufactured by forming polysilicon
layer of 0.1 to 1.6 .mu.m in thickness on a back of the wafer,
wherein the manufactured wafer is a wafer in that the density of
BMD comes into a range of 10.sup.8 to 10.sup.11 BMDs/cm.sup.3 in
both the center and the vicinity of half the radius of the wafer at
a depth of 300 .mu.m from the surface of the wafer when the wafer
is heat-treated at 800.degree. C. in an oxygen atmosphere for 4
hours and then is heat-treated at 1000.degree. C. in an oxygen
atmosphere for 16 hours, wherein V means a pulling speed
(mm/minute), G means a temperature gradient (.degree. C./mm) in the
interface portion between the ingot and the molten silicon liquid,
wherein [I] means a domain where interstitial silicon point defects
exist dominantly in said silicon wafer, and [V] means a domain
where vacancy point defects exist dominantly, wherein [P] means a
perfect domain in which the density of interstitial silicon point
defect agglomerates or the density of vacancy point defect
agglomerates is not larger than 1.times.10.sup.3
agglomerates/cm.sup.3, wherein [P.sub.V] means a domain which is
adjacent to said domain [V] and belongs to said perfect domain [P]
and has a density of vacancy point defects that is smaller than the
minimum density of vacancy point defects capable of forming
oxidation induced stacking faults, and [P.sub.I] means a domain
which is adjacent to said domain [I] and belongs to said perfect
domain [P] and has a density of interstitial silicon point defects
that is less than the minimum density of interstitial silicon point
defects capable of forming interstitial-type large dislocations.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No.
09/718,659, filed Nov. 22, 2000, the disclosure of which is
incorporated by reference herein in its entirety.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a silicon wafer made of a
single crystal silicon ingot grown by the Czochralski method
(hereinafter, referred to as CZ method) and a method for
manufacturing the same wafer. And it relates more particularly to a
silicon wafer to be used for manufacturing a semiconductor device
such as an LSI and the like.
[0004] 2. Description of the Related Art
[0005] A semiconductor device such as an LSI and the like needs to
exhibit such excellent electric characteristics that a leakage
current is a little in a pn junction and an MOS transistor has a
high reliability in a gate oxide film. Crystal defects in a silicon
wafer to be a substrate and contamination caused by a metal element
in the wafer are mentioned as the causes deteriorating these
characteristics.
[0006] Above all among metal elements in a single crystal silicon,
an iron element is thought to have a bad influence and this iron
element is taken in by contamination from an environment or an
apparatus.
[0007] As a technique for capturing a metal element such as an iron
element from an operating domain of a silicon wafer, an intrinsic
gettering (IG) method and an extrinsic gettering (EG) method which
make a wafer itself have a gettering ability to capture a metal
element have been known up to now. And as a technique for removing
metal from the surface of a wafer to be an operating domain, an RCA
cleaning method which cleans a silicon wafer with an SC-1 solution
composed of hydrogen peroxide and ammonium hydroxide and then
cleans it with an SC-2 solution composed of hydrogen peroxide and
dilute hydrochloric acid is known.
[0008] In case that a large amount of metal element is mixed into a
single crystal silicon ingot grown by the CZ method, however, it is
necessary to more and more complicate or advance a technique for
removing or capturing the metal element from a silicon wafer.
[0009] On the other hand, in a process of manufacturing a
semiconductor integrated circuit in recent years, existence of a
microscopic defect of oxygen precipitation to be a nucleus of an
oxidation induced stacking fault (hereinafter, referred to as OSF)
or a crystal originated particle (hereinafter, referred to as COP)
or an interstitial-type large dislocation (hereinafter referred to
as L/D) is mentioned as a cause lowering the yield rate. The OSF is
made by a fact that a microscopic defect to be the nucleus of a
crystal is introduced when growing the crystal, is actualized in a
thermal oxidation process and the like when manufacturing a
semiconductor device, and causes a failure such as the increase of
leakage current in a manufactured device. And when a
mirror-polished silicon wafer is cleaned with a mixed solution of
ammonia and hydrogen peroxide, pits are formed on the surface of
the wafer and when the wafer is measured by a particle counter,
these pits are detected as original particles. Said pit is caused
by a crystal and is called a COP in order to distinguish it from an
original particle. The COP being a pit on the surface of a wafer
causes deterioration in electric characteristics such as time
dependent dielectric breakdown (TDDB), time zero dielectric
breakdown (TZDB) and the like of an oxide film. And existence of
COPs on the surface of a wafer makes a step in a wiring process of
a device and can cause breaking of wire. And it may cause leakage
and the like in an isolation part of a device and reduces the yield
rate of a product. Moreover, an L/D is called a dislocation cluster
or also called a dislocation pit for the reason that a pit appears
when a silicon wafer having this defect is immersed in a selective
etching solution having hydrogen fluoride as the chief ingredient.
The L/D also causes deterioration in electric characteristics such
as leakage characteristic, isolation characteristic and the like,
for example.
[0010] Due to the above-mentioned circumstances, it is necessary to
reduce OSF, COP and L/D from a silicon wafer to be used for
manufacturing a semiconductor integrated circuit.
[0011] A silicon wafer of no defect having no OSF, COP nor L/D is
disclosed in Japanese Patent Laid-Open Publication No. Hei 11-1393.
When assuming that a perfect domain in which there are no vacancy
point defect agglomerates nor interstitial silicon point defect
agglomerates in a single silicon crystal ingot is [P], this silicon
wafer of no defect is a silicon wafer cut out from an ingot
composed of a perfect domain [P]. A perfect domain [P] exists
between a domain [I] in which interstitial silicon point defects
exist dominantly and a domain [V] in which vacancy point defects
exist dominantly in a single silicon crystal ingot. When assuming
that the pulling speed of an ingot is V mm/minute and the
temperature gradient at the interface between a molten silicon
liquid and the ingot in the vertical direction is G .degree. C./mm,
a silicon wafer composed of such a perfect domain [P] is made by
determining the value of V/G mm.sup.2/(minute .degree. C.) so that
OSFs to appear in the shape of a ring in a thermal oxidation
process disappear in the center of the wafer.
[0012] On the other hand, it is required for a silicon wafer to
have no OSF, COP nor L/D and further to be 1 to 15 .OMEGA.cm in
resistivity so as to be compatible with an existing device process.
And some of semiconductor device manufacturers demand a silicon
wafer having the ability of gettering metal contamination generated
in a device process. When a wafer having an insufficient gettering
ability is contaminated by metal in a device process, a defective
operation of a device is caused by a junction leakage or a trap
state by a metal impurity and thereby the yield rate of the product
is lowered.
[0013] A silicon wafer cut out from an ingot composed of said
perfect domain [P] has ordinarily a resistivity of 1 to 15
.OMEGA.cm and does not have OSF, COP and L/D. However, in a wafer
being comparatively low in vacancy point defect density among
silicon wafers composed of said perfect domain [P], oxygen
precipitation does not always occur uniformly in the wafer in heat
treatment in a device process and thereby the wafer sometimes
cannot obtain a sufficient gettering effect.
[0014] And in case that the temperature gradient is constant, the
value of V/G for producing a silicon wafer composed of a perfect
domain [P] is in proportion to the pulling speed V of an ingot and
it is required to pull the ingot at a comparatively low speed
controlled within a narrow range, but it is not always technically
easy to meet securely this requirement and the productivity of such
an ingot also is not high.
SUMMARY OF THE INVENTION
[0015] A first object of the present invention is to provide a
silicon wafer which does not have defects caused by crystal and
which is low in the contamination degree by metal such as iron and
excellent in electric characteristics, and provide a method for
manufacturing the same.
[0016] A second object of the present invention is to provide a
silicon wafer which has little agglomerates of point defects even
if an ingot is pulled at a comparatively high speed and at a V/G
value within a wide range, makes it possible to manufacture a
semiconductor integrated circuit at a high yield rate and can be
compatible with an existing device process thanks to its
resistivity of 1 to 15 .OMEGA.cm and to provide a method for
manufacturing the same.
[0017] A third object of the present invention is to provide a
silicon wafer which can be adjusted so as to have a desired
resistivity and a method for manufacturing the same.
[0018] A fourth object of the present invention is to provide a
silicon wafer which is cut out from an ingot composed of a perfect
domain [P] and can obtain a uniform gettering effect over the whole
surface of the wafer by heat treatment in a device process and a
method for manufacturing the same.
[0019] A first aspect of the present invention is a silicon wafer
which is composed of a perfect domain in which, when assuming that
the lower limit of detection of interstitial silicon point defect
agglomerates or vacancy point defect agglomerates is
1.times.10.sup.3 agglomerates/cm.sup.3, the density of said point
defect agglomerates is not larger than said lower limit of
detection and which has the density of contaminant iron being not
larger than 2.times.10.sup.9atoms/cm.sup.3.
[0020] A silicon wafer according to the first aspect of the present
invention has no defect caused by crystal and the density of
contaminant iron being as low as 2.times.10.sup.9 atoms/cm.sup.3 or
less, and therefore has a little leakage current in a pn junction
and exhibits excellent electric characteristics such as a high
reliability with respect to a gate oxide film of an MOS transistor
and the like when a semiconductor device such as an LSI or the like
is formed out of said wafer.
[0021] A second aspect of the present invention is a silicon wafer
which, when assuming that the lower limit of detection of
interstitial silicon point defect agglomerates or vacancy point
defect agglomerates is 1.times.10.sup.3 agglomerates/cm.sup.3, has
the density of point defect agglomerates being not larger than said
lower limit of detection, is of p type in conduction type and has a
resistivity adjusted within a range of 1 to 15 .OMEGA.cm.
[0022] A silicon wafer according to the second aspect of the
present invention has little point defect agglomerates and
therefore makes it possible to manufacture a semiconductor
integrated circuit at a high yield rate. And since it has a
resistivity of 1 to 15 .OMEGA.cm, it can be compatible with an
existing device process.
[0023] A third aspect of the present invention is a method for
manufacturing a silicon wafer adjusted in resistivity from a single
crystal silicon ingot by making a molten silicon liquid obtained by
melting raw material silicon contain a p-type impurity and an
n-type impurity so that in said single crystal silicon ingot said
p-type impurity has a desired first density C.sub.1 and said n-type
impurity has a desired second density C.sub.2 being smaller than
said first density and by pulling said single crystal silicon ingot
from said molten silicon liquid.
[0024] According to a manufacturing method of the third aspect of
the present invention, since the second density C.sub.2 of an
n-type impurity is smaller than the first density C.sub.1 of a
p-type impurity, it is possible to manufacture a silicon wafer
which is of p type in conduction type and is adjusted in
resistivity.
[0025] A fourth aspect of the present invention is a silicon wafer
which is cut out from an ingot composed of a perfect domain [P] in
which, when assuming that the lower limit of detection of
interstitial silicon point defect agglomerates or vacancy point
defect agglomerates is 1.times.10.sup.3 agglomerates/cm.sup.3, the
density of said point defect agglomerates is not larger than said
lower limit of detection, said silicon wafer being composed of a
domain [P.sub.I] or both domains [P.sub.V] and [P.sub.I] and having
domain [P.sub.V]/domain [P.sub.I] less than 9 in area ratio. This
silicon wafer has a carbon density of 1.times.10.sup.15 to
5.times.10.sup.15 atoms/cm.sup.3 or has a polysilicon layer of 0.1
to 1.6 .mu.m in thickness formed on the back of the wafer.
[0026] A silicon wafer according to the fourth aspect of the
present invention can provide a uniform gettering effect having no
variation between the peripheral part and the middle part of the
wafer, thanks to a fact that oxygen precipitation is performed
uniformly the whole surface of a wafer, even if the wafer is
abundant in domain [P.sub.I], namely, more abundant in interstitial
silicon point defect than in vacancy point defect, by making the
wafer have a higher carbon density within said range than an
ordinary CZ wafer or have a polysilicon layer formed on the back of
the wafer and by heat-treating this wafer, for example, at
800.degree. C. for 4 hours and then at 1000.degree. C. for 16
hours.
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] FIG. 1 shows the relation between the V/G ratio and the
density of vacancy point defects or the density of interstitial
silicon point defects on the basis of Voronkov theory in the first
embodiment of the present invention.
[0028] FIG. 2 is a characteristic diagram showing variation in the
pulling speed for determining a desired pulling speed profile.
[0029] FIG. 3 is a characteristic diagram showing the pulling speed
profile for growing a wafer in which vacancy point defects are
dominant and a perfect wafer according to the first embodiment of
the present invention.
[0030] FIG. 4 is a schematic diagram of an X-ray tomography showing
a domain in which vacancy point defects are dominant, a domain in
which interstitial point defects are dominant and a perfect domain
of a reference ingot according to the first and the third
embodiment of the present invention.
[0031] FIG. 5 is a figure for explaining an ingot and a wafer in
which there are no vacancy point defect agglomerates nor
interstitial silicon point defect agglomerates of the present
invention.
[0032] FIG. 6 is a plan view of such a wafer.
[0033] FIG. 7 is a figure for explaining an ingot and a wafer which
have a domain where vacancy point defects are dominant in its
middle part and a domain of no defect between the domain where
vacancy point defects are dominant and the rim of the wafer.
[0034] FIG. 8 is a plan view of such a wafer.
[0035] FIG. 9A is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a low density according to the second embodiment
of the present invention.
[0036] FIG. 9B is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a high density according to the same.
[0037] FIG. 9C is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a high density so as to be adjusted to 1 to 15
.OMEGA.cm in resistivity according to the same.
[0038] FIG. 10A is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a low density according to the second embodiment
of the present invention.
[0039] FIG. 10B is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a high density according to the same.
[0040] FIG. 10C is a schematic diagram of an X-ray tomography
showing a single crystal silicon ingot pulled varying the V/G value
by doping boron at a high density so as to be adjusted to 1 to 15
.OMEGA.cm in resistivity according to the same.
[0041] FIG. 11 is a plan view of a silicon wafer where OSF
appears.
[0042] FIG. 12 shows variation in the value of D.sub.1/D.sub.0 when
keeping the V/G value constant and varying the density of
boron.
[0043] FIG. 13 shows the relation between the V/G ratio and the
density of vacancy point defects or the density of interstitial
silicon point defects on the basis of Voronkov theory in the third
embodiment of the present invention.
[0044] FIG. 14 shows the state where an OSF ring appears on a
silicon wafer W.sub.1 corresponding to position P.sub.1 of FIG.
4.
[0045] FIG. 15 shows the state where the resistivity varies
according to the length of an ingot of embodiment example 2 when
the ingot is pulled.
[0046] FIG. 16 shows the state where the resistivity varies
according to the length of an ingot of comparative example 2 when
the ingot is pulled.
DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION
[A] First Embodiment of the Invention
[0047] A silicon wafer according to first to third embodiments of
the present invention is made by pulling an ingot at a specified
pulling speed profile based upon Voronkov theory from a molten
silicon liquid inside a hot zone furnace by the CZ method and then
slicing this ingot.
[0048] A method for manufacturing a single crystal silicon ingot
containing less amount of metal element and having no defect
according to the first embodiment of the present invention is
described.
(1) Method for Manufacturing a Single Crystal Silicon Containing
Less Amount of Metal Element
[0049] A method for manufacturing a single crystal silicon ingot
according to the first embodiment of the present invention, said
ingot containing less amount of metal particularly iron, comprises
a process of cleaning block-shaped or grain-shaped polycrystalline
silicon to be raw material, a single crystal silicon pulling
process of melting the cleaned material silicon and growing a
single crystal silicon ingot from this molten silicon liquid at a
solidification ratio of 0.9 or less by means of the CZ method, a
process of making this pulled single crystal silicon into
block-shaped or grain-shaped single crystal silicon, a process of
cleaning the block-shaped or grain-shaped single crystal silicon,
and a single crystal silicon re-pulling process of remelting the
cleaned single crystal silicon and growing a single crystal silicon
at a solidification ratio of 0.9 or less. What is here called a
solidification ratio is the ratio of a grown single crystal silicon
to the material silicon of 100% in weight percent.
[0050] In order to clean polycrystalline silicon or single crystal
silicon to be raw material, a method is used which first cleans raw
material silicon in the shape of blocks or grains with a dissolved
ozone aqueous solution and then cleans it with hydrofluoric acid or
hydrofluoric and nitric acid (mixed acid of hydrofluoric acid and
nitric acid), and further cleans it with ultra pure water. It is
preferable to repeat one or more times the cleaning process using
hydrofluoric acid or hydrofluoric and nitric acid, or repeat one or
more times a cleaning process using a dissolved ozone aqueous
solution and a cleaning process using hydrofluoric acid or
hydrofluoric and nitric acid.
[0051] Since such raw material silicon as polycrystalline silicon
or single crystal silicon has an active property, it is sealed in a
bag made of plastic until it is put into a quartz crucible. Before
sealing or after opening the bag, however, the surface of raw
material silicon is liable to react with oxygen in the air to form
an oxide film. This oxide film contains metal impurities and the
like attached to the surface of the raw material silicon, or metal
impurities are attached to the surface of an oxide film after the
oxide film is formed.
[0052] In the above-mentioned method, an oxide film is formed the
whole surface of silicon by a fact that the surface of silicon is
forcedly oxidized by cleaning with a dissolved ozone aqueous
solution, and then this oxide film is removed by cleaning with
hydrofluoric acid or hydrofluoric and nitric acid. As the result,
metal impurities and the like contained in the oxide film are
removed together with the oxide film. The removing effect is
enhanced by repeating one or more times a cleaning process using
hydrofluoric acid or hydrofluoric and nitric acid.
[0053] Raw material silicon obtained by the above-mentioned
cleaning is molten in a furnace based upon the CZ method to become
a molten silicon liquid. Here, the solidification ratio at the
first pulling operation is set at 0.9 or less and the
solidification ratio at a pulling operation after remelting is set
at 0.9 or less, preferably 0.8 or less, respectively.
[0054] The reason why the solidification ratio is set at said value
or less is as follows. A portion grown when the solidification
ratio is small and a large amount of molten silicon liquid remains
inside a quartz crucible, namely, a portion close to the top of an
ingot has a little mount of metal element such as iron or the like
mixed into the molten silicon liquid. On the other hand, as the
residue of the molten silicon liquid becomes smaller and the
solidification ratio becomes larger, the density of metal element
in the residual liquid becomes higher and a larger amount of metal
element is mixed into the ingot.
[0055] Cleaning and remelting of raw material silicon at a
specified or lower solidification ratio make the density of
contaminant iron in a single crystal silicon be 2.times.10.sup.9
atoms/cm.sup.3 or less.
(2) Method for Manufacturing a Single Crystal Silicon of No
Defect
[0056] Next, a method for manufacturing a single silicon crystal of
no defect having no vacancy point defect agglomerates nor
interstitial point defect agglomerates is described. A single
crystal silicon ingot according to the first embodiment of the
present invention is pulled at a specified pulling speed profile
based upon Voronkov theory as described above. And a silicon wafer
of the first embodiment of the present invention is made by slicing
this ingot.
[0057] Generally, when a single crystal silicon ingot is pulled
from a molten silicon liquid inside a hot zone furnace by means of
the CZ method, point defects and point defect agglomerates
(three-dimensional defects) are generated as defects in a single
crystal silicon. A point defect includes two general forms of a
vacancy point defect and an interstitial silicon point defect. A
vacancy point defect is a defect in which a silicon atom has
slipped off from a normal position in a silicon crystal lattice.
Such a hole becomes a vacancy point defect. On the other hand, an
atom found at a position (interstitial site) other than lattice
points of a silicon crystal becomes an interstitial silicon point
defect.
[0058] A point defect is generally formed at the interface between
a molten silicon liquid (molten silicon) and an ingot (solid
silicon). However, a portion which has formed the interface begins
cooling with pulling. During the cooling, vacancy point defects or
interstitial silicon point defects are merged with one another due
to diffusion to form vacancy point defect agglomerates or
interstitial point defect agglomerates. In other words,
agglomerates are of three-dimensional structure caused by merging
of point defects.
[0059] Vacancy agglomerates include defects called laser scattering
tomography defects (LSTD) or flow pattern defects (FPD) in addition
to COP described above, and interstitial silicon point defect
agglomerates include defects called L/D described above. FPD is a
source of traces presenting a peculiar pattern to appear when a
silicon wafer made by slicing an ingot is Secco-etched (etched with
a mixed solution of (K.sub.2Cr.sub.2O.sub.7:50% HF:pure water=44
g:2000 cc:1000 cc) without stirring for 30 minutes, and LSTD has a
refractive index different from silicon and is a source generating
scattered light when a single silicon crystal is irradiated with
infrared rays.
[0060] When assuming that the pulling speed of an ingot is V
mm/minute and the temperature gradient at the interface between an
ingot and a molten silicon liquid in a hot zone structure is G
.degree. C./mm, Voronkov theory is to control the V/G
mm.sup.2/(minute .degree. C.) in order to grow a high-purity ingot
having a small number of defects. Concretely, G is a temperature
gradient in the vertical direction in an ingot of 1412 to
1300.degree. C. in temperature being close to the interface between
the ingot and the molten silicon liquid. As shown in FIG. 1, this
theory represents diagrammatically the density of vacancies and the
density of interstitial silicon as a function of V/G, and explains
that the boundary between a vacancy domain and an interstitial
silicon domain in a wafer is determined by V/G. In more detail,
while an ingot in which vacancy point defects dominantly exist is
formed in case that the ratio of V/G is not lower than the critical
point, an ingot in which interstitial silicon point defects
dominantly exist is formed in case that the ratio of V/G is not
higher than the critical point.
[0061] A specified pulling speed profile of the first embodiment of
the present invention is determined so that, when an ingot is
pulled from a molten silicon liquid inside a hot zone furnace, the
ratio of a pulling speed to a temperature gradient (V/G) is kept to
be not lower than a first critical ratio (V/G).sub.1 for preventing
occurrence of interstitial silicon point defect agglomerates and
not higher than a second critical ratio (V/G).sub.2 for limiting
vacancy point defect agglomerates within a domain in the middle of
the ingot in which vacancy point defects exist dominantly.
[0062] The pulling speed profile is determined on the basis of the
above-mentioned Voronkov theory by simulation through slicing
experimentally a reference ingot in the axial direction and slicing
experimentally a reference ingot into wafers, or combining these
techniques. Namely, this determination is performed by slicing an
ingot in the axial direction after simulation and checking a sliced
wafer, and further repeating simulation. For the purpose of
simulation, a plurality of pulling speeds are determined within a
specified range and a plurality of ingots are grown. The pulling
speed profile for the simulation is adjusted from a higher pulling
speed such as 1.2 mm/min as shown in FIG. 2(a), via a lower pulling
speed such as 0.5 mm/min as shown in FIG. 2(c), to a pulling speed
as shown in FIG. 2(d). The above-mentioned low pulling speed may be
0.4 mm/minute or lower, and it is preferable that the change in
pulling speeds (b) and (d) is linear.
[0063] Plural ingots pulled at different speeds are sliced
respectively in the axial direction. The optimum V/G is determined
from the correlation among slicing in the axial direction, checking
of wafers and the result of simulation, and following this, the
optimum pulling speed profile is determined and an ingot is
manufactured by means of this profile. An actual pulling speed
profile depends upon a number of variables including the diameter
of a desired ingot, a specific hot zone furnace to be used and the
quality of a molten silicon liquid, but being not limited to
these.
[0064] FIG. 3 shows a profile of the pulling speed for growing an
ingot of 100 cm in length and 200 mm in diameter determined
utilizing combination of simulation and an experimental technique.
Here, a hot zone furnace of Model Q41 being based upon the CZ
method and manufactured by Ikuno Plant of Mitsubishi Material
Silicon Corporation was used.
[0065] A fact shown in FIG. 4 is understood by drawing a sectional
view of an ingot made as gradually reducing the pulling speed and
continuously lowering the V/G. FIG. 4 shows as [V] a domain in
which there are dominantly vacancy point defects in the ingot, as
[I] a domain in which there are dominantly interstitial silicon
point defects, and as [P] a perfect domain in which there are no
vacancy point defect agglomerates and no interstitial silicon point
defect agglomerates. As shown in FIG. 4, position P.sub.1 in the
axial direction of the ingot includes a domain in which vacancy
point defects dominantly exist in the middle part. Position P.sub.3
includes a ring domain in which interstitial silicon point defects
dominantly exist and a perfect domain in the middle. And since
position P.sub.2 has no vacancy point defect agglomerates in the
middle part and no interstitial silicon point defect agglomerates
in the peripheral part related to the first embodiment of the
present invention, it is entirely a perfect domain.
[0066] As apparently seen from FIG. 4, a wafer W.sub.1
corresponding to position P.sub.1 contains in the middle part a
domain in which vacancy point defects dominantly exist. A wafer
W.sub.3 corresponding to position P.sub.3 contains a ring domain in
which interstitial silicon point defects dominantly exist and a
central perfect domain. And since a wafer W.sub.2 corresponding to
position P.sub.2 has no vacancy point defect agglomerates in the
middle part nor interstitial silicon point defect agglomerates in
the peripheral part, it is entirely a perfect domain. A wafer
W.sub.2 is made by slicing an ingot grown at a pulling speed
profile selected and determined so as to make entirely a perfect
domain as shown in FIG. 5. FIG. 6 is a plan view of it. For
reference, a wafer W.sub.1 made by slicing an ingot grown at
another pulling speed profile is shown in FIG. 7. FIG. 8 shows a
plan view of it.
[0067] A silicon wafer of the first embodiment of the present
invention is a wafer W.sub.2 described above, which is obtained by
lapping, beveling and then mirror-polishing this wafer. This
silicon wafer has no defects caused by crystal, is low in the
contamination degree of metal elements including iron, chromium and
nickel, and is excellent in electric characteristics. As the
result, a semiconductor device such as an LSI and the like made of
such a wafer is a little in leakage current in a pn junction and
has a high reliability with respect to a gate oxide film of an MOS
transistor.
[B] Second Embodiment of the Invention
[0068] A silicon wafer of a second embodiment of the present
invention is made by pulling an ingot under a specified condition
from a molten silicon liquid inside a hot zone furnace by means of
the CZ method in the same way as the first embodiment and then
slicing this ingot.
[0069] As described above, this CZ silicon wafer sometimes has OSF
in the shape of a ring when it receives a thermal oxidation
process. This OSF ring expands toward the outer circumference as
the V/G value increases, and reduces its ring diameter and becomes
disk-shaped in the center of the wafer and then disappears as the
V/G value decreases.
[0070] This fact is described with reference to FIG. 9A. FIG. 9A
shows a vertical section of an ingot obtained by gradually reducing
the pulling speed and continuously decreasing the value of V/G.
This ingot has been pulled as being doped with boron at a density
of 1.times.10.sup.15 atoms/cm.sup.3 so that its conduction type is
a p type and its resistivity is 1 to 15 .OMEGA.cm. In the same way
as FIG. 4 described above, FIG. 9A shows a domain [V] in which
there are dominantly vacancy point defects, a domain [I] in which
there are dominantly interstitial silicon point defects, and a
perfect domain [P] in which there are no vacancy point defect
agglomerates nor interstitial silicon point defect agglomerates in
the ingot.
[0071] Positions P.sub.1, P.sub.2 and P.sub.3 in the axial
direction are the same as those of the first embodiment. And wafers
W.sub.1, W.sub.2 and W.sub.3 respectively corresponding to
positions P.sub.1, P.sub.2 and P.sub.3 are also the same as those
of the first embodiment. A small domain of a domain in which
vacancy point defects dominantly exist, said small domain being
adjacent to a perfect domain, is a domain in which there is
substantially no COP nor L/D in the wafer face.
[0072] However, when this silicon wafer W.sub.1 is heat-treated in
an oxygen atmosphere at a temperature of 1000.degree.
C..+-.30.degree. C. for 2 to 5 hours and successively heat-treated
at a temperature of 1130.degree. C..+-.30.degree. C. for 1 to 16
hours, OSF appears. This heat treatment is called an OSF
actualizing heat treatment. As shown in FIG. 11, an OSF ring
appears in the vicinity of half the radius of the wafer in the
wafer W.sub.1. COP appears in the domain [V] which is surrounded by
this OSF ring and in which there are dominantly vacancy point
defects.
[0073] On the other hand, even when keeping the value of V/G
constant, the diameter of this OSF ring varies according to an
amount of doped boron (B) being a p-type impurity. On the
assumption that the ring diameter of OSF is D.sub.1 and the
diameter of a wafer is D.sub.0 as shown in FIG. 11, the relation
between D.sub.1/D.sub.0 and the density of boron at this time is
shown in FIG. 12. As apparently seen from FIG. 12, the OSF is in
the shape of a ring at a boron density of 2.times.10.sup.17
atoms/cm.sup.3 or less, comes to be in the shape of a disk at a
boron density of about 6.times.10.sup.17 atoms/cm.sup.3, and
disappears at a boron density of 9.times.10.sup.17 atoms/cm.sup.3
or more.
[0074] FIGS. 9B and 9C respectively show vertical sections of
ingots at the same axial position as FIG. 9A when continuously
decreasing the value of V/G. FIG. 9B shows an ingot pulled as being
doped with boron of 1.times.10.sup.18 atoms/cm.sup.3 in density so
that it is of p type in conduction type and is 0.04 .OMEGA.cm or
less in resistivity. And FIG. 9C shows an ingot pulled as being
doped with boron of 1.times.10.sup.18 atoms/cm.sup.3 in density and
phosphorus of 0.999.times.10.sup.18 to 0.985.times.10.sup.18
atoms/cm.sup.3 in density so that it is of p type in conduction
type and is within 1 to 15 .OMEGA.cm in resistivity.
[0075] In FIGS. 9B and 9C, a wafer in which OSF to appear in the
shape of a ring at the same position P.sub.1 as FIG. 9A when the
wafer is thermally oxidized has disappeared in the center of the
wafer is obtained. A wafer represented at position P.sub.1 in FIGS.
9B and 9C is a wafer corresponding to position P.sub.2 in FIG. 9A,
which wafer has substantially no vacancy point defect agglomerates
in the middle part of it and no interstitial silicon point defect
agglomerates in the peripheral part, and therefore is a wafer
entirely composed of a perfect domain. However, a wafer represented
at position P.sub.1 in FIG. 9B is as low as 0.04 .OMEGA.cm or less
in resistivity, and therefore although this wafer is suitable for a
substrate for an epitaxial wafer having an epitaxial layer of 10
.OMEGA.cm or so stacked on the surface of the wafer, it cannot be
compatible with an existing device process in case that it remains
in a resistivity of 0.04 .OMEGA.cm or less. On the other hand, a
wafer represented at position P.sub.1 in FIG. 9C is a wafer which
is 1 to 15 .OMEGA.cm in resistivity and can be compatible with an
existing device process, and has the density of point defect
agglomerates such as COP or L/D being not larger than the lower
limit of detection.
[0076] Since the sensitivity of detection and the lower limit of
detection of point defect agglomerates such as COP or L/D may be
different depending on a detection method, this specification
determines as the lower limit of detection (1.times.10.sup.3
agglomerates/cm.sup.3) the ratio of the number of agglomerates to
the inspected volume in case that when a single crystal silicon
mirror-polished is etched without stirring and then is observed by
an optical microscope taking the product of an observed area and an
etching allowance as an inspected volume, one flow pattern (vacancy
defect agglomerate) or one dislocation cluster (interstitial
silicon point defect agglomerate) has been detected in an inspected
volume of 1.times.10.sup.-3 cm.sup.3.
[0077] FIGS. 10A to 10C show vertical sections of ingots
substantially equivalent to those of FIGS. 9A to 9C. FIGS. 10A, 10B
and 10C respectively correspond to FIGS. 9A, 9B and 9C. FIGS. 10A
to 10C compare with one another and show the ranges of V/G in which
an entirely perfect domain [P] having substantially no vacancy
point defect agglomerates nor interstitial silicon point defect
agglomerates can be manufactured. As apparently seen from FIGS. 10A
to 10C, the range of V/G in which a perfect domain [P] can be
manufactured is as small as Ra in FIG. 10A, but it becomes Rb and
Rc wider than Ra respectively in FIGS. 10B and 10C, where a single
crystal silicon composed of a perfect domain over its whole length
can be easily manufactured without performing a strict pulling
control of V/G.
[0078] Next, a method for manufacturing a silicon wafer represented
at position P.sub.1 of FIG. 9C.
[0079] Phosphorus, antimony and arsenic are mentioned as n-type
impurities to be doped in order to compensate the resistivity of a
silicon wafer which becomes low in resistivity by being densely
doped with boron being a p-type impurity. Among them, phosphorus is
more preferable since it is the nearest to a silicon atom in the
covalent bond radius. On the assumption that the density of boron
being a p-type impurity is the first density C.sub.1, density
C.sub.1 needs to be within a range of 1.times.10.sup.17 to
1.times.10.sup.20 atoms/cm.sup.3 in order to obtain a wafer in
which OSF to appear in the shape of a ring when the wafer is
thermally oxidized has disappeared in the center of the wafer. The
density C.sub.1 is preferably within a range of 1.times.10.sup.18
to 1.times.10.sup.19 atoms/cm.sup.3. And when assuming that the
density of phosphorus being an n-type impurity is the second
density C.sub.2, density C.sub.2 needs to be within a range of 0.90
C.sub.1 to 0.999 C.sub.1 atoms/cm.sup.3 being lower than density
C.sub.1. The reason is that the resistivity of a p-type wafer is
compensated so as to be 1 to 15 .OMEGA.cm. This density C.sub.2 is
preferably within a range of 0.95 C.sub.1 to 0.995 C.sub.1
atoms/cm.sup.3.
[0080] Since the segregation coefficient of a p-type impurity and
the segregation coefficient of an n-type impurity are different
from each other, resistivity largely varies in the top side and the
bottom side of an ingot with the increase of the length of an
ingot. As a method for pulling a single crystal silicon (ingot),
therefore, a continuously charged CZ (CCZ) method making it
possible to additionally supply a dopant is preferable since it can
make an ingot uniform in resistivity over the whole length of an
ingot.
[0081] Since point defect agglomerates hardly exist in a wafer of
the second embodiment of the present invention, it makes it
possible to manufacture a semiconductor integrated circuit at a
high yield rate. And since it is 1 to 15 .OMEGA.cm in resistivity,
it can be compatible with an existing device process. And since
both of a p-type impurity and an n-type impurity being less in
quantity than the p-type impurity are doped when pulling a single
crystal silicon, a p-type silicon wafer which has been adjusted to
a desired resistivity can be obtained.
[0082] Moreover, by pulling an ingot making the first density
C.sub.1 of boron being a p-type impurity be 1.times.10.sup.17
atoms/cm.sup.3 or more under the value of V/G so that OSFs to
appear in the shape of a ring when a wafer is thermally oxidized
disappears in the center of the wafer, first, oxygen precipitation
is uniformly and densely generated by heat treatment on the whole
surface of a silicon wafer formed out of this ingot. This oxygen
precipitation is hereinafter called a bulk micro-defect (BMD). This
BMD provides a so-called intrinsic gettering (hereinafter referred
to as IG) effect to capture a very small amount of metal impurity
entering during a device process. Second, since densely doped boron
atoms act mutually both interstitial silicon and vacancy to thereby
lower the degree of supersaturation of interstitial silicon, it is
thought that formation of interstitial point defect agglomerates is
suppressed and L/D does not appear at all in the silicon wafer.
Third, since a pulling speed V when OSFs disappear in the center of
a wafer is higher in comparison with the conventional speed in
which a boron-doped ingot being 10 .OMEGA.cm in resistivity is
obtained, the productivity of ingots is enhanced. Furthermore,
fourth, when the density C.sub.1 of boron is made to be
1.times.10.sup.18 atoms/cm.sup.3 or more, a silicon wafer becomes
naturally 0.04 .OMEGA.cm or less in resistivity, but the
resistivity of the silicon wafer is adjusted or compensated to 1 to
15 .OMEGA.cm by doping an n-type impurity of phosphorus, antimony
or arsenic at a density C.sub.2 of 0.90 C.sub.1 to 0.999 C.sub.1
atoms/cm.sup.3.
[C] Third Embodiment of the Invention
[0083] A silicon wafer of a third embodiment of the present
invention is made by pulling an ingot under a specified condition
from a molten silicon liquid inside a hot zone furnace by means of
the CZ method in the same way as the first embodiment and then
slicing this ingot.
[0084] FIG. 13 is a characteristic diagram corresponding to FIG. 1
of the first embodiment. Here, it is described that there is a
domain ((V/G).sub.2 to (V/G).sub.3) for forming an OSF nucleus in a
domain [V] adjacent to a domain [P] and that a perfect domain [P]
is further classified into a domain [P.sub.1] and a domain
[P.sub.V]. This domain ((V/G).sub.2 to (V/G).sub.3) is a small
domain of a domain in which vacancy point defects dominantly exist,
said small domain being adjacent to a perfect domain, and is a
domain in which no COP nor L/D is generated in the wafer. Domain
[P.sub.1] is a domain where the ratio of V/G ranges from said
(V/G).sub.1 to the critical point, and domain [P.sub.V] is a domain
where the ratio of V/G ranges from the critical point to said
(V/G).sub.2. Namely, domain [P.sub.I] is a domain which is adjacent
to domain [I] and belongs to the perfect domain [P], and has the
density of interstitial point defects less than the minimum density
of interstitial silicon point defects capable of forming
interstitial-type large dislocations, and domain [P.sub.V] is a
domain which is adjacent to domain [V] and belongs to a perfect
domain [P], and has the density of vacancy point defects less than
the minimum density of vacancy point defects capable of forming
OSF.
[0085] A specified pulling speed profile of the third embodiment of
the present invention is determined in the same way as the first
embodiment so that, when an ingot is pulled from a molten silicon
liquid inside a hot zone furnace, the ratio of a pulling speed to a
temperature gradient (V/G) is kept to be not lower than the first
critical ratio (V/G).sub.1 and not higher than the second critical
ratio (V/G).sub.2.
[0086] A sectional view of an ingot obtained by gradually lowering
the pulling speed and continuously decreasing the V/G is shown in
FIG. 4 described in the first embodiment. When a conventional OSF
actualizing heat treatment is performed on a silicon wafer W.sub.1
shown in FIG. 4, OSF is generated as described above. As shown in
FIG. 14, an OSF ring appears in the vicinity of half the radius of
the wafer W.sub.1. COP tends to appear in a domain surrounded by
this OSF ring in which domain there are dominantly vacancy point
defects.
[0087] In case that a silicon wafer of the third embodiment of the
present invention is composed of domain [P.sub.I] as described
above or domain [P.sub.V]/P.sub.I] is less than 9 in area ratio,
since the density of vacancy point defects is low, first the
density of carbon in the wafer is controlled to be
1.times.10.sup.15 to 5.times.10.sup.15 atoms/cm.sup.3 or second a
polysilicon layer of 0.1 to 1.6 .mu.m in thickness is formed on the
back of the wafer, or third both of them are performed. By
performing the first to the third control or processing, even if
the density of vacancy point defects is low, BMD is made by a
specified heat treatment and a uniform IG effect is obtained over
the whole surface of a wafer. This specified heat treatment
includes a wafer heat treatment and the like in a device
manufacturing process. For example, a wafer is heat-treated at a
temperature of 600 to 800.degree. C. for 1 to 24 hours in an
atmosphere of nitrogen or oxygen as the first stage heat treatment,
and then is heat-treated at a temperature of 1000 to 1150.degree.
C. for 1 to 16 hours in an atmosphere of nitrogen or oxygen as the
second stage heat treatment. Preferably, it is heat-treated at
800.degree. C. for 4 hours and then is heat-treated at 1000.degree.
C. for 16 hours.
[0088] The first control of the density of carbon in a wafer is
performed so that the density of carbon [Cs] in an ingot becomes
1.times.10.sup.15 to 5.times.10.sup.15 atoms/cm.sup.3 by adding
pure carbon when melting polycrystalline silicon on the basis of
the CZ method. When the density of carbon is less than
1.times.10.sup.15 atoms/cm.sup.3, a sufficient IG effect cannot be
obtained, and when the density of carbon is more than
5.times.10.sup.15 atoms/cm.sup.3, excessive precipitation of oxygen
precipitation nuclei occurs at a specified heat treatment and there
is a disadvantage that excessive BMD is generated.
[0089] And in the second formation of a polysilicon layer on the
back of the wafer, a polysilicon layer of 0.1 to 1.6 .mu.m,
preferably 0.5 to 1.0 .mu.m in thickness is formed at a temperature
of 650.degree. C..+-.30.degree. C. using, for example, SiH.sub.4 by
means of a chemical vapor deposition (CVD) method on the back of a
wafer made by slicing an ingot pulled under said condition. A
polysilicon layer being less than 0.1 .mu.m in thickness cannot
provide a sufficient IG effect and a polysilicon layer exceeding
1.6 .mu.m in thickness provides a disadvantage of lowering the
productivity. The density of oxygen in a silicon wafer of the third
embodiment is 1.times.10.sup.18 to 1.45.times.10.sup.18
atoms/cm.sup.3 (old ASTM).
[0090] As described above, according to the third embodiment, even
when the density of vacancy point defects is low, BMD can be
generated by a specified heat treatment and an IG effect can be
obtained.
EMBODIMENT EXAMPLES
[0091] Next, embodiment examples of the present invention are
explained together with comparative examples.
Embodiment Example 1
[0092] The density of iron in polycrystaline silicon to be raw
material was measured by an inductively coupled plasma (ICP) mass
spectrometer and was found to be 2 ppb-wt on the average. That the
density of iron is 2 ppb-wt means that iron is contained at a ratio
of 2 ppb in silicon of 1 gram.
[0093] Generally, the density of an impurity in a single crystal
silicon is very small due to segregation and is often difficult to
directly analyze. Thereupon, a method is adopted which grows a
single crystal by means of the CZ method and then analyzes a molten
silicon liquid left in a crucible (hereinafter, referred to as
residual molten silicon), and calculates the density of impurity in
the crystal from the segregation coefficient of each impurity
element. This analysis is ordinarily performed by sampling and
solidifying a part of residual molten silicon and then dissolving
the total amount of this sample in mixed acid of hydrofluoric acid
and nitric acid being high in purity and analyzing it by means of
an ICP mass spectrometer.
[0094] In this embodiment example, a residual molten silicon
analysis of a molten silicon liquid obtained by melting
polycrystaline silicon and a remelting test of a single crystal
silicon were performed in advance and the densities of iron,
chromium and nickel among metal impurities were examined. Namely, a
single crystal was pulled to a length of 220 mm from a molten
silicon liquid obtained by melting said polycrystaline silicon. The
residual molten silicon at a solidification ratio of 0.626 was
sampled and solidified, and the densities of iron, chromium and
nickel were measured. And the densities of iron, chromium and
nickel in the top portion of the single crystal were also measured.
Next, the grown single crystal silicon was molten again (remolten)
and a single crystal was pulled also to a length of 220 mm from
this molten silicon liquid. The residual molten silicon at a
solidification ratio of 0.681 was sampled and solidified, and the
densities of iron, chromium and nickel were measured. And the
densities of iron, chromium and nickel in the top portion of the
single crystal were also measured.
[0095] The densities of impurities in the top portions of the
respective single crystals pulled from said first molten silicon
liquid and the remolten silicon liquid were calculated using the
following expression (1) on the assumption that all the impurities
were mixed into the molten silicon liquids before growing the
crystals.
C.sub.T=k.sub.0C.sub.Z/((1-L).sup.(k0-1)) (1)
[0096] Here, C.sub.T is the density of an impurity in the top
portion, k.sub.0 is a segregation coefficient, C.sub.Z is the
density of the impurity in the residual molten silicon, and L is
the solidification ratio at the time of analyzing the residual
molten silicon. Iron has a segregation coefficient of
8.times.10.sup.-6, chromium has a segregation coefficient of
2.8.times.10.sup.-5, and nickel has a segregation coefficient of
3.times.10.sup.-5.
[0097] The densities of impurities in the residual molten silicon,
the densities of impurities in the top portion and the like are
shown in Table 1.
TABLE-US-00001 TABLE 1 Single crystal obtained by remelting (at a
solidification Polycrystaline ratio of 0.9 or silicon less) Iron
Solidification ratio 0.626 0.681 Density of impurity in 23 14
residual molten silicon (ppb-wt) Density of impurity in the 2
.times. 10.sup.9 0.9 .times. 10.sup.9 top portion of crystal
(atoms/cm.sup.3) Density of impurity at a 5 .times. 10.sup.9 2.2
.times. 10.sup.9 solidification ratio of 0.6 (atoms/cm.sup.3)
Chromium Solidification ratio 0.626 0.681 Density of impurity in
3.8 0.8 residual molten silicon (ppb-wt) Density of impurity in the
1.1 .times. 10.sup.9 0.2 .times. 10.sup.9 top portion of crystal
(atoms/cm.sup.3) Density of impurity at a 2.8 .times. 10.sup.9 0.5
.times. 10.sup.9 solidification ratio of 0.6 (atoms/cm.sup.3)
Nickel Solidification ratio 0.626 0.681 Density of impurity in 3.8
0.8 residual molten silicon (ppb-wt) Density of impurity in the 1.1
.times. 10.sup.9 0.2 .times. 10.sup.9 top portion of crystal
(atoms/cm.sup.3) Density of impurity at a 2.8 .times. 10.sup.9 0.5
.times. 10.sup.9 solidification ratio of 0.6 (atoms/cm.sup.3)
[0098] As apparently understood from consideration in advance of
Table 1, it was found that the density of each of iron, chromium
and nickel was reduced by remelting.
[0099] Block-shaped polycrystaline silicon used in the
consideration in advance was put in a basket made of polyethylene
and this basket was placed in a first tub and a dissolved ozone
aqueous solution of 20 ppm in ozone density was jetted to the
polycrystaline silicon at a jetting rate of 5000 cc/minute for 3
minutes from a jetting nozzle. Next, the basket containing said
jetted polycrystalline silicon was immersed in a dissolved ozone
aqueous solution of 20 ppm in ozone density stored in a second tub
for 5 minutes. Next, this basket was pulled up from the second tub
and was immersed for 5 minutes in hydrofluoric acid of 0.5 wt % in
density stored in a third tub. Next, this basket was pulled up from
the third tub and placed in a fourth tub, and a dissolved ozone
aqueous solution of 20 ppm in ozone density was jetted to the
polycrystalline silicon at a jetting rate of 5000 cc/minute for 3
minutes from a jetting nozzle. Then this basket was pulled up from
the fourth tub and was immersed for 5 minutes in hydrofluoric acid
of 0.5 wt % in density stored in a fifth tub. Next, this basket was
pulled up from the fifth tub and was immersed for 15 minutes in
ultra pure water stored in a sixth tub. Next, this basket was
pulled up from the sixth tub and introduced into a hot-air drier,
and the polycrystalline silicon was dried and then the dried
polycrystalline silicon was taken out from the basket.
[0100] The density of iron in this polycrystalline silicon after
cleaning was measured by an ICP mass spectrometer and was found to
be 1 ppb-wt on the average.
[0101] The cleaned polycrystalline silicon of 110 kg was put into a
crucible and was molten by a carbon heater to form a molten silicon
liquid. A seed crystal was made to come into contact with the
molten silicon liquid and grown into a single crystal silicon
ingot. The pulled ingot was measured and found to be 80 kg in
weight (at a solidification of 0.73) and 1100 mm in pulled
length.
[0102] The pulled ingot was crushed by a crusher into blocks. The
single crystal silicon in the shape of blocks was put into a basket
made of polyethylene and this basket was immersed for 30 minutes in
acetone stored in a seventh tub. Then, this basket was pulled up
from the seventh tub and immersed for 5 minutes in a mixed solution
of hydrofluoric acid of 50 wt % in density and nitric acid of 70 wt
% stored in an eighth tub. Next, this basket was pulled up from the
eighth tub and immersed for 15 minutes in ultra pure water stored
in a ninth tub. Then, this basket was pulled up from the ninth tub
and was immersed in the eighth tub (mixed acid, 5 minutes),
subsequently the ninth tub (ultra pure water, 15 minutes), the
eighth tub (mixed acid, 5 minutes), the ninth tub (ultra pure
water, 15 minutes). This basket was pulled up from the ninth tub
and introduced into a hot-air drier, and the single crystal silicon
was dried and then the dried single crystal silicon was taken out
from the basket.
[0103] The density of iron in the single crystal silicon after
cleaning was measured by an ICP mass spectrometer and was found to
be 0.05 ppb-wt or less.
[0104] The cleaned single crystal silicon of 80 kg was put into a
crucible and was molten again (remolten) by a carbon heater to form
a molten silicon liquid. A seed crystal was made to come into
contact with the molten silicon liquid and grown into a single
crystal silicon ingot. Here, the ingot was pulled using the V/G
determined so that a domain corresponding to position P.sub.2 shown
in FIG. 4 was grown over the whole length of the ingot. The pulled
ingot was measured and found to be 58 kg in weight (at a
solidification of 0.73) and 800 mm in pulled length.
[0105] A silicon wafer was obtained by lapping and beveling and
then mirror-polishing a silicon wafer sliced from the ingot pulled
in this way. The density of iron of the obtained silicon wafer was
measured by a surface photo voltage (SPV) method and found to be
about 1.times.10.sup.9 atoms/cm.sup.3 on the average.
[0106] And COP, OSF and L/D being crystal defects in said silicon
wafer were measured. As for COP, the silicon wafer was cleaned with
a mixed solution of ammonia and hydrogen peroxide and then COPs of
0.12 .mu.m or larger in size on the surface of this wafer were
examined using a laser particle counter (SFS6200 manufactured by
KLA-Tencor, Inc.). And as for OSF, the silicon wafer was
heat-treated at a temperature of 1000.degree. C. for 4 hours and
successively heat-treated at a temperature of 1130.degree. C. for 3
hours (pyrogenic oxidation process), and it was examined by eye
whether or not an OSF was actualized. Further, as for L/D, the
surface of said silicon wafer was chemically etched by a Secco
etching solution for 30 minutes. Next, peculiar traces generated by
this were observed by means of an optical microscope and existence
of transferred traces of L/D on the silicon wafer being a substrate
was examined.
[0107] As the result, the number of COPs of 0.12 .mu.m or more in
size was zero all over the wafer. And no OSF nor L/D has appeared
at all over the whole surface of the wafer.
Embodiment Example 2
[0108] A single crystal silicon ingot was pulled by means of the
CCZ method, aiming at a wafer of 10 .OMEGA.cm in resistivity,
1.00.times.10.sup.18 atoms/cm.sup.3 in boron density and
0.99.times.10.sup.18 atoms/cm.sup.3 in phosphorus density.
High-purity polycrystalline silicon of 20 kg was used as an initial
raw material, and metal boron of 1.26 g, silicon dopant of 14.7 g
doped with phosphorus and single crystal silicon recharged blocks
of 20 kg doped with phosphorus were put into a quartz crucible
together with this raw material, and this quartz crucible was
heated to melt the raw material and the dopant. And polycrystalline
silicon in the shape of grains containing metal boron was gradually
supplied to the molten silicon liquid during a pulling operation.
This supplied material was 32 kg in total. An ingot of 6 inches in
diameter and 900 mm in length of its straight body portion was
obtained by being pulled under a condition in which the pulling
speed V=0.8 mm/minute equal to embodiment example 1, the
temperature gradient G=3.4.degree. C./mm in the center of the
ingot, and V/G=0.23 mm.sup.2/minute.degree. C. As described above,
although the respective segregation coefficients of boron and
phosphorus are different from each other, by compensating through
additionally supplying a dopant of boron, even when the length of
the ingot was made large-and close to 1 in solidification ratio as
shown in FIG. 15, the resistivity was less in variation in
comparison with that at the beginning of pulling.
Comparative Example 1
[0109] An ingot was pulled under the same condition as embodiment
example 2 except that the pulling speed V was set at 0.9
mm/minute.
Comparative Example 2
[0110] With the same target as embodiment example 2, metal boron of
2.20 g, silicon dopant of 25.6 g doped with phosphorus and single
crystal silicon recharged blocks of 35 kg doped with phosphorus
were put into a quartz crucible, and this quartz crucible was
heated to melt the raw material and the dopant. A single crystal
silicon ingot was pulled by means of the CZ method under a
condition in which the pulling speed V=0.8 mm/minute, the
temperature gradient G=3.4.degree. C./mm in the center of the
ingot, and V/G=0.23 mm.sup.2/minute.degree. C. This pulling
condition is nearly equal to a condition in which D.sub.1/D.sub.0
shown in FIG. 11 when doping no dopant is 0.9. The pulled ingot was
6 inches in diameter and 600 mm in length of its straight body
portion.
[0111] Since the segregation coefficient of boron is 0.8 and the
segregation coefficient of phosphorus is 0.35, the larger and the
more the ingot becomes in length and approximates to 1 in
solidification ratio, the more the resistivity varies as shown in
FIG. 16, and the conduction type of the ingot has been reversed
from the p type to the n type.
Comparative Example 3
[0112] An ingot was pulled under the same condition as comparative
example 2 except that the pulling speed V was set at 0.9
mm/minute.
Comparative Example 4
[0113] Aiming at a wafer of 10 .OMEGA.cm in resistivity and
1.00.times.10.sup.15 atoms/cm.sup.3 in boron density, silicon
dopant of 1.78 g doped with boron was put into a quartz crucible
together with high-purity polycrystalline silicon of 35 kg and this
quartz crucible was heated to melt the raw material. An ingot of 6
inches in diameter and 600 mm in length of its straight body
portion was obtained by being pulled by means of the CZ method
under a condition in which the pulling speed V=0.8 mm/minute equal
to embodiment example 2, the temperature gradient G=3.4.degree.
C./mm in the center of the ingot, and V/G=0.23
mm.sup.2/minute.degree. C.
Comparative Example 5
[0114] An ingot was pulled under the same condition as comparative
example 4 except that the pulling speed V was set at 0.9
mm/minute.
Comparative Example 6
[0115] Aiming at a wafer of 0.02 .OMEGA.cm in resistivity and
1.00.times.10.sup.18 atoms/cm.sup.3 in boron density, metal boron
of 2.2 g was put into a quartz crucible together with high-purity
polycrystalline silicon of 35 kg and this quartz crucible was
heated to melt the raw material. An ingot of 6 inches in diameter
and 600 mm in length of its straight body portion was obtained by
being pulled by means of the CZ method under a condition in which
the pulling speed V=0.8 mm/minute equal to embodiment example 2,
the temperature gradient G=3.4.degree. C./mm in the center of the
ingot, and V/G=0.23 mm.sup.2/minute.degree. C.
Comparative Example 7
[0116] An ingot was pulled under the same condition as comparative
example 6 except that the pulling speed V was set at 0.9
mm/minute.
<Comparative Evaluation 1>
[0117] A silicon wafer sliced from each of ingots of embodiment
example 2 and comparative examples 1 to 7 was lapped and beveled
and then mirror-polished.
[0118] Each of silicon wafers obtained in this way was heat-treated
in an oxygen atmosphere at a temperature of 1100.degree. C. for 1
hour, and it was examined whether or not OSF was generated. And
after each wafer received a donor killer heat treatment, the
resistivity of each silicon wafer was measured by a four terminal
resistance measuring method.
[0119] Following this, the number of COPs being not smaller than
0.11 .mu.m and not larger than 10 .mu.m in a circle of 144 mm in
diameter on the surface of each of the silicon wafers of embodiment
example 2 and comparative examples 1 to 7 was examined by means of
a laser particle counter (SFS6200 manufactured by KLA-Tencor,
Inc.). And each of the silicon wafers of embodiment example 2 and
comparative examples 1 to 7 was immersed in a Secco etching
solution for 30 minutes without stirring, and existence of a
peculiar flow pattern to be generated by this was checked and then
existence of FDP and L/D was examined observing existence of
etching induced pits by means of an optical microscope.
[0120] Further, in a manner similar to a semiconductor device
manufacturing process, these silicon wafers were heat-treated at
800.degree. C. for 4 hours and successively at 1000.degree. C. for
16 hours. After the heat treatment, each wafer was cloven and the
surface of the wafer was selectively etched by a Wright etching
solution for 3 minutes, and BMD from the center of the wafer to the
periphery at a depth of 300 .mu.m from the surface of the wafer was
measured by observation using an optical microscope and the density
of BMD was calculated. The result of these is shown in Table 2.
TABLE-US-00002 TABLE 2 Pulling Radius Density Density Density
Density of speed of OSF of COP of FPD of L/D BMD (mm/minute) ring
Resistivity (COPs/cm.sup.3) (FPDs/cm.sup.3) (L/Ds/cm.sup.3)
(BMDs/cm.sup.3) Embodiment 0.8 No OSF 7-11 0.02 1 .times.
10.sup.10-1 .times. 10.sup.11 example 2 Comparative 0.9 5 7-11 0.7
1 .times. 10.sup.5 1 .times. 10.sup.10-1 .times. 10.sup.11 example
1 Comparative 0.8 No OSF p/n 0.02 1 .times. 10.sup.10-1 .times.
10.sup.11 example 2 reversed Comparative 0.9 5 p/n 0.6 1 .times.
10.sup.5 1 .times. 10.sup.10-1 .times. 10.sup.11 example 3 reversed
Comparative 0.8 40 10 17 25 .times. 10.sup.4 Inside OSF example 4
ring: 1 .times. 10.sup.11 Outside OSF ring: 1 .times. 10.sup.6.sup.
Comparative 0.9 50 10 20 3 .times. 10.sup.5 Inside OSF example 5
ring: 1 .times. 10.sup.11 Outside OSF ring: 1 .times. 10.sup.6.sup.
Comparative 0.8 No OSF 0.03 0.02 1 .times. 10.sup.10-1 .times.
10.sup.11 example 6 Comparative 0.9 5 0.03 0.7 1 .times. 10.sup.5 1
.times. 10.sup.10-1 .times. 10.sup.11 example 7 In Table 2, a
symbol " " means "Not more than the lower limit of detection (1
.times. 10.sup.3 defect agglomerates/cm.sup.3)".
[0121] As apparently seen from Table 2, in a wafer of embodiment
example 2 doped with boron and phosphorus and pulled at a pulling
speed of 0.8 mm/minute, no OSF appeared and the density of each of
COP, FPD and L/D was substantially zero. Further, this had a BMD
density of 1.times.10.sup.10 to 1.times.10.sup.11 BMDs/cm.sup.3 and
was found to have an IG effect. On the other hand, in comparative
examples 2 and 3, when the solidification ratio (length of the
ingot) exceeded about 0.3, the conduction type was reversed from
the p type to the n type. And on wafers of comparative examples 4
and 5, an OSF ring appeared under a heat treatment in an oxidizing
atmosphere, and on wafers of comparative examples 1, 3 and 7, a
disk-shaped OSF appeared. Attending on this, in comparative
examples 1, 3, 4, 5 and 7 except comparative examples 2 and 6, the
density of COP is more in comparison with embodiment example 2, and
particularly it was found that in wafers of comparative examples 4
and 5, the densities of BMD inside and outside an OSF ring after
heat treatment were greatly different from each other and a uniform
IG effect could not be obtained over the whole surface of the
wafer. Further, in comparative examples 6 and 7, the resistivity
was 0.03 .OMEGA.cm but was not a desired resistivity of 1 to 15
.OMEGA.cm.
Embodiment Example 3
[0122] Polycrystalline silicon to be raw material to which pure
carbon was added was molten and an ingot was pulled from this
molten silicon liquid. This pulling operation has been performed so
that a domain corresponding to position P.sub.2 shown in FIG. 4
covers the whole length of the ingot and V/G shown in FIG. 13 is
not smaller than (V/G).sub.1 and not larger than (V/G).sub.2, and
domain [P.sub.V]/domain [P.sub.I] is about 1 in area ratio. A
silicon wafer sliced from the pulled ingot was lapped and beveled,
and then damages of the surface of the wafer were removed by a
chemical etching process and thereby a mirror-polished silicon
wafer was obtained. The density of carbon of the wafer was
1.times.10.sup.15 atoms/cm.sup.3.
Embodiment Example 4
[0123] A mirror-polished wafer was obtained in the same way as
embodiment example 3 except that the amount of pure carbon added to
polycrystalline silicon to be raw material was made larger than
embodiment example 3. The density of carbon of the wafer was
5.times.10.sup.15 atoms/cm.sup.3.
Embodiment Example 5
[0124] After the amount of pure carbon added to polycrystalline
silicon to be raw material was made lower than embodiment example
3, an ingot has been pulled so that a domain corresponding to
position P.sub.2 shown in FIG. 4 covers the whole length of the
ingot and V/G shown in FIG. 13 is not smaller than (V/G).sub.1 and
not larger than (V/G).sub.2, and domain [P.sub.V] /domain [P.sub.1]
is about 1 in area ratio. The pulled ingot was processed in the
same way as embodiment example 3 and then a polysilicon layer of
0.5 .mu.m in thickness was formed on the back of a wafer at
650.degree. C. using SiH.sub.4 by means of a CVD method. After
this, a silicon wafer was obtained by mirror-polishing. The density
of carbon of the wafer was 5.times.10.sup.14 atoms/cm.sup.3.
Embodiment Example 6
[0125] A mirror-polished wafer was obtained in the same way as
embodiment example 5 except that a polysilicon layer on the back of
the wafer was made to be 1.0 .mu.m in thickness. The density of
carbon of the wafer was 5.times.10.sup.14 atoms/cm.sup.3.
Embodiment Example 7
[0126] A mirror-polished wafer was obtained in the same way as
embodiment example 5 except that a polysilicon layer on the back of
the wafer was made to be 1.5 .mu.m in thickness. The density of
carbon of the wafer was 5.times.10.sup.14 atoms/cm.sup.3.
Embodiment Example 8
[0127] The same amount of pure carbon as embodiment example 3 was
added to polycrystalline silicon to be raw material, which has been
molten and an ingot has been pulled so that a domain corresponding
to position P.sub.2 shown in FIG. 4 covers the whole length of the
ingot and V/G shown in FIG. 13 is not smaller than (V/G).sub.1 and
not larger than (V/G).sub.2, and domain [P.sub.V]/domain [P.sub.I]
was about 1 in area ratio. The pulled ingot was processed in the
same way as embodiment example 3 and then a polysilicon layer of
1.0 .mu.m in thickness was formed at 650.degree. C. using
SiH.sub.4. After this, a silicon wafer was obtained by
mirror-polishing. The density of carbon of the wafer was
1.times.10.sup.15 atoms/cm.sup.3.
Embodiment Example 9
[0128] A mirror-polished wafer was obtained in the same way as
embodiment example 8 except that the amount of pure carbon added to
polycrystalline silicon to be raw material was made the same as
embodiment example 4. The density of carbon of the wafer was
5.times.10.sup.15 atoms/cm.sup.3.
Embodiment Example 10
[0129] A mirror-polished wafer was obtained in the same way as
embodiment example 8 except that a polysilicon layer on the back of
the wafer was made to be 1.5 .mu.m in thickness. The density of
carbon of the wafer was 1.times.10.sup.15 atoms/cm.sup.3.
Embodiment Example 11
[0130] A mirror-polished wafer was obtained in the same way as
embodiment example 9 except that a polysilicon layer on the back of
the wafer was made to be 1.5 .mu.m in thickness. The density of
carbon of the wafer was 5.times.10.sup.15 atoms/cm.sup.3.
Comparative Example 8
[0131] After the amount of pure carbon added to polycrystalline
silicon to be raw material was made lower than embodiment example
3, an ingot has been pulled so that a domain corresponding to
position P.sub.2 shown in FIG. 4 covers the whole length of the
ingot and V/G shown in FIG. 13 is not smaller than the critical
point and not larger than (V/G).sub.2, and domain [PSV]/domain
[P.sub.I] is about 1 in area ratio. A silicon wafer sliced from the
pulled ingot was lapped and chamfered, and then damages of the
surface of the wafer were removed by a chemical etching process and
thereby a mirror-polished silicon wafer was obtained. The density
of carbon of the wafer was 5.times.10.sup.14 atoms/cm.sup.3.
Comparative Example 9
[0132] A mirror-polished wafer was obtained in the same way as
embodiment example 4 except that the amount of pure carbon added to
polycrystalline silicon to be raw material was made larger than
embodiment example 4. The density of carbon of the wafer was
1.times.10.sup.16 atoms/cm.sup.3.
Comparative Example 10
[0133] A mirror-polished wafer was obtained in the same way as
embodiment example 8 except that the amount of pure carbon added to
polycrystalline silicon to be raw material was made larger than
embodiment example 8. The density of carbon of the wafer was
1.times.10.sup.16 atoms/cm.sup.3.
Comparative Example 11
[0134] A mirror-polished wafer was obtained in the same way as
comparative example 10 except that a polysilicon layer on the back
of the wafer was made to be 1.5 .mu.m in thickness.
<Comparative Evaluation 2>
[0135] The density of carbon in each of the wafers of embodiment
examples 3 to 11 and comparative examples 8 to 11 was measured by
means of a charged particle radioactivation analysis, and the
density of oxygen in each of the wafers was measured by means of a
Fourier transform infrared spectroscopy (FT-IR). Further, each
wafer was heat-treated at 800.degree. C. in an oxygen atmosphere
for 4 hours and then was heat-treated at 1000.degree. C. in an
oxygen atmosphere for 16 hours. After the heat treatment, each
wafer was cloven and the surface of the wafer was selectively
etched by a Wright etching solution, and BMD was measured in the
center of the wafer and in the vicinity of half the radius of the
wafer at a depth of 300 .mu.m from the surface of the wafer by
observation using an optical microscope and the density of BMD was
calculated. The result of these is shown in Table 3.
[0136] As apparently seen from Table 3, after heat treatment of
each silicon wafer, in both the center and the vicinity of half the
radius of the wafer, while the density of BMD in the wafers of
comparative examples 8, 10 and 11 has not come into a range of
10.sup.8 to 10.sup.11 BMDs/cm.sup.3 in which there is an IG effect,
the density of BMD in the wafers of embodiment examples 3 to 11 has
come into a range of 10.sup.8 to 10.sup.11 BMDs/cm.sup.3 in which
there is an IG effect. The density of BMD in the wafer of
comparative example 9 is greatly different between in the center
and the vicinity of half the radius of the wafer. A uniform IG
effect could not be obtained over the whole surface of wafer of
comparative example 9.
TABLE-US-00003 TABLE 3 Thickness Density of BMD after heat of
treatment polysilic Domain [P.sub.V] Domain [P.sub.I] Density of
Density of on layer in the center in R/2 of Area carbon oxygen on
the of wafer wafer ratio (atoms/cm.sup.3) (atoms/cm.sup.3) back
(BMDs/cm.sup.3) (BMDs/cm.sup.3) Embodiment About 1 1 .times.
10.sup.15 1.2 .times. 10.sup.18 0 5.0 .times. 10.sup.9 3.3 .times.
10.sup.9 example 3 Embodiment About 1 5 .times. 10.sup.15 1.2
.times. 10.sup.18 0 2.3 .times. 10.sup.10 5.0 .times. 10.sup.9
example 4 Embodiment About 1 5 .times. 10.sup.14 1.2 .times.
10.sup.18 0.5 5.5 .times. 10.sup.9 5.0 .times. 10.sup.9 example 5
Embodiment About 1 5 .times. 10.sup.14 1.2 .times. 10.sup.18 1.0
6.5 .times. 10.sup.9 5.5 .times. 10.sup.9 example 6 Embodiment
About 1 5 .times. 10.sup.14 1.2 .times. 10.sup.18 1.5 9.0 .times.
10.sup.9 7.5 .times. 10.sup.9 example 7 Embodiment About 1 1
.times. 10.sup.15 1.2 .times. 10.sup.18 1.0 1.7 .times. 10.sup.10
1.6 .times. 10.sup.10 example 8 Embodiment About 1 5 .times.
10.sup.15 1.2 .times. 10.sup.18 1.0 3.1 .times. 10.sup.10 3.0
.times. 10.sup.10 example 9 Embodiment About 1 1 .times. 10.sup.15
1.2 .times. 10.sup.18 1.5 1.8 .times. 10.sup.10 1.7 .times.
10.sup.10 example 10 Embodiment About 1 5 .times. 10.sup.15 1.2
.times. 10.sup.18 1.5 3.3 .times. 10.sup.10 3.1 .times. 10.sup.10
example 11 Comparative About 1 5 .times. 10.sup.14 1.2 .times.
10.sup.18 0 3.5 .times. 10.sup.9 5.0 .times. 10.sup.6 example 8
Comparative About 1 1 .times. 10.sup.16 1.2 .times. 10.sup.18 0 6.0
.times. 10.sup.10 1.0 .times. 10.sup.10 example 9 Comparative About
1 1 .times. 10.sup.16 1.2 .times. 10.sup.18 1.0 1.7 .times.
10.sup.11 1.6 .times. 10.sup.11 example 10 Comparative About 1 1
.times. 10.sup.16 1.2 .times. 10.sup.18 1.5 2.3 .times. 10.sup.11
2.2 .times. 10.sup.11 example 11
* * * * *