U.S. patent application number 12/987397 was filed with the patent office on 2011-05-05 for electro-optical device and thin film transistor and method for forming the same.
This patent application is currently assigned to SEMICONDUCTOR ENERGY LABORATORY CO., LTD.. Invention is credited to Naoto KUSUMOTO, Hongyong ZHANG.
Application Number | 20110101362 12/987397 |
Document ID | / |
Family ID | 15980350 |
Filed Date | 2011-05-05 |
United States Patent
Application |
20110101362 |
Kind Code |
A1 |
ZHANG; Hongyong ; et
al. |
May 5, 2011 |
ELECTRO-OPTICAL DEVICE AND THIN FILM TRANSISTOR AND METHOD FOR
FORMING THE SAME
Abstract
A semiconductor device having a pair of impurity doped second
semiconductor layers, formed on a first semiconductor layer having
a channel formation region therein, an outer edge of the first
semiconductor film being at least partly coextensive with an outer
edge of the impurity doped second semiconductor layers. The
semiconductor device further includes source and drain electrodes
formed on the pair of impurity doped second semiconductor layers,
wherein the pair of impurity doped second semiconductor layers
extend beyond inner sides edges of the source and drain electrodes
so that a stepped portion is formed from an upper surface of the
source and drain electrodes to a surface of the first semiconductor
film.
Inventors: |
ZHANG; Hongyong; (Yamato,
JP) ; KUSUMOTO; Naoto; (Atsugi, JP) |
Assignee: |
SEMICONDUCTOR ENERGY LABORATORY
CO., LTD.
Atsugi
JP
|
Family ID: |
15980350 |
Appl. No.: |
12/987397 |
Filed: |
January 10, 2011 |
Related U.S. Patent Documents
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Application
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Filing Date |
Patent Number |
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11898833 |
Sep 17, 2007 |
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12987397 |
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10925984 |
Aug 26, 2004 |
7507991 |
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11898833 |
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10140176 |
May 8, 2002 |
6847064 |
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10925984 |
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10011708 |
Dec 11, 2001 |
6797548 |
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10140176 |
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09291279 |
Apr 14, 1999 |
6335213 |
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10011708 |
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09045696 |
Mar 23, 1998 |
6124155 |
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09291279 |
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08455067 |
May 31, 1995 |
5811328 |
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09045696 |
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08260751 |
Jun 15, 1994 |
5648662 |
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08455067 |
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07895029 |
Jun 8, 1992 |
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08260751 |
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Current U.S.
Class: |
257/60 ;
257/E29.291 |
Current CPC
Class: |
G02F 1/13454 20130101;
H01L 29/66765 20130101; H01L 21/2026 20130101; H01L 27/1274
20130101; H01L 21/02675 20130101; H01L 29/78678 20130101; H01L
29/41733 20130101; H01L 29/66757 20130101; H01L 21/02532 20130101;
H01L 29/78675 20130101; H01L 27/1229 20130101; H01L 27/1214
20130101 |
Class at
Publication: |
257/60 ;
257/E29.291 |
International
Class: |
H01L 29/786 20060101
H01L029/786 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 19, 1991 |
JP |
3-174541 |
Claims
1. A display device comprising: a gate electrode over a glass
substrate; a gate insulating film over the gate electrode; a
semiconductor film over the gate electrode with the gate insulating
film interposed therebetween, the semiconductor film including a
channel forming region; a source region and a drain region, each
comprising an N-type semiconductor film on the semiconductor film;
a source electrode on the source region; a drain electrode on the
drain region; a passivation film over the glass substrate to cover
at least the source electrode and the drain electrode, the channel
forming region, a part of a surface of the source region not
covered by the source electrode and a part of a surface of the
drain region not covered by the drain electrode, wherein each of
the source region and the drain region has a bottom surface in
contact with the semiconductor film, each of the source electrode
and the drain electrode has a bottom surface in contact with
corresponding one of the source region and the drain region, and a
distance between opposed ends of the bottom surfaces of the source
electrode and the drain electrode is larger than a distance between
opposed ends of the bottom surfaces of the source region and the
drain region.
2. The display device according to claim 1 wherein the passivation
film is in direct contact with a surface of the channel forming
region.
3. The display device according to claim 1 wherein the
semiconductor film comprises amorphous silicon.
4. The display device according to claim 1 wherein each of the
source region and the drain region partly overlaps the gate
electrode.
5. The display device according to claim 1 wherein the gate
insulating film comprises silicon nitride.
6. The display device according to claim 1 wherein the passivation
film comprises silicon oxide.
7. The display device according to claim 1 wherein at least the
channel forming region is crystallized.
8. A display device comprising: a gate electrode over a glass
substrate; a gate insulating film on the gate electrode; a
semiconductor film over the gate electrode with the gate insulating
film interposed therebetween, the semiconductor film including a
channel forming region; a source region and a drain region, each
comprising an N-type semiconductor film on the semiconductor film;
a source electrode on the source region; a drain electrode on the
drain region; a passivation film over the glass substrate to cover
at least the source electrode and the drain electrode, the channel
forming region, a part of a surface of the source region not
covered by the source electrode and a part of a surface of the
drain region not covered by the drain electrode, wherein an upper
portion of each of the source region and the drain region extends
beyond a lower portion of each of the source electrode and the
drain electrode so that a distance between the source region and
the drain region is shorter than a distance between the source
electrode and the drain electrode.
9. The display device according to claim 8 wherein the passivation
film is in direct contact with a surface of the channel forming
region.
10. The display device according to claim 8 wherein the
semiconductor film comprises amorphous silicon.
11. The display device according to claim 8 wherein each of the
source region and the drain region partly overlaps the gate
electrode.
12. The display device according to claim 8 wherein the gate
insulating film comprises silicon nitride.
13. The display device according to claim 8 wherein the passivation
film comprises silicon oxide.
14. The display device according to claim 8 wherein at least the
channel forming region is crystallized.
15. The display device according to claim 8 wherein an upper
surface of at least a part of the upper portion of each of the
source region and the drain region is substantially parallel with
an upper surface of the semiconductor film.
16. A display device comprising: a gate electrode over a glass
substrate; a gate insulating film over the gate electrode; a
semiconductor film over the gate electrode with the gate insulating
film interposed therebetween, the semiconductor film including a
channel forming region; a source region and a drain region, each
comprising an N-type semiconductor film on the semiconductor film;
a source electrode on the source region; a drain electrode on the
drain region; a passivation film over the glass substrate to cover
at least the source electrode and the drain electrode, the channel
forming region, a part of a surface of the source region not
covered by the source electrode and a part of a surface of the
drain region not covered by the drain electrode, wherein a first
portion of each of the source region and the drain region extends
beyond a lower portion of each of the source electrode and the
drain electrode so that a distance between the source region and
the drain region is shorter than a distance between the source
electrode and the drain electrode, and a thickness of the source
region and the drain region in at least a part of the first portion
is substantially the same as a thickness of at least a part of a
second portion of each of the source region and the drain region
covered by the source electrode and the drain electrode.
17. The display device according to claim 16 wherein the
passivation film is in direct contact with a surface of the channel
forming region.
18. The display device according to claim 16 wherein the
semiconductor film comprises amorphous silicon.
19. The display device according to claim 16 wherein each of the
source region and the drain region partly overlaps the gate
electrode.
20. The display device according to claim 16 wherein the gate
insulating film comprises silicon nitride.
21. The display device according to claim 16 wherein the
passivation film comprises silicon oxide.
22. The display device according to claim 16 wherein at least the
channel forming region is crystallized.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to an electro-optical device
and a thin film transistor and a method for forming the same, in
particular, to a method of fabricating polycrystalline, or
microcrystalline, silicon thin film transistors.
BACKGROUND OF THE INVENTION
[0002] One method of obtaining a polycrystalline, or
micro-crystalline, silicon film is to irradiate a completed
amorphous silicon film with laser radiation, for crystallizing the
amorphous silicon. This method is generally well known.
Laser-crystallized thin-film transistors fabricated by making use
of this technique are superior to amorphous silicon thin-film
transistors in electrical characteristics including field effect
mobility and, therefore, these laser-crystallized thin-film
transistors are used in peripheral circuit-activating circuits for
active liquid-crystal displays, image sensors, and so forth.
[0003] The typical method of fabricating a laser-crystallized
thin-film transistor is initiated by preparing an amorphous silicon
film as a starting film. This starting film is irradiated with
laser radiation to crystallize it. Subsequently, the film undergoes
a series of manufacturing steps to process the device structure.
The most striking feature of the conventional manufacturing process
is to carry out the crystallization step as the initial or an
intermediate step of the series of manufacturing steps described
above.
[0004] Where thin-film transistors are fabricated by this
manufacturing method, the following problems take place:
[0005] (1) Since the laser crystallization operation is performed
as one step of the manufacturing process, the electrical
characteristics of the thin-film transistor (TFT) cannot be
evaluated until the device is completed. Also, it is difficult to
control the characteristics.
[0006] (2) Since the laser crystallization operation is effected at
the beginning of, or during, the fabrication of the TFT, it is
impossible to modify various electrical characteristics after the
device structure is completed. Hence, the production yield of the
whole circuit system is low.
SUMMARY OF THE INVENTION
[0007] It is an object of the present invention to provide a novel
method of fabricating polycrystalline, or microcrystal-line, thin
film transistors without incurring the foregoing problems.
[0008] In accordance with the present invention, in order to make
it possible to crystallize a channel formation region and to
activate the Ohmic contact region of the source and drain by laser
irradiation after the device structure of a thin film transistor is
completed, a part of the channel formation region and parts of the
source and drain on the side of the channel formation region are
exposed to incident laser radiation. Alternatively, the source and
drain regions are located on the upstream side of the source and
drain electrodes as viewed, from the incident laser radiation, and
parts of the source and drain regions are in contact with the
surface of the channel formation region on which the laser
radiation impinges.
[0009] The activation of the source and drain regions is intended
to impart energy to those regions which are doped with a dopant to
improve the p- or n-type characteristics, thus activating the
dopant where a group III or V dopant atom is implanted into an
intrinsic amorphous silicon film by various methods. In this way,
the electrical conductivity of the film is improved.
[0010] Other objects and features of the invention will appear in
the course of the description thereof which follows.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1, (a)-(d), are vertical cross sections of thin film
transistors according to the invention;
[0012] FIG. 2 is a plan view of a liquid-crystal display using thin
film transistors according to the invention;
[0013] FIG. 3, (A)-(H), are cross-sectional views illustrating
steps successively performed to fabricate a thin film transistor
according to the invention;
[0014] FIG. 4 is a plan view of a polysilicon TFT-activated
liquid-crystal display having redundant configurations according to
the invention; and
[0015] FIG. 5 is a circuit diagram of the redundant configurations
of the liquid-crystal display shown in FIG. 4.
DETAILED DESCRIPTION OF THE INVENTION
[0016] A TFT (thin film transistor) according to the present
invention is shown in FIG. 1, (a)-(d). A doped amorphous silicon
layer to become source and drain regions and an intrinsic amorphous
silicon layer to become a channel formation region can be
irradiated with a laser radiation after completion of the device
structure as shown in FIG. 1 (a)-(d) to effectively perform
crystallization and activation thereof. In FIG. 1(a), the distance
between a source electrode 9 and a drain electrode on a TFT island
is set larger than the distance between a source region 11 and a
drain region 12. This permits activation and crystallization of the
source region 11, the drain region 12, and the channel formation
region 5 by laser irradiation from above the substrate.
[0017] At this time, laser radiation having a sufficient energy is
irradiated to crystallize even those portions of the intrinsic
amorphous silicon layer 5 which are under the source and drain
regions, the amorphous layer 5 becoming the channel formation
region. In this manner, a channel exhibiting good characteristics
can be obtained. Because the interface between a gate-insulating
film 4 and the channel formation region is below the channel
formation region, the incidence of the laser radiation does not
deteriorate the interface characteristics. Hence, the
characteristics of the device are not impaired.
[0018] Ultraviolet radiation that is often used as a laser
radiation can penetrate through silicon oxide (SiO.sub.2) and so if
a passivation film 13 consists of silicon oxide (SiO.sub.2), then
laser radiation can be illuminated from above the passivation
film.
[0019] This can also prevent disturbance of the upper surface of
the amorphous silicon film due to the laser irradiation. In
particular, if the passivation film is made of silicon oxide, then
this passivation film plays the same role as a cap layer which is
generally used at time of crystallization of an amorphous silicon
film by laser irradiation. This cap layer is formed on the
amorphous silicon film irradiated with laser radiation and prevents
disturbance of the upper surface of the film when it is irradiated
with the laser radiation. Consequently, a laser-crystallized film
of high quality can be obtained.
[0020] The wavelength of the laser radiation or the material of the
glass substrate 1 is so selected that the laser radiation can
penetrate through the glass substrate 1. A base film 2 is formed on
the glass substrate to prevent intrusion of impurities from the
substrate. If the material of the base film 2 and the material,
e.g., silicon oxide, of the gate insulating film pass, the laser
radiation, then the gate electrode 3 is made narrower than the
distance between the source and drain electrodes to permit
irradiation of the laser radiation from below the substrate. As a
result, the doped regions under the source and drain electrodes can
be crystallized and activated. This further improves various
characteristics. If the base layer and the gate insulating film are
made of silicon oxide, then they act as cap layers and prevent
disturbance of the lower surface of the film.
[0021] FIG. 1(b) shows an improvement over the structure shown in
FIG. 1(a). In this structure of FIG. 1(b), the source and drain
regions are more effectively activated by laser irradiation.
[0022] In FIG. 1(b), the source region 11 and the drain region 12
which are doped are located on the source electrode 9 and the drain
electrode 10, respectively, and are in contact with the upper
surface of an intrinsic semiconductor layer to become a channel
formation region 5. Laser irradiation to the source and drain
regions only from above them suffices. Therefore, as compared with
the structure shown in FIG. 1(a), various characteristics can be
improved more greatly and controlled over wider ranges. In the same
way as in the structure of FIG. 1(a), irradiation of laser
radiation having a sufficient energy crystallizes the portions of
an intrinsic amorphous silicon layer 5 which are below the source
and drain regions, the silicon layer 5 becoming a channel formation
region. In consequence, a channel having good characteristics can
be derived. Since the interface between the gate insulating film 4
and the channel formation region is below the channel formation
region, the incidence of the laser radiation does not deteriorate
the interface characteristics. Consequently, the characteristics of
the device are not deteriorated. If the passivation film consists
of silicon oxide, then it serves as a cap layer on irradiation of
the laser radiation. The cap layer prevents disturbance of the
upper surfaces of the doped amorphous silicon film and of the
intrinsic amorphous silicon film due to the laser irradiation. The
doped amorphous silicon film forms the source and drain regions.
The intrinsic amorphous silicon film is the channel formation
region.
[0023] Structures shown in FIG. 1, (c) and (d), are totally
inverted versions of the structures of FIG. 1, (a) and (b),
respectively. The wavelength of the laser radiation or the material
of the glass substrate is so selected that the laser radiation can
penetrate the glass substrate. The laser radiation is irradiated
mainly from below the substrate to crystallize and activate the
source and drain regions as well as the channel formation
region.
[0024] The structure of FIG. 1(c) is the totally inverted version
of the structure of FIG. 1(a). The distance between the source
electrode 9 and the drain electrode 10 is set larger than the
distance between the source region 11 and the drain region 12, in
the same way as in the structure of FIG. 1(a). Laser radiation is
illuminated from below the substrate to activate and crystallize
the source and drain regions and the channel formation region
5.
[0025] At this time, laser radiation having a sufficient energy is
illuminated to crystallize even those portions of the intrinsic
amorphous silicon layer 5 which are over the source and drain
regions, the amorphous silicon layer 5 becoming a channel formation
region. Thus, a channel having good characteristics can be
obtained. Since the interface between the gate insulating film and
the channel formation region is located above the channel formation
region, the interface characteristics are not deteriorated by the
incidence of the laser radiation from below the substrate. In
consequence, the characteristics of the device are not
deteriorated.
[0026] If the base film 2 that is formed on the glass substrate 1
to prevent intrusion of impurities from the glass substrate is made
of silicon oxide, then this film acts as a cap layer and prevents
disturbance of the lower surfaces of the amorphous silicon films
some of which are source and drain regions, the remaining amorphous
silicon film being a channel formation film. If the materials of
the passivation film 13 and of the gate insulating film 4 pass the
laser radiation such as silicon oxide, then the gate electrode 3 is
made narrower than the distance between the source and drain
electrodes. Thus, the laser radiation is irradiated from above the
substrate to crystallize and activate the doped regions located
over the source and drain electrodes. Hence, various
characteristics can be improved more greatly. At this time, if the
passivation film and the gate insulating film are made of silicon
oxide, they serve as cap layers and can prevent disturbance of the
upper surfaces of the amorphous silicon films due to the laser
irradiation.
[0027] FIG. 1(d) shows an improvement over the structure shown in
FIG. 1(c). In this structure of FIG. 1(d), the source and drain
regions are more effectively activated by laser irradiation.
[0028] In FIG. 1(d), the source region 11 and the drain region 12
which are doped are located under the source electrode 9 and the
drain electrode 10, respectively, and are in contact with the
undersides of opposite lateral sides of a channel formation region
5. Laser irradiation to the source and drain regions only from
below them suffices. Therefore, as compared with the structure
shown in FIG. 1(c), various characteristics can be improved more
greatly and controlled over wider ranges. In the same way as in the
structure of FIG. 1(c), irradiation of laser radiation having a
sufficient energy crystallizes the portions of an intrinsic
amorphous silicon layer which are above the source and drain
regions, the silicon layer becoming a channel formation region. In
consequence, a channel having good characteristics can be
derived.
[0029] Since the interface between the gate insulating film 4 and
the channel formation region is above the channel formation region,
the incidence of the laser radiation does not deteriorate the
interface characteristics. Consequently, the characteristics of the
device do not deteriorate. If the base film consists of silicon
oxide, then it serves as a cap layer on irradiation of the laser
radiation. The cap layer prevents disturbance of the lower surfaces
of the doped amorphous silicon film and of the intrinsic amorphous
silicon film due to the laser irradiation. The doped amorphous
silicon film forms the source and drain regions. The intrinsic
amorphous silicon film is the channel formation region.
[0030] In the structure described above, the source and drain
regions and the channel formation region can be activated and
crystallized by laser irradiation after the device structure of the
amorphous silicon thin film transistor has been completed.
[0031] As described thus far, laser radiation is not irradiated
before or during processing of the device structure. Rather, the
device is processed during the fabrication of the amorphous silicon
TFTs. The laser radiation is directed to the source, drain regions
and to the channel formation region of desired one or more of the
amorphous silicon TFTs after the device structure is completed
(i.e., the doped semiconductor layers, the intrinsic semiconductor
layer to be a channel located between source and drain regions
adjacent to a gate electrode with a gate insulating film
therebetween, and the gate insulating film are formed, the source
and drain regions are formed, the source and drain and gate
electrodes are formed, and the protective film (passivation film)
are formed) or after a process including formation of conductive
interconnects is completed. In this way, the channel formation
region of the thin film transistor is activated, and the source and
drain regions are activated and crystallized. At this time, if the
electrodes and the conductive interconnects have been completed,
then the laser irradiation can be continued while monitoring
electrical characteristics of any desired amorphous silicon TFT on
the substrate on a real-time basis until an optimum value is
reached. It is also possible to fabricate thin film transistors
having desired characteristics by measuring the electrical
characteristics subsequent to laser irradiation and repeating this
series of steps.
[0032] In this way, plural amorphous silicon TFTs are fabricated by
the same manufacturing method on the same substrate. After the
device structure is completed, desired one or more of the amorphous
silicon TFTs can be made to have desired electrical
characteristics. That is, TFTs having different electrical
characteristics on the same substrate can be manufactured by
irradiation of laser radiation after the device structure is
completed.
[0033] After plural amorphous silicon TFTs are fabricated by the
same manufacturing process on the same substrate and the device
structure is completed, desired one or more of the TFTs are
crystallized by laser irradiation. In this manner, poly-silicon
TFTs are fabricated. As a result, a system comprising the substrate
on which amorphous silicon TFTs and polysilicon. TFTs are
fabricated can be manufactured without relying on different
manufacturing processes.
[0034] The laser irradiation operation is carried out in a quite
short time and, therefore, the polysilicon TFTs can be manufactured
at low temperatures, i.e., between room temperature and 400.degree.
C., without substantially elevating the substrate temperature. This
permits a polysilicon TFT system having a large area to be
fabricated economically without using an expensive glass such as
quartz glass.
[0035] Examples of the invention are given below.
Example 1
[0036] An integrated LCD (liquid-crystal display) system consisted
of amorphous silicon TFTs and polysilicon TFTs. As shown in FIG. 2,
this integrated LCD system needed TFTs 30 for activating pixels
arranged in rows and columns, as well as TFTs for peripheral
circuits. These two kinds of TFTs were required to operate at
totally different speeds. A mobility of about 1 cm.sup.2/Vs
suffices for the TFTs for activating the pixels. On the other hand,
the TFTs for the peripheral circuits must operate at a high speed
on the order of several megahertz. Preferably, therefore, the TFTs
for the activation of the pixels are made of amorphous silicon,
while the TFTs for the peripheral circuits are made of polysilicon.
In this example, the amorphous silicon TFTs and the polysilicon
TFTs could be manufactured simultaneously by the same process for
fabricating the device structure of the system shown in FIG. 2.
[0037] FIG. 3, (A)-(H), schematically illustrate a method of
fabricating a TFT. In this example, the structure of FIG. 1(a), or
the TFT of the inverse staggered structure, was used. Of course,
other structure may also be employed. In FIG. 3(A), a sheet of
glass 1 was made of an inexpensive glass, i.e., excluding quartz
glass, and withstood thermal treatment below 700.degree. C., e.g.,
about at 600.degree. C. Silicon oxide (SiO.sub.2) was deposited as
a base film 2 on the glass sheet 1 up to a thickness of 1000 to
3000 .ANG. by RF (high frequency) sputtering, using a magnetron. In
the present example, the thickness of the base film 2 was 2000
.ANG.. The film was formed within an ambient of 100% oxygen. The
temperature was 150.degree. C. during the formation of the film.
The output of the magnetron was 400 to 800 W. The pressure was 0.5
Pa. A target consisting of quartz or a single crystal of silicon
was used. The deposition rate was 30 to 100 .ANG./min.
[0038] A chromium (Cr) layer 3 which would become a gate electrode
was formed on the base film 2 by a well-known sputtering method.
The thickness of the film was 800 to 1000 .ANG.. In the present
example, the thickness was 1000 .ANG.. This film was patterned with
a first photomask P1, resulting in a structure shown in FIG. 3(B).
The gate electrode may be made of tantalum (Ta). Where the gate
electrode was made of aluminum (Al), the film might be patterned
with the first photomask P1 and then the surface might be anodized
(anodic oxidized).
[0039] A film of silicon nitride (SiN.sub.x) was formed as a
gate-insulating film 4 on the chromium layer 3 by PCVD. The
thickness of the film was 1000 to 5000 .ANG.. In the present
example, the thickness was 3000 .ANG.. The raw material gas
consisted of one part of silane (SiH.sub.4) and three parts of
ammonia gas (NH.sub.3). The film was formed at a temperature of 250
to 350.degree. C. In the present example, the temperature was
260.degree. C. The RF frequency was 13.56 MHz. The RF output power
was 80 W. The pressure was 0.05 torr. The deposition rate was 80
.ANG./min.
[0040] An intrinsic amorphous silicon film 5 was formed on the
gate-insulating film 4 by PCVD. The thickness of the film 5 was 200
to 1000 .ANG.. In the present example, the thickness was 700 .ANG..
Silane (SiH.sub.4) was used as the raw material gas. The film was
formed at a temperature of 150 to 300.degree. C. In the present
example, the temperature was 200.degree. C. The RF frequency was
13.56 MHz. The RF output power was 35 W. The pressure was 0.5 torr.
The deposition rate was 60 .ANG./min.
[0041] A doped amorphous silicon layer 6 was formed on the
intrinsic amorphous silicon film 5 by PCVD. In the present example,
the layer 6 was an n.sup.+-type amorphous silicon layer. The
thickness of the layer 6 was 300 to 500 .ANG.. In the present
example, the thickness was 500 .ANG.. Silane was used as the raw
material gas. Phosphine (PH.sub.3) which accounted for 1% of the
silane was added to implant phosphorus as an n-type dopant. The
film was formed at a temperature of 150 to 300.degree. C. In the
present example, the temperature was 200.degree. C. The RF
frequency was 13.56 MHz. The RF output power was 40 W. The pressure
was 0.5 torr. The deposition rate was 60 .ANG./min.
[0042] The gate insulating film 4, the intrinsic amorphous
silicon-layer 5, and the n.sup.+-type amorphous silicon layer 6
were formed in this way, thus resulting in a laminate shown in FIG.
3(C). These layers were all created by PCVD. Therefore, it is
effective to form them in succession in a multi-chamber system.
Other methods such as low-pressure CVD, sputtering, photo-assisted
CVD may also be adopted. Subsequently, a dry etching process was
performed, using a second photomask P2, to form a TFT island as
shown in FIG. 3(D).
[0043] Then, a chromium layer 7 which would become source and drain
electrodes was formed by sputtering. The resulting laminate is
shown in FIG. 3(E). The thickness was 500 to 1000 .ANG.. In the
present example, the thickness was 800 .ANG.. This layer was
patterned, using a third photomask P3. At this time, the
n.sup.+-type amorphous silicon layer was patterned by dry etching
without peeling off resist 8. Thus, a channel formation region, a
source electrode 9, a drain electrode 10, a source region 11, and a
drain region 12 were formed, resulting in a laminate shown in FIG.
3(F).
[0044] A wet etching process was carried out without peeling off
the resist to perform an overetching process which made the
distance between the source and drain electrodes larger than the
distance between the source and drain regions. This made it
possible to activate and crystallize the source and drain regions
by laser irradiation from above the laminate. Thereafter, the
resist was peeled off, producing a laminate shown in FIG. 3(G).
[0045] As shown in FIG. 3(H), silicon, oxide (SiO.sub.2) was
deposited as a passivation film on the laminate shown in FIG. 3(G)
by the aforementioned RF sputtering. The thickness of this film was
1000 to 3000 .ANG.. In the present example, the thickness was 2000
.ANG.. PCVD and other methods may also be used. In this way, the
device structure of the TFT was completed.
[0046] Thereafter, conductive interconnects were formed. A
measuring instrument was connected. Laser radiation was illuminated
from above the device while monitoring the electrical
characteristics. HP-4142B was employed as the measuring instrument.
An excimer laser was used as the laser. In this example, a KrF
excimer laser producing laser radiation of wavelength 248 nm was
used. Ultraviolet radiation at this wavelength could penetrate
through the passivation film formed at the top of the TFT. The
energy E was 200 to 350 mJ/cm.sup.2. The number of the shot laser
pulses was 1 to 50. The temperature T.sub.s of the substrate was
from room temperature to 400.degree. C. during the
illumination.
[0047] In this way, either the channel formation region or the
source and drain regions or all of them were illuminated with laser
radiation while monitoring the electrical characteristics on the
measuring instrument. As a result, the region or regions were
crystallized and activated. TFTs for activating the matrix of
pixels 30 shown in FIG. 2 exhibited desired characteristics. These
TFTs are huge in number, e.g., 640.times.400=256,000. It is
necessary that these TFTs have exactly the same characteristics.
Hence, it has been very difficult to increase the production yield.
The novel method could greatly reduce defective TFTs whose
characteristics deviate greatly from intended characteristics.
Consequently, the production yield could be enhanced greatly.
[0048] TFTs 31 (FIG. 2) for peripheral circuits were sufficiently
illuminated with laser radiation. The result is that the
characteristics were improved greatly. Before the laser
illumination, the field effect mobility .mu..sub.1 was 0.5 to 0.8
cm.sup.2/Vs and the threshold voltage V.sub.th1 was 10 to 20 V.
After the laser illumination, the field effect mobility .mu..sub.2
was 10 to 100 cm.sup.2/Vs and the threshold voltage V.sub.th2 was 5
to 7 V. In this way, the characteristics were improved greatly. The
TFTs could operate at a sufficiently large velocity to activate the
peripheral circuits of a liquid crystal display device. The channel
formation region made of an amorphous silicon film was crystallized
and became a polysilicon film having a high carrier mobility. The
TFTs had satisfactory characteristics as polysilicon TFTs.
[0049] Then, ITO (indium tin oxide) was sputtered on the substrate
up to a thickness of 0.1 .mu.m. Pixel electrodes were created by
patterning using a photomask. Pixel electrodes, were then connected
with the thin film transistors. This ITO film was created at a
temperature between room temperature and 150.degree. C. followed by
an anneal within oxygen ambient or within the atmosphere at a
temperature of 200 to 400.degree. C. If the pixel electrodes are
not deteriorated by the laser radiation, then the TFTs may be
illuminated with laser radiation after the pixel electrodes are
completed.
[0050] A polyimide precursor was printed on the substrate by an
offset method. The laminate was sintered within a non-oxidizing
ambient of, for example, nitrogen at 350.degree. C. for 1 hour.
Then, the polyimide surface was changed in quality by a well-known
rubbing method. A means of orienting the liquid-crystal molecules
in a given direction at least at the beginning was produced
thereby. In this manner, one substrate of a liquid-crystal display
was obtained.
[0051] The other substrate was created by sputtering ITO over the
whole surface of one side of the glass substrate up to a thickness
of 1 .mu.m and patterning the ITO into a counter electrode, using a
photomask. The ITO film was formed at a temperature between room
temperature and 150.degree. C., and then annealed within an oxygen
or atmospheric ambient at 200 to 300.degree. C. Consequently, a
second substrate was obtained.
[0052] A polyimide precursor was printed on the substrate by an
offset method. The laminate was sintered at 350.degree. C. for 1
hour within a non-oxidizing ambient of, for example, nitrogen.
Then, the polyimide surface was changed in quality by a well-known
rubbing method. A means of orienting the liquid-crystal molecules
in a given direction at least at the beginning was produced
thereby.
[0053] Then, a nematic-liquid crystal was sandwiched between the
aforementioned two substrates to form an electro-optical modulating
layer between the two substrates. Thereby, the counter electrode is
provided on the electro-optical modulating layer. External leads
were bonded. A polarizing plate was stuck to the outer surface,
thus producing a transmission-type liquid-crystal display. The
derived liquid-crystal display was comparable to a liquid-crystal
display in which TFTs for activating a matrix of pixels are
fabricated independent of peripheral driving circuits.
[0054] As described thus far, in order to crystallize and activate
the channel formation region, the source and drain regions by laser
irradiation after the completion of the device structure, it is
necessary that the incident side, or the passivation film at the
top of the laminate, pass ultraviolet radiation. In the channel
formation region, it is the interface with the gate insulating film
which operates as a channel in practice. Therefore, the intrinsic
amorphous silicon layer which becomes the channel formation region
must be crystallized sufficiently. For this purpose, this amorphous
silicon layer should be made as thin as possible.
[0055] In this way, the various characteristics can be controlled
and polysilicon TFTs can be fabricated by irradiating the amorphous
silicon TFTs with laser radiation after the device structure is
completed. Also, the amorphous silicon TFTs and the polysilicon
TFTs can be manufactured separately on the same substrate during
the same process for fabricating the same device structure.
Furthermore, a circuit system having numerous polysilicon TFTs can
be fabricated at a low temperature between room temperature and
400.degree. C. The system can be manufactured economically without
using an expensive glass such as quartz glass.
Example 2
[0056] A polysilicon TFT liquid-crystal display having redundant
circuit configurations was fabricated in accordance with the
present invention. It is very difficult to completely operate all
TFTs of a circuit system using numerous polysilicon TFTs such as a
polysilicon TFT liquid-crystal display. In reality, some form of
redundant configuration is often adopted to improve the production
yield. One kind of redundant configuration for amorphous silicon
TFTs for activating the matrix of pixels of an amorphous silicon
TFT liquid-crystal display comprises two TFTs connected in
parallel. These two TFTs are operated simultaneously. If one of
them does not operate for some cause or other, the other operates.
This improves the production yield. However, the electric current
flowing through one polysilicon TFT when it is conducting is as
large as about 0.1 mA, which is approximately 100 times as high as
the current of about 1 .mu.A flowing through a conducting amorphous
silicon TFT. If twice as many as TFTs are operated for redundancy,
then it follows that an exorbitant amount of current is wasted.
Therefore, it is desired that each one pixel be activated by one
TFT.
[0057] Another form of redundant configuration used in a
laser-crystallized polysilicon TFT circuit system comprises two
identical polysilicon TFT circuits which can be connected in
parallel. One circuit is operated at first. When this circuit
ceases to operate normally, or if a malfunction is discovered at
the time of an operation check, the operated circuit is switched to
the other. In this case, both circuits must be fabricated from
laser-crystallized polysilicon TFTs. Hence, the time of the laser
irradiation operation is doubled. Also, the energy consumed is
doubled. The time taken to complete the product is prolonged. In
addition, the cost is increased.
[0058] These problems are solved by a novel method described now.
FIG. 4 shows a polysilicon TFT liquid-crystal display having
redundant configurations according to the invention. As shown in
FIGS. 4 and 5, in this liquid-crystal display, all TFTs 20 for
activating pixels arranged in rows and columns and a shift register
21 in a peripheral circuit have redundant configurations. Each TFT
configuration for activating a pixel has two identical TFTs. The
shift register has two identical circuits.
[0059] First, all TFTs having redundant configuration were
manufactured. Each TFT assumed the structure shown in FIG. 1,
(a)-(d). After the device structure was completed, it was
irradiated with laser radiation to change the TFTs into polysilicon
TFTs. The TFTs were manufactured in the sequence shown in FIG. 3,
(A)-(H), as described in connection with Example 1. A passivation
film was formed. The process proceeded to the condition in which
the pixel electrodes were not yet formed, i.e., to the step of FIG.
3(H).
[0060] FIG. 5 shows the arrangement of the TFTs for activating
pixels arranged in rows and columns. These TFTs were amorphous
silicon TFTs. Two TFTs were connected in parallel. Each pair of
TFTs were connected with every pixel electrode. One of these two
TFTs, TFT 23 in this example, was irradiated with laser radiation
to make the TFT a polysilicon TFT. A measuring instrument was
connected, and the operation was checked. If no trouble was found,
then the operator went to the next step. Since the redundant TFT 24
was an amorphous silicon TFT, the working current was two orders of
magnitude less than the working current through a polysilicon TFT.
Therefore, the effects of redundant TFT could be substantially
neglected. Furthermore, parallel operation does not occur, because
the threshold voltage for a polysilicon TFT was 0 to about 10 V,
whereas the threshold voltage for an amorphous silicon TFT was
about 10 to 20 V. In this manner, only the laser-crystallized
polysilicon TFT operated.
[0061] If any TFT does not operate normally, the redundant
amorphous silicon TFT (24 in this example) forming a pair with the
malfunctioning TFT is irradiated with laser radiation to make the
amorphous silicon TFT a polysilicon TFT. If necessary, the
interconnect to the non-redundant TFT, or point A in this example,
is broken by the laser irradiation. In this manner, the operated
TFT can be easily switched to the redundant TFT.
[0062] In this structure, if it is not necessary to switch the
operated TFT to the redundant TFT, the polysilicon TFT activating
one pixel is substantially one, though the two TFTs provide a
redundant configuration. The electric power consumed can be halved
compared with the case in which two polysilicon TFTs are connected
in parallel to form a redundant configuration. Also, the operated
TFT can be switched to the redundant TFT by one or more shots of
laser radiation. In consequence, a very simple and efficient method
has been realized.
[0063] The redundant circuit of the shift register also comprises
two same circuits connected in parallel. After the condition shown
in FIG. 3(H), the TFTs are fabricated as amorphous silicon TFTs
until electrodes are connected. Later connection or switching using
a connector or the like may also be made. All the TFTs in one
circuit, 21 in this example, are crystallized by laser irradiation.
A measuring instrument is connected to check the operation. If they
operate normally, then the operator goes to the next step.
[0064] Where both circuits are connected in parallel, the TFT in
the redundant circuit is an amorphous silicon TFT and, therefore,
the working current is about two orders of magnitude smaller than
the working current through a polysilicon TFT. Hence, the effects
of the TFT in the redundant circuit are substantially negligible.
Furthermore, parallel operation does not occur, because the
threshold voltage for a polysilicon TFT is 0 to about 10 V, whereas
the threshold voltage for an amorphous silicon TFT is about 10 to
20 V. In this manner, only the laser-crystallized polysilicon TFT
operates.
[0065] If the circuit does not operate normally, the amorphous
silicon TFT in the redundant circuit 22 is irradiated with laser
radiation to change the amorphous silicon TFT into a polysilicon
TFT. If necessary, the interconnect (point B in this example) to
the non-redundant circuit is broken by laser radiation. In this
way, the operated circuit is easily switched to the redundant
circuit. Of course, the connection or switching may be made by a
connector or the like.
[0066] Consequently, crystallization by laser irradiation is not
needed unless the necessity of switching to the redundant circuit
arises. The time for which laser radiation is irradiated is halved
compared with the case in which all TFTs are irradiated with laser
radiation at the beginning of, or during, the process for
manufacturing them. As such, wasteful consumption of energy is
avoided. Also, the process time is shortened. A reduction in the
cost is accomplished. Furthermore, energy is saved. In addition,
the operation for switching the operated TFT to the redundant TFT
can be quite easily performed without involving complex wiring
operations.
[0067] Moreover, this method can be applied to a device which
malfunctions in use, as well as to a device that is being
manufactured. The performance of the used device can be recovered
similarly. In, this manner, the novel structure realizes an
advantageous redundant configuration in a circuit comprising a
polysilicon TFT. That is, this redundant configuration offers a
reduction in the electric power consumed, a reduction in the
manufacturing time, a reduction in the cost, and energy saving.
[0068] The novel manufacturing method yields the following
advantages. After the device structure is completed, laser
radiation is illuminated while monitoring the electrical
characteristics. This makes it easy to control the optimum
parameter of thin film transistors forming a circuit system. In the
case of a TFT liquid-crystal display or the like needing a quite
large number of TFTs, they are required to have uniform
characteristics. If the characteristics of the TFTs vary, the
variations can be corrected by the novel method. Hence, the quality
and the production yield can be improved greatly. Additionally, the
quality and the production yield can be enhanced simultaneously
without the need to subject the device structure to any complex
step.
[0069] The present invention permits the various electrical
characteristics such as the mobility of the thin film transistors
on the same substrate to be controlled at will. Also, a mixed
system comprising amorphous silicon TFTs and polysilicon TFTs can
be fabricated by crystallizing only requisite TFTs.
[0070] Since the laser radiation is irradiated only for a quite
short time, the substrate temperature is hardly elevated and so
polysilicon TFT can be manufactured at low temperatures between
room temperature and 400.degree. C. In consequence, a polysilicon.
TFT system having a large area can be fabricated economically
without using an expensive glass such as quartz glass.
[0071] The novel TFT structures and general TFT structures are
manufactured on the same substrate, making use of amorphous
silicon. Laser radiation is directed to the TFTs of the novel
structure. Thus, a mixed system comprising amorphous silicon TFTs
and polysilicon TFTs can be realized.
[0072] As described thus far, the novel method of manufacturing
thin film transistors yields numerous advantages. In this way, the
novel method is industrially advantageous.
* * * * *