U.S. patent application number 12/491976 was filed with the patent office on 2010-12-30 for contact for a semiconductor light emitting device.
This patent application is currently assigned to KONINKLIJKE PHILIPS ELECTRONICS N.V.. Invention is credited to Aurelien J.F. DAVID, John E. EPLER.
Application Number | 20100327300 12/491976 |
Document ID | / |
Family ID | 43379711 |
Filed Date | 2010-12-30 |
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United States Patent
Application |
20100327300 |
Kind Code |
A1 |
EPLER; John E. ; et
al. |
December 30, 2010 |
CONTACT FOR A SEMICONDUCTOR LIGHT EMITTING DEVICE
Abstract
Embodiments of the invention include a semiconductor structure
comprising a III-nitride light emitting layer disposed between an
n-type region and a p-type region. A contact disposed on the p-type
region includes a transparent conductive material in direct contact
with the p-type region, a reflective metal layer, and a transparent
insulating material disposed between the transparent conductive
layer and the reflective metal layer. In a plurality of openings in
the transparent insulating material, the transparent conductive
material is in direct contact with the reflective metal layer.
Inventors: |
EPLER; John E.; (San Jose,
CA) ; DAVID; Aurelien J.F.; (Palo Alto, CA) |
Correspondence
Address: |
PHILIPS INTELLECTUAL PROPERTY & STANDARDS
P.O. BOX 3001
BRIARCLIFF MANOR
NY
10510
US
|
Assignee: |
KONINKLIJKE PHILIPS ELECTRONICS
N.V.
EINDHOVEN
CA
PHILIPS LUMILEDS LIGHTING COMPANY, LLC
SAN JOSE
|
Family ID: |
43379711 |
Appl. No.: |
12/491976 |
Filed: |
June 25, 2009 |
Current U.S.
Class: |
257/98 ; 257/103;
257/99; 257/E33.023; 257/E33.061; 257/E33.064 |
Current CPC
Class: |
H01L 33/42 20130101;
H01L 33/405 20130101 |
Class at
Publication: |
257/98 ; 257/99;
257/103; 257/E33.023; 257/E33.061; 257/E33.064 |
International
Class: |
H01L 33/00 20060101
H01L033/00 |
Claims
1. A device comprising: a semiconductor structure comprising a
III-nitride light emitting layer disposed between an n-type region
and a p-type region; a contact disposed on the p-type region, the
contact comprising: a transparent conductive material in direct
contact with the p-type region; a reflective metal layer; an
transparent insulating material disposed between the transparent
conductive layer and the reflective metal layer; and a plurality of
openings in the transparent insulating material, wherein the
transparent conductive material is in direct contact with the
reflective metal layer in the plurality of openings.
2. The device of claim 1 wherein the transparent conductive
material is one of silver and aluminum.
3. The device of claim 2 wherein the transparent conductive
material comprises a plurality of discrete regions that occupy less
than 10% of an area of a surface of the p-type region on which the
contact is disposed.
4. The device of claim 1 wherein the transparent conductive
material has a thickness between 0.5 and 10 nanometers.
5. The device of claim 1 wherein the transparent conductive
material is an oxide and has a thickness between 30 and 1000
nanometers.
6. The device of claim 1 wherein the transparent conductive
material is one of indium tin oxide, nickel oxide, and ZnO.
7. The device of claim 1 wherein the transparent insulating
material is one of SiO.sub.x, SiN.sub.x, MgF.sub.2, and
Al.sub.2O.sub.3.
8. The device of claim 1 wherein the transparent insulating
material has a thickness between 200 and 500 nm.
9. The device of claim 1 wherein the openings have a width between
two and fifteen microns.
10. The device of claim 1 wherein the openings are spaced between
20 and 200 microns apart.
11. The device of claim 1 wherein the transparent insulating
material comprises a multi-layer stack.
12. The device of claim 11 wherein: a first layer in the
multi-layer stack is in direct contact with the transparent
conductive material; a second layer in the multi-layer stack is in
direct contact with the reflective metal layer; and a third layer
disposed between the first and second layers has a lower index of
refraction than the first and second layers.
13. The device of claim 1 wherein the reflective metal layer
comprises silver.
14. The device of claim 1 wherein a surface of the p-type region in
direct contact with the transparent conductive material is
rough.
15. The device of claim 1 wherein the openings extend into the
transparent conductive material.
16. The device of claim 1 wherein the openings have a sidewall
angle between 5 and 50 degrees with respect to a normal to a top
surface of the reflective metal layer.
17. The device of claim 1 wherein at least one of the transparent
insulating material and the transparent conductive material is
porous.
Description
FIELD OF INVENTION
[0001] The present invention relates to a reflective contact for a
III-nitride light emitting device.
BACKGROUND
[0002] Semiconductor light-emitting devices including light
emitting diodes (LEDs), resonant cavity light emitting diodes
(RCLEDs), vertical cavity laser diodes (VCSELs), and edge emitting
lasers are among the most efficient light sources currently
available. Materials systems currently of interest in the
manufacture of high-brightness light emitting devices capable of
operation across the visible spectrum include Group III-V
semiconductors, particularly binary, ternary, and quaternary alloys
of gallium, aluminum, indium, and nitrogen, also referred to as
III-nitride materials. Typically, III-nitride light emitting
devices are fabricated by epitaxially growing a stack of
semiconductor layers of different compositions and dopant
concentrations on a sapphire, silicon carbide, III-nitride,
composite, or other suitable substrate by metal-organic chemical
vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other
epitaxial techniques. The stack often includes one or more n-type
layers doped with, for example, Si, formed over the substrate, one
or more light emitting layers in an active region formed over the
n-type layer or layers, and one or more p-type layers doped with,
for example, Mg, formed over the active region. Electrical contacts
are formed on the n- and p-type regions. III-nitride devices are
often formed as inverted or flip chip devices, where both the n-
and p-contacts formed on the same side of the semiconductor
structure, and light is extracted from the side of the
semiconductor structure opposite the contacts.
[0003] U.S. Pat. No. 6,514,782 describes III-nitride flip chip
LEDs. "Because of the high resistivity of p-type III-nitride
layers, LED designs employ metallization along the p-type layers to
provide p-side current spreading . . . For an inverted design,
using highly reflective electrode metallizations is critical to
improve the extraction efficiency . . . The p electrode is the
dominant factor for light extraction because it extends almost
completely across the active area to provide uniform current
injection into the p-n junction.
[0004] "The combination of low optical absorption and low contact
resistivity in a manufacturable process are difficult to achieve
for III-nitride devices. For example, Ag makes a good p-type Ohmic
contact and is very reflective, but suffers from poor adhesion to
III-nitride layers and from susceptibility to electro-migration in
humid environments which can lead to catastrophic device failure.
Al is reasonably reflective but does not make good Ohmic contact to
p-type III-nitride materials, while other elemental metals are
fairly absorbing (>25% absorption per pass in the visible
wavelength regime). A possible solution is to use a multi-layer
contact which includes a very thin semi-transparent Ohmic contact
in conjunction with a thick reflective layer which acts as a
current spreading layer. An optional barrier layer is included
between the Ohmic layer and the reflective layer. One example of a
p-type multi-layer contact is Au/NiO.sub.x/Al. Typical thicknesses
for this metallization scheme are 30/100/1500 .ANG.. Similarly, a
suitable n-type GaN multi-layer contact is Ti/Al with typical
thicknesses of 30/1500 .ANG.. Since the p-electrode reflectivity is
a dominant factor in extraction efficiency, it must not be
compromised in designing for manufacturability."
SUMMARY
[0005] It is an object of the present invention to include in a
reflective contact a thin, transparent current spreading layer and
a transparent insulating material. In some embodiments,
reflectivity of the contact may be improved over a device with a
reflective metal contact.
[0006] Embodiments of the invention include a semiconductor
structure comprising a III-nitride light emitting layer disposed
between an n-type region and a p-type region. A contact disposed on
the p-type region includes a transparent conductive material in
direct contact with the p-type region, a reflective metal layer,
and a transparent insulating material disposed between the
transparent conductive layer and the reflective metal layer. In a
plurality of openings in the transparent insulating material, the
transparent conductive material is in direct contact with the
reflective metal layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] FIG. 1 illustrates a contact including a conductive layer, a
transparent insulating or low-loss layer, and a reflective layer,
formed on a III-nitride semiconductor structure.
[0008] FIG. 2 is a plan view of a portion of a contact including a
low-loss layer with openings.
[0009] FIG. 3 is a cross sectional view of an LED bonded to a
mount.
[0010] FIG. 4 illustrates a contact with openings in the
transparent insulating material that extend into the transparent
conductive material, and have angled sidewalls.
DETAILED DESCRIPTION
[0011] The performance of an LED may be improved by reducing
optical loss associated with the p-contact, without increasing the
forward voltage V.sub.f required to forward bias the LED. A contact
including a dielectric layer, which reflects by total internal
reflection, may be more reflective than a contact where the sole
reflective material is a metal reflector, such as the contacts
described above in U.S. Pat. No. 6,514,782.
[0012] A conductive dielectric layer such as indium tin oxide (ITO)
may be disposed between the p-type material and the silver
p-contact. In such a bilayer, the ITO need not contribute to
current spreading and the thickness may be optimized for highest
reflectance; for example, the ITO may be 200 nm thick. However, ITO
has an index of refraction higher than optimum for optical
reflectivity and may absorb a significant amount of light at
thicknesses required for high conductivity.
[0013] Alternatively, a nonconductive dielectric such as SiO2 may
be disposed between the p-type material and the silver p-contact.
Openings must be formed in the nonconductive dielectric to
electrically connect the silver to the p-type material. The
openings must be spaced close enough together to prevent current
crowding in the poorly conductive p-type material. For example, the
openings may be sub-micron size, which may require expensive and
difficult techniques such as holographic or e-beam exposure of
resist, or the use of a nano-imprinting tool. In addition, etching
openings in the dielectric may damage the exposed p-type material,
which may reduce the efficiency of an Ohmic contact formed on the
damaged material.
[0014] In embodiments of the invention, the p-contact of a
III-nitride LED includes three layers: a thin conductive layer in
direct contact with the p-type semiconductor, a low-optical-loss
dielectric layer disposed over the thin conductive layer with
openings to facilitate electrical contact, and a reflective metal
layer over the transparent dielectric layer.
[0015] FIG. 1 illustrates a portion of a III-nitride device
according to embodiments of the invention. In FIG. 1, a
semiconductor structure including an n-type region, a light
emitting or active region, and a p-type region is grown over a
growth substrate (not shown in FIG. 1), which may be any suitable
growth substrate and which is typically sapphire or SiC. An n-type
region 22 is grown first over the substrate. N-type region 22 may
include multiple layers of different compositions and dopant
concentration including, for example, preparation layers such as
buffer layers or nucleation layers, which may be n-type or not
intentionally doped, release layers designed to facilitate later
release of the growth substrate or thinning of the semiconductor
structure after substrate removal, and n- or even p-type device
layers designed for particular optical or electrical properties
desirable for the light emitting region to efficiently emit
light.
[0016] A light emitting or active region 24 is grown over n-type
region 22. Examples of suitable light emitting regions include a
single thick or thin light emitting layer, or a multiple quantum
well light emitting region including multiple thin or thick quantum
well light emitting layers separated by barrier layers. For
example, a multiple quantum well light emitting region may include
multiple light emitting layers, each with a thickness of 25 .ANG.
or less, separated by barriers, each with a thickness of 100 .ANG.
or less. In some embodiments, the thickness of each of the light
emitting layers in the device is thicker than 50 .ANG..
[0017] A p-type region 26 is grown over light emitting region 24.
Like the n-type region, the p-type region may include multiple
layers of different composition, thickness, and dopant
concentration, including layers that are not intentionally doped,
or n-type layers.
[0018] A thin conductive layer 28 is formed over p-type region 26.
Thin conductive layer 28 may be, for example, silver, aluminum, or
a conductive dielectric such as ITO, nickel oxide, ZnO, or any
other suitable semitransparent conductive material. A silver
conductive layer 28 may be, for example, between 0.5 and 2 nm thick
in some embodiments, between 2 and 8 nm thick in some embodiments,
and 10 nm thick in some embodiments. A conductive layer 28 that is
a transparent conductive oxide may be thicker. For example, the
resistivity of an ITO conductive layer 28 may be 100 times greater
than silver, requiring an ITO conductive layer 28 that is 100 times
thicker than a silver conductive layer 28. To spread current
several microns may require, for example, an ITO conductive layer
28 that is 200 nm thick. The material and thickness of conductive
layer 28 may be selected such that current spreads in conductive
layer 28 for 10 microns, for example.
[0019] In some embodiments, thin conductive layer 28 is formed as a
group of small regions, rather than as a single, uninterrupted,
continuous layer. In some embodiments, a thin layer of silver is
evaporated on the surface of the p-type region 26, then annealed.
During the anneal, the silver tends to agglomerate from a
continuous, planar layer into a network of thicker, discrete
regions. For example, ten Angstroms of silver may be evaporated on
to the p-type region 26. After annealing, the silver regions may
be, for example, about 200 Angstroms long and about 200 Angstroms
thick. The silver regions may be, for example, up to 1 micron apart
in some embodiments and up to 500 nm apart in some embodiments,
such that less than 10% of the surface of the p-type region 26 is
covered with silver in some embodiments. In some embodiments, a
planar thin conductive layer 28 may be formed, then etched to form
a group of small regions. In some embodiments, during silver
deposition the structure is heated to encourage migration and
agglomeration of silver into a network of thicker, discrete
regions.
[0020] A low optical loss material 30 is formed over conductive
layer 28. Low-loss material 30 may be, for example, SiO.sub.x,
SiN.sub.x, MgF.sub.2, Al.sub.2O.sub.3, or any other suitable highly
transparent dielectric that is reflective, manufacturable, and
readily adheres to the conductive layer 28. In some embodiments,
low-loss material 30 has a low index of refraction, so the change
in index of refraction between the low-loss material and the
conductive layer 28 and p-type region 26 is as large as possible.
Low-loss material 30 may be, for example, between 200 and 500 nm
thick in some embodiments, between 250 and 350 nm thick in some
embodiments, and 250 nm thick in some embodiments.
[0021] Openings 32 are then formed in the low-loss material 30, for
example by conventional masking and etching steps. In some
embodiments, endpoint detection is used to avoid etching the
underlying conductive layer 28. In some embodiments, the low-loss
material 30 is etched to near the endpoint with a dry etch, then a
wet etch is used to etch the remaining thickness. FIG. 2 is a plan
view of the structure of FIG. 1 after forming openings 32 in
low-loss material 30. Though round openings formed in a triangular
lattice are illustrated, any suitably-shaped openings in any
suitable lattice may be used. Openings 32 may be, for example, less
than 100 microns in diameter in some embodiments, between 1 and 5
microns in diameter in some embodiments, between 2 and 15 microns
in diameter in some embodiments, between 2 and 4 microns in
diameter in some embodiments, and 3 microns in diameter in some
embodiments. The openings may be spaced, for example, between 20
and 200 microns apart, on centers between 5 and 20 microns apart in
some embodiments, between 10 and 15 microns apart in some
embodiments, 6 microns apart in some embodiments, and 12 microns
apart in some embodiments.
[0022] The size and spacing of the openings may be related to the
resistivity and thickness of conductive layer 28. For example, a
150 nm thick layer of ITO has about the same sheet resistance as a
2 micron thick layer of n-GaN. In a device with a conventional
contact formed on n-GaN, nearest neighbor n-contacts may be spaced
about 150 microns apart. Accordingly, in a device according to
embodiments of the invention with a 150 nm thick ITO conductive
layer 28, the distance between openings 32 may be 150 microns. In a
device according to embodiments of the invention with a 30 nm thick
ITO conductive layer 28, the distance between openings 32 may be 30
microns. If the openings 32 are 3 microns in diameter spaced 30
microns apart, the surface coverage of openings 32 is about 1%.
[0023] The thickness of conductive layer 28 and low-loss material
30 depend on the individual materials used, as well as on the
combination of materials.
[0024] A reflective conductive layer 34 is formed over the
remaining low-loss material 30 and openings 32. Reflective layer 34
electrically connects to the p-type region 26 through openings 32
and conductive layer 28. Reflective layer 34 may be, for example,
silver. Reflective layer 34 may be a multi-layer stack and may
include, for example, one or more reflective metals, on or more
Ohmic contact metals, and one or more guard metals or other guard
materials. One example of a reflective layer 34 is a stack of
silver, nickel, silver, then a guard metal such as TiWN, which may
prevent or reduce electromigration of the silver.
[0025] The light extraction and hence performance of the LED may be
improved by adding lossless scattering to the contact. In some
embodiments, p-type region 26 is grown under conditions which
create a rough surface, which may improve scattering over a smooth
surface. Conductive layer 28 may be formed over the rough surface
as a conformal layer, which would therefore also have a rough
surface. A transparent low-loss layer 30 is then formed, for
example by spin-coating, to cover the roughness and create a smooth
surface. Openings are formed in the low-loss material and a
reflective layer 34 is then formed, as described above. The
roughness of the p-type region 26/conductive layer 28 interface may
cause increased loss as compared to a smooth interface, but
increased extraction may result in an overall improved performance.
In some embodiments, scattering is increased by making low-loss
layer 30 and/or conductive layer 28 porous or columnar in
structure, for example by forming an ITO conductive layer 28 and/or
a SiO.sub.x low-loss layer by oblique-angle deposition. The
increase in porosity is accompanied by a reduction in refractive
index which increases the reflectance of the contact. The porosity
may be controlled by controlling the deposition angle, as described
in "Quantification of porosity and deposition rate of nanoporous
films grown by oblique-angle deposition," Applied Physics Letters
93, 101914 (2008), which is incorporated herein by reference.
[0026] In one example, an Al-doped ZnO conductive layer 28 is
applied to a rough p-type GaN layer grown as the top layer of the
p-type region 26. A low index SiO.sub.x layer 30 is spin-coated
over the ZnO to provide scattering at the ZnO/SiO.sub.x interface
and to planarize the rough ZnO layer. Openings 32 are formed, then
a silver reflective layer 34 is deposited.
[0027] In some embodiments, low-loss material 30 is a multi-layer
dielectric stack. The layers closest to the conductive layer 28 and
the reflective layer 34 are chosen for good adhesion. The inner
layers are chosen for minimum refractive index. Multiple layers may
be formed, for example, in a single processing step. A multi-layer
low-loss structure 30 may be more reliable and more reflective than
a single layer. In addition, the difference in index of refraction
between the layers in a multi-layer stack may provide scattering,
particularly when a multi-layer stack is applied to a rough
surface, as described above.
[0028] In some embodiments, the etch depth of the openings 32 in
the low-loss material 30 is increased to include removal of some of
the underlying conductive layer 28, as illustrated in FIG. 4, which
may improve the electrical contact and may increase scattering. In
some embodiments, the sidewalls 33 of openings 32 are angled to
provide for more optimal scattering of high angle light towards the
extraction surface (i.e. the surface of the device opposite
reflective material 34). The sidewall angle .theta. may be, for
example, between 5 and 50 degrees with respect to the surface
normal.
[0029] FIG. 3 illustrates an LED 42 connected to a mount 40. Before
or after forming the p-contact 48, which includes conductive layer
28, low loss material 30 and reflective material 34, as described
above, portions of the n-type region are exposed by etching away
portions of the p-type region and the light emitting region. The
semiconductor structure, including the n-type region 22, light
emitting region 24, and p-type region 26 is represented by
structure 44 in FIG. 3. N-contact 46 is formed on the exposed
portions of the n-type region.
[0030] LED 42 is bonded to mount 40 by n- and p-interconnects 56
and 58. Interconnects 56 and 58 may be any suitable material, such
as solder or other metals, and may include multiple layers of
materials. In some embodiments, interconnects include at least one
gold layer and the bond between LED 42 and mount 40 is formed by
ultrasonic bonding.
[0031] During ultrasonic bonding, the LED die 42 is positioned on a
mount 40. A bond head is positioned on the top surface of the LED
die, often the top surface of a sapphire growth substrate in the
case of a III-nitride device grown on sapphire. The bond head is
connected to an ultrasonic transducer. The ultrasonic transducer
may be, for example, a stack of lead zirconate titanate (PZT)
layers. When a voltage is applied to the transducer at a frequency
that causes the system to resonate harmonically (often a frequency
on the order of tens or hundreds of kHz), the transducer begins to
vibrate, which in turn causes the bond head and the LED die to
vibrate, often at an amplitude on the order of microns. The
vibration causes atoms in the metal lattice of a structure on the
LED 42 to interdiffuse with a structure on mount 40, resulting in a
metallurgically continuous joint. Heat and/or pressure may be added
during bonding.
[0032] After bonding LED die 42 to mount 40, the growth substrate
on which the semiconductor layers were grown may be removed, for
example by laser lift off, etching, or any other technique suitable
to a particular growth substrate. After removing the growth
substrate, the semiconductor structure may be thinned, for example
by photoelectrochemical etching, and/or the surface may be
roughened or patterned, for example with a photonic crystal
structure. A lens, wavelength converting material, or other
structure known in the art may be disposed over LED 42 after
substrate removal.
[0033] Having described the invention in detail, those skilled in
the art will appreciate that, given the present disclosure,
modifications may be made to the invention without departing from
the spirit of the inventive concept described herein. Therefore, it
is not intended that the scope of the invention be limited to the
specific embodiments illustrated and described.
* * * * *