U.S. patent application number 12/435941 was filed with the patent office on 2010-11-11 for method and apparatus for suppressing noise caused by parasitic capacitance and/or resistance in an electronic circuit or system.
This patent application is currently assigned to CITY UNIVERSITY OF HONG KONG. Invention is credited to Henry Shu Hung CHUNG, Wai To YAN.
Application Number | 20100283436 12/435941 |
Document ID | / |
Family ID | 43061955 |
Filed Date | 2010-11-11 |
United States Patent
Application |
20100283436 |
Kind Code |
A1 |
CHUNG; Henry Shu Hung ; et
al. |
November 11, 2010 |
METHOD AND APPARATUS FOR SUPPRESSING NOISE CAUSED BY PARASITIC
CAPACITANCE AND/OR RESISTANCE IN AN ELECTRONIC CIRCUIT OR
SYSTEM
Abstract
Reducing, suppressing or canceling parallel parasitic
capacitance and/or resistive effects that affect the frequency
response of components, elements and/or circuits in an electronic
circuit or system that exhibit inductance is disclosed. Noise
generated by parallel parasitic capacitance and/or parasitic
resistance of the components, the physical orientation of the
components, and/or the layout of components, devices and/or
conductive tracks (board traces) on printed circuit boards within
an electronic circuit or system is reduced, suppressed or canceled.
The reduction, suppression or cancelation is achieved by adding a
current source in parallel with a part or component of the
electronic circuit or system that exhibits inductance, the current
source being adapted to deliver a compensating current of roughly
equal magnitude and roughly opposite phase to parasitic current
associated with the part or component.
Inventors: |
CHUNG; Henry Shu Hung; (Hong
Kong, HK) ; YAN; Wai To; (New Territories,
HK) |
Correspondence
Address: |
HESLIN ROTHENBERG FARLEY & MESITI PC
5 COLUMBIA CIRCLE
ALBANY
NY
12203
US
|
Assignee: |
CITY UNIVERSITY OF HONG
KONG
Kowloon
HK
|
Family ID: |
43061955 |
Appl. No.: |
12/435941 |
Filed: |
May 5, 2009 |
Current U.S.
Class: |
323/212 |
Current CPC
Class: |
H03K 5/1252 20130101;
H02M 3/155 20130101; H02M 1/15 20130101 |
Class at
Publication: |
323/212 |
International
Class: |
G05F 5/00 20060101
G05F005/00 |
Claims
1. A method of reducing a parasitic effect in an electronic circuit
or system, comprising: identifying a part of the electronic circuit
or system that exhibits inductance; determining a value of a
parallel parasitic effect associated with said part of the
electronic circuit or system that exhibits inductance; sensing a
voltage signal across said part of the electronic circuit or
system; determining from said sensed voltage signal and said value
of the parallel parasitic effect a parasitic current associated
with said part of the electronic circuit or system; and adding a
current source in parallel with said part of the electronic circuit
or system; wherein said current source is arranged to deliver a
compensating current of roughly equal magnitude and roughly
opposite phase to said determined parasitic current.
2. The method of claim 1, wherein the added current source
comprises an active current source.
3. The method of claim 1, wherein the added current source
comprises at least one of a passive circuit, a linear-type voltage
source, and a switched-mode voltage source.
4. The method of claim 1, wherein the parallel parasitic effect
comprises a parallel capacitive effect, and wherein said
determining a parasitic current and said adding a current source
comprise using a differentiator circuit to differentiate the sensed
voltage signal and using a current driver circuit to generate the
compensating current.
5. The method of claim 1, wherein the parallel parasitic effect
comprises a parallel resistive effect, and wherein said determining
a parasitic current and said adding a current source comprise using
a multiplier circuit to determine the compensating current from the
sensed voltage signal and using a current driver circuit to
generate the compensating current.
6. The method of claim 1, wherein the parallel parasitic effect
comprises both a parallel capacitive effect and a parallel
resistive effect, and wherein said determining a parasitic current
and said adding a current source comprise using a differentiator
circuit to differentiate the sensed voltage signal to determine a
first compensating current for the parallel capacitive effect,
using a multiplier circuit to determine a second compensating
current from the sensed voltage signal for the parallel resistive
effect and using a single current driver circuit to generate a
combined compensating current comprising said first and second
compensating currents.
7. The method of claim 1, wherein said part of the electronic
circuit or system comprises at least one of an electronic system, a
printed circuit board `PCB`, and a component or element on a
PCB.
8. The method of claim 7, wherein said component or element on a
PCB comprises at least one of an inductor, a diode, a transistor,
and closely spaced wires or board traces.
9. An electronic circuit or system, comprising: means for
determining a value of a parallel parasitic effect associated with
a part of the electronic circuit or system that exhibits
inductance; means for sensing a voltage signal across said part of
the electronic circuit or system; means for determining from said
sensed voltage signal and said value of the parallel parasitic
effect a parasitic current associated with said part of the
electronic circuit or system; and a current source in parallel with
said part of the electronic circuit or system; wherein said current
source is arranged to deliver a compensating current of roughly
equal magnitude and roughly opposite phase to said determined
parasitic current.
10. The electronic circuit or system of claim 9, wherein the added
current source comprises an active current source.
11. The electronic circuit or system of claim 9, wherein the added
current source comprises at least one of a passive circuit, a
linear-type voltage source, and a switched-mode voltage source.
12. The electronic circuit or system of claim 9, wherein the
parallel parasitic effect comprises a parallel capacitive effect,
wherein the means for determining the parasitic current comprises a
differentiator circuit to differentiate the sensed voltage signal,
and wherein the current source comprises a current driver circuit
to generate the compensating current.
13. The electronic circuit or system of claim 9, wherein the
parallel parasitic effect comprises a parallel resistive effect,
wherein the means for determining the parasitic current comprises a
multiplier circuit to determine the compensating current from the
sensed voltage signal, and wherein the current source comprises a
current driver circuit to generate the compensating current.
14. The electronic circuit or system of claim 9, wherein the
parallel parasitic effect comprises both a parallel capacitive
effect and a parallel resistive effect, wherein the means for
determining the parasitic current comprises a differentiator
circuit to differentiate the sensed voltage signal to determine a
first compensating current for the parallel capacitive effect and a
multiplier circuit to determine a second compensating current from
the sensed voltage signal for the parallel resistive effect, and
wherein the current source comprises a single current driver
circuit to generate a combined compensating current comprising said
first and second compensating currents.
15. The electronic circuit or system of claim 9, wherein said part
of the electronic circuit or system comprises at least one of an
electronic system, a printed circuit board `PCB`, and a component
or element on said PCB.
16. The method of claim 15, wherein said component or element on a
PCB comprises at least one of an inductor, a diode, a transistor,
and closely spaced wires or board traces.
17. The electronic circuit or system of claim 9, wherein the means
for sensing comprises a voltage sensor.
18. A method of reducing a parasitic effect in an electronic
circuit, comprising: determining a value of a parallel parasitic
effect associated with an inductor in the electronic circuit;
sensing a voltage signal across said inductor; determining from
said sensed voltage signal and said value of the parallel parasitic
effect a parasitic current associated with said inductor; and
adding a current source in parallel with said inductor; wherein
said current source is arranged to deliver a compensating current
of roughly equal magnitude and roughly opposite phase to said
determined parasitic current.
19. An electronic circuit comprising: an inductor; means for
sensing a voltage signal across said inductor; means for
determining from said sensed voltage signal and a value of a
parallel parasitic effect a parasitic current associated with said
inductor; and a current source in parallel with said inductor;
wherein said current source is arranged to deliver a compensating
current of roughly equal magnitude and roughly opposite phase to
said determined parasitic current.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application contains subject matter which is related to
the subject matter of the following applications, each of which is
assigned to the same assignee as this application and filed on the
same day as this application. Each of the below listed applications
is hereby incorporated herein by reference in its entirety:
[0002] patent application Ser. No. 12/435,954, by Chung et al.,
entitled "METHOD AND APPARATUS FOR SUPPRESSING NOISE CAUSED BY
PARASITIC INDUCTANCE AND/OR RESISTANCE IN AN ELECTRONIC CIRCUIT OR
SYSTEM" (Attorney Docket No. 2055.098); and
[0003] patent application Ser. No. 12/435,979, by Chung et al.,
entitled "AN OUTPUT COMPENSATOR FOR A REGULATOR" (Attorney Docket
No. 2055.099).
FIELD OF THE INVENTION
[0004] The present invention relates generally to components,
elements and/or circuits for reducing or suppressing parasitic
capacitance and/or resistive effects that affect the frequency
response of the components, elements and/or circuits in an
electronic circuit or system. The invention relates particularly to
methods and apparatus for reducing, suppressing or even canceling
noise generated by parasitic capacitance and/or parasitic
resistance of the components, the physical orientation of the
components, and/or the layout of components, devices and/or
conductive tracks (board traces) on printed circuit boards within
an electronic circuit or system.
BACKGROUND OF THE INVENTION
[0005] The increasing sophistication of electronic circuits and
systems presents unique challenges for circuit designers. The
operating frequency of modern electrical and electronic equipment
continues to increase, in order to reduce the physical size and
weight of the electronic circuits and systems. However, the trend
is hindered by the possible generation of undesirable effects, such
as ringing and resonance, due to parasitic effects associated with
the components, the physical orientation of the components, and/or
the layout of components, devices and/or conductive tracks on
printed circuit boards within an electronic circuit or system.
These parasitic elements degrade the high-frequency performance of
the entire electronic circuit or system.
[0006] In electronic circuits and systems, parasitic capacitance is
the unavoidable and usually unwanted capacitance that exists
between the parts of an electronic component or circuit simply
because of their proximity to each other. All actual circuit
elements such as inductors, diodes, and transistors have internal
capacitance, which can cause their behavior to depart from that of
an `ideal` circuit element. In addition, parasitic capacitance can
exist between closely spaced conductors, such as wires or printed
circuit board traces.
[0007] For example, an inductor often acts as though it includes a
parallel capacitor, because of its closely spaced windings. When a
potential difference exists across the coil, wires lying adjacent
to each other at different potentials are affected by each other's
electric field. They act like the plates of a capacitor, and store
charge. Any change in the voltage across the coil requires extra
current to charge and discharge these small `capacitors`. When the
voltage doesn't change very quickly, as in low frequency circuits,
the extra current is usually negligible, but when the voltage is
changing quickly the extra current is large and can dominate the
operation of the circuit.
[0008] The parasitic capacitance between the base and collector of
transistors and other active devices is a major factor limiting
their high frequency performance. The screen grid was added to
vacuum tubes in the 1930s to reduce parasitic capacitance between
the control grid and the plate, and resulted in a great increase in
operating frequency.
[0009] An inductor is one of the key components in the input and
output filters of an electronic circuit or system. It is typically
used as the series element to attenuate undesirable signals.
However, its equivalent parallel capacitance (EPC) and equivalent
parallel resistance (EPR) significantly affect the inductor's high
frequency (HF) performance, causing non-ideal filter behavior.
[0010] FIG. 1 shows the schematic representation of a prior art
high-frequency model for an inductor 10 comprising the inductor and
its EPC 12 and EPR 14. The inductor 10 behaves like a capacitor
when the operating frequency is higher than the damped resonance
frequency of the inductor. The damped resonance frequency is
determined by the inductance of the inductor, its EPC, and its EPR.
FIG. 2 shows an impedance against operating frequency curve 20 for
a 470 .mu.H inductor, in which its EPC is 1 nF and its EPR is 100
k.OMEGA.. The damped resonance frequency f.sub.dr of the inductor
coincides with the peak value of impedance as illustrated in FIG.
2. The inductor impedance is dominated by the EPC at high
frequencies and its impedance decreases with the operating
frequency.
[0011] The EPC and EPR of the inductor will introduce undesired
noise at the output of the filter, conducted noise at the input of
the filter, and resonance with other components and parasitic
elements in the circuit. FIG. 3 shows a buck converter 30 with a
prior art inductor 10. The supply source 32 of the converter is
v.sub.in. The duty time of the switching element S 34 is adjusted
to control the output voltage across the load 36. FIG. 4 depicts
the effects of EPC and EPR on the output voltage of the buck
converter 30. Due to the parasitic capacitance of the inductor 10,
there appear voltage spikes 40 at the output which coincide with
the leading and trailing edges 42, 44 of the gate signal 46 for
controlling the main switch of the buck converter. When the main
switching element 34 is on or off, the voltage across the diode 38
is changed. Thus, voltage spikes will then be coupled to the output
through EPC. In order to eliminate such noise, it is crucial to
cancel the effects caused by at least the EPC and preferably also
the EPR.
[0012] There are two main approaches to canceling the effects of
parasitic capacitances in a circuit or system. The first is based
on canceling the parasitic capacitance of a particular component
while the second one is based on canceling the effect caused by all
parasitic capacitances in the entire circuit or system.
[0013] Some coupled magnetic windings are used to nullify the
effect of the parasitic capacitance of the inductor. The method is
shown in FIG. 5, in which a negative capacitance is developed by
configuring an inductor 10 as two inversely or opposed coupled
windings 10a, 10b having different number of turns and connecting a
capacitor 31 to a center tap between the two windings 10a, 10b.
Although the EPC can be canceled, the structure will still produce
an inductance in series with the added capacitor 3 1. Moreover, it
cannot cancel the EPR effect and the coupling effect is highly
dependent on the magnetic properties of the core materials of the
coupled windings 10a, 10b. There are many disadvantages to this
approach of addressing the problem of parasitic capacitance.
[0014] A prior-art method using the second approach is based on
adding an active circuit. The parasitic effects are canceled at the
circuit level, but this approach also suffers many problems and
does not fully mitigate or obviate the parasitic capacitance
effects.
OBJECTS OF THE INVENTION
[0015] An object of the invention is to mitigate and/or obviate to
some degree one or more problems associated with known methods of
reducing parasitic capacitance and/or parasitic resistance of
electronic circuits, systems or components of such circuits or
systems.
[0016] Another object of the invention is to provide means for
reducing parasitic capacitance of an inductive part or element of
an electronic circuit or system.
[0017] Yet another object of the invention is to improve the
frequency response characteristics of circuits, systems or
components of such circuits or systems.
[0018] One skilled in the art will derive from the following
description other objects of the invention. Therefore, the
foregoing statements of object are not exhaustive and serve merely
to illustrate some of the many objects of the present invention.
Furthermore, one skilled in the art will understand that the
embodiments of the present invention as hereinafter described may
address one, some or all of said objects, but may do so only to a
limited degree. The statements of objects are defined merely by way
of example and are not to be regarded as being requiring to be
satisfied by each and every embodiment.
SUMMARY OF THE INVENTION
[0019] According to the present invention, there is provided method
and apparatus for suppressing or at least reducing the effect of
the parallel capacitance and resistance of an electrical component,
particularly inductive network, or circuit, on the frequency
response of the component and circuit.
[0020] In one general aspect of the invention, an apparatus is
coupled in parallel with an inductor associated parallel
capacitance and resistance. It comprises of an active current
source that generates a current counteracting the current through
the parasitic capacitance and resistance, so that the effect caused
by the parasitic capacitance and resistance can be suppressed or
canceled. The magnitude of the active current source is derived by
sensing the inductor voltage. The frequency response of the
inductor will be enhanced with the capacitance and resistance
suppressed.
[0021] In another general aspect of the invention, some other forms
of non-isolated and isolated structures can be derived. The
inductor voltage can be sensed and the output current can be
generated by non-isolated and isolated means.
[0022] In accordance with a main aspect of the invention, there is
provided a method of reducing a parasitic effect in an electronic
circuit or system. The method comprises identifying a part of the
electronic circuit or system that exhibits inductance, determining
a value of a parallel parasitic effect associated with the part of
the electronic circuit or system that exhibits inductance, sensing
a voltage signal across the part of the electronic circuit or
system, and determining from the sensed voltage signal and the
value of the parallel parasitic effect a parasitic current
associated with the part of the electronic circuit or system. The
method further comprises adding a current source in parallel with
the part of the electronic circuit or system, the current source
being arranged to deliver a compensating current of generally equal
magnitude but generally opposite phase to the determined parasitic
current.
[0023] Preferably, the added current source comprises an active
current source.
[0024] The added current source may be implemented using any of a
passive circuit; a linear-type voltage source; or a switched-mode
voltage source.
[0025] Where the parallel parasitic effect comprises a parallel
capacitive effect, the steps of determining from said sensed
voltage signal and said value of the parallel parasitic effect a
parasitic current associated with said part of the electronic
circuit or system and adding a current source in parallel with said
part of the electronic circuit or system may comprise using a
differentiator circuit to differentiate the sensed voltage signal
and using a current driver circuit to generate the compensating
current.
[0026] Where the parallel parasitic effect comprises a parallel
resistive effect, the steps of determining from said sensed voltage
signal and said value of the parallel parasitic effect a parasitic
current associated with said part of the electronic circuit or
system and adding a current source in parallel with said part of
the electronic circuit or system may comprise using a multiplier
circuit to determine the compensating current from the sensed
voltage signal and using a current driver circuit to generate the
compensating current.
[0027] Where the parallel parasitic effect comprises both a
parallel capacitive effect and a parallel resistive effect, the
steps of determining from said sensed voltage signal and said value
of the parallel parasitic effect a parasitic current associated
with said part of the electronic circuit or system and adding a
current source in parallel with said part of the electronic circuit
or system may comprise using a differentiator circuit to
differentiate the sensed voltage signal to determine a first
compensating current for the parallel capacitive effect, using a
multiplier circuit to determine a second compensating current from
the sensed voltage signal for the parallel resistive effect and
using a single current driver circuit to generate a combined
compensating current comprising said first and second compensating
currents.
[0028] The part of the electronic circuit or system may comprise
any of an electronic system, a printed circuit board `PCB`, or a
component or element on said PCB such as an inductor, a diode, a
transistor, or closely spaced wires or board traces.
[0029] In accordance with another main aspect of the invention,
there is provided an electronic circuit or system, comprising means
for determining a value of a parallel parasitic effect associated
with a part of the electronic circuit or system that exhibits
inductance, means for sensing a voltage signal across the part of
the electronic circuit or system, means for determining from the
sensed voltage signal and the value of the parallel parasitic
effect a parasitic current associated with the part of the
electronic circuit or system, and a current source in parallel with
the part of the electronic circuit or system, the current source
being arranged to deliver a compensating current of generally equal
magnitude but generally opposite phase to the determined parasitic
current.
[0030] Preferably, the added current source comprises an active
current source.
[0031] The added current source may comprise any of a passive
circuit; a linear-type voltage source; or a switched-mode voltage
source.
[0032] Where the parallel parasitic effect comprises a parallel
capacitive effect, the electronic circuit or system may comprise a
differentiator circuit to differentiate the sensed voltage signal
and a current driver circuit to generate the compensating
current.
[0033] Where the parallel parasitic effect comprises a parallel
resistive effect, the electronic circuit or system may comprise a
multiplier circuit to determine the compensating current from the
sensed voltage signal and a current driver circuit to generate the
compensating current.
[0034] Where the parallel parasitic effect comprises both a
parallel capacitive effect and a parallel resistive effect, the
electronic circuit or system may comprise a differentiator circuit
to differentiate the sensed voltage signal to determine a first
compensating current for the parallel capacitive effect, a
multiplier circuit to determine a second compensating current from
the sensed voltage signal for the parallel resistive effect and a
single current driver circuit to generate a combined compensating
current comprising said first and second compensating currents.
[0035] The part of the electronic circuit or system may comprise
any of an electronic system, a printed circuit board `PCB`, or a
component or element on said PCB such as an inductor, a diode, a
transistor, or closely spaced wires or board traces.
[0036] In accordance with another main aspect of the invention,
there is provided a method of reducing a parasitic effect in an
electronic circuit. The method comprises determining a value of a
parallel parasitic effect associated with an inductor in the
electronic circuit, sensing a voltage signal across the inductor,
determining from the sensed voltage signal and the value of the
parallel parasitic effect a parasitic current associated with the
inductor, and adding a current source in parallel with the
inductor, the current source being arranged to deliver a
compensating current of generally equal magnitude but generally
opposite phase to the determined parasitic current.
[0037] In accordance with another main aspect of the invention,
there is provided an electronic circuit. The electronic circuit
comprises an inductor, means for sensing a voltage signal across
the inductor, means for determining from the sensed voltage signal
and a value of a parallel parasitic effect a parasitic current
associated with the inductor, and a current source in parallel with
said inductor, the current source being arranged to deliver a
compensating current of generally equal magnitude but generally
opposite phase to the determined parasitic current.
BRIEF DESCRIPTION OF THE DRAWINGS
[0038] The foregoing and further features of the present invention
will be apparent from the following description of preferred
embodiments which are provided by way of example only in connection
with the accompanying figures, of which:
[0039] FIG. 1 is a schematic representation of a prior art
high-frequency model for an inductor;
[0040] FIG. 2 is a graphical depiction of the magnitude of the
impedance against operating frequency of the prior art inductor of
FIG. 1;
[0041] FIG. 3 is a circuit diagram showing a buck converter with a
prior art inductor as the filter inductor;
[0042] FIG. 4 is a graphical depiction of the effects of the
parasitic elements on the output voltage of the buck converter of
FIG. 3;
[0043] FIG. 5 is a circuit diagram showing how the EPC is canceled
with coupled magnetic windings using a prior art technique;
[0044] FIG. 6 is a circuit diagram showing how the parasitic
components can be canceled with an added current source according
to the invention;
[0045] FIG. 7 is a circuit diagram showing a preferred embodiment
for generating a compensating current for parallel parasitic
capacitance;
[0046] FIG. 8 is a circuit diagram showing a preferred embodiment
for generating a compensating current for parallel parasitic
resistance;
[0047] FIG. 9 is a circuit diagram showing a preferred embodiment
for generating a combined compensating current for parallel
parasitic capacitance and resistance;
[0048] FIG. 10 is a circuit diagram showing a practical
implementation of the preferred embodiment of FIG. 9;
[0049] FIG. 11 is a circuit diagram showing the embodiment of FIG.
9 with an isolated input using a voltage transformer;
[0050] FIG. 12 is a circuit diagram showing the embodiment of FIG.
9 with an isolated output using a current transformer; and
[0051] FIG. 13 is a circuit diagram showing the embodiment of FIG.
9 with an isolated voltage input and an isolated current
output.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
[0052] The present invention provides a method and system for
reducing a parasitic effect in an electronic circuit or system. The
method comprises: identifying a part of the electronic circuit or
system that exhibits inductance. This can be achieved through
testing the circuit or system using known techniques.
Alternatively, identification may merely comprise a recognition
that a particular component such as an inductor is designed to
exhibit inductance and that said level of inductance is a designed
feature of said component. A skilled person will be familiar with
the many methods of identifying parts of a circuit or system or
components of a circuit or system that exhibit some degree of
inductance. The method also comprises determining a value of a
parallel parasitic effect associated with said part of the
electronic circuit or system that exhibits inductance. There are a
wide range of methods for measuring parasitic capacitance and again
one skilled in the art will be familiar with how such measure is
determined or measured. For example, from James C. Chen et al., "An
On-Chip, Attofarad Interconnect Charge-Based Capacitance
Measurement Technique," IEDM 96-69, IEEE, 0-7803-3393-4,
incorporated herein by reference, it is known to connect a test
structure and a reference structure to a voltage source and then to
discharge the test structure and the reference structure again via
a ground potential. In the process, the current flowing during the
charging of the reference structure and the test structure is
measured, and the difference is used to calculate a parasitic
capacitance which is present in the test structure as opposed to
the reference structure. Alternatively, parasitic capacitance can
be measured using a conventional inductance-capacitance-resistance
(LCR) meter which typically has high resolution and is easy to use.
Other techniques include that disclosed in U.S. Pat. No. 6,756,792,
which is incorporated herein by reference. As a further
alternative, Time-domain reflectometry (TDR) is commonly used as a
convenient method of determining the characteristic impedance of a
transmission line or quantifying reflections caused by
discontinuities along or at the termination of a transmission line.
TDR can also be used to measure quantities such as the input
capacitance of a voltage probe, the inductance of a Jumper wire,
the end-to-end capacitance of a resistor, or the effective loading
of a printed circuit board. Element values can be calculated
directly from the integral of the reflected or transmitted waveform
and these values can be used to measure parasitic capacitance. The
method further comprises sensing a voltage signal across said part
of the electronic circuit or system and this can be achieved using
a voltage sensor of known type. The method also comprises
determining from said sensed voltage signal and said value of the
parallel parasitic effect a parasitic current associated with said
part of the electronic circuit or system; and adding a current
source in parallel with said part of the electronic circuit or
system; wherein said current source is arranged to deliver a
compensating current of generally equal magnitude but generally
opposite phase to said determined parasitic current.
[0053] The part of the electronic circuit or system identified as
exhibiting inductance may comprise any of: an electronic system
itself, a printed circuit board `PCB`, or a component or element on
said PCB such as an inductor, a diode, a transistor, or closely
spaced wires or board traces.
[0054] The present invention uses an active current or voltage
source that generates a compensating signal counteracting the
voltage signal across the parasitic capacitance and resistance of a
part or component of an electronic circuit or system that exhibits
inductance. As shown in FIG. 6, the parasitic currents through the
inductor 110 associated with the inductor's EPC C.sub.L 112 and EPR
r.sub.L 114 are i.sub.c and i.sub.R, respectively. The magnitudes
of i.sub.c and i.sub.R are equal to
i C = C L v L t ( 1 ) i R = v L / r L ( 2 ) ##EQU00001##
[0055] In an electronic circuit or system, the effects of C.sub.L
and r.sub.L can be canceled by using two auxiliary current sources
i.sub.ai 116 sources i.sub.a1 116 and i.sub.a2 118 connected in
parallel with the inductor 110 i.sub.a1 116 and i.sub.c are equal
in magnitude and phase opposition. Thus,
i a 1 = - i C = - C L v L t ( 3 ) ##EQU00002##
[0056] Similarly, i.sub.a2 and i.sub.R are equal in magnitude and
phase opposition. Thus,
i.sub.a2=-i.sub.R=-v.sub.L/r.sub.L (4)
[0057] The two current sources 116, 118 can be implemented by
passive circuits, linear-type or switched-mode voltage sources,
provided that the requirements given in equations (3) and (4) are
satisfied.
[0058] A preferred embodiment for i.sub.a1 116 is shown in FIG. 7.
It consists of two main parts. The first part is a differentiator
circuit 200 for differentiating the sensed inductor voltage v.sub.L
to realize equation (3). The second part is a current driver 220
that generates current i.sub.a1 following the output of the
differentiator 200. The preferred embodiment for i.sub.a1 116 may
include a voltage sensor 205 for sensing the voltage signal across
the inductor 110 or across any part or component of an electronic
circuit or system which exhibits inductance and has associated
therewith parasitic capacitance that would usefully be compensated
to enhance the frequency response of the electronic circuit or
system.
[0059] It will be understood that implementing a current source as
proposed using the embodiment of FIG. 7 will, to some degree,
compensate for the parasitic capacitance of an inductive component
or part of a circuit or system and may by itself be sufficient to
improve the frequency response of the circuit or system without
adding any means for compensating for any parallel parasitic
resistance effect caused by said component or part of the
electronic circuit or system.
[0060] A preferred embodiment for current source i.sub.a2 118 is
shown in FIG. 8. It also comprises two main parts. The first part
is a multiplier circuit 300 for multiplying -1/r.sub.L and v.sub.L
to realize equation (4). The second part is a current driver 320
that generates current i.sub.a2. The preferred embodiment for
current source i.sub.a2 118 may include a voltage sensor 305 for
sensing the voltage signal across the inductor 110 or across any
part or component of an electronic circuit or system which exhibits
inductance and has associated therewith parasitic resistance that
would usefully be compensated to enhance the frequency response of
the electronic circuit or system.
[0061] It will be understood that implementing a current source as
proposed using the embodiment of FIG. 8 will, to some degree,
compensate for the parasitic resistance of an inductive component
or part of a circuit or system and may by itself be sufficient to
improve the frequency response of the circuit or system without
adding any means for compensating for any parallel parasitic
capacitance effect caused by said component or part of the
electronic circuit or system.
[0062] The two current sources 116 and 118 can, however, be
implemented together to compensate for both parallel parasitic
capacitance and resistance of a component or part of a circuit or
system exhibiting inductance. In this embodiment, only a single
current driver 420, as shown in FIG. 9, need be provided. The input
of the current driver 420 is the sum of the differentiator 200 and
multiplier circuit 300 outputs. The circuit can be further
simplified by providing a single a voltage sensor 405 whose output
is provided to both the differentiator 200 and multiplier circuit
300.
[0063] The magnitude of i.sub.a1+i.sub.a2 is in the order of a few
mA. Thus, the required power rating of the current driver is low,
even if the inductor voltage is large.
[0064] It will be appreciated that the embodiments of any of FIGS.
7 to 9 can be implemented in integrated circuit `IC` form or by any
other suitable electronic components known to one skilled in the
art.
[0065] The two current sources 116, 118 of FIGS. 7 and 8,
respectively, or the combined current source of FIG. 9 may comprise
an active current source. The two current sources 116, 118 of FIGS.
7 and 8, respectively, or the combined current source may be
implemented using any of: a passive circuit; a linear-type voltage
source; or a switched-mode voltage source.
[0066] Active current sources are often used in place of resistors
in analog integrated circuits to generate a current without causing
attenuation at a point in the signal path to which the current
source is attached. The collector of a bipolar transistor, the
drain of a field effect transistor, or the plate of a vacuum tube
naturally behave as current sources (or sinks) when properly
connected to an external source of energy (such as a power supply)
because the output impedance of these devices is naturally high
when used in the current source configuration.
[0067] A JFET can be made to act as a current source by tying its
gate to its source. The current then flowing is the I.sub.DSS of
the FET. These can be purchased with this connection already made
and in this case the devices are called current regulator diodes or
constant current diodes or current limiting diodes (CLD). An
enhancement mode N channel MOSFET can also be used as a current
source.
[0068] A practical implementation of the embodiment of a combined
current source of FIG. 9 is shown in FIG. 10. In operation, the
voltage signal of the inductor 110 is sensed by a sensing element
400, such as the resistive network formed by the resistors R.sub.A
and R.sub.B, hall-effect voltage transducer, and voltage
transformer, etc. The sensed voltage is amplified by a
non-inverting amplifier 410 formed by the operational amplifier
A.sub.1, R.sub.1, and R.sub.2. The values of R.sub.1 and R.sub.2
are designed to make the amplifier output v.sub.2 equal to
v.sub.2=-v.sub.L/r.sub.L (5)
v.sub.2 is further amplified by an inverting amplifier 420 formed
by the operational amplifier A.sub.2, R.sub.3, and R.sub.4. The
amplifier output v.sub.x will be differentiated by a differentiator
circuit 430 formed by A.sub.3, R.sub.d, and C.sub.d. The values of
R.sub.3, R.sub.4, R.sub.d, and C.sub.d will be designed to make the
differentiator output v.sub.1 equal to
v 1 = - C L v L t ( 6 ) ##EQU00003##
[0069] The voltages v.sub.1 and v.sub.2 are added together by a
resistive network 440 comprising two resistors, R.sub.5 and
R.sub.6, which are theoretically equal in value, to give the
voltage v.sub.3. v.sub.3 is used to drive a current buffer 450
formed by the amplifier A.sub.5 and the sensing resistor R.sub.sen.
The output current is sensed by the R.sub.sen that gives the
voltage proportional to the output current. The sensed voltage is
compared with v.sub.3. Therefore,
i a 1 + i a 2 = v 3 R sen ( 7 ) ##EQU00004##
[0070] Based on the embodiment of FIGS. 9 and 10, some other forms
of the isolated and non-isolated embodiments of the means for
compensating the parallel capacitance and resistance of an
inductive element, component, circuit or system can be derived and
are shown in FIGS. 11 to 13.
[0071] FIG. 11 shows the embodiment of FIG. 9 with an isolated
input. The inductor voltage is sensed by a voltage transformer. The
output is non-isolated and is directly connected to the current
driver.
[0072] FIG. 12 shows the embodiment of FIG. 9 with an isolated
output. The output of the apparatus is connected across the
inductor through a current transformer.
[0073] FIG. 13 shows the embodiment of FIG. 9 with an isolated
input and an isolated output.
[0074] While the invention is mainly illustrated and explained in
conjunction with an inductive element, it will be understood that
the invention is applicable to a wide variety of applications,
including the input and output filters of electrical networks,
printed circuit boards, transient suppressors, in which it is
desirable to cancel the effects of parallel capacitance and/or
resistance of a component or circuit. It is understood that the
parasitic capacitance and resistance are not limited to a
particular component because parasitic capacitance and resistance
of other parts of the circuit formed by wiring, printed-circuit
board layout may also be addressed with the invention.
[0075] In summary, provided is a method and means for reducing or
suppressing parasitic capacitance and/or resistive effects that
affect the frequency response of components, elements and/or
circuits in an electronic circuit or system that exhibit
inductance. Noise generated by parasitic capacitance and/or
parasitic resistance of the components, the physical orientation of
the components, and/or the layout of components, devices and/or
conductive tracks (board traces) on printed circuit boards within
an electronic circuit or system is reduced. This is achieved by
adding a current source in parallel with a part or component of the
electronic circuit or system that exhibits inductance, wherein said
current source is arranged to deliver a compensating current of
generally equal magnitude but generally opposite phase to parasitic
current associated with said part or component.
[0076] While several aspects of the present invention have been
described and depicted herein, alternative aspects may be effected
by those skilled in the art to accomplish the same objectives.
Accordingly, it is intended by the appended claims to cover all
such alternative aspects as fall within the true spirit and scope
of the invention.
* * * * *