U.S. patent application number 12/757950 was filed with the patent office on 2010-10-28 for bi-stable display, frame updating method and timing control method thereof.
This patent application is currently assigned to Prime View International Co., Ltd.. Invention is credited to Kui-Hao Chang, Po-Sen Chen, Hua-Chien Hung, Rui-Yang LAI.
Application Number | 20100271360 12/757950 |
Document ID | / |
Family ID | 42991732 |
Filed Date | 2010-10-28 |
United States Patent
Application |
20100271360 |
Kind Code |
A1 |
LAI; Rui-Yang ; et
al. |
October 28, 2010 |
Bi-Stable Display, Frame Updating Method and Timing Control Method
thereof
Abstract
A bi-stable display, frame updating method and timing sequence
controlling method thereof are disclosed. The frame updating method
of the bi-stable display includes the steps of comparing a
difference of source driver output voltages of adjacent frames of
image updating period with a preset threshold, and determining
parameter value of each transitional state of the adjacent frames
when the difference equal or greater than the preset threshold for
controlling level of source driver output voltage. Accordingly, the
effects such as signal interference, reduction of image quality
resulted from switching between high voltage levels directly and
rapidly and excessive power consumption may be eliminated.
Inventors: |
LAI; Rui-Yang; (Hsinchu
City, TW) ; Chen; Po-Sen; (Hsinchu City, TW) ;
Hung; Hua-Chien; (Hsinchu City, TW) ; Chang;
Kui-Hao; (Hsinchu City, TW) |
Correspondence
Address: |
LanWay IPR Services
P.O. Box 220746
Chantilly
VA
20153
US
|
Assignee: |
Prime View International Co.,
Ltd.
|
Family ID: |
42991732 |
Appl. No.: |
12/757950 |
Filed: |
April 9, 2010 |
Current U.S.
Class: |
345/211 ;
345/84 |
Current CPC
Class: |
G09G 2340/16 20130101;
G09G 3/344 20130101; G09G 2320/0285 20130101 |
Class at
Publication: |
345/211 ;
345/84 |
International
Class: |
G06F 3/038 20060101
G06F003/038 |
Foreign Application Data
Date |
Code |
Application Number |
Apr 24, 2009 |
TW |
098113809 |
Claims
1. A frame updating method of bi-stable display, comprising:
comparing a difference of source driver output voltages of adjacent
frames of an image updating period with a preset threshold voltage;
and determining a parameter value of each transitional state of the
adjacent frames when the difference equal or greater than the
preset threshold for controlling a level of each of the source
driver output voltages.
2. The frame updating method of bi-stable display of claim 1,
wherein the transitional state is located at a transitional state
frame between the adjacent frames, and the parameter value is a
number of the transitional state or a value of the source driver
output voltage corresponding to the transitional state.
3. The frame updating method of bi-stable display of claim 1,
wherein the transitional state is located at a dummy line behind an
active scan line of each of the adjacent frames, and the parameter
value comprises a value of the source driver output voltage
corresponding to the dummy line.
4. The frame updating method of bi-stable display of claim 1,
further comprising: updating the bi-stable display frame with
preset source driver output voltages of the adjacent frames when
the difference equal or greater than the preset threshold.
5. The frame updating method of bi-stable display of claim 1,
further comprising: storing the parameter value in a memory unit
for reading.
6. The frame updating method of bi-stable display of claim 5,
wherein the memory unit is disposed on a bi-stable display panel, a
drive control circuit board, or a middle interface circuit board,
wherein the middle interface circuit board is coupled to the drive
control circuit board.
7. A bi-stable display, comprising: a bi-stable display panel; a
drive control circuit board including a middle interface circuit
board connector, a control chip, a panel power module, a system
power supply module and a microprocessor; a middle interface
circuit board coupled to the middle interface circuit board
connector; and a memory unit for storing a parameter value of a
transitional state being read by the control chip, wherein the
parameter value is determined by a comparing result of comparing a
difference of source driver output voltages of adjacent frames of
an image updating period with a preset threshold voltage.
8. The bi-stable display of claim 7, wherein the memory unit is
disposed on the bi-stable display panel, the drive control circuit
board, or the middle interface circuit board.
9. The bi-stable display of claim 7, wherein the parameter value is
a number of a transitional state, a value of the source driver
output voltage or a value of a dummy line voltage.
10. A timing control method of bi-stable display, comprising:
comparing a difference of source driver output voltages of adjacent
frames of an image updating period with a preset threshold voltage;
and adding at least a transitional state when the difference equal
or greater than the preset threshold for controlling a level of
each of the source driver output voltages.
11. The timing control method of bi-stable display of claim 10,
wherein the transitional state is located at a dummy line behind an
active scan line of each of the adjacent frames.
12. The timing control method of bi-stable display of claim 10,
wherein the transitional state is located between the adjacent
frames.
13. The timing control method of bi-stable display of claim 10,
further comprising: storing a number of the transitional state or a
voltage value of the transitional state in a memory unit for
reading.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is based upon and claims the benefit of
priority from the prior Taiwan Patent Application No. 098113809,
filed Apr. 24, 2009, the entire contents of which are incorporated
herein by reference.
BACKGROUND
[0002] The present invention relates to a display device and
control method thereof. More particularly, the present invention
relates to a bi-stable display, a frame updating method and a
timing control method.
[0003] The bi-stable display technic is a common name of a display
technic. Hitherto, cholesterol display technic and electronic ink
display technic are the most known. In the bi-stable display
technic, for example, the electrophoresis display, an on/off action
of the display can be implemented by a motion of the charge
particle, and its timing controller is connected to a
microprocessor of the system which can drive the electrophoresis
display through a drive chip after receiving command order and
image data. Furthermore, the bi-stable can still have two different
states (bright state and dark state) without voltage and maintain
continuously. Therefore, the image can be held on the display
without voltage and reduce power consumption effectively. Widely
speaking, bi-stable display technic is growing with more and more
displaying gray scale/color depth, i.e. multi-stable display
technic. In contrast with the prior art pure liquid crystal display
technic, the bi-stable technic with the frame memory function does
not need the backlight so that it can save several hundred times of
the power consumption and become thinker and lighter. This
characteristic can extend life of a battery of a portable device,
for example, mobile phone, electronic book, electronic newspaper
and electronic tag, and even large electronic bulletin board.
[0004] In drive of the bi-stable display, for example, the
electrophoresis display, the drive method is similar with the pulse
width modulation (PWM). The corresponding impulse provided to the
electrophoresis display by the source driver is controlled by a
timing controller. The normal source drive voltage levels are
positive voltage (VPOS), negative voltage (VNEG) and 0 volt (GND)
respectively. The positive and negative voltage is depend on
material of the electrophoresis display, and some material need to
be provided higher voltage for changing the gray scale of images in
unit time effectively. Please refer to FIG. 1, it is a schematic
diagram of the conventional source drive output voltage of the
bi-stable display during image updating period. As shown in FIG. 1,
the image updating period has frames F.sub.1.about.F.sub.8. The
positive and negative high voltage levels V.sub.1 and V.sub.2 (not
shown) of the adjacent frames F.sub.1 and F.sub.2 are (+15) and
(-15) volt respectively, and there is a voltage level with 0 volt.
As shown in FIG. 1, the source drive output voltages of the
adjacent frames F.sub.3 and F.sub.4 are switched directly at high
voltage level V.sub.2 and V.sub.1, and the source drive output
voltages of F.sub.1 and F.sub.2 are switched directly to V.sub.1
from V.sub.2. In updating frame, the drive method of the gray scale
of each pixel is determined by the last frame, the next frame, and
the environment temperature. Therefore, the present drive method
are usually switched directly at high voltage level which belongs
high voltage difference and fast voltage transfer. Therefore, other
signals have enormous noise coupling so that the frame appears
image unstable, un-uniformity, ghosting, crosstalk and over power
consumption easily.
BRIEF SUMMARY
[0005] The present invention relates to a bi-stable display frame
updating method which can reduction of image quality resulted from
switching between high voltage levels directly and rapidly,
eliminate signal interference and excessive power consumption.
[0006] The present invention relates to a bi-stable display which
can avoid switching between high voltage levels directly and store
relational parameter value in a memory unit for driving display
control.
[0007] The present invention relates to a timing control method of
bi-stable display which can be determined by a threshold mechanism
and store relational parameter value in a memory unit for
arrangement and control of drive display timing.
[0008] In one aspect of the present invention, a frame updating
method of the bi-stable display is provided. The method includes
the steps of comparing a difference of source driver output
voltages between the adjacent frames with a preset threshold in the
image updating period, and a parameter value of each transitional
state between the adjacent frames is determined by that the
difference is equal or greater than the preset threshold for
controlling level of the source driver output voltage.
[0009] In an embodiment of the present invention, the transitional
state of the frame updating method of the bi-stable display can be
a transitional state frame located between the adjacent frames. The
parameter value can be a number of the transitional state or a
value of the source driver output voltage corresponding to the
transitional state. In other words, the frame by frame method is
used to update a gray scale value of pixels when a timing
controller of the present bi-stable display (for example,
electrophoresis display) updates the frames so that the frame can
be a unit for the transitional state, i.e. a blank frame is added
to be a transitional state frame that the transitional state is
located. In an embodiment of the present invention, the
transitional state can be a dummy line located between the adjacent
frames, i.e. a blank line is added behind an active scan line of
each frame and its parameter value comprises a value of the source
drive output voltage corresponding to the dummy line. Besides, the
frame updating method of the bi-stable display further includes the
step of storing the parameter value of the transitional state in a
memory unit for controlling the source drive output voltages after
reading. Wherein, the memory unit is disposed on a bi-stable
display panel, a drive control circuit board, or a middle interface
circuit board.
[0010] In one aspect of the present invention, a bi-stable display
is provided. The bi-stable display includes a bi-stable display
panel, a drive control circuit board, a middle interface circuit
board and a memory unit. The drive control circuit board includes a
middle interface circuit board connector, a control chip, a panel
power module, a system power supply module and a microprocessor.
The middle interface circuit board is coupled to the middle
interface circuit board connector. The material of the middle
interface circuit board is normally flexible printed circuit. The
memory unit for storing a parameter value of a transitional state
is read by the display timing controller. Wherein, the parameter
value is determined by a comparing result of comparing a difference
of source driver output voltages between the adjacent frames with a
preset threshold voltage in the image updating period.
[0011] In an embodiment of the present invention, the memory unit
of the bi-stable display is disposed on the bi-stable display
panel, the drive control circuit board, or the middle interface
circuit board, and the parameter value is a number of a
transitional state, a value of the source driver output voltage or
a value of a dummy line voltage.
[0012] In one aspect of the present invention, a timing control
method of the bi-stable display is provided. The method includes
the steps of comparing a difference of source driver output
voltages between the adjacent frames with a preset threshold in the
image updating period, and adding a transitional state at least
when the difference is equal or greater than the preset
threshold.
[0013] In an embodiment of the present invention, the transitional
state can be located at a dummy line behind an active scan line of
each of the adjacent frames or between the adjacent frames.
Besides, the method further includes the step of storing a number
of the transitional state or a voltage value of the transitional
state in a memory unit for reading.
[0014] The blank frame or the dummy line is added to form the
bi-stable display, frame updating method and timing control method
of the present invention. Therefore, the levels of the source drive
output voltages are changed in sequence by decreasing or increasing
to eliminate signal interference, reduction of image quality and
excessive power consumption resulted from switching between high
voltage levels directly and rapidly.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] These and other features and advantages of the various
embodiments disclosed herein will be better understood with respect
to the following description and drawings, in which like numbers
refer to like parts throughout, and in which:
[0016] FIG. 1 is a schematic diagram of the conventional source
drive output voltage of the bi-stable display during image updating
period.
[0017] FIG. 2 is a flow chart diagram of an embodiment of the frame
updating method of the bi-stable display according to the
invention.
[0018] FIG. 3 is a schematic diagram of an embodiment of the source
drive output voltage of the bi-stable display during an image
updating period according to the invention.
[0019] FIG. 4 is a schematic diagram of another embodiment of the
source drive output voltage of the bi-stable display during an
image updating period according to the invention.
[0020] FIG. 5 is a block schematic diagram of an embodiment of the
bi-stable display according to the invention.
[0021] FIG. 6 is a block schematic diagram of another embodiment of
the bi-stable display according to the invention.
[0022] FIG. 7 is a block schematic diagram of other embodiment of
the bi-stable display according to the invention.
[0023] FIG. 8 is a flow chart diagram of an embodiment of the
timing control method of the bi-stable display according to the
invention.
DETAILED DESCRIPTION
[0024] FIG. 2 shows a flow chart diagram of an embodiment of the
frame updating method of the bi-stable display according to the
invention. In step S211, a difference .DELTA.V(it's
|V.sub.1-V.sub.2|) of source driver output voltages between the
adjacent frames are compared with a preset threshold voltage
V.sub.T during an image updating period, i.e. the .DELTA.V equal or
greater than the V.sub.T is compared to determine whether switch
amplitude of the voltage level is greater than the threshold
voltage. In actual practice, the source driver output voltage and
the threshold voltage can be recorded by using binary values, for
example, 00 is presented as 0 volt, 01 is presented as (-15) volt,
and 10 is presented as 15 volt. Therefore, the difference .DELTA.V
is the comparing result of the source driver output voltages with
the preset threshold voltage V.sub.T in the step S211, in fact it
is equal to compare the difference of the preset binary values or
the difference of the calculated source driver output voltages
corresponding to the preset binary values with the preset threshold
voltage.
[0025] In the present invention, when the difference .DELTA.V of
the source driver output voltages is equal or greater than the
preset threshold voltage V.sub.T, a parameter value of each
transitional state between the adjacent frames is determined for
controlling the level of the source driver output voltage in step
S212. The parameter value can be a number of the transitional state
or a value of the source driver output voltage corresponding to the
transitional state and used to assign the difference .DELTA.V of
the source driver output voltages. In other words, in the step
S212, the number of the transitional state or a value of the source
driver output voltage corresponding to the transitional state is
determined, set the transitional state number counter SC of the
countdown parameter and conditions of performing preset drive
method is also determined. In the present invention, the parameter
value will be a number of the transitional state or a value of the
source driver output voltage corresponding to the transitional
state if the transitional state is a transitional state frame
between the adjacent frames. The parameter value will comprise a
value of the source drive output voltage corresponding to the dummy
line if the transitional state is the dummy line behind the active
scan line of each of the adjacent frames. Then, the parameter value
of the transitional state is stored in a memory unit for
controlling the source drive output voltages after reading. The
memory unit is disposed on the bi-stable display panel, the drive
control circuit board, or the middle interface circuit board which
is Flexible Printed Circuit normally, and the middle interface
circuit board is coupled to the drive control circuit board. In
another way, in the step S211, if the difference .DELTA.V of the
source driver output voltages is smaller than the preset threshold
voltage V.sub.T or a content of the transitional state number
counter SC is decreased to 0 (i.e. SC=0) in step S214, the preset
drive method is preformed without adjusting the level of the source
drive output voltage, i.e. the bi-stable display frame is updated
with the preset source drive output voltage of the adjacent
frames.
[0026] For comparison description, please refer to FIG. 1 and FIG.
3, wherein FIG. 1 is a schematic diagram of the conventional source
drive output voltage of the bi-stable display during image updating
period, and FIG. 3 is a schematic diagram of an embodiment of the
source drive output voltage of the bi-stable display during an
image updating period according to the invention. As shown in FIG.
3, the positive and negative high voltage levels V.sub.1 and
V.sub.2 (not shown) of the adjacent frames F.sub.1 and F.sub.2 of
FIG. 1 are (+15) and (-15) volt respectively and the preset
threshold voltage V.sub.T (not shown) is 20 volt. Therefore, the
difference of the source drive output voltage .DELTA.V is 30 volt
and greater than the preset threshold voltage V.sub.T so that the
source drive output voltages are (+15), 0, and (-15) volt
sequentially if the number of the transitional state and the
content of the transitional state number counter SC are set to 1.
That means a transitional state with 1 of the transitional state
frame is located between the adjacent frames F.sub.1 and F.sub.2 of
FIG. 1 so that positive and negative high voltage levels of the
difference equal or greater than preset threshold voltage can not
be switched directly without bad interference. Therefore, this
image updating is finished in the frames F.sub.1 to F.sub.3 in FIG.
3. In other embodiment, the corresponding source drive output
voltages are (+15), (+5), (-5), and (-15) volt if the number of the
transitional state is 2, and so on.
[0027] Please refer to FIG. 3 again, the positive and negative high
voltage levels V.sub.1 and V.sub.2 (not shown) of the adjacent
frames F.sub.3 and F.sub.4 of FIG. 1 are (+15) and (-15) volt
respectively. Therefore, the difference of the source drive output
voltage .DELTA.V is 30 volt and greater than the preset threshold
voltage V.sub.T with 20 volt so that the corresponding source drive
output voltages are (+15), 0, and (-15) volt sequentially if the
number of the transitional state and the content of the
transitional state number counter SC are set to 1. That means a
transitional state of the transitional state frame is located
between the adjacent frames F.sub.3 and F.sub.4 of FIG. 1 so that
positive and negative high voltage levels of the difference equal
or greater than preset threshold voltage can not be switched
directly without bad interference. Therefore, this image updating
is finished in the frames F.sub.4 to F.sub.6 in FIG. 3. Secondly,
the positive and negative high voltage levels V.sub.1 and V.sub.2
(not shown) of the adjacent frames F.sub.5 and F.sub.6 of FIG. 1
are both 0 volt. Therefore, the difference of the source drive
output voltage .DELTA.V is 0 volt and smaller than the preset
threshold voltage V.sub.T with 20 volt so that the bi-stable
display frame is updated with 0 volt of the preset source drive
output voltage at the frames F.sub.7 to F.sub.8 in FIG. 3. Then,
the positive and negative high voltage levels V.sub.1 and V.sub.2
(not shown) of the adjacent frames F.sub.7 and F.sub.8 of FIG. 1
are (-15) and 0 volt respectively. Therefore, the difference of the
source drive output voltage .DELTA.V is 15 volt and smaller than
the preset threshold voltage V.sub.T with 20 volt so that the
bi-stable display frame is updated with the (-15) and 0 volt of the
preset source drive output voltages respectively at the frames
F.sub.9 to F.sub.10 in FIG. 3.
[0028] In the embodiment, the dummy line is being as the
transitional state. Please refer to FIG. 1 and FIG. 4, wherein FIG.
4 is a schematic diagram of another embodiment of the source drive
output voltage of the bi-stable display during an image updating
period according to the invention. The positive and negative high
voltage levels V.sub.1 and V.sub.2 (not shown) of the adjacent
frames F.sub.1 and F.sub.2 of FIG. 1 are (+15) and (-15) volt
respectively and the preset threshold voltage V.sub.T is 20 volt.
Therefore, the difference of the source drive output voltage
.DELTA.V is 30 volt and greater than the preset threshold voltage
V.sub.T so that the transitional state is located at the dummy line
behind the active scan line, and the parameter value includes the
source drive output voltage with 0 volt corresponding to the dummy
line. As the adjacent frames F.sub.1 and F.sub.2 of FIG. 1, the
frame F.sub.1 of FIG. 4 has the active scan line 411 and the dummy
line 421 and the corresponding source drive output voltages are
(+15) and 0 volt respectively. The frame F.sub.2 of FIG. 4 has the
active scan line 412 and the dummy line 422 and the corresponding
source drive output voltages are (+15) and 0 volt respectively.
Similarly, the positive and negative high voltage levels V.sub.1
and V.sub.2 (not shown) of the adjacent frames F.sub.3 and F.sub.4
of FIG. 1 are (+15) and (-15) volt respectively and the preset
threshold voltage V.sub.T is 20 volt. Therefore, the difference of
the source drive output voltage .DELTA.V is 30 volt and greater
than the preset threshold voltage V.sub.T so that the frame F.sub.3
of FIG. 4 has the active scan line 413 and the dummy line 423 and
the corresponding source drive output voltages are (-15) and 0 volt
respectively. The frame F.sub.4 of FIG. 4 has the active scan line
414 and the dummy line 424 and the corresponding source drive
output voltages are (+15) and 0 volt respectively. Thus, the
positive and negative high voltage levels that the difference value
is equal or greater than the preset threshold voltage can not be
switched directly without bad influence.
[0029] Please refer to FIG. 5, it is a block schematic diagram of
an embodiment of the bi-stable display according to the invention.
In the embodiment of FIG. 5, the bi-stable display 5 comprises a
bi-stable display panel 51, a drive control circuit board 52, and a
middle interface circuit board 53. Wherein, the drive control
circuit board 52 has a middle interface circuit board connector
521, a control chip 522, a panel power module 523, a system power
supply module 524 and a microprocessor 525. The system power supply
module 524 is electrically coupled to the control chip 522, the
panel power module 523 and the microprocessor 525. The middle
interface circuit board 53 is normally flexible printed circuit and
electrically coupled to the middle interface circuit board
connector 521 through a FPC Tail 531 of the middle interface
circuit board 53. In the embodiment, the memory unit 532 is
disposed on the middle interface circuit board 53 for storing the
parameter value of the transitional state which can be read by the
control chip 522. The parameter value is determined by a result of
comparing the source driver output voltages of the image updating
period and the preset threshold voltage, wherein the source driver
output voltages could be the transitional state frame, the number
of the dummy line or the source driver output voltage corresponding
to each transitional state.
[0030] Please refer to FIG. 6, it is a block schematic diagram of
another embodiment of the bi-stable display according to the
invention. In the embodiment of FIG. 6, the bi-stable display 6
comprises a bi-stable display panel 61, a drive control circuit
board 62, and a middle interface circuit board 63. Wherein, the
drive control circuit board 62 has a middle interface circuit board
connector 621, a control chip 622, a panel power module 623, a
system power supply module 624 and a microprocessor 625. The system
power supply module 624 is electrically coupled to the control chip
622, the panel power module 623 and the microprocessor 625. The
middle interface circuit board 63 is normally flexible printed
circuit and electrically coupled to the middle interface circuit
board connector 621 through a FPC Tail 631 of the middle interface
circuit board 63. In the embodiment, the memory unit 611 is
disposed on the bi-stable display panel 61. As a description of the
embodiment in FIG. 5, the memory unit 611 also stores the parameter
value of the transitional state which can be read by the control
chip 622. Wherein, parameter value is determined by a result of
comparing the source driver output voltages of the image updating
period and the preset threshold voltage, and no more description
here.
[0031] Please refer to FIG. 7, it is a block schematic diagram of
other embodiment of the bi-stable display according to the
invention. In the embodiment of FIG. 7, the bi-stable display 7
comprises a bi-stable display panel 71, a drive control circuit
board 72, and a middle interface circuit board 73. Wherein, the
drive control circuit board 72 has a middle interface circuit board
connector 721, a control chip 722, a panel power module 723, a
system power supply module 724, a microprocessor 725 and a memory
unit 726. The system power supply module 724 is electrically
coupled to the control chip 722, the panel power module 723, the
microprocessor 725 and the memory unit 726. The middle interface
circuit board 73 is normally flexible printed circuit and
electrically coupled to the middle interface circuit board
connector 721 through a FPC Tail 731 of the middle interface
circuit board 73. In the embodiment, the memory unit 726 is
disposed on the drive control circuit board 72 for storing the
parameter value of the transitional state which can be read by the
control chip 722. The parameter value is determined by a result of
comparing the source driver output voltages of the image updating
period and the preset threshold voltage, and no more description
here.
[0032] Please refer to FIG. 8, it is a flow chart diagram of an
embodiment of the timing control method of the bi-stable display
according to the invention. In step 811, a difference .DELTA.V(it
is |V.sub.1-V.sub.2|) of source driver output voltages of adjacent
frames are compared with a preset threshold voltage V.sub.T during
an image updating period, i.e. the .DELTA.V equal or greater than
the V.sub.T is compared to determine whether switch amplitude of
the voltage level is greater than the threshold voltage. In actual
practice, the source driver output voltage and the threshold
voltage can be recorded by using binary values, for example, 00 is
presented as 0 volt, 01 is presented as (-15) volt, and 10 is
presented as 15 volt. Therefore, the step S811 compares the
difference .DELTA.V of the source driver output voltages with the
preset threshold voltage V.sub.T, in fact it is equal to compare
the difference of the preset binary values or the difference of the
calculated source driver output voltages corresponding to the
preset binary values with the preset threshold voltage. When the
difference .DELTA.V of the source driver output voltages is equal
or greater than the preset threshold voltage V.sub.T, a
transitional state is added in step S812 at least. In one
embodiment, the transitional state can be located between the
adjacent frames or the dummy line behind the active scan line of
the adjacent frames. Besides, a number of the transitional state
and/or a voltage value of the transitional state are stored in the
memory unit for reading.
[0033] In conclusion, in the bi-stable display, the frame updating
method and the timing control method of the present invention, the
blank frame or the dummy line is added to form the transitional
state of the bi-stable display. Therefore, the levels of the source
drive output voltages are changed in sequence by decreasing or
increasing to eliminate signal interference, reduction of image
quality resulted from switching between high voltage levels
directly and rapidly and excessive power consumption.
[0034] The above description is given by way of example, and not
limitation. Given the above disclosure, one skilled in the art
could devise variations that are within the scope and spirit of the
invention disclosed herein, including configurations ways of the
recessed portions and materials and/or designs of the attaching
structures. Further, the various features of the embodiments
disclosed herein can be used alone, or in varying combinations with
each other and are not intended to be limited to the specific
combination described herein. Thus, the scope of the claims is not
to be limited by the illustrated embodiments.
* * * * *