U.S. patent application number 12/618577 was filed with the patent office on 2010-10-14 for method and system for controlling resistivity in ingots made of compensated feedstock silicon.
This patent application is currently assigned to CALISOLAR, INC.. Invention is credited to Matthias Heuer, Anis Jouini, Fritz Kirscht, Kamel Ounadjela, Marcin Walerysiak.
Application Number | 20100258768 12/618577 |
Document ID | / |
Family ID | 42933633 |
Filed Date | 2010-10-14 |
United States Patent
Application |
20100258768 |
Kind Code |
A1 |
Kirscht; Fritz ; et
al. |
October 14, 2010 |
METHOD AND SYSTEM FOR CONTROLLING RESISTIVITY IN INGOTS MADE OF
COMPENSATED FEEDSTOCK SILICON
Abstract
Techniques for controlling resistivity in the formation of a
silicon ingot from compensated feedstock silicon material prepares
a compensated, upgraded metallurgical silicon feedstock for being
melted to form a silicon melt. The compensated, upgraded
metallurgical silicon feedstock provides semiconductor
predominantly of a single type (p-type or n-type) for which the
process assesses the concentrations of boron and phosphorus and
adds a predetermined amount of boron, phosphorus, aluminum and/or
gallium. The process further melts the silicon feedstock with the
boron, phosphorus, aluminum and/or gallium to form a molten silicon
solution from which to perform directional solidification and
maintains the homogeneity of the resistivity of the silicon
throughout the ingot. A balanced amount of phosphorus can be
optionally added to the aluminum and/or gallium. Resistivity may
also be measured repeatedly during ingot formation, and additional
dopant may be added in response, either repeatedly or
continuously.
Inventors: |
Kirscht; Fritz; (Berlin,
DE) ; Walerysiak; Marcin; (Skrzeszew, PL) ;
Heuer; Matthias; (Leipzig, DE) ; Jouini; Anis;
(Grenoble, FR) ; Ounadjela; Kamel; (Belmont,
CA) |
Correspondence
Address: |
SCHWEGMAN, LUNDBERG & WOESSNER, P.A.
P.O. BOX 2938
MINNEAPOLIS
MN
55402
US
|
Assignee: |
CALISOLAR, INC.
Sunnyvale
CA
|
Family ID: |
42933633 |
Appl. No.: |
12/618577 |
Filed: |
November 13, 2009 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11769109 |
Jun 27, 2007 |
7651566 |
|
|
12618577 |
|
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Current U.S.
Class: |
252/500 ;
264/40.1 |
Current CPC
Class: |
H01L 31/0288 20130101;
Y02E 10/546 20130101; C30B 29/06 20130101; H01L 22/26 20130101;
C30B 11/006 20130101; H01L 31/182 20130101; H01L 31/1876 20130101;
C30B 11/04 20130101 |
Class at
Publication: |
252/500 ;
264/40.1 |
International
Class: |
H01B 1/04 20060101
H01B001/04; B29C 39/44 20060101 B29C039/44 |
Claims
1. A method for controlling resistivity in the formation of a
silicon ingot, comprising the steps of: preparing a compensated,
upgraded metallurgical silicon feedstock for being melted to form a
silicon melt, said compensated, upgraded metallurgical silicon
feedstock comprising a predominantly p-type semiconductor;
assessing quantitatively the relative concentrations of boron and
phosphorus in said compensated, upgraded metallurgical silicon
feedstock; adding to said compensated, upgraded metallurgical
silicon feedstock a first greater-than-zero quantity of a first
element from the group consisting of boron, aluminum, gallium,
mixtures of boron, aluminum and gallium, other Group III elements,
phosphorus, or other Group V elements, wherein said quantitatively
assessed relative concentrations of boron and phosphorus determine
said first greater-than-zero quantity; melting said upgraded
metallurgical silicon feedstock and said first greater-than-zero
quantity of said first element to form a molten silicon solution
including said first greater-than-zero quantity of said first
element; periodically performing resistivity measurements on said
molten silicon solution; adding to said molten silicon solution a
second greater-than-zero quantity of a second element from the
group consisting of boron, aluminum, gallium, mixtures of boron,
aluminum and gallium, other Group III elements, phosphorus, or
other Group V elements, wherein said resistivity determines said
greater-than-zero quantity; and performing a directional
solidification of said molten silicon solution for forming a
silicon ingot and, by virtue of said adding said first
greater-than-zero quantity of said first element and said second
greater-than-zero quantity of said second element suppressing the
transition of said silicon ingot to n-type material by virtue of
reducing the effect of differing boron and phosphorus segregation
coefficients.
2. The method of claim 1, wherein said step of performing
resistivity measurements comprises: inserting a rod into said
molten silicon solution; allowing a portion of said molten silicon
solution to solidify on said rod; and measuring the resistivity of
said solidified portion of said molten silicon solution.
3. The method of claim 2, wherein said rod comprises quartz.
4. The method of claim 1, wherein said step of performing
resistivity measurements comprises contactless measuring.
5. The method of claim 1, wherein said second element is in a
relatively pure elemental form.
6. The method of claim 1, wherein said second element is in a
doped-silicon form.
7. The method of claim 1, wherein said step of adding said second
greater-than-zero quantity to said molten silicon solution
comprises adding said second greater-than-zero quantity
periodically.
8. The method of claim 1, wherein said step of adding said second
greater-than-zero quantity to said molten silicon solution
comprises adding said second greater-than-zero quantity
continuously.
9. A method for controlling resistivity in the formation of a
silicon ingot, comprising the steps of: preparing a compensated,
upgraded metallurgical silicon feedstock for being melted to form a
silicon melt, said compensated, upgraded metallurgical silicon
feedstock comprising a predominantly n-type semiconductor;
assessing quantitatively the relative concentrations of boron and
phosphorus in said compensated, upgraded metallurgical silicon
feedstock; adding to said compensated, upgraded metallurgical
silicon feedstock a first greater-than-zero quantity of a first
element from the group consisting of boron, aluminum, gallium,
mixtures of boron, aluminum and gallium, other Group III elements,
phosphorus, or other Group V elements, wherein said quantitatively
assessed relative concentrations of boron and phosphorus determine
said first greater-than-zero quantity; melting said upgraded
metallurgical silicon feedstock and said greater-than-zero quantity
of said first element to form a molten silicon solution including
said first greater-than-zero quantity of said first element;
periodically performing resistivity measurements on said molten
silicon solution; adding to said molten silicon solution a second
greater-than-zero quantity of a second element from the group
consisting of boron, aluminum, gallium, mixtures of boron, aluminum
and gallium, other Group III elements, phosphorus, or other Group V
elements, wherein said resistivity determines said second
greater-than-zero quantity; and performing a directional
solidification of said molten silicon solution for forming a
silicon ingot and, by virtue of said adding said first
greater-than-zero quantity of said first element and said second
greater-than-zero quantity of said second element, maintaining the
resistivity of said silicon ingot within a predetermined range by
virtue of reducing the effect of differing boron and phosphorus
segregation coefficients.
10. The method of claim 9, wherein said step of performing
resistivity measurements comprises: inserting a rod into said
molten silicon solution; allowing a portion of said molten silicon
solution to solidify on said rod; and measuring the resistivity of
said solidified portion of said molten silicon solution.
11. The method of claim 10, wherein said rod comprises quartz.
12. The method of claim 9, wherein said step of performing
resistivity measurements comprises contactless measuring.
13. The method of claim 9, wherein said second element is in a
relatively pure elemental form.
14. The method of claim 9, wherein said second element is in a
doped-silicon form.
15. The method of claim 9, wherein said step of adding said second
greater-than-zero quantity to said molten silicon solution
comprises adding said second greater-than-zero quantity
periodically.
16. The method of claim 9, wherein said step of adding said second
greater-than-zero quantity to said molten silicon solution
comprises adding said second greater-than-zero quantity
continuously.
17. A silicon ingot, wherein: the ingot is cast from compensated
upgraded metallurgical silicon; at least 90% of the ingot is p-type
silicon or n-type silicon; and wherein said at least 90% of said
ingot has a resistivity between 0.15 .OMEGA.cm and 5 .OMEGA.cm.
18. The cast silicon ingot of claim 17, wherein: said at least 90%
of said ingot has a resistivity between 0.3 .OMEGA.cm and 4
.OMEGA.cm.
19. The cast silicon ingot of claim 17, wherein: said at least 90%
of said ingot has a resistivity between 0.8 .OMEGA.cm and 2.5
.OMEGA.cm.
20. The cast silicon ingot of claim 17, wherein: said at least 90%
of said ingot has a resistivity between 1 .OMEGA.cm and 1.5
.OMEGA.cm.
Description
FIELD
[0001] The present disclosure relates to methods and systems for
use in the fabrication of semiconductor materials such as silicon.
More particularly, the present disclosure relates to a method and
system for controlling resistivity in the formation of p-type
silicon ingots that permits the use of low-grade silicon feedstock,
for fabricating silicon that may be ultimately useful in the
manufacturing of solar cells and similar products.
DESCRIPTION OF THE RELATED ART
[0002] The photovoltaic industry (PV) industry is growing rapidly
and is responsible for increasing industrial consumption of silicon
beyond the more traditional integrated circuit (IC) applications.
Today, the silicon needs of the solar cell industry are starting to
compete with the silicon needs of the IC industry. With present
manufacturing technologies, both IC and solar cell industries
require a refined, purified silicon feedstock as a starting
material.
[0003] Materials alternatives for solar cells range from
single-crystal, electronic-grade (EG) silicon to relatively dirty,
metallurgical-grade (MG) silicon. EG silicon yields solar cells
having efficiencies close to the theoretical limit, but at a
prohibitive price. On the other hand, MG silicon typically fails to
produce working solar cells. However, there may be other
semiconductor materials that could be useful for solar cell
fabrication. In practice, however, nearly 90% of commercial solar
cells are made of crystalline silicon.
[0004] Because of the high cost and complex processing requirements
of obtaining and using highly pure silicon feedstock and the
competing demand from the IC industry, silicon needs usable for
solar cells are not likely to be satisfied by either EG, MG, or
other silicon producers using known processing techniques. As long
as this unsatisfactory situation persists, economical solar cells
for large-scale electrical energy production may not be
attainable.
[0005] The resistivity is one of the most important properties of
silicon (Si) used for manufacturing solar cells. That is because
the solar cell efficiency sensitively depends on the resistivity.
State-of-the-art solar cell technologies require resistivity values
ranging between 0.5 .OMEGA.cm and 5.0 .OMEGA.cm, typically.
[0006] Besides the resistivity range, the type of conductivity is
of utmost importance when making solar cells. Conductivity needs to
be either p-type or n-type, i.e., either electrons or holes are the
majority current carriers. In current cell technologies, p-type
silicon material is typically doped with boron (B), which
introduces holes or, expressed differently, acts as an acceptor in
respective silicon. Alternatively, n-type material may be used.
Such material is typically doped with phosphorus (P), which
introduces electrons. Expressed differently, phosphorus is acting
as a donor.
[0007] Feedstock silicon materials based on upgraded metallurgical
(UM) silicon very often contain similar amounts of B and P. As a
consequence, boron-induced holes and phosphorus-induced electrons
can cancel each other, an effect called compensation. The
compensation of majority current carriers often leads to a
transition from p-type silicon (in the beginning of a
crystallization process) to n-type silicon (at the end of a
crystallization process). This is a consequence of different
segregation behavior of these doping elements: phosphorus has a
smaller segregation coefficient than boron. Thereby, in the case of
casting ingots for producing multi-crystalline (mc) Si, the process
might end up with p-type material only in the bottom and middle
parts of such ingots, whereas the top part becomes n-conductive and
has to be discarded.
[0008] Currently produced feedstock materials based on UMG silicon
come often with a base resistivity below the minimum resistivity of
0.5 .OMEGA.cm that is typically specified by solar cell
manufacturers. There is a simple reason for this: expensive
processes for upgrading UMG-Si are primarily concerned with taking
out non-metals, including dopant atoms B and P. In order to reduce
cost, there is a clear tendency to minimize such processing, i.e.,
UMG-Si typically still contains high concentrations of dopant
atoms. As long as boron is the dominating dopant we get p-type
material with relatively low resistivity.
[0009] Compensation of boron by phosphorus--increasing with ongoing
crystallization due to different incorporation of B and P at
solidification--results in increasing resistivity with ongoing
crystallization. So, the typically very low resistivity at the
beginning of crystallization increases with ongoing
crystallization. However, as already stated, there is the general
problem of too heavy resistivity increase due to overcompensation
of B by P, resulting in a transition of conductivity from p-type to
n-type. The initial addition of boron for suppressing such a
transition is not practical because one would even further reduce
the resistivity in bottom and middle parts of, e.g., an ingot of
mc-Si.
[0010] Accordingly, a need exists to control the compensation
effect of the material, in order to increase the portion of p-type
silicon material in ingots thereby increasing the yield of such
material.
SUMMARY
[0011] Techniques are here disclosed for providing a combination of
interrelated steps at the ingot formation level for ultimately
making economically viable the fabrication of solar cells on a mass
production level. The present disclosure includes a method and
system for forming multi-crystalline silicon ingots, which ingots
possess uniformly p-type semiconductor material along essentially
all of the ingot axial length. With the disclosed process and
system, silicon ingots may be formed directly within a silicon melt
crucible. For example, using mc-Si ingots formed from the processes
here disclosed, solar wafers and solar cells can be made with
improved performance/cost ratio, based on this mc-Si material.
[0012] According to one aspect of the disclosed subject matter, a
semiconductor ingot-forming method and system permit controlling
resistivity in the formation of a silicon ingot by preparing UMG
silicon feedstock for being melted to form a silicon melt. The
present disclosure assesses the concentrations of boron and
phosphorus in said UMG-Si feedstock material. Our approach of
choice is analyzing the initial incorporation of B and P by in-situ
measuring the resistivity in the moment when the ingot formation
process starts. Based on this assessment, a predetermined amount of
an element of group III of the periodic system, which can be Ga,
Al, a combination of Ga and Al, or another group III element, is
added to the UMG-Si feedstock material during the crystallization
of a large-size ingot. The predetermined quantity of such group III
element(s) associates with the assessed B and P concentrations.
[0013] The present disclosure includes melting the UMG-Si feedstock
and the added group III element(s) to form a molten silicon
solution including the predetermined amount of group III
element(s); performing a directional solidification of the molten
silicon solution for forming a silicon ingot and, by virtue of the
adding a predetermined amount of the group III element(s),
maintaining the homogeneity the resistivity of the silicon ingot
throughout the silicon ingot. Below certain resistivity it becomes
advantageous to add P or other group V elements to the group III
element(s). This way the useful resistivity range of reasonably
yielding p-type ingots made of compensated UMG-Si feedstock can be
extended.
[0014] In one embodiment, the present disclosure also includes
methods for repeatedly measuring the dopant concentrations in the
silicon melt during ingot formation, by testing resistivity in a
sample. The dopant concentrations may then be repeatedly adjusted
by adding discrete amounts of dopant in order to keep the
resistivity of the ingot within a predetermined range.
[0015] In another embodiment, dopant concentrations in the silicon
melt may be continuously adjusted by a flow of dopant, rather than
repeatedly tweaked by discrete additions of dopant. In this
embodiment, the repeated resistivity measurements may be fed into a
resistivity model that outputs the required flow rate of a group
III or group V element, which may in turn be fed into the melt.
[0016] These and other advantages of the disclosed subject matter,
as well as additional novel features, will be apparent from the
description provided herein. The intent of this summary is not to
be a comprehensive description of the claimed subject matter, but
rather to provide a short overview of some of the subject matter's
functionality. Other systems, methods, features and advantages here
provided will become apparent to one with skill in the art upon
examination of the following figures and detailed description. It
is intended that all such additional systems, methods, features and
advantages be included within this description, be within the scope
of the accompanying claims.
BRIEF DESCRIPTIONS OF THE DRAWINGS
[0017] The features, nature, and advantages of the disclosed
subject matter may become more apparent from the detailed
description set forth below when taken in conjunction with the
drawings in which like reference characters identify
correspondingly throughout and wherein:
[0018] FIG. 1 demonstrates one aspect of forming a silicon ingot
that the present disclosure addresses;
[0019] FIG. 2 illustrates conceptually an embodiment of the present
disclosure for forming a silicon ingot possessing essentially all
p-type silicon material;
[0020] FIG. 3 shows conceptually an alternative embodiment of the
present disclosure for forming a silicon ingot possessing
essentially all p-type silicon material;
[0021] FIG. 4 depicts the axial carrier concentration of an ingot
made from compensated UMG silicon feedstock material;
[0022] FIG. 5 depicts the axial carrier concentration of an ingot
made from differently compensated UMG-Si feedstock material;
[0023] FIG. 6 depicts the axial carrier concentration of an ingot
made from another compensated UMG-Si feedstock material;
[0024] FIG. 7 demonstrates one aspect of forming a silicon ingot
using repeated additions of dopant that the present disclosure
addresses;
[0025] FIG. 8 depicts the axial resistivity profile of an ingot
made using repeated additions of dopant;
[0026] FIG. 9 demonstrates one aspect of forming a silicon ingot
using continuous flow of dopant that the present disclosure
addresses;
[0027] FIG. 10 depicts the axial resistivity profile of an ingot
made using continuous flow of dopant;
[0028] FIG. 11 demonstrates embodiments of the present disclosure
for forming both p-type and n-type semiconductor ingots; and
[0029] FIG. 12 shows an embodiment of a continuous doping system in
accordance with the present disclosure.
DETAILED DESCRIPTION OF THE SPECIFIC EMBODIMENTS
[0030] The method and system of the present disclosure provide a
semiconductor ingot formation process for producing a
multi-crystalline silicon ingot. As a result of using the disclosed
subject matter, an improvement in the properties of low-grade
semiconductor materials, such as upgraded, partially purified
metallurgical silicon occurs. Such improvement allows, for example,
the use of UMG-Si in producing solar cells as may be used in solar
power generation and related uses. The method and system of the
present disclosure, moreover, particularly benefits the formation
of solar cells using UMG or other non-electronic grade feedstock
silicon materials, but can be used for electronic grade feedstock
silicon too.
[0031] Directional solidification (DS) leads to characteristic
axial distribution of impurities (I), controlled by
impurity-specific segregation characteristics. The so-called
segregation coefficient S that describes segregation
characteristics is described by the following simplified
expression:
S(I)=f(C(I).sub.crystal/C(I).sub.melt)
where, [0032] S(I) represents the segregation coefficient of a
specific impurity like dopant atoms, for example I=B or I=P; [0033]
C(I).sub.crystal represents the concentration of, e.g., B or P in
the solidified, crystalline silicon; and [0034] C(I).sub.melt
represents the concentration of, e.g., B or P in the silicon melt.
If both boron and phosphorus are present in feedstock material used
for DS crystallization of silicon, from the variation of axial
resistivity after crystallization it is possible to conclude on the
concentration ratio B/P in respective feedstock silicon material.
Conveniently, a small (e.g. from a charge size of only a few
hundred grams of feedstock material) ingot or crystal is sufficient
to get reliable axial resistivity profiles, as long as the
feedstock sampling reflects characteristic feedstock composition
with respect to the concentration of B and P. Most important is the
assessment of the initial incorporation of B and P in such a small
reference ingot to find the right amount of dopants added in the
beginning of the process, but with the present disclosure even this
is not necessary anymore. However, we have applied this methodology
for investigating feedstock materials with different B/P
ratios.
[0035] At B/P ratios close to 2 and below, we have seen a
transition from p-conductivity to n-conductivity in respective
ingots, leading to yield loss of usable p-type material of at least
10%. Typically, the portion of n-type material and the
corresponding yield loss of p-type material can be up to almost
50%. The methods of the present disclosure may significantly
improve the distribution of axial resistivity in ingots made from
feedstock material with such compensation-related transition of
conductivity. These methods allow the complete suppression of the
transition to n-type material, so that up to 100% of respective
ingots can be used. More typical is a yield of approximately 95% of
usable p-type material.
[0036] FIG. 1 shows diagram 10 which conceptually portrays the
concentration of boron and phosphorus appearing in a silicon
feedstock melt for forming a silicon ingot. In diagram 10, ordinate
12 relates to dopant concentration in the silicon melt, while axis
14 represents the stage of silicon ingot formation ranging from 0%
(0.0) to 100% (1.0). Line 16 represents the change in boron
concentration in the silicon melt, while line 18 represents the
change in phosphorus concentration. Initially--close to 0% of ingot
formation--B/P ratios >1 might exist.
[0037] As conceptual diagram 10 shows, because of the different
segregation coefficients of boron and phosphorus, at some point in
the silicon ingot formation, the concentration of phosphorus
exceeds the concentration of boron. Thus, a silicon melt that began
as a p-type semiconductor material will become an n-type
semiconductor material. This is shown at line 20. Line 20,
therefore, depicts that since the silicon becomes an n-type
semiconductor, the resulting silicon ingot exhibits a p-n
junction.
[0038] FIG. 2 depicts one embodiment of the process 30 of the
present disclosure, wherein compensated p-type UMG silicon 32
requires a predetermined amount of a group III element 34,
specifically aluminum or gallium, to form molten silicon 36. If the
initial resistivity, .rho., of UMG silicon 32 ranges between 0.15
.OMEGA.cm and 0.5 .OMEGA.cm, optionally also phosphorus 37 may be
added to a group III element of the above kind. Using a silicon
ingot formation process, for example a typical casting process,
according to the present disclosure such a process yields a 100%
p-type silicon ingot 38.
[0039] FIG. 3 presents an alternative embodiment of the process 40
of the present disclosure, wherein compensated UMG p-type silicon
42 has an initial resistivity close to the minimum resistivity of
.apprxeq.0.15 .OMEGA.cm of a usable silicon ingot 50. When
approaching such a low resistivity, for example 0.2 .OMEGA.cm,
adding only group III element 44 to the silicon melt 48 is not
sufficient. In this case, adding additional phosphorus becomes
mandatory in order to end up with 100% p-type ingot 50 in
conjunction with a high portion of usable material out of this
ingot, typically close to 95% of the total ingot.
[0040] In the following FIGS. 4 through 6 and accompanying text
appear axial resistivity plots and description of the resulting
silicon ingots from the processes of FIGS. 2 and 3. FIG. 4 depicts
the axial carrier concentration of an ingot made from compensated
UMG silicon feedstock material with B concentration
5.0.times.10.sup.16 cm.sup.-3 and P concentration
2.4.times.10.sup.16 cm.sup.-3 (concentration ratio B/P is close to
2). At the beginning of crystallization, i.e. at the bottom of such
an ingot, the resistivity is 0.6 .OMEGA.cm which corresponds to an
initial majority carrier concentration of 2.6.times.10.sup.16
cm.sup.-3. Presented is ACCEPTOR CONCENTRATION minus DONOR
CONCENTRATION along INGOT HEIGHT, with g being the solidified
fraction of an ingot: g=0 means bottom of ingot, g=1 means top of
ingot.
[0041] FIG. 4, therefore, presents a plot 60 of axial resistivity
of a silicon ingot when using UMG silicon feedstock material. In
this case we look at materials that lead to an initial resistivity
>0.5 .OMEGA.cm. Along ordinate 62 we have
resistivity-controlling numbers of electron donors, N.sub.d, minus
numbers of electron acceptors, N.sub.a, as appearing in such a
silicon ingot (ranging from 1.times.10.sup.15 to 1.times.10.sup.17
per cm.sup.-3). Along abscissa 64 appears a measure of ingot
formation completeness, ranging from 0.0 to 1.0, where 1.0
indicates the complete ingot formation. With an initial resistivity
of the silicon ingot of 0.6 .OMEGA.cm, line 66 shows that without
the disclosed process, at approximately 0.8 completeness N.sub.d
essentially equals N.sub.a. At this point, the amount of phosphorus
in the silicon melt balances the amount of boron. The result of
this balance becomes first a p-n junction and then, for the
remainder of the silicon ingot, an n-type semiconductor material.
Using this ingot would mean at least 20% yield loss of usable
p-type material.
[0042] In contrast to line 66, line 68 demonstrates the effect of
adding an amount of gallium sufficient to counteract the effect of
the increasing concentration of phosphorus relative to boron (as
shown in FIG. 1). Line 68 shows a slight decrease in resistivity in
the silicon ingot due to the addition of gallium. However, the
addition of gallium further provides the beneficial effect of
maintaining the difference between N.sub.a and N.sub.d almost
constant throughout a large portion of the silicon ingot. Thus,
essentially until the ingot is approximately at 95% of completion,
resistivity ranges between 0.53 .OMEGA.cm and 0.76 .OMEGA.cm, the
silicon remains as p-type semiconductor material, and the p-n
junction is, thereby, completely avoided. For the specific
feedstock silicon in question, the yield loss on the ingot level is
reduced by at least 15% absolute, from at least 20% in the
state-of-the-art process to approximately 5% in the disclosed
process. Another essential advantage is the very tight resistivity
range achieved within 95% of usable ingot.
[0043] FIG. 5 depicts the axial carrier concentration of an ingot
made from differently compensated UMG-Si feedstock material with B
concentration 7.6.times.10.sup.16 cm.sup.-3 and P concentration
5.0.times.10.sup.16 cm.sup.-3 (concentration ratio B/P is close to
1.5). At the beginning of crystallization, i.e. at the bottom of
such an ingot, the resistivity is again 0.6 .OMEGA.cm which
corresponds to an initial majority carrier concentration of
2.6.times.10.sup.16 cm.sup.-3. Presented is ACCEPTOR CONCENTRATION
minus DONOR CONCENTRATION along INGOT HEIGHT, with g being the
solidified fraction of an ingot: g=0 means bottom of ingot, g=1
means top of ingot. FIG. 5, therefore, presents a plot 70 of axial
resistivity of a silicon ingot also using an UMG silicon material,
as shown in FIG. 2. Ordinate 72 for the values of N.sub.a-N.sub.d
ranges from 1.times.10.sup.15 to 1.times.10.sup.17 per cm.sup.-3.
Along abscissa 74 ingot formation completeness ranges from 0.0 to
1.0. With an initial resistivity of 0.6 .OMEGA.cm of the silicon
ingot, line 76 shows that without the disclosed process, at
approximately 0.6 completeness, N.sub.d essentially equals N.sub.a.
At this point, the amount of phosphorus in the silicon melt
balances the amount of boron. The result of this balance becomes
first a p-n junction and then, for the remainder of the silicon
ingot, an n-type semiconductor material. Using this ingot would
mean at least 40% yield loss of usable p-type material.
[0044] In contrast to line 76, line 78 demonstrates the effect of
adding an amount of gallium sufficient to counteract the effect of
the increasing concentration of phosphorus relative to boron. Line
78 shows a slight decrease in resistivity in the silicon ingot due
to the addition of gallium. However, the addition of gallium
further provides the beneficial effect of essentially reducing the
difference between N.sub.a and N.sub.d throughout the almost entire
silicon ingot formation. Thus, essentially until the ingot is
approximately at the 0.95 completion point, resistivity ranges
between 0.43 .OMEGA.cm and 0.98 .OMEGA.cm and so the silicon
remains usable p-type semiconductor material. The p-n junction is
completely avoided.
[0045] FIG. 6 depicts the axial carrier concentration of an ingot
made from another compensated UMG-Si feedstock material with B
concentration 1.86.times.10.sup.17 cm.sup.-3 and P concentration
9.0.times.10.sup.16 cm.sup.-3 (concentration ratio B/P is close to
2). At the beginning of crystallization, i.e. at the bottom of such
an ingot, the resistivity is only 0.2 .OMEGA.cm which corresponds
to an initial majority carrier concentration of 9.6.times.10.sup.16
cm.sup.-3. Presented is ACCEPTOR CONCENTRATION minus DONOR
CONCENTRATION along INGOT HEIGHT, with g being the solidified
fraction of an ingot: g=0 means bottom of ingot, g=1 means top of
ingot. The p-n junction is completely avoided, and resistivity
variation is still very low within 95% of the total usable ingot.
Thus, for the specific feedstock silicon in question, the yield
loss on the ingot level is reduced by at least 35% absolute, from
at least 40% in the state-of-the-art process to approximately 5% in
the disclosed process.
[0046] FIG. 6 presents a plot 80 of axial resistivity of a silicon
ingot to demonstrate how the present disclosure may yet
beneficially affect the resistivity of feedstock material at the
edge of the useful resistivity range, as FIG. 3 depicts. Such a
process may use a UMG silicon feedstock material that, while
demonstrating a less desirable resistivity of, e.g., approximately
0.2 .OMEGA.cm, possesses the highly desirable feature of
significantly lower manufacturing costs.
[0047] In plot 80, ordinate 82 for the values of N.sub.d-N.sub.a
ranges from 1.times.10.sup.15 to 5.times.10.sup.17 per cm.sup.-3.
Along abscissa 84 ingot formation completeness ranges from 0.0 to
1.0. With an initial resistivity of the silicon ingot of 0.2
.OMEGA.cm, line 86 shows that without the disclosed process, at
approximately 0.8 completeness, N.sub.d essentially equals N.sub.a.
Line 90 demonstrates the effect of adding an amount of gallium
sufficient to counteract the effect of the increasing concentration
of phosphorus relative to boron. However, almost throughout the
whole ingot the resulting resistivity is below the already
initially very low resistivity of 0.2 .OMEGA.cm (resistivity below
this value is less useful). Thus, when using feedstock silicon
leading to resistivities at the low end of the useful range, with
gallium (or aluminum) alone it is practically impossible to bring
the material into a more useful resistivity range, even though the
p-n junction is still completely suppressed.
[0048] Line 88, however, shows a different result. Line 88 shows
the result of also adding a certain amount of phosphorus to the
feedstock silicon, in addition to the already added gallium or
aluminum. As line 88 shows, the effect is to initially increase the
resistivity and avoid the p-n junction. Thus, the silicon remains
as p-type semiconductor material, and within approximately 95% of
the ingot the resistivity ranges from 0.17 .OMEGA.cm to 1.42
.OMEGA.cm. Only a very small percentage of this material is in the
less useful range <0.2 .OMEGA.cm, as opposed to the case of
adding only the group III element Ga (or, similarly, Al).
[0049] Summarizing, at relatively high ingot resistivity
(beyond.apprxeq.0.4 .OMEGA.cm) an addition of only aluminum or
gallium can advantageously counteract compensation of B due to P.
These elements of group III of the periodic system have to be added
to the feedstock silicon before melt-down for starting
crystallization. Contrary to the case of adding boron, when adding
Al or Ga an excellent homogenization of the resistivity along the
crystallization axis is obtained, in conjunction with avoiding
strong resistivity reduction in the early stage of crystallization
(which happens if simply adding B instead of Al or Ga). A mixture
of Al and Ga is also possible.
[0050] At relatively low ingot resistivity (below.apprxeq.0.4
.OMEGA.cm) one can start adding a combination of Ga and P or,
alternatively, of Al and P to advantageously counteract
compensation. At very low resistivity (approaching.apprxeq.0.2
.OMEGA.cm) such a combination of a group III element and P becomes
mandatory. Applying a certain Ga/P ratio or, alternatively, a
certain Al/P ratio (whereby Ga can be partially substituted by Al,
and vice versa) can now be exploited to make use of feedstock
material with very low resistivity, down to a minimum resistivity
of approximately 0.15 .OMEGA.cm. Such low-grade material is
associated with low production cost.
[0051] The present disclosure provides methods for controlling
resistivity at growing silicon ingots from compensated feedstock
silicon material, comprising, in one embodiment, the steps of:
[0052] assessing the concentration of boron and phosphorus that
will be initially incorporated into a specific ingot made from
compensated feedstock silicon material, [0053] determining an
appropriate amount of Ga and/or Al (for relatively high resistivity
to be expected from above assessment) or, alternatively,
determining an appropriate amount of Ga and/or Al and an additional
amount of P (for relatively low resistivity to be expected from
above assessment), [0054] preparing respective feedstock silicon
material for being melted to form a silicon melt, by adding
predetermined amounts of Ga and/or Al (and likewise P in case of
relatively low resistivity to be expected from above assessment),
[0055] melting and then solidifying the above mixture of feedstock
silicon and balanced amounts of Ga and/or Al (and likewise P in
case of relatively low resistivity to be expected from above
assessment) [0056] by virtue of the adding of the predetermined
amount of Ga and/or Al (and likewise P in case of relatively low
resistivity to be expected from above assessment) maintaining the
homogeneity of the resistivity of the specific silicon ingot
throughout the respective ingot.
[0057] FIG. 7 presents a plot 100 of axial dopant concentrations in
a silicon ingot to demonstrate how the present disclosure may
provide a more tightly controlled difference between acceptor and
donor dopant atom concentrations.
[0058] In plot 100, ordinate 102 for the values of N.sub.a and
N.sub.d ranges from 1.times.10.sup.16 to 1.times.10.sup.18 per
cm.sup.-3. Along abscissa 104 ingot formation completeness ranges
from 0.0 to 1.0. Line 106 shows N.sub.a, and line 108 shows
N.sub.d.
[0059] As shown in plot 100, the concentration of acceptor atoms in
the silicon melt may be increased stepwise at intervals during
ingot formation. This result may be achieved by measuring the
dopant concentration of the remaining molten silicon at intervals
during crystallization, and thereby inferring the necessary amount
of dopant to be added. One way of measuring the molten silicon's
dopant concentration is to insert a dip rod (e.g., one made of
quartz) into the molten silicon, allowing a portion of the molten
silicon to cling to the dip rod and then solidify; the resistivity
of this solidified piece of silicon may be measured once it has
cooled, and the relative concentration of dopant atoms may be
inferred in known ways. The resistivity measurement of the
solidified silicon may be accomplished by either contact or
contactless (e.g., inductive) measuring. The resistivity
measurement may be calibrated by comparing it against samples
having known resistivities, in order to eliminate inaccuracies from
the measurement.
[0060] This procedure may allow all or most of the ingot to be
formed as p-type silicon, while also allowing the resistivity to be
more tightly controlled, and maintained between predetermined
levels. In the ingot shown in plot 100, for example, the transition
to n-type silicon is suppressed until approximately 91% formation,
shown by line 105. The relative concentration of donor and acceptor
atoms is kept reasonably tightly controlled up until approximately
the same point, such that, by far, most of the silicon ingot is
p-type, with a resistivity in a usable range.
[0061] FIG. 8 presents plot 120, showing the axial resistivity
profile corresponding to plot 100 in FIG. 7. In plot 120, ordinate
122 for the values of resistivity in .OMEGA.cm ranges from 0 to 5.
Along abscissa 124 ingot formation completeness ranges from 0.0 to
1.0. Line 126 shows the resistivity of the ingot from plot 100. As
shown, the resistivity of that ingot may be maintained in a range
of approximately 0.8 to 2.5 .OMEGA.cm for approximately 90% of the
ingot. In some cases, the resistivity range may be approximately
0.3 to 4 .OMEGA.cm. In some other cases, the resistivity range may
be 0.15 to 5 .OMEGA.cm.
[0062] However, in some cases it may be undesirable for an ingot to
have an axial resistivity profile that varies discontinuously or
almost discontinuously, such as the profile shown in plot 120. To
avoid such discontinuities, the present disclosure provides methods
as follows for continuously varying the amount of dopant flowing
into the molten silicon.
[0063] FIG. 9 presents a plot 140 of axial dopant concentrations in
a silicon ingot, both with and without the continuous-flow doping
of the present disclosure. Plot 140 presents ordinate 142 for the
values of N.sub.a and N.sub.d, which ranges from 1.times.10.sup.14
to 1.times.10.sup.19 per cm.sup.-3. Along abscissa 144 ingot
formation completeness ranges from 0.0 to 1.0.
[0064] Line 146 shows the donor concentration as it increases due
to the less-than-one segregation coefficient of phosphorus. Line
148 shows the acceptor concentration, which increases both because
of the less-than-one segregation coefficient of the acceptor
dopants, and also because new dopant atoms are continuously being
fed into the molten silicon. Line 150 shows what would be the net
dopant concentration in the ingot if no additional dopant were
added to the melt during ingot formation; line 150 assumes that the
initial concentrations of donor and acceptor atoms are the same as
in lines 146 and 148 (i.e. shown by the intersections of lines 146
and 148 with ordinate 142), respectively. Line 151 marks the p-n
junction and transition to n-type material that would occur in line
150 if no additional dopant were added to the melt during ingot
formation. Line 152, by contrast, shows the relatively flat net
dopant concentration that may be achieved by the continuous-flow
methods of the present disclosure.
[0065] FIG. 10 presents plot 160 showing the axial resistivity
profile that corresponds to line 152 in the continuously doped
ingot from plot 140. As shown, resistivity 162 may be maintained
relatively constant throughout substantially all of ingot
formation. More typically, resistivity may be maintained relatively
constant through at least 90% of ingot formation. In some cases,
resistivity may be maintained in the range of approximately 1.0 to
1.5 .OMEGA.cm.
[0066] FIG. 11 shows two enlarged views from plots of the type
shown in plot 100. View 170 is similar to the graph shown in plot
100, with the molten silicon successively doped with acceptor atoms
to form a p-type ingot with resistivity constrained to a
predetermined range.
[0067] View 172 shows another embodiment of the present disclosure,
with a higher concentration of donor atoms than acceptor atoms.
This view shows that the present disclosure may be adapted to
producing n-type silicon with resistivity constrained to a
predetermined range, simply by changing the initial concentrations
of dopant atoms, and then successively adding acceptor dopant in
the correct quantities to keep resistivity to a desired range.
N-type silicon may be desirable in some circumstances, but it may
need to have resistivity in a certain range in order to be useful.
The present disclosure provides a simple way of producing low-cost
n-type silicon with resistivity constrained to a predetermined
range. One of ordinary skill will recognize that the
continuous-flow methods of the present disclosure may also be
adapted to producing n-type silicon with a relatively flat axial
resistivity profile.
[0068] FIG. 12 shows an embodiment of a continuous-flow doping
setup. Compensated UMG silicon is placed into crucible 180 and
melted. At the stage shown in FIG. 12, recrystallization has
already begun. Silicon ingot 181 is shown at the bottom of crucible
180, underneath molten silicon 182. At intervals during
recrystallization, dip probe 183 is inserted into molten silicon
182 to remove a portion for testing. The removed portion of molten
silicon (not shown) is then solidified outside the crucible and its
resistivity is measured at step 184. The measured resistivity is
then fed into a computer model of the process at step 185, which
reveals the relative dopant concentrations and the necessary doping
adjustment. The results of that calculation are fed into a feeder
control system at step 186, which then adjusts the flow rate of
dopant entering the melt through feeder 187. The dopant flowing
into crucible 180 may be a powdered doped silicon, or any other
type of dopant that may continuously flow. Using doped silicon
powder may allow greater control over the dopant level in molten
silicon 182 than using, e.g., pure dopant.
[0069] The semiconductor processing features and functions
described herein provide for resistivity control in the formation
of p-type and n-type semiconductor ingots. Although various
embodiments which incorporate the teachings of the present
disclosure have been shown and described in detail herein, those
skilled in the art may readily devise many other varied embodiments
that still incorporate these teachings. The foregoing description
of the specific embodiments, therefore, is provided to enable a
person skilled in the art to make or use the claimed subject
matter. Various modifications to these embodiments will be readily
apparent to those skilled in the art, and the generic principles
defined herein may be applied to other embodiments without the use
of the innovative faculty. Thus, the claimed subject matter is not
intended to be limited to the embodiments shown herein, but is to
be accorded the widest scope consistent with the principles and
novel features disclosed herein.
* * * * *