U.S. patent application number 12/474531 was filed with the patent office on 2009-12-17 for connection method and substrate.
This patent application is currently assigned to SONY CORPORATION. Invention is credited to Ryosuke ARAKI, Masaki HANDA, Hiroshi ICHIKI, Masato KIKUCHI, Tetsujiro KONDO, Shunsuke MOCHIZUKI, Takashi NAKANISHI, Masahiro YOSHIOKA.
Application Number | 20090309679 12/474531 |
Document ID | / |
Family ID | 41414200 |
Filed Date | 2009-12-17 |
United States Patent
Application |
20090309679 |
Kind Code |
A1 |
KIKUCHI; Masato ; et
al. |
December 17, 2009 |
CONNECTION METHOD AND SUBSTRATE
Abstract
A connection method includes the step of connecting, using a
line on a dielectric element, two points through which a signal
flows, the two points having different heights and the widths of
the line at the positions of the two points having been adjusted on
the basis of the thickness of the dielectric element.
Inventors: |
KIKUCHI; Masato; (Tokyo,
JP) ; MOCHIZUKI; Shunsuke; (Tokyo, JP) ;
YOSHIOKA; Masahiro; (Tokyo, JP) ; ARAKI; Ryosuke;
(Tokyo, JP) ; HANDA; Masaki; (Kanagawa, JP)
; NAKANISHI; Takashi; (Tokyo, JP) ; ICHIKI;
Hiroshi; (Kanagawa, JP) ; KONDO; Tetsujiro;
(Tokyo, JP) |
Correspondence
Address: |
OBLON, SPIVAK, MCCLELLAND MAIER & NEUSTADT, L.L.P.
1940 DUKE STREET
ALEXANDRIA
VA
22314
US
|
Assignee: |
SONY CORPORATION
Tokyo
JP
|
Family ID: |
41414200 |
Appl. No.: |
12/474531 |
Filed: |
May 29, 2009 |
Current U.S.
Class: |
333/238 ;
174/260; 174/261 |
Current CPC
Class: |
H05K 2201/09727
20130101; H01P 3/003 20130101; H05K 2203/1469 20130101; H05K 3/32
20130101; H01L 2224/48091 20130101; H01P 3/081 20130101; H01L
2224/48091 20130101; H01P 3/085 20130101; H01P 5/028 20130101; H01L
2224/48247 20130101; H05K 1/0248 20130101; H01P 3/026 20130101;
H05K 2201/09827 20130101; H05K 1/0243 20130101; H05K 2201/09845
20130101; H01L 2924/00014 20130101 |
Class at
Publication: |
333/238 ;
174/261; 174/260 |
International
Class: |
H01P 3/08 20060101
H01P003/08; H05K 1/11 20060101 H05K001/11 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 13, 2008 |
JP |
2008-156048 |
Aug 22, 2008 |
JP |
2008-214553 |
Claims
1. A connection method comprising the step of connecting, using a
line on a dielectric element, two points through which a signal
flows, the two points having different heights and the widths of
the line at the positions of the two points having been adjusted on
the basis of the thickness of the dielectric element.
2. The connection method according to claim 1, wherein a higher
point of the two points is a point on a line of an electronic part
mounted on a substrate, and a lower point of the two points is a
point on a line of the substrate.
3. The connection method according to claim 2, wherein an area
along which the thickness of the dielectric element decreases
toward a connection part with the line of the substrate is formed
in the end portion of the electronic part composed of a dielectric
material, and the two points having different heights are connected
by a line disposed along the area.
4. The connection method according to claim 2, wherein steps at
which the thickness of the dielectric element decreases toward a
connection part with a line of the substrate are formed in the end
portion of the electronic part composed of a dielectric material,
and the two points having different heights are connected by a line
disposed on the steps.
5. A substrate, wherein two points through which a signal flows are
connected using a line on a dielectric element, the two points
having different heights and the widths of the line at the
positions of the two points having been adjusted on the basis of
the thickness of the dielectric element.
6. The substrate according to claim 5, wherein a higher point of
the two points is a point on a line of an electronic part mounted
on a substrate, and a lower point of the two points is a point on a
line of the substrate.
7. The substrate according to claim 6, wherein an area along which
the thickness of the dielectric element decreases toward a
connection part with the line of the substrate is formed in the end
portion of the electronic part composed of a dielectric material,
and the two points having different heights are connected by a line
disposed along the area.
8. The substrate according to claim 6, wherein steps at which the
thickness of the dielectric decreases toward a connection part with
the line of the substrate are formed in the end portion of the
electronic part composed of a dielectric material, and the two
points having different heights are connected by a line disposed on
the steps.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a connection method and a
substrate. More particularly, the present invention relates to a
connection method capable of reducing reflection due to impedance
unmatching in a connection part and satisfactorily maintaining
signal quality in a case where, for example, electronic parts are
to be mounted on a substrate, and to a substrate for use
therewith.
[0003] 2. Description of the Related Art
[0004] Connection structures between parts and substrates are
broadly divided into the following two types. One type is a
completely shielded structure like a coaxial cable, and the other
type is an open structure in which inductive capacity exists
between signal lines like wiring on a substrate.
[0005] Although the latter open structure is inferior to a coaxial
structure from the viewpoint of crosstalk and electromagnetic
interference, it is a practical structure which is advantageous in
terms of industrial cost incurred for design, manufacture, and
inspection, and in terms of connection properties, as can be
understood when compared with ordinary printed wiring
substrates.
[0006] However, in the shape of lines of an open structure, when
handling a high-speed signal, deterioration of a transmission
signal becomes a significant problem. In particular, as shown in
FIG. 1, in a connection part between an electronic part that is
surface mounted on a substrate and a substrate, a transmission
signal is likely to be attenuated/deteriorated due to the influence
of a reflected wave caused by impedance unmatching.
[0007] By forming wiring to be a line structure like a microstrip,
it is possible to adjust impedance so as to deal with a high-speed
signal. However, in the case of mounting between
layers/substrates/parts having different heights, it is necessary
to extend a terminal portion from the part side as shown in FIG. 2,
or it is necessary to form a viahole from a solder ball as shown in
FIG. 3, thereby being connected to the wiring on the substrate.
Therefore, in a connection part between a part and a substrate
shown in FIG. 1, it is not possible to maintain a line structure
through which impedance can be adjusted, and it is difficult to
avoid deterioration of signal quality.
[0008] As a method of adjusting impedance in a connection part, a
method disclosed in Japanese Unexamined Patent Application
Publication No. 2000-216510 exists.
SUMMARY OF THE INVENTION
[0009] In the method disclosed in Japanese Unexamined Patent
Application Publication No. 2000-216510, it is possible to reduce
waveform distortion that is caused to occur in a transmission
signal due to an inductance factor of a connector connected to a
substrate. For that purpose, it is necessary to form a coaxial
through hole in the periphery of a connection part.
[0010] As a consequence, for example, a structural arrangement
problem makes it difficult to use this method for the end surface
of a substrate, and a problem of space in high density wiring are
likely to occur. Thus, it is difficult to cope with the recent
technological trend toward higher wiring density and
miniaturization of parts.
[0011] It is desirable to reduce reflection due to impedance
unmatching in a connection part and to satisfactorily maintain
signal quality in a case where, for example, electronic parts are
to be mounted on a substrate on which a high-speed signal, such as
a radio frequency (RF) signal is handled.
[0012] According to an embodiment of the present invention, there
is provided a connection method including the step of connecting,
using a line on a dielectric element, two points through which a
signal flows, the two points having different heights and the
widths of the line at the positions of the two points having been
adjusted on the basis of the thickness of the dielectric
element.
[0013] A higher point of the two points may be a point on a line of
an electronic part mounted on a substrate, and a lower point of the
two points may be a point on a line of the substrate.
[0014] An area along which the thickness of the dielectric element
decreases toward a connection part with the line of the substrate
may be formed in the end portion of the electronic part composed of
a dielectric material, and the two points having different heights
may be connected by a line disposed along the area.
[0015] Steps at which the thickness of the dielectric element
decreases toward a connection part with a line of the substrate may
be formed in the end portion of the electronic part composed of a
dielectric material, and the two points having different heights
may be connected by a line disposed on the steps.
[0016] According to another embodiment of the present invention,
there is provided a substrate, wherein two points through which a
signal flows, are connected using a line on a dielectric element,
the two points having different heights and the widths of the line
at the positions of the two points having been adjusted on the
basis of the thickness of the dielectric element.
[0017] A higher point of the two points may be a point on a line of
an electronic part mounted on a substrate, and a lower point of the
two points may be a point on a line of the substrate.
[0018] An area along which the thickness of the dielectric element
decreases toward a connection part with the line of the substrate
may be formed in the end portion of the electronic part composed of
a dielectric material, and the two points having different heights
may be connected by a line disposed along the area.
[0019] Steps at which the thickness of the dielectric decreases
toward a connection part with the line of the substrate may be
formed in the end portion of the electronic part composed of a
dielectric material, and the two points having different heights
may be connected by a line disposed on the steps.
[0020] According to embodiments of the present invention, it is
possible to reduce reflection due to impedance unmatching in a
connection part and satisfactorily maintain signal quality in a
case where, for example, electronic parts are to be mounted on a
substrate.
BRIEF DESCRIPTION OF THE DRAWINGS
[0021] FIG. 1 shows a method for connecting an electronic part and
a substrate according to the related art;
[0022] FIG. 2 shows the structure of a surface mount part according
to the related art;
[0023] FIG. 3 shows another configuration of a surface mount part
according to the related art;
[0024] FIG. 4 shows an example of the configuration including a
substrate and a surface mount part that is connected by a
connection method according to an embodiment of the present
invention;
[0025] FIG. 5 is a sectional view of the structure shown in FIG.
4;
[0026] FIG. 6 is a view when the structure shown in FIG. 4 is
viewed from directly above;
[0027] FIG. 7 shows an image in which discontinuous changes in
impedance can be eliminated;
[0028] FIG. 8 shows an example of a case in which a coplanar line
is used as a line forming a connection part;
[0029] FIGS. 9A and 9B show a dotted-line portion of FIG. 8;
[0030] FIGS. 10A and 10B show a microstrip line;
[0031] FIG. 11 shows results of calculations of characteristic
impedance in a case where a microstrip line structure is
adopted;
[0032] FIG. 12 shows examples of lines forming a connection part
between a substrate and an electronic part;
[0033] FIG. 13 shows another example of the configuration of the
connection part;
[0034] FIG. 14 shows still another example of the configuration of
the connection part;
[0035] FIGS. 15A, 15B, 15C, and 15D show examples of surface mount
parts;
[0036] FIG. 16 shows a microstrip line model;
[0037] FIG. 17A is a front view of the model of FIG. 16;
[0038] FIG. 17B is a sectional view of the model of FIG. 16;
[0039] FIG. 18 shows a transmission simulation result;
[0040] FIG. 19 shows a model in which substrates having different
heights are connected by the present connection method;
[0041] FIG. 20 shows a model in which substrates having different
heights are connected using a through hole;
[0042] FIG. 21 shows a model in which substrates having different
heights are connected using wire bonding;
[0043] FIG. 22 is a view showing conditions for a model;
[0044] FIG. 23 is another view showing conditions for a model;
[0045] FIG. 24 shows simulation results;
[0046] FIG. 25 shows S21 components at each of frequencies 3 GHz, 6
GHz, and 10 GHz;
[0047] FIGS. 26A and 26B show an example of the shape of a line on
an electronic part side;
[0048] FIGS. 27A and 27B show another example of the shape of the
line on the electronic part side;
[0049] FIGS. 28A and 28B show still another example of the shape of
the line on the electronic part side;
[0050] FIGS. 29A and 29B show an example of the shape of the line
on the electronic part side;
[0051] FIGS. 30A and 30B show another example of the shape of the
line on the electronic part side;
[0052] FIG. 31 is a perspective view showing an example of
connection in a case where the number of dielectric layers of an
electronic part is two;
[0053] FIG. 32 is a sectional view of the structure shown in FIG.
31; and
[0054] FIG. 33 is a perspective view showing an example of a case
in which the present connection method is used for connection of a
semiconductor package.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0055] FIG. 4 is a perspective view showing an example of the
configuration including a substrate 1 and a surface mount part 2,
which are connected by a connection method according to an
embodiment of the present invention. FIG. 5 is a sectional view
showing the structure shown in FIG. 4. FIG. 6 is a front view when
the structure shown in FIG. 4 is viewed from directly above.
[0056] In general, in order to mount a part on a printed wiring
substrate, a method in which a metal extension is connected to a
device so as to make an electrical connection is adopted (see FIGS.
1 and 2). As is shown in such a manner as to be enclosed using a
dotted line in FIG. 4, the connection part between the substrate 1
and the surface mount part 2, which are connected by this
connection method, is formed in such a manner that a terminal end
part that is extended as is kept to be a line shape from the top
surface (the surface in parallel with the surface of the substrate
1) of the surface mount part 2 is connected to a line 1A disposed
on the substrate 1.
[0057] The feature of this connection method lies in that, as shown
in such a manner as to be enclosed using a dotted line of FIG. 5,
by forming a dielectric end 2A of the surface mount part 2 so as to
be a slope, the substrate 1 and the surface mount part 2 are
connected to each other while a metal transmission line disposed in
a dielectric element along the slope is made to gradually approach
the substrate 1. In this example, the surface mount part 2 has a
shape such that the cross section thereof in the vertical direction
is a trapezoid.
[0058] At this time, the line width of a microstrip line on the
side of the surface mount part 2 is adjusted by the characteristic
impedance determined from electrical characteristics thereof and
the geometric shape thereof. As shown in FIGS. 4 and 6, in this
example, the nearer to the substrate 1, that is, the smaller the
height of a position relative to the substrate 1 used as a
reference and the smaller the thickness of the dielectric element
of the slope on which the surface mount part 2 is mounted, the
smaller the line width. In the example of FIGS. 4 and 6, the width
in the connection part between the line disposed in the dielectric
end 2A and the line 1A on the substrate 1 is the same as the width
of the line 1A.
[0059] As described above, by gradually changing the line width and
the dielectric thickness, it is possible to connect the substrate 1
to the surface mount part 2 while the characteristic impedance of
the connection part is adjusted. Thus, it is possible to eliminate
discontinuous changes of characteristic impedance in the connection
part and reduce reflection components. An image of capable of
eliminating discontinuous changes of characteristic impedance in
the connection part and reducing reflection components is shown in
FIG. 7. In the figure that shows an image of unmatching of
characteristic impedance in the upper area of FIG. 7, the recessed
portion shows characteristic impedance of a portion (portion
floating in air), which is not in contact with the electronic part
or the substrate, of the terminal shown in FIGS. 1, 2 and 3,
through which the electronic part is connected to the
substrate.
[0060] It is in general that, as shown in FIGS. 10A and 10B, if the
width (line width) of the conductor material is denoted as W and
the dielectric thickness is denoted as d, the characteristic
impedance in the microstrip line is determined on the basis of
Expressions (1A), (1B), (2A), and (2B) described below.
When W d < 1.0 , Z 0 = 60 e ln ( 8 d W + W 4 d ) ( 1 A ) e = r +
1 2 + r - 1 2 ( 1 1 + 12 d W + 0.04 ( 1 - W d ) 2 ) ( 1 B ) When W
d .gtoreq. 1.0 , Z 0 = 120 .pi. e ( W d + 1.393 + 0.667 ln ( W d +
1.444 ) - 1 ) ( 2 A ) e = r + 1 2 + r - 1 2 1 1 + 12 d W ( 2 B )
##EQU00001##
where Z.sub.0 is the characteristic impedance, .di-elect
cons..sub.e is the effective dielectric constant, .epsilon..sub.r
is the relative dielectric constant, W is the line width, and d is
the dielectric thickness.
[0061] The calculation result of the characteristic impedance in a
case where a microstrip line structure is adopted is shown in FIG.
11.
[0062] In addition, also, regarding typical line shapes shown in
FIG. 12, a general expression for determining characteristic
impedance on the basis of the electric characteristic value and a
cross-sectional shape of a line exists. FIG. 12 shows, as lines
forming a connection part between a substrate and an electronic
part, a strip line, a microstrip line, a strip line, a coplanar
line, and a parallel line.
[0063] FIG. 8 shows an example of a case in which a coplanar line
is used as a line forming a connection part between the substrate 1
and the surface mount part 2. As described above, as a line forming
a connection part in this manner, a coplanar line can be used. FIG.
9A is a sectional view showing a portion enclosed using a dotted
line in FIG. 8. FIG. 9B is a front view showing the top surface of
an electronic part of FIG. 8. In the example of FIG. 8, the closer
the line disposed on the slope to the connection part with the
substrate, the larger the width of the line.
[0064] As the constituent material of the substrate 1, a common
substrate material is used. For the conductor part, a metal
conductor such as, for example, copper, is used. For the dielectric
part, for example, phenol, a glass epoxy resin, alumina, or Teflon
(registered trademark) is used.
[0065] The above-described connection method can be applied to a
case in which the entirety of electronic parts, such as an antenna
and an LSI, which are surface mounted on a substrate, is connected
onto the substrate. Hereinafter, a connection method in which, in
the manner described above, at least a part of the side surface of
a dielectric element forming the surface mount part 2 is formed as
a slope, and a conductor is wired along the slope, thereby
connecting the electronic part to the wiring on the substrate will
be referred to simply as the present connection method as
appropriate.
[0066] With the present connection method, in a case where
electronic parts, such as an antenna and a filter circuit, are to
be surface mounted onto a substrate that handles a high-speed
signal, such as a radio frequency (RF) signal, it becomes possible
to reduce reflection due to impedance unmatching in the connection
part and to satisfactorily maintain signal quality. The high-speed
signal herein refers to a signal having a connection length or a
wiring length that exceeds 1/10 of the wavelength of the
transmission signal at the maximum frequency.
MODIFICATION
[0067] As described with reference to FIG. 12, the structure of the
connection line can be handled as a distributed constant circuit.
The connection line may be a microstrip line, a strip line, a
coplanar line, or a parallel line as long as impedance can be
adjusted.
[0068] The physical shape of the line width of the connection part
may be discontinuous as long as impedance is continuously changed
in an electrical manner. When the line width of the connection part
is to be determined, a rate of change in the impedance at the line
length with respect to the wavelength of the transmission frequency
becomes a measure.
[0069] The connection part may be configured in such a manner that,
even though the entire dielectric end 2A forming the side surface
of the surface mount part 2 as shown in FIG. 4 is not obliquely
provided, a part of the side surface thereof may be formed so as to
be a slope as shown in FIG. 13, and the line whose width has been
adjusted may be wired on the slope. Alternatively, a through hole
may be obliquely provided in the end surface as shown in FIG. 14,
and a line whose width has been adjusted may be wired in the inner
side thereof.
[0070] For the surface mount part 2 that can be connected by the
present connection method, in addition to an antenna circuit,
various parts, such as a filter circuit, a resonance circuit, a
mixer circuit, and a splitter circuit, shown in FIGS. 15A to 15D,
can be used.
[0071] Furthermore, the present connection method can be applied to
not only the connection between a printed wiring substrate and a
surface mount part, but also to wiring between parts, wiring
between substrates, wiring inside parts, wiring of a multilayered
substrate, and semiconductor wiring. For example, it is considered
that the present connection method is effective for wiring inside a
multilayered substrate or parts, or effective for wiring connection
inside a semiconductor package.
[0072] With the adoption of the present connection method,
[0073] 1. signal deterioration due to impedance unmatching between
wires can be reduced. In particular, the present connection method
is effective for a connection between substrates, which handle a
high-speed signal, such as in the case of an RF circuit, and
parts.
[0074] 2. the present connection method can be realized using a
simple line structure, such as a microstrip line or a coplanar
line, and an extra circuit, a connector, and the like are not
necessary.
[0075] 3. the present connection method can be applied to not only
surface mount parts, such as a filter and an antenna, but also to
overall parts (wiring inside a multilayered substrate, a
semiconductor package, or the like) in which an inductive capacity
exists between signal lines.
SUPPLEMENTAL DESCRIPTION
[0076] In order to supplement the above point 1, a description will
be given below of a result in which deterioration in a transmission
signal is analyzed by electromagnetic simulation.
[0077] A simple microstrip line model is shown in FIG. 16 and FIGS.
17A and 17B. FIG. 16 shows a model in a three-dimensional manner.
FIG. 17A is a front view of the model of FIG. 16, and FIG. 17B is a
sectional view of the model of FIG. 16.
[0078] This model is formed by a signal line, a dielectric
substrate, and a GND (formed in such a manner that a signal line is
disposed on a substrate formed of a GND layer and a dielectric
layer). In order to simulate deterioration of a transmission
signal, a test signal is input from an input port, and the
transmitted signal is observed at an output port. For evaluation, a
general value in which an S-parameter is represented in dB
(decibel) is generally used. Therefore, here, an S-parameter
represented by the following Expression (3) is used as S21.
S21=log 10(output signal/input signal) [dB] (3)
[0079] The transmission simulation result is shown in FIG. 18. The
horizontal axis of FIG. 18 shows the frequency [GHz], and the
vertical axis shows S21 [dB]. As the frequency increases, S21 is
slightly decreased. Since the material of the line model is
homogenous and the shape of the cross section thereof is fixed, the
deterioration is considered to be mainly caused by induced loss of
a signal that is transmitted through the substrate. Therefore, in
this model in a state close to an ideal state in which impedance
matching has been achieved, transmission deterioration is
approximately -1 dB@10 GHz.
[0080] Next, a description will be given below of simulation
results in which a typical connection method and the present
connection method are used.
[0081] FIG. 19 shows a model in which substrates having different
heights are connected to each other using the present connection
method.
[0082] FIGS. 20 and 21 each show a model in which substrates having
different heights are connected to each other by using a through
hole and wire bonding, respectively. FIGS. 22 and 23 show
conditions of models shown in FIGS. 19, 20 and 21.
[0083] The models shown in FIGS. 19, 20 and 21 are such that the
section between a position P.sub.1 in a signal line A of a
substrate A and a position P.sub.2 in a signal line B of a
substrate B arranged so as to overlap the substrate A (dielectric
element A), which is indicated by being enclosed using a dotted
line in FIG. 22, are connected by the present connection method, a
through hole, and wire bonding, respectively.
[0084] The conditions of the substrate A configured in such a
manner that the dielectric element A is laminated on the GND
surface A and the signal line A is disposed on the input side on
the dielectric element A, and the substrate B configured in such a
manner that the dielectric element B is laminated on the GND
surface B and the signal line B is disposed on the dielectric
element B are shown in FIG. 23.
[0085] In the conditions of FIG. 23, the line widths of the signal
lines A and B are set to 3.2 mm, the height is set to 0.2 mm, and
the total of the line lengths of the signal lines A and B is set to
30 mm. The height of the dielectric elements A and B is set to 1.6
mm, the dielectric constant is set to 7.1.times.10.sup.-12 [F/m],
and the induced loss when a signal of 10 GHz is made to flow is set
to 0.005.
[0086] The results of simulation performed by each connection
method under the conditions shown in FIG. 23 are shown in FIG. 24.
The horizontal axis of FIG. 24 indicates the frequency [GHz], and
the vertical axis indicates S21 [dB]. The values of S21 [dB] at
each frequency of 3 GHz, 6 GHz, and 10 GHz are shown in FIG.
25.
[0087] It can be seen from the results shown in FIGS. 24 and 25
that the deterioration of the transmission signal of the present
connection method is the smallest among the three models.
Furthermore, the simulation result of the model in which the
present connection method is used is closest to the simulation
result of the ideal model shown in FIG. 18. It can be seen that, in
particular, as the frequency becomes higher, the more apparent the
difference in the characteristics between the present connection
method and the other methods. It is considered from these results
that use of the present connection method is effective for reducing
signal deterioration.
Example of Connection Between Line on Electronic Part Side and Line
on Substrate Side
[0088] Next, a description will be given below of the shape of a
line on an electronic part side in the vicinity of a connection
part with a line on a substrate side.
[0089] FIG. 26A is a front view showing a first shape. FIG. 26B is
a sectional view of the structure shown in FIG. 26A.
[0090] The first shape shown in FIGS. 26A and 26B is the same as
that described with reference to FIGS. 4 to 6. That is, as shown in
FIG. 26B, a slope is formed in the end portion of an electronic
part, and a line 21B, which is a part of a line on the electronic
part side, is disposed along the slope. The thickness of the
dielectric element 22 on the electronic part side at each position
of the line 21B decreases linearly as the line approaches the
connection part with the line 11 on the substrate side.
[0091] The shape when the line 21B is viewed from directly above
is, as shown in FIG. 26A, formed so as to be symmetrical about the
axis in the length direction of the line 21B, and the width is
changed linearly between a width W.sub.2 and a width W.sub.1
according to the thickness of the dielectric element 22 at each
position. The width W.sub.1 is the width of the line 21A disposed
on the top surface of the dielectric element 22 on the electronic
part side, and the width W.sub.2 is the width of the line 11A
disposed in the dielectric element 12 on the substrate side.
[0092] FIG. 27A is a front view showing a second shape. FIG. 27B is
a sectional view of the structure shown in FIG. 27A.
[0093] In the example of this shape, as shown in FIG. 27B, five
steps are formed in the end portion of the electronic part, and the
line 21B, which is a part of a line on the electronic part side, is
disposed on these steps. The thickness of the dielectric element 22
on the electronic part side at each position of the line 21B
decreases in a step-like manner as the line approaches the
connection part with the line 11 on the substrate side and as the
number of steps from the substrate decreases.
[0094] The shape when the line 21B is viewed from directly above
is, as shown in FIG. 27A, formed symmetrical about the axis of the
line 21B in the length direction, and the width is changed in a
step-like manner from the width W.sub.2 to the width W.sub.1
according to the thickness of the dielectric element 22 at each
position.
[0095] FIG. 28A is a front view showing a third shape. FIG. 28B is
a sectional view of the structure shown in FIG. 28A.
[0096] In the example of this shape, as shown in FIG. 28B, a curved
surface whose cross section is formed nearly in a fan shape is
formed in the end portion of the electronic part. The line 21B,
which is a part of the line on the electronic part side, is
disposed along this curved surface. The thickness of the dielectric
element 22 on the electronic part side at each position of the line
21B decreases as the line approaches the connection part with the
line 11 on the substrate side.
[0097] The shape when the line 21B is viewed from directly above
is, as shown in FIG. 28A, formed in a shape symmetrical about the
axis of the line 21B in the length direction, and the width is
changed at a predetermined ratio between a width W.sub.2 and a
width W.sub.1.
[0098] FIG. 29A is a front view showing a fourth shape. FIG. 29B is
a sectional view of the structure shown in FIG. 29A.
[0099] The shape shown in FIG. 29A is the same as the shape
described with reference to FIG. 26A. The line 21B is formed in a
shape symmetrical about the axis of the line 21B in the length
direction, and the width is changed linearly between a width
W.sub.2 and a width W.sub.1 according to the thickness of the
dielectric element 22 at each position.
[0100] The shape shown in FIG. 29B is the same as the shape
described with reference to FIG. 27B. Five steps are formed in the
end portion of an electronic part, and the line 21B, which is a
part of the line on the electronic part side, is disposed on these
steps. The thickness of the dielectric element 22 on the electronic
part side at each position of the line 21B decreases in a step-like
manner as the line approaches the connection part with the line 11
on the substrate side and as the number of steps from the substrate
decreases.
[0101] FIG. 30A is a front view showing a fifth shape. FIG. 30B is
a sectional view of the structure shown in FIG. 30A.
[0102] The shape shown in FIG. 30A is the same as the shape
described with reference to FIG. 27A. The line 21B is formed in a
shape symmetrical about the axis of the line 21B in the length
direction, and the width thereof is changed in a step-like manner
between a width W.sub.2 and a width W.sub.1 according to the
thickness of the dielectric element 22 at each position.
[0103] The shape shown in FIG. 30B is the same as the shape
described with reference to FIG. 26B. A slope is formed in the end
portion of the electronic part, and the line 21B, which is a part
of the line on the electronic part side, is disposed along the
slope. The thickness of the dielectric element 22 on the electronic
part side at each position of the line 21B decreases linearly as
the line approaches the connection part with the line 11 on the
substrate side.
APPLICATION EXAMPLE
[0104] In the foregoing, a case in which the number of dielectric
layers of the electronic part is one has been described. Even in a
case where the dielectric layer is multilayered, in a similar
manner, it is possible to connect a line on the electronic part to
a line on the substrate.
[0105] FIG. 31 is a perspective view showing an example of
connection in a case where the number of dielectric layers of the
electronic part is two. The same components as those shown in FIG.
26 are designated with the same reference numerals.
[0106] In the example of FIG. 31, as dielectric layers forming an
electronic part, dielectric elements 22A and 22B are used in a
stacked manner. A line 21A is disposed on the top surface of a
dielectric element 22B, which is an upper layer, and a line 21B is
disposed in the slope. A GND surface 31 is sandwiched between the
dielectric elements 22A and 22B.
[0107] In the example of FIG. 31, the width of the line 21B
disposed in the slope of the dielectric element 22B is set to a
fixed width. By providing the GND surface 31 and by adjusting the
thickness of the dielectric element 22B in the slope on which the
line 21B is disposed, it is possible to set the width of the line
21B to be fixed in the manner described above.
[0108] FIG. 32 is a sectional view of the structure shown in FIG.
31.
[0109] As shown in FIG. 32, the slope of the dielectric element 22A
has an angle that is the same as the slope of the dielectric
element 22B with respect to the substrate surface. The thickness of
the dielectric element 22B at each position of the line 21B is
adjusted using the GND surface 31 so that the thickness becomes
fixed from the position P.sub.11 that is directly above the
boundary between the top surface and the slope of the dielectric
element 22A up to the position P.sub.12 that is directly above the
boundary between the top surface and the slope of the dielectric
element 22A. The thickness of the dielectric layer gradually
decreases from the position P.sub.12 toward the connection part
with the substrate.
[0110] As described above, it is also possible to set the number of
dielectric layers on which a line is disposed to be plural.
Furthermore, the present connection method can be applied to
various cases in which two points having different heights are
connected, for example, not only a case in which a line on an
electronic part is connected to a line on a substrate on which the
electronic part is mounted, but also a case in which a line on a
substrate is connected to a line on another substrate.
[0111] FIG. 33 is a perspective view showing an example of a case
in which the present connection method is used for the connection
of a semiconductor package.
[0112] In the example of FIG. 33, a semiconductor package 61 is
mounted on a substrate 51, and a chip part 62, such as an LSI
(Large Scale Integration) IC, is mounted thereon. Both the
semiconductor package 61 and the chip part 62 have a shape in which
the cross section thereof in the vertical direction is formed in
the shape of a trapezoid. A plurality of electrodes 62A are
provided on the top surface of the chip part 62 in such a manner as
to be exposed.
[0113] Wiring employing the present connection method can be
applied to wiring 63 between a line disposed on the top surface of
the chip part 62 from the electrode 62A and a line on the top
surface of the semiconductor package 61 and to wiring 64 between a
line on the top surface of the semiconductor package 61 and a line
on the substrate.
[0114] The present application contains subject matter related to
those disclosed in Japanese Priority Patent Application JP
2008-156048 filed in the Japan Patent Office on Jun. 13, 2008 and
Japanese Priority Patent Application JP 2008-214553 filed in the
Japan Patent Office on Aug. 22, 2008, the entire content of which
are hereby incorporated by reference.
[0115] It should be understood by those skilled in the art that
various modifications, combinations, sub-combinations and
alterations may occur depending on design requirements and other
factors insofar as they are within the scope of the appended claims
or the equivalents hereof.
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