U.S. patent application number 12/243067 was filed with the patent office on 2009-12-03 for method of forming plating layer.
This patent application is currently assigned to SAMSUNG ELECTRO-MECHANICS CO. LTD.. Invention is credited to Byeung Gyu Chang, Young Suk KIM, Yong Soo Oh, Sung Yeol Park, Won Hee Yoo.
Application Number | 20090294297 12/243067 |
Document ID | / |
Family ID | 41378424 |
Filed Date | 2009-12-03 |
United States Patent
Application |
20090294297 |
Kind Code |
A1 |
KIM; Young Suk ; et
al. |
December 3, 2009 |
METHOD OF FORMING PLATING LAYER
Abstract
There is provided a method of forming a plating layer, the
method including: forming a seed layer on a substrate; forming a
pattern layer on the seed layer, the pattern layer formed of a
thermoplastic resin and including openings; forming a plating layer
on portions of the seed layer corresponding to the openings; and
removing the pattern layer. This method ensures that the plating
layer is formed with a sufficient thickness and the substrate,
particularly, a ceramic substrate suffers minimal chemical damage
during a plating process. Moreover, the plating layer is formed
with a more uniform thickness.
Inventors: |
KIM; Young Suk; (Yongin,
KR) ; Oh; Yong Soo; (Seongnam, KR) ; Chang;
Byeung Gyu; (Suwon, KR) ; Yoo; Won Hee;
(Suwon, KR) ; Park; Sung Yeol; (Gunpo,
KR) |
Correspondence
Address: |
MCDERMOTT WILL & EMERY LLP
600 13TH STREET, N.W.
WASHINGTON
DC
20005-3096
US
|
Assignee: |
SAMSUNG ELECTRO-MECHANICS CO.
LTD.
|
Family ID: |
41378424 |
Appl. No.: |
12/243067 |
Filed: |
October 1, 2008 |
Current U.S.
Class: |
205/182 ;
205/183 |
Current CPC
Class: |
H05K 1/0306 20130101;
H05K 2201/0129 20130101; H05K 2203/1105 20130101; H05K 3/108
20130101; C25D 5/12 20130101; C25D 5/022 20130101; H05K 3/0076
20130101 |
Class at
Publication: |
205/182 ;
205/183 |
International
Class: |
C25D 5/10 20060101
C25D005/10 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 2, 2008 |
KR |
10-2008-0051807 |
Claims
1. A method of forming a plating layer, the method comprising:
forming a seed layer on a substrate; forming a pattern layer on the
seed layer, the pattern layer formed of a thermoplastic resin and
including openings; forming a plating layer on portions of the seed
layer corresponding to the openings; and removing the pattern
layer.
2. The method of claim 1, wherein the pattern layer is formed of
one material selected from a group consisting of polyethylene,
polyvinylidene fluoride, liquid crystal polymer and a combination
thereof.
3. The method of claim 1, wherein the pattern layer has a thickness
of 20 to 30 .mu.m.
4. The method of claim 1, wherein the removing the pattern layer
comprises heating the pattern layer.
5. The method of claim 4, wherein the removing the pattern layer
comprises heating the pattern layer at a temperature of 200 to
300.degree. C. for 2 to 3 hours.
6. The method of claim 1, wherein the seed layer comprises first
and second layers, the first layer formed of one material selected
from a group consisting of Ti, Cr, ZnO and a combination thereof,
and the second layer formed on the first layer and containing
Cu.
7. The method of claim 6, wherein the first layer has a thickness
of 0.05 to 0.3 .mu.m.
8. The method of claim 6, wherein the second layer has a thickness
of 0.3 to 1 .mu.m.
9. The method of claim 1, wherein the forming a seed layer
comprises performing one of sputtering and E-beam evaporation.
10. The method of claim 1, wherein the forming a plating layer
comprises performing electroplating.
11. The method of claim 10, wherein the forming a seed layer on a
substrate comprises forming the seed layer on an entire top surface
of the substrate.
12. The method of claim 1, wherein the forming a plating layer
comprises forming a Cu layer, an Ni layer and an Au layer
sequentially.
13. The method of claim 1, wherein the substrate is a ceramic
substrate having an internal electrode and a conductive via
therein, the internal electrode and the conductive via electrically
connected to the plating layer.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the priority of Korean Patent
Application No. 2008-0051807 filed on Jun. 2, 2008, in the Korean
Intellectual Property Office, the disclosure of which is
incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a method of forming a
plating layer, and more particularly, to a method of forming a
plating layer which ensures a sufficient plating thickness of the
plating layer and minimum chemical damage to a substrate, notably,
a ceramic substrate, during a plating process.
[0004] 2. Description of the Related Art
[0005] In general, a multilayer ceramic substrate is utilized as a
part incorporating an active device such as a semiconductor
integrated circuit (IC) chip and a passive device such as a
capacitor, an inductor and a resistor, or a simple semiconductor IC
package. More specifically, the multilayer ceramic substrate is
widely used to implement various electronic parts such as a power
amplifier (PA) module substrate, a radio frequency (RF) diode
switch, a filter, a chip antenna and diverse package parts and a
converged device.
[0006] Conventionally, to form external electrodes of this
multilayer ceramic substrate, an Ni plating layer and an Au plating
layer are formed on a metal pattern printed on a surface of a
ceramic sintered body by electroless plating and electroplating,
respectively. However, in a case where the external electrodes are
formed by this method, the Ni/Au plating layer is not sufficiently
thick. Besides, the Ni/Au plating layer is not uniform in thickness
since current is hardly supplied to an entire area of the substrate
uniformly. Accordingly, the external electrodes when bonded to a
probe tip are degraded in bonding force while experiencing higher
electrical resistance. Moreover, in a case where a plating solution
permeates into the ceramic substrate during the plating process,
the ceramic substrate may be decolored or eroded, which
subsequently leads to reduction in strength.
[0007] These problems undermine reliability of the multilayer
ceramic substrate. Thus, there has been a demand in the art for a
method of ensuring the plating layer is formed with a uniform and
sufficient thickness.
SUMMARY OF THE INVENTION
[0008] An aspect of the present invention provides a method of
forming a plating layer in which a plating layer is formed with a
sufficient thickness while a substrate, particularly a ceramic
substrate is minimized in chemical damage during the plating
process.
[0009] According to an aspect of the present invention, there is a
method of forming a plating layer, the method including: forming a
seed layer on a substrate; forming a pattern layer on the seed
layer, the pattern layer formed of a thermoplastic resin and
including openings; forming a plating layer on portions of the seed
layer corresponding to the openings; and removing the pattern
layer.
[0010] The pattern layer may be formed of one material selected
from a group consisting of polyethylene, polyvinylidene fluoride,
liquid crystal polymer and a combination thereof. The pattern layer
has a thickness of 20 to 30 .mu.m to ensure a sufficient thickness
of the plating layer.
[0011] The removing the pattern layer may include heating the
pattern layer. The removing the pattern layer may include heating
the pattern layer at a temperature of 200 to 300.degree. C. for 2
to 3 hours.
[0012] The seed layer may include first and second layers, the
first layer formed of one material selected from a group consisting
of Ti, Cr, ZnO and a combination thereof, and the second layer
formed on the first layer and containing Cu. Here, the first layer
may have a thickness of 0.05 to 0.3 .mu.m. The second layer may
have a thickness of 0.3 to 1 .mu.m.
[0013] The forming a seed layer may include performing one of
sputtering and E-beam evaporation.
[0014] The forming a plating layer may include performing
electroplating, but the present invention is not specifically
limited thereto.
[0015] The forming a seed layer on a substrate may include forming
the seed layer on an entire top surface of the substrate.
[0016] The forming a plating layer may include forming a Cu layer,
an Ni layer and an Au layer sequentially.
[0017] The substrate may be a ceramic substrate having an internal
electrode and a conductive via therein, the internal electrode and
the conductive via electrically connected to the plating layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and other aspects, features and other advantages
of the present invention will be more clearly understood from the
following detailed description taken in conjunction with the
accompanying drawings, in which:
[0019] FIGS. 1A to 1D are cross-sectional views illustrating a
method of forming a plating layer according to an exemplary
embodiment of the invention;
[0020] FIG. 2 is a detailed view illustrating a seed layer shown in
FIG. 1; and
[0021] FIG. 3 illustrates a process which may be added to the
embodiment shown in FIG. 1 according to an exemplary embodiment of
the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0022] Exemplary embodiments of the present invention will now be
described in detail with reference to the accompanying drawings.
This invention may, however, be embodied in many different forms
and should not be construed as limited to the embodiments set forth
herein. Rather, these embodiments are provided so that this
disclosure will be thorough and complete, and will fully convey the
scope of the invention to those skilled in the art. In the
drawings, the shapes and dimensions may be exaggerated for clarity,
and the same reference signs are used to designate the same or
similar components throughout.
[0023] FIGS. 1A to 1D are cross-sectional views illustrating a
method of forming a plating layer according to an exemplary
embodiment of the invention.
[0024] First, as shown in FIG. 1A, a substrate 101 is provided and
a seed layer 102 is formed on a top surface of the substrate 101.
The substrate 101 may include a conductive via and an internal
electrode formed therein. Particularly, the substrate 101 may adopt
a ceramic substrate such as a low co-fired or high co-fired
ceramic. However, the present invention is not limited thereto, and
any kind of substrate may be utilized as long as the substrate
requires a plating layer as an external electrode. The seed layer
102 serves as a seed for a plating layer which will be formed in a
later process. In the present embodiment, the seed layer 102 may be
formed on an entire area of the top surface of the sintered
substrate 101 not by a screen printing but by sputtering or E-beam
deposition. As described above, the seed layer 102 is formed as a
thin film on the entire top surface of the substrate 101.
Accordingly, as will be described later, the plating layer can be
easily formed by electroplating.
[0025] FIG. 2 is a detailed cross-sectional view illustrating a
seed layer shown in FIG. 1. Referring to FIG. 2, the seed layer 102
is configured as a two-layer structure including first and second
layers. The first layer is a Ti layer 102a and the second layer is
a Cu layer 102b. Here, the Ti layer 102a serves to enhance
adherence between the substrate 101, e.g., made of ceramic and the
plating layer. The Ti layer 102a may have a thickness ta ranging
from 0.05 to 0.3 .mu.m. However, alternatively, the first layer may
be formed of Cr or ZnO in addition to Ti, or these materials may be
used in combination. The Cu layer 102b functions as a substantial
seed and considering this seed function, the Cu layer 102b may have
a thickness tb of about 0.3 to 1.0 .mu.m. Meanwhile, although not
illustrated, a metal pad layer made of e.g., Ag may be additionally
formed between the seed layer 102 and the substrate 101.
[0026] Afterwards, as shown in FIG. 1B, a pattern layer 103 is
formed on the seed layer 102. Here, the pattern layer 103 has
openings O provided therein to serves as an area for forming the
plating layer. Particularly, in the present embodiment, the pattern
layer 103 is formed of a thermoplastic resin to be thermally
removed. Accordingly, as will be described later, after forming the
plating layer, the pattern layer 103 can be easily removed, with
minimum damage to the substrate 101 and plating layer. The pattern
layer 103 may be formed of polyethylene, polyvinylidene fluoride
(PVDF), and liquid crystal polymer (LCP).
[0027] The pattern layer 103 has a thickness t1 determined by
considering a thickness of a desired plating layer. The present
embodiment aims to form a thick plating layer by electroplating.
Given this, the pattern layer 103 may have a thickness t1 of 20 to
30 .mu.m. Meanwhile, the pattern layer 103 may be formed by various
methods for forming thermoplastic resin patterns, for example, by
spin coating after a mask process.
[0028] Thereafter, as shown in FIG. 1C, a plating layer 104 is
formed on portions of the seed layer 102 corresponding to the
openings O. Although not described in detail, to perform this
plating process, the substrate having the seed layer 102 and the
pattern layer 103 formed thereon is immersed in a plating bath
containing a plating solution, and then electroplating is preformed
to induce electrical chemical reaction. As described above, it is
construed that the electroplating can be carried out since the seed
layer 102 is provided as a thin film on the entire top surface of
the substrate 101. In the present embodiment, the plating layer 104
can be formed on the portions of the pattern layer 103
corresponding to the openings by electroplating to have a great
thickness. This allows for superior bonding between the substrate
101 and the plating layer 104. Here, the plating layer 104 may be
formed of a three-layer structure of Cu/Ni/Au even though
configured differently according to a material for the seed layer
102.
[0029] Next, as shown in FIG. 1D, the pattern layer 103 is removed
from the substrate 101. As described above, the pattern layer 103
is formed of a thermoplastic resin such as polyethylene, which can
be easily removed by adequate heating. Here, the pattern layer 103
may be heated at 300 to 400.degree. C. and for 2 to 3 hours to be
removed. Also, the plating layer 104 may be heated while being
covered by the ceramic substrate to undergo minimum damage.
[0030] As described above, the pattern layer 103 can be easily
removed by heat, not by a chemical method. This allows the plating
layer 104 and the substrate 101 to be chemically undamaged. The
pattern layer 103, if formed of a photosensitive material, needs to
be removed using a strong acid or a strong base. This may
chemically impair the plating layer 104 and the substrate 101.
However, in the present embodiment, the pattern layer 103 is
substantially free from such damage. Accordingly, adherence force
between the plating layer 104 and the substrate 101 is enhanced.
Also, another electrical device may be bonded to the plating layer
104 more strongly.
[0031] Meanwhile according to another exemplary embodiment of the
invention, as shown in FIG. 3, the seed layer 102 may be partially
removed to have a shape identical to a shape of the plating layer
104 to obtain a desired electrode structure. FIG. 3 illustrates a
process which may be added to the embodiment of FIG. 1 according to
an exemplary embodiment of the invention. Here, the seed layer 102
may be removed using an adequate mask by a known process in the
art.
[0032] The inventors of the present invention conducted experiments
for demonstrating superior effects of the present invention.
Hereinafter, the plating layers formed by the conventional method
and the method of the present invention will be compared.
[0033] First, by the conventional method, a plating layer having a
three-layer structure of Cu/Ni/Au was formed without employing a
thermoplastic pattern. Meanwhile, a plating layer having a
three-layer structure of Cu/Ni/Au was formed by the method of the
present invention.
[0034] Here, in the conventional method, the Ni layer was formed by
electroless plating and the Au layer was formed by electroplating.
In the present invention, both Ni and Au were formed by
electroplating. As a result of comparing the thickness between the
plating layers formed according to the conventional method and the
method of the present invention, for the conventional plating
layer, the Cu layer, Ni layer, and Au layer had an average
thickness of 3.2 .mu.m, 6.4 .mu.m, and 0.69 .mu.M, respectively. On
the other hand, for the plating layer of the present invention, the
Cu layer, Ni layer, Au layer had an average thickness of 8.2 .mu.m,
4.1 .mu.m, and 2.1 .mu.m, respectively. As described above, the
plating layer of the present invention can be formed with a greater
thickness than the conventional plating layer and in addition is
more uniform in thickness.
[0035] Then, adherence force of the conventional plating layer and
the plating layer of the present invention was compared. The
plating layer formed according to the present invention, when
bonded to a probe tip, is significantly increased in bonding force.
That is, a shear stress required for separating the plating layer
from the probe tip bonded thereto was averaged about 36N/mm.sup.2
in the conventional method, and was 82N/mm.sup.2 in the present
invention, which is at least twice higher than the shear stress of
the present invention.
[0036] As set forth above, according to exemplary embodiments of
the invention, a plating layer can be formed with a sufficient
thickness and with minimum chemical damage to a substrate,
particularly, a ceramic substrate, during a plating process.
Moreover, the plating layer formed by the method of forming the
plating layer according to the invention can be more uniform in
thickness.
[0037] While the present invention has been shown and described in
connection with the exemplary embodiments, it will be apparent to
those skilled in the art that modifications and variations can be
made without departing from the spirit and scope of the invention
as defined by the appended claims.
* * * * *