U.S. patent application number 12/506740 was filed with the patent office on 2009-11-12 for method and system for discovering a power source on a peripheral bus.
This patent application is currently assigned to APPLE INC.. Invention is credited to Ken Herman, David John Tupman, Barry Twycross.
Application Number | 20090278407 12/506740 |
Document ID | / |
Family ID | 35004185 |
Filed Date | 2009-11-12 |
United States Patent
Application |
20090278407 |
Kind Code |
A1 |
Tupman; David John ; et
al. |
November 12, 2009 |
METHOD AND SYSTEM FOR DISCOVERING A POWER SOURCE ON A PERIPHERAL
BUS
Abstract
Improved techniques to recognize a power source on a peripheral
bus and/or determine power available from the power source via the
peripheral bus are disclosed. Typically, the peripheral bus is
supported by a cable connected between a host device and an
electronic device. In this case, the host device is a power source
(e.g., power adapter or battery pack) and the cable is used to
provide power from the power source to the electronic device.
Hence, by understanding the power available from the power source,
the electronic device can manage its power utilization so as to
operate in a stable and reliable manner. The electronic device is,
for example, a portable computing device. Examples of portable
computing devices include a Portable Digital Assistant (PDA) and a
portable media player.
Inventors: |
Tupman; David John; (San
Francisco, CA) ; Herman; Ken; (San Jose, CA) ;
Twycross; Barry; (Mountain View, CA) |
Correspondence
Address: |
TOWNSEND AND TOWNSEND AND CREW, LLP
TWO EMBARCADERO CENTER, 8TH FLOOR
SAN FRANCISCO
CA
94111-3834
US
|
Assignee: |
APPLE INC.
CUPERTINO
CA
|
Family ID: |
35004185 |
Appl. No.: |
12/506740 |
Filed: |
July 21, 2009 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11031288 |
Jan 7, 2005 |
7581119 |
|
|
12506740 |
|
|
|
|
60608959 |
Oct 8, 2004 |
|
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|
60588959 |
Jul 18, 2004 |
|
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Current U.S.
Class: |
307/66 |
Current CPC
Class: |
G06F 1/266 20130101 |
Class at
Publication: |
307/66 |
International
Class: |
H02J 9/00 20060101
H02J009/00 |
Claims
1. A power source comprising: a power line; a ground line;
available power circuitry operatively coupled to the power line and
the ground line, wherein the available power circuitry is
configured to provide a first voltage on a first output and a
second voltage on a second output, the first and second voltages
indicating a level of power available from the power source; and a
connector including a power pin coupled to the power line, a ground
pin coupled to the ground line, a first digital data pin coupled to
the first output of the available power circuitry, and a second
digital data pin coupled to the second output of the available
power circuitry, wherein when the connector is coupled to a
peripheral bus connector of an electronic device: the power line is
operable to provide power to a peripheral bus connector of an
electronic device via the power pin, and the first and second
digital data pins are operable to provide the first and second
voltages to respective digital data input pins of the peripheral
bus connector of the electronic device.
2. The power source of claim 1, wherein the sign of the difference
between the first voltage and the second voltage indicates whether
the power source is a power adapter that receives AC power or a
battery pack.
3. The power source of claim 1, wherein the first and second
voltage are both higher than the voltage used by the electronic
device to determine whether a data value is high or low.
4. The power source of claim 1, wherein the available power
circuitry includes a voltage divider between the power line and the
ground line, the voltage divider including a first resistance
coupled between the power line and the first output, a second
resistance coupled between the first output and the second output,
and a third resistance coupled between the second output and a
ground line
5. The power source of claim 1, wherein the available power
circuitry includes a voltage divider between the power line and the
ground line, the voltage divider comprising at least three
resistive elements, wherein the first voltage is provided on a
first node between a first pair of resistive elements and the
second voltage is provided on a second node between a second pair
of resistive elements, wherein the first pair is different than the
second pair.
6. The power source of claim 5, wherein the power line is directly
connected to a resistive element of the first pair of resistive
elements.
7. The power source of claim 5, wherein the ground line is directly
connected to a resistive element of the second different pair of
resistive elements.
8. The power source of claim 1, wherein the available power
circuitry includes at least two voltage dividers, each comprising
at least two resistive elements coupled between the power line and
the ground line, wherein the first voltage is provided on a first
node between a first pair of resistive elements of a first voltage
divider, and wherein the second voltage is provided on a second
node between a second pair of resistive elements of a second
voltage divider.
9. The power source of claim 1, further comprising: a plug
connector for receiving AC current; and an AC/DC converter having
an input coupled to the plug connector and having outputs coupled
with the power line and the ground line respectively.
10. The power source of claim 1, further comprising: a battery
having a positive terminal and a negative terminal, wherein the
power line is coupled with the positive terminal of the battery and
the ground line is coupled with the negative terminal of the
battery.
11. The power source of claim 10, further comprising: a DC/DC
converter having an input coupled to the positive terminal and an
output coupled to the power line.
12. A method of providing power to a peripheral bus connector of an
electronic device from a first connector of a power source, the
method comprising: providing power to the first connector of the
power source using a power line and a ground line, wherein a power
pin of the first connector is coupled to the power line and a
ground pin of the first connector is connected to the ground line;
determining, with available power circuitry, at least two indicator
voltages based on voltages on the power line and the ground line,
the indicator voltages indicating a level of power available from
the power source; and providing respective indicator voltages from
the available power circuitry to first and second digital data pins
of the first connector; when the first connector is coupled with
the peripheral bus connector of the electronic device, providing
the respective indicator voltages from the first and second digital
data pins of the first connector to respective digital data input
pins of the peripheral bus connector of the electronic device,
thereby providing a level of power available to the electronic
device from the power source.
13. The method of claim 12, wherein the sign of the difference
between the indicator voltages at the first and second digital data
pins indicates whether the power source is a power adapter that
receives AC power or a battery pack.
14. The method of claim 12, wherein the indicator voltage levels
are all greater than a minimum level voltage that is used to
determine whether a voltage at a peripheral bus data line
associated with the peripheral bus connector of the electronic
device is "High" or "Low."
15. The method of claim 12, wherein determining at least two
indicator voltages based on the voltages on the power line and the
ground line includes: receiving power from the power line at a
voltage divider, the voltage divider comprising at least three
resistive elements, wherein the first digital data pin is coupled
to a first node between a first pair of resistive elements and the
second digital data pin is coupled to a second node between a
second pair of resistive elements, wherein the first pair is
different than the second pair.
16. The method of claim 15, wherein the power line is directly
connected to a resistive element of the first pair of resistive
elements.
17. The method of claim 15, wherein the ground line is directly
connected to a resistive element of the second different pair of
resistive elements.
18. The method of claim 12, wherein determining at least two
indicator voltages based on the voltages on the power line and the
ground line includes: receiving power from the power line at a
plurality of voltage dividers, each comprising at least two
resistive elements, wherein the first digital data pin is coupled
to a first node between a first pair of resistive elements of a
first voltage divider, and wherein the second digital data pin is
coupled to a second node between a second pair of resistive
elements of a second voltage divider.
19. The method of claim 12, further comprising: receiving AC power
at a plug connector; and converting the AC power to DC power on the
power line and the ground line.
20. The method of claim 12, further comprising: providing power on
the power and ground line with a battery having a positive terminal
and a negative terminal, wherein the power line is coupled with the
positive terminal of the battery and the ground line is coupled
with the negative terminal of the battery.
21. The method of claim 20, further comprising: converting the DC
voltage of the battery to another DC voltage using a DC/DC
converter having an input coupled to the positive terminal and an
output coupled to the power line.
22. A system comprising: an electronic device having a peripheral
bus connector; a power source including: a power line; a ground
line; available power circuitry operatively coupled to the power
line and the ground line, wherein the available power circuitry is
configured to provide a first voltage on a first output and a
second voltage on a second output, the first and second voltages
indicating a level of power available from the power source; and a
connector including a power pin coupled to the power line, a ground
pin coupled to the ground line, a first digital data pin coupled to
the first output of the available power circuitry, and a second
digital data pin coupled to the second output of the available
power circuitry, wherein when the connector is coupled to a
peripheral bus connector of an electronic device: the power line is
operable to provide power to a peripheral bus connector of an
electronic device via the power pin, and the first and second
digital data pins are operable to provide the first and second
voltages to respective digital data input pins of the peripheral
bus connector of the electronic device; and a cable having a first
connector that connects with the peripheral bus connector of the
electronic device and a second connector that connects with the
connector of the power source.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a divisional of U.S. patent
application Ser. No. 11/031,288, filed Jan. 7, 2005 (Atty. Docket
No. 20750P-001010US), and entitled "METHOD AND SYSTEM FOR
DISCOVERING A POWER SOURCE ON A PERIPHERAL BUS", and is herein
fully incorporated by reference for all purposes.
[0002] This application claims priority benefit of U.S. Provisional
Patent Application No. 60/608,959, filed Oct. 8, 2004, entitled
"METHOD AND SYSTEM FOR DISCOVERING A POWER ADAPTER ON A PERIPHERAL
BUS," which is hereby incorporated herein by reference.
[0003] This application also claims priority benefit of U.S.
Provisional Patent Application No. 60/588,959, filed Jul. 18, 2004,
entitled "METHOD AND SYSTEM FOR DISCOVERING A POWER ADAPTER ON A
PERIPHERAL BUS," which is hereby incorporated herein by
reference.
[0004] This application is also related to: (i) U.S. patent
application Ser. No. 11/031,547, filed Jan. 7, 2005, entitled
"PORTABLE POWER SOURCE TO PROVIDE POWER TO AN ELECTRONIC DEVICE VIA
AN INTERFACE HIGHLY PORTABLE MEDIA DEVICE," which is hereby
incorporated herein by reference; (ii) U.S. Provisional Patent
Application No. 60/642,340, filed Jan. 7, 2005, entitled "ACCESSORY
AUTHENTICATION FOR ELECTRONIC DEVICES," which is hereby
incorporated herein by reference; (iii) U.S. patent application
Ser. No. 11/031,301, filed Jan. 7, 2005, entitled "CONNECTOR
SYSTEM," which is hereby incorporated herein by reference; (iv)
U.S. patent application Ser. No. 10/833,689, filed Apr. 27, 2004,
entitled "CONNECTOR INTERFACE SYSTEM FOR MULTI-COMMUNICATION
DEVICE," which is hereby incorporated herein by reference; (v) U.S.
patent application Ser. No. 10/278,752, filed Oct. 22, 2002, now
U.S. Pat. No. 6,995,963, entitled "METHODS AND APPARATUS FOR
CHARGING A BATTERY IN A PERIPHERAL DEVICE," which is hereby
incorporated herein by reference; and (vi) U.S. patent application
Ser. No. 10/125,893, filed Mar. 18, 2002, entitled "POWER ADAPTERS
FOR POWERING AND/OR CHARGING PERIPHERAL DEVICES," which is hereby
incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0005] 1. Field of the Invention
[0006] The present invention relates to electronic devices and,
more particularly, to portable electronic devices that can couple
to peripheral buses.
[0007] 2. Description of the Related Art
[0008] Portable electronic devices, such as Portable Digital
Assistants and media players, are often battery powered. These
electronic devices sometimes also have peripheral bus ports that
are able to support peripheral buses, such as Universal Serial Bus
(USB) or FIREWIRE (IEEE 1394) bus ports. Peripheral buses are used
to provide data communications with electronic devices as well as
to provide limited amounts of power to the electronic devices.
[0009] Recently, the iPod.RTM., a media player developed by Apple
Computer, Inc. of Cupertino, Calif., has been able to charge its
battery through power provided to its FIREWIRE bus port. Although
charging batteries or otherwise powering an electronic device via a
peripheral bus is convenient, peripheral buses are not designed to
carry large amounts of power. In the case of a USB bus, the
available power is limited to about 0.5 Watts but can be increased
to about 2.5 Watts through a negotiation process. Unfortunately,
not only is the negotiation process cumbersome, but the amount of
power (even when increased through negotiation) is still often
inadequate for many electronic devices.
[0010] Thus, there is a need to facilitate greater power delivery
to electronic devices via peripheral buses.
SUMMARY OF THE INVENTION
[0011] Broadly speaking, the invention relates to improved
techniques to recognize a power source on a peripheral bus and/or
determine power available from the power source via the peripheral
bus. Typically, the peripheral bus is supported by a cable
connected between a host device and an electronic device. In this
case, the host device is a power source (e.g., power adapter or
battery pack) and the cable is used to provide power from the power
source to the electronic device. Hence, by understanding the power
available from the power source, the electronic device can manage
its power utilization so as to operate in a stable and reliable
manner. The electronic device is, for example, a portable computing
device. Examples of portable computing devices include a Portable
Digital Assistant (PDA) and a portable media player.
[0012] The invention can be implemented in numerous ways, including
as a method, system, device, apparatus, or computer readable
medium. Several embodiments of the invention are discussed
below.
[0013] As an electrical device, one embodiment of the invention
includes at least: a bus interface coupled to a bus connector, the
bus connector providing a power line, a ground line and a plurality
of data lines to the bus interface; an available power detector
operatively connected to the bus interface, the available power
detector operates to detect a level of available power from the
power line when a power source is operatively connected to the bus
interface via the bus connector; power-consuming circuitry; and a
power manager operatively connected to the available power detector
and the power-consuming circuitry, the power manager operates to
manage power utilization by at least a portion of the
power-consuming circuitry based on the level of available
power.
[0014] As a method for managing power utilization by an electrical
device having a bus connector, one embodiment includes at least the
acts of: detecting connection of a peripheral bus to a bus
connector of the electrical device, the peripheral bus having at
least a power line and a plurality of bus data lines; reading
voltage levels on the bus data lines when the detecting detects
connection of the peripheral bus; determining whether a host device
providing the peripheral bus is a power adapter based on the
voltage levels; and determining an available power level for the
power adapter based on the voltage levels when it is determines
that the host device is a power adapter; and managing power
utilization of the electrical device based on the available power
level for the power adapter.
[0015] As a method for managing power utilization by an electrical
device having a bus connector, another embodiment includes at least
the acts of: detecting connection of a peripheral bus to a bus
connector of the electrical device, the peripheral bus having at
least a power line and a plurality of bus data lines; reading
voltage levels on the bus data lines when said detecting detects
connection of the peripheral bus; determining whether a host device
providing the peripheral bus is a battery pack based on the voltage
levels; and determining an available power capacity of the battery
pack based on the voltage levels when it is determined that the
host device is a battery pack; and managing power utilization of
the electrical device based on the available power capacity of the
battery pack.
[0016] As a method for determining power availability from a power
adapter coupled to an electronic device via a peripheral bus, the
peripheral bus having at least a power line and a plurality of bus
data lines, one embodiment of the invention includes at least the
acts of: reading voltage levels induced on the bus data lines by
the power adapter; and determining an available power level for the
power adapter based on the voltage levels.
[0017] As a method for determining power availability from a
battery pack coupled to an electronic device via a peripheral bus,
the peripheral bus having at least a power line and a plurality of
bus data lines, another embodiment of the invention includes at
least the acts of: reading voltage levels induced on the bus data
lines by the battery pack; and determining an available power level
for the battery pack based on the voltage levels.
[0018] As a method for identifying a peripheral device coupled to a
peripheral connector of an electronic device, one embodiment of the
invention includes at least the acts of: detecting connection of a
peripheral bus to the bus connector of the electrical device, the
peripheral bus being associated with a host device that is also
connected to the peripheral bus, the peripheral bus having at least
a power line and a plurality of bus data lines; reading voltage
levels on the bus data lines after the detecting detects connection
of the peripheral bus; and identifying the host device as a power
adapter or battery pack based on the voltage levels.
[0019] Other aspects and advantages of the invention will become
apparent from the following detailed description taken in
conjunction with the accompanying drawings which illustrate, by way
of example, the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The invention will be readily understood by the following
detailed description in conjunction with the accompanying drawings,
wherein like reference numerals designate like structural elements,
and in which:
[0021] FIG. 1A is a block diagram of a power delivery system
according to one embodiment of the invention.
[0022] FIG. 1B is a block diagram of a power delivery system
according to another embodiment of the invention.
[0023] FIG. 2A is a block diagram of a power adapter according to
one embodiment of the invention.
[0024] FIG. 2B is a block diagram of a battery pack according to
one embodiment of the invention.
[0025] FIG. 3A is a schematic diagram of a resistor arrangement
according to one embodiment of the invention.
[0026] FIG. 3B illustrates a resistor arrangement according to
another embodiment of the invention.
[0027] FIG. 3C illustrates a resistor arrangement according to
another embodiment of the invention.
[0028] FIG. 4A illustrates a table that provides a representative
correlation of high voltage level to available power.
[0029] FIG. 4B illustrates a table that provides a representative
correlation of high voltage level to available power.
[0030] FIG. 5 is a block diagram of an electronic device according
to one embodiment of the invention.
[0031] FIG. 6 is a schematic diagram of an analog-to-digital
conversion circuit according to one embodiment of the
invention.
[0032] FIG. 7 is a block diagram of a power management system
according to one embodiment of the invention.
[0033] FIG. 8 is a flow diagram of an available power process
according to one embodiment of the invention.
[0034] FIG. 9 is a flow diagram of a boot process according to one
embodiment of the invention.
[0035] FIG. 10 is a block diagram of a media player suitable for
use with the invention.
DETAILED DESCRIPTION OF THE INVENTION
[0036] The invention relates to improved techniques to recognize a
power source on a peripheral bus and/or determine power available
from the power source via the peripheral bus. Typically, the
peripheral bus is supported by a cable connected between a host
device and an electronic device. In this case, the host device is a
power source (e.g., power adapter or battery pack) and the cable is
used to provide power from the power source to the electronic
device. Hence, by understanding the power available from the power
source, the electronic device can manage its power utilization so
as to operate in a stable and reliable manner. The electronic
device is, for example, a portable computing device. Examples of
portable computing devices include a Portable Digital Assistant
(PDA) and a portable media player.
[0037] Embodiments of the invention are discussed below with
reference to FIGS. 1A-10. However, those skilled in the art will
readily appreciate that the detailed description given herein with
respect to these figures is for explanatory purposes as the
invention extends beyond these limited embodiments.
[0038] FIG. 1A is a block diagram of a power delivery system 100
according to one embodiment of the invention. The power delivery
system 100 includes a power adapter 102. The power adapter 102 can
couple to an alternating current (AC) outlet by way of an AC plug
104 and a power cord 106. When so connected, AC power is supplied
to the power adapter 102 from the AC outlet via the AC plug 104 and
the power cord 106. Within the power adapter 102, the AC power is
converted to direct current (DC) power. The DC power is coupled to
a peripheral connector 108 of the power adapter 102 so that the DC
power is available for use by other devices. In one embodiment, the
peripheral connector 108 can be a Universal Serial Bus (USB)
connector. In another embodiment, the peripheral connector 108 can
be a FIREWIRE.TM. connector.
[0039] The peripheral connector 108 can receive a counterpart
connector of one end of a peripheral cable 110. The peripheral
cable 110 is used to provide the DC power from the peripheral
connector 108 of the power adapter 102 to an electronic device 112.
Hence, the opposite end of the peripheral cable 110 has a
counterpart connector that couples to a peripheral connector 114 of
the electronic device 112. The electronic device 112, in this
embodiment, receives the DC power made available by the power
adapter 102 via the peripheral cable 110. Here, the power adapter
102 can be considered a host device, at least for power, and the
other devices that receive the power via the peripheral connector
108 can be considered peripheral devices, at least for power.
[0040] The DC power supplied to the electronic device 112 by the
peripheral cable 110 can be consumed by the electronic device 112.
However, the power adapter 102 is designed to provide only a
certain, limited amount of power. Hence, proper design of the
electronic circuit 112 would dictate that the electronic circuit
112 respect the certain, limited amount of power made available by
the power adapter 102. This is complicated by the fact that the
electronic device 112 can operate with various different power
adapters that provide different limited amounts of power.
Nevertheless, to avoid the electronic device 112 from
over-consuming the amount of power available from the power adapter
102, the electronic device 112 includes a power manager 116. The
power manager 116 can operate power consuming circuitry 118 within
the electronic device 112 such that the available power from the
power adapter 102 is not over-consumed. Hence, the operation of the
electronic device 112 remains stable even when connected to
different power adapters that provide different limited amounts of
power. As an example, the power manager 116 can disable, limit or
sequence usage of various circuits of the power consuming circuitry
118 such that the power being consumed is normally not more than
the certain, limited amount of power made available by the power
adapter 102. A battery can be provided within the electronic device
112 to provide power when the power adapter 102 is not connected,
or can provide supplemental power (should it be needed) when the
power adapter 102 is connected.
[0041] FIG. 1B is a block diagram of a power delivery system 150
according to another embodiment of the invention. The power
delivery system 150 is generally similar to the power delivery
system 100 shown in FIG. 1A except that the power adapter 102 is
replaced by a battery pack 150. The battery pack 150 provides
direct current (DC) power. The peripheral cable 110 is used to
provide the DC power from the battery pack 150 to the electronic
device 112. The DC power supplied to the electronic device 112 by
the peripheral cable 110 can be consumed by the electronic device
112. However, like the power adapter 102 of FIG. 1A, the battery
pack 150 is designed to provide only a certain, limited amount of
power. Hence, proper design of the electronic circuit 112 would
dictate that the electronic circuit 112 respect the certain,
limited amount of power made available by the battery pack 152.
However, the power available from the battery pack 150 is dependent
on the type and quantity of batteries provided in the battery pack
150. The power manager 116 can operate power consuming circuitry
118 within the electronic device 112 such that the available power
from the battery pack 152 is not over-consumed. Hence, the
operation of the electronic device 112 remains stable even when
connected to different battery packs that provide different limited
amounts of power. As an example, the power manager 116 can disable,
limit or sequence usage of various circuits of the power consuming
circuitry 118 such that the power being consumed is normally not
more than the certain, limited amount of power made available by
the battery pack 152. A battery can be provided within the
electronic device 112 to provide power when the battery pack 152 is
not connected, or can provide supplemental power (should it be
needed) when the battery pack 152 is connected.
[0042] FIG. 2A is a block diagram of a power adapter 200 according
to one embodiment of the invention. The power adapter 200 is, for
example, suitable for use as the power adapter 102 illustrated in
FIG. 1A.
[0043] The power adapter 200 includes an AC/DC converter 202 and an
available power indicator 204. For example, as shown in FIG. 1A,
the AC/DC converter 202 can receive AC power from the AC outlet via
the AC plug 104 and the power cord 106. The AC power is then
converted to DC power by the AC/DC converter 202. The DC power is
then coupled to a power line of a peripheral connector 206. A
ground line is also coupled to the peripheral connector 206. The
available power indicator 204 also couples to the DC power and the
ground line. The available power indicator 204 provides an
available power indication. The available power indication
indicates the amount of available power offered by the power
adapter 200. The available power indication provided by the
available power indicator 204 is coupled to data lines of the
peripheral connector 206, such as data lines DP and DM shown in
FIG. 2A.
[0044] The available power indicator 204 can be implemented in a
variety of different ways. In one embodiment, the available power
indicator 204 couples analog voltage levels to the data lines DP
and DM of the peripheral connector 206. The voltages levels can be
used to indicate the available power provided by the power adapter
200. The voltage levels on the data lines can be used directly or
in a differential manner. In another embodiment, signaling could be
utilized over the data lines. The signaling could pertain to a
digital signal or could pertain to signals using a frequency or
pulse-width modulation scheme.
[0045] FIG. 2B is a block diagram of a battery pack 250 according
to one embodiment of the invention. The battery pack 250 is, for
example, suitable for use as the battery pack 152 illustrated in
FIG. 1B.
[0046] The battery pack 250 includes one or more batteries 252 and
a DC/DC regulator 254. The DC/DC regulator operates to regulate the
DC power provided by the one or more batteries 252. The battery
pack 250 also includes the available power indicator 204. The DC
power is then coupled to a power line of a peripheral connector
206. A ground line is also coupled to the one or more batteries 252
and the peripheral connector 206. As noted above, the available
power indicator 204 provides an available power indication. In this
embodiment, the available power indication indicates the amount of
available power offered by the battery pack 250. The available
power indication provided by the available power indicator 204 is
coupled to data lines of the peripheral connector 206, such as data
lines DP and DM shown in FIG. 2B.
[0047] When the available power indicator 204 is implemented to
apply analog voltage levels to the data lines DP and DM, the
available power indicator 204 can be implemented by a resistor
arrangement. FIGS. 3A-3C illustrate different representative
resistor arrangements that can be utilized to implement the
available power indicator 204 according to certain embodiments of
the invention.
[0048] FIG. 3A is a schematic diagram of a resistor arrangement 300
according to one embodiment of the invention. The resistor
arrangement 300 includes a first resistor 302 coupled between DC
power (DC PWR) and a first node 304. A second resistor 306 is
coupled between the first node 304 and ground (GND). A third
resistor 308 is coupled between DC power and a second node 310. A
fourth resistor 312 is coupled between the second node 310 and
ground. The data line DP is coupled to the second node 310, and the
data line DM is coupled to the first node 304. Hence, the voltage
V.sub.DP which appears at the second node 310 is placed on the data
line DP, and the voltage V.sub.DM which appears at the first node
304 is placed on the data line DM.
[0049] FIG. 3B illustrates a resistor arrangement 320 according to
another embodiment of the invention. The resistor arrangement 320
includes a first resistor 322 coupled between DC power and a first
node 324. A second resistor 326 is coupled between the first node
324 and a second node 328. A third resistor 330 is coupled between
the second node 328 and ground. The data line DP is coupled to the
first node 324 so as to place a voltage V.sub.DP on the data line
DP. The data line DM is coupled to the second node 328 to supply
the voltage V.sub.DM on the data line DM.
[0050] FIG. 3C illustrates a resistor arrangement 340 according to
another embodiment of the invention. A first resistor 342 is
coupled between DC power and a first node 344. A second resistor
346 is coupled between the first node 344 and a second node 348. A
third resistor 350 is coupled between the second node 348 and
ground. The data line DM is coupled to the first node 344 to supply
the voltage V.sub.DM to the data line DM. The data line DP is
coupled to the second node 348 to supply the voltage V.sub.DP to
the data line DP.
[0051] It should be noted that the voltages being coupled to the
data lines DP and DM can be used directly or in a differential
manner. For example, a differential voltage could be utilized, such
as, V.sub.DPM=V.sub.DP-V.sub.DM. The advantage of using a
differential voltage is that the number of gradations of available
power levels that can be detected is increased (e.g., doubled). It
should also be noted that the resistor arrangement 320 in FIG. 3B
guarantees that the voltage V.sub.DP is always going to be greater
than the voltage V.sub.DM. In contrast, the resistor arrangement
340 in FIG. 3C guarantees that the voltage V.sub.DM is always going
to be greater than the voltage V.sub.DP. Hence, the resister
arrangements 320 and 340 are particularly well suited with the
differential voltage approach.
[0052] According to one embodiment of the invention, the voltages
V.sub.DP and V.sub.DM appearing on the data lines DP and DM,
respectively, are always going to be considered "High" by the
electronic device 112. That is, these voltage levels will be
greater than the minimum high level voltage that is used to
determine whether the voltage at the data line is "High" or "Low".
Hence, although these voltages are "High," the voltages can exceed
the minimum high level by different amounts so as to provide
gradations of high level voltages. These different gradations can
be utilized to signal to the electronic device 112 the particular
amount of available power offered by the power adapter 102.
[0053] FIG. 4A illustrates a table 400 that provides a
representative correlation of high voltage level to available
power. As shown in the table 400 illustrated in FIG. 4A, a high
voltage level H.sub.1 can indicate that the corresponding power
source can supply 0.5 Watts of available power. The power source
can be a power adapter or a battery pack. A high voltage level
H.sub.2 can indicate that the corresponding power source can supply
1 Watt of available power. A high voltage level H.sub.3 can
indicate that the corresponding power source can supply 3.0 Watts
of available power. Additionally, in general, the n.sup.th high
voltage level (H.sub.n) can indicate that the corresponding power
source can supply 8.0 Watts of available power. Although the high
voltage levels H.sub.1, H.sub.2, H.sub.3, . . . , H.sub.n can vary
depending upon implementation, these voltage levels are all "High"
level. For example, if the peripheral bus deems voltages from
2.0-3.3 Volts as "High," then the high voltage levels H.sub.1,
H.sub.2, H.sub.3, . . . , H.sub.n represent distinct,
non-overlapping voltages or voltage ranges all within the range of
2.0 Volts and 3.3 Volts.
[0054] FIG. 4B illustrates a table 450 that provides a
representative correlation of high voltage level to available
power. The table 450 is suitable for use when the power source is a
battery pack. The table 450 can indicate characteristics of the
battery pack, which indirectly provide an indication of available
power. As shown in the table 450 illustrated in FIG. 4B, a high
voltage level H.sub.1 can indicate that the corresponding battery
pack has one AA battery. A high voltage level H.sub.2 can indicate
that the corresponding battery pack has two AA batteries. A high
voltage level H.sub.3 can indicate that the corresponding battery
pack has two AAA batteries. Additionally, in general, the n.sup.th
high voltage level (H.sub.n) can indicate that the corresponding
battery pack has three AAA batteries. Although the high voltage
levels H.sub.1, H.sub.2, H.sub.3, . . . , H.sub.n can vary
depending upon implementation, these voltage levels are all "High"
level.
[0055] In other embodiments, the sign (positive or negative) of the
voltage difference (e.g., V.sub.DPM=V.sub.DP-V.sub.DM) can be used
to distinguish different power sources. For example, if the voltage
difference is positive, the power source can be deemed a power
adapter. Alternatively, if the voltage difference is negative, the
power source can be deemed a battery pack. The magnitude of the
voltage difference can then be used as noted above to directly or
indirectly signify level of power availability.
[0056] FIG. 5 is a block diagram of an electronic device 500
according to one embodiment of the invention. The electronic device
500 can, for example, represent the electronic device 112
illustrated in FIGS. 1A and 1B.
[0057] The electronic device 500 couples to or includes a
peripheral connector 502. The peripheral connector 502 is coupled
to a DC power (DC PWR) line, a data DP line, a data DM line, and a
ground (GND) line. These lines are supplied to a bus interface 504.
The bus interface 504 enables the electronic device 500 to receive
power and/or participate in data transmissions and receptions over
a peripheral bus. Since the invention is primarily concerned with
receiving power over the peripheral bus, the discussion below is
primarily directed to receiving power at the electronic device 500
over the peripheral bus and then managing power utilization to
ensure stable operation.
[0058] The electronic device 500 further includes an
analog-to-digital conversion circuit 506. The analog-to-digital
conversion circuit 506 couples to the data lines DP and DM. The
analog-to-digital conversion circuit 506 converts the analog
voltage levels on the data lines DP and DM to digital voltage
levels that are supplied to a controller 508. More particularly,
the digital voltage levels are supplied to an available power
detector 510. In this embodiment, the available power detector 510
is provided within the controller 508. For example, the controller
508 is typically an integrated circuit, such as a microprocessor,
custom IC (e.g., ASIC), or programmable IC that has been
programmed. The available power detector 510 examines the digital
voltage levels to determine an available power level. The available
power level represents an amount of available power that is
available to the electronic device 500 from a power source via the
peripheral bus. Once the available power level is determined, the
available power level is provided to a power manager 512. In this
embodiment, the power manager 512 is provided within the controller
508. The power manager 512 operates to control the operational
activity of the electronic device 500 so that its power draw via
the peripheral bus does not normally exceed the power available
from the power source. In this regard, the power manager 512 may
cause the controller 508 or other power consuming circuitry 514 to
defer operations, sequence operations, or avoid operations so that
the power consumption of the electronic device 500 is managed.
[0059] Typically, the electronic device 500 would be a
battery-powered device and that a rechargeable battery within the
electronic device 500 could be charged by the power provided over
the peripheral bus. Hence, the charging operation may affect the
amount of power available for other circuitry within the electronic
device 500. Furthermore, to the extent that the battery is
adequately charged, the battery may offer additional power for
consumption by the electronic device 500 in the event that the
available power offered by the power source via the peripheral bus
is exceeded by operational activity of the electronic device 500.
Examples of the other power consuming circuitry 514 will vary
widely depending upon implementation. Nevertheless, some examples
of other power consuming circuitry 514 include a disk drive, a
battery charge circuit, a memory device (e.g., RAM, ROM), a battery
monitor, and a display.
[0060] In the embodiment of the electronic device 500 shown in FIG.
5, the available power detector 510 and the power manager 512 are
provided within the controller 508. However, it should be
recognized that the available power detector 510 and the power
manager 512 need not be provided within the controller 508 and can
also be separate components or integrated together.
[0061] FIG. 6 is a schematic diagram of an analog-to-digital
conversion circuit 600 according to one embodiment of the
invention. The analog-to-digital conversion circuit 600 is, for
example, suitable for use as the analog-to-digital conversion
circuit 506 illustrated in FIG. 5. The analog-to-digital conversion
circuit 600 includes resistors 602 and 604 and an analog-to-digital
converter (ADC) 606 for converting an analog voltage on the data
line DP to a digital output of n-bits. Similarly, resistors 608 and
610 and an ADC 612 convert an analog voltage on the data line DM to
a digital output of n-bits.
[0062] In an alternate embodiment for the analog-to-digital
conversion circuit 506 illustrated in FIG. 5, the conversion
circuitry could be shared for the data lines DP and DM through use
of a switch or multiplexer and only a portion of the
analog-to-digital conversion circuit 600. For example, a switch or
multiplexer could selectively couple one of the data line DM or DP
to the resistor 602, and then the output of the ADC 606 can be the
digital voltage on the data line DM or on the data line DP, thus
eliminating the need for the resistors 608 and 610 as well as the
ADC 612.
[0063] FIG. 7 is a block diagram of a power management system 700
according to one embodiment of the invention. The power management
system 700 describes a representative operation of a power manager,
such as the power manager 512, according to one embodiment of the
invention. The power management system 700 represents a portion of
an electronic device.
[0064] The power management system 700 includes a power manager
702. The power manager 702 receives an available power level (APL)
from an available power detector, such as the available power
detector 510. The power manager 702 operates to control operation
of electronic circuitry based on the available power level. As
shown in FIG. 7, the power management system 700 can couple to a
battery 704 and a battery monitor 706. The battery monitor 706 can
monitor a battery charge level (BCL) and provide the battery charge
level to the power manager 702. As a result, the power manager 702
can also control operation of electronic circuitry based on the
battery charge level. In other words, the power manager 702 can
manage power consumption by the electronic device based on the
available power level and/or the battery charge level.
[0065] Power supplied to the electronic device by the power source
can be coupled to the battery 704 via a battery charge circuit 708.
The battery charge circuit 708 can be controlled by the power
manager 702 such that the power available from a power source can
either be available for charging the battery 704 or can be
prevented from being used to charge the battery 704. The power
management system 700 also includes other power consuming circuitry
710 associated with the electronic device. The other power
consuming circuitry 710 can vary widely depending upon
implementation. Nevertheless, some or all of the power consuming
circuitry 710 can be controlled by the power manager 702. For
example, the power manager 702 could limit the use of certain
circuitry, could cause circuitry too initiate in different
sequences, could change usage of circuitry, etc. In doing so, the
power manager 702 can make use of not only the available power
level but also the battery charge level. As shown in FIG. 7, power
from the battery P.sub.BAT is combined with the power from the
power source P.sub.IN to yield a device power P.sub.OUT. The device
power P.sub.OUT is provided to at least the power manager 702, the
battery monitor 706, and the other power consuming circuitry 710.
Hence, even though power consumption is being managed by the power
manager 702, the power being drawn from the electronic device can
exceed the power into the electronic device by the power amplifier,
namely, power P.sub.IN, provided the difference in power is
available from the battery P.sub.BAT.
[0066] FIG. 8 is a flow diagram of an available power process 800
according to one embodiment of the invention. The available power
process 800 is, for example, performed by an electronic device,
such as the electronic device 112 illustrated in FIGS. 1A and 1B or
the electronic device illustrated in FIG. 5.
[0067] The available power process 800 begins with a decision 802
that determines whether a peripheral bus has been detected. Here,
the electronic device can monitor or be informed when a peripheral
bus is coupled between a host and the electronic device. In one
embodiment, once a power line (e.g., DC PWR) of a peripheral
connector of the electronic device detects the presence of a
positive voltage source (e.g., 5 volts) the presence of a
peripheral bus can be deemed detected by the electronic device.
When the decision 802 determines that a peripheral bus has not been
detected, the available power process 800 waits for the detection
of a peripheral bus. In other words, the available power process
800 can be initiated or deemed invoked once the peripheral bus has
been detected.
[0068] Once the decision 802 determines that a peripheral bus has
been detected, voltage levels are read 804 from bus data lines of
the peripheral bus. For example, the voltage levels can be read
from the data lines DP and DM, such as illustrated in FIG. 5. Next,
a decision 806 determines whether the host device is a power
source. The peripheral bus being detected can be from various
different devices (e.g., host devices), including a power source
and a computer. In one embodiment, the voltage levels on the bus
data lines can signal the type of host device. For example, the
invention is particularly suited for use with host devices that are
power sources. More particularly, the voltage levels on the bus
data lines can signal that the host device is a power source. In
one implementation, the voltage levels being "High" on the bus data
lines can signal the presence of a power source.
[0069] In any case, when the decision 806 determines that the host
device is not a power source, then other standard processing 808
can be performed. For example, if the host device is a computer,
the other standard processing 808 may involve operations to
facilitate the exchange of data between the computer and the
electronic device.
[0070] On the other hand, when the decision 806 determines that the
host device is a power source, an available power level of the
power source is determined 810. In one embodiment, the available
power level of the power source can be determined 810 by further
examination of the voltage levels on the bus data lines. Namely,
the voltage levels on the bus data lines can signal the power level
available from the power source. For example, as noted above with
respect to FIG. 4A, the voltage levels on the bus data lines can be
categorized into a plurality of "High" voltage levels H.sub.1,
H.sub.2, H.sub.3, . . . , H.sub.n which are deemed to respectively
correspond to different available power levels offered by the power
source, namely, 0.5, 1, 3, . . . , 8 Watts.
[0071] After the available power level is determined 810, power
utilization by the electronic device can be managed 812 in
accordance with the determined available power level. That is,
during operation of the electronic device, the power utilization
can be controlled or managed such that operations or functions may
vary depending upon the determined available power level.
[0072] Next, followings blocks 808 and 812, a decision 814
determines whether the peripheral bus has been disconnected. When
the decision 814 determines that the peripheral bus has not been
disconnected, then the processing returns to repeat the decision
812 so that power utilization by the electronic device can continue
to be managed. Alternatively, when the decision 814 determines that
the peripheral bus has been disconnected, the processing returns to
repeat the decision 802 and subsequent blocks so that the
electronic device can again perform the available power process 800
when a peripheral bus is thereafter connected to the electronic
device.
[0073] One type of operation that is particularly power intensive
is a boot process, which involves the initial start-up of an
electronic device. Typically, the electronic device performing a
boot process would include a disk drive device that stores program
code that is used for or to boot-up an operating system for the
electronic device.
[0074] FIG. 9 is a flow diagram of a boot process 900 according to
one embodiment of the invention. The electronic device can perform
the boot process 900 to initiate the electronic device for
operation.
[0075] The boot process 900 begins with a decision 902 that
determines whether the determined available power level is greater
than or equal to a minimum boot power level. As an example, the
determined available power level can be determined at block 810 of
the available power process illustrated in FIG. 8. When the
decision 902 determines that the determined available power level
(from the power source) is not greater than or equal to the minimum
boot power level, then further processing is performed to determine
whether its is an appropriate time to boot-up. More specifically, a
battery charge level is read 904. Then, a decision 906 determines
whether the battery charge level is greater than or equal to a
minimum charge level. When the decision 906 determines that the
battery charge level is not greater than or equal to the minimum
charge level, the battery is charged 908 and a boot sequence is
delayed. Following the block 908, the boot process 900 returns to
repeat the decision 906 so that the battery charge level can again
be compared with the minimum charge level. Once the decision 906
determines that the battery charge level equals or exceeds the
minimum charge level, then the boot process 900 permits the boot
sequence to be performed 910.
[0076] On the other hand, when the decision 902 determines that the
determined available power level is greater than or equal to the
minimum boot power level, the boot sequence can be directly
performed 910. Accordingly, the boot process 900 permits the boot
sequence to be immediately performed if the determined available
power level offered by the power source is deemed to exceed the
minimum boot power level needed to properly operate the electronic
device during the boot sequence. However, in the case in which the
determined available power level offered by the power source does
not equal or exceed the minimum boot power level, additional power
may be required to be drawn from the battery of the electronic
device. Hence, the decision 906 ensures that the battery has at
least a minimum charge level before the boot sequence is able to be
performed 910. Following the performance 910 of the boot sequence,
the boot process 900 is complete and ends.
[0077] The electronic device as described herein can be a media
player capable of playing (including displaying) media items. The
media items can pertain to audio items (e.g., audio files or
songs), videos (e.g., movies) or images (e.g., photos).
[0078] FIG. 10 is a block diagram of a media player 1000 suitable
for use with the invention. The media player 1000 can include the
circuitry of the electronic device 112 in FIGS. 1A and 1B or the
electronic device 500 in FIG. 5, and/or can perform the operations
described with reference to FIGS. 8 and 9.
[0079] The media player 1000 includes a processor 1002 that
pertains to a microprocessor or controller for controlling the
overall operation of the media player 1000. The media player 1000
stores media data pertaining to media items in a file system 1004
and a cache 1006. The file system 1004 is, typically, a storage
disk or a plurality of disks. The file system 1004 typically
provides high capacity storage capability for the media player
1000. However, since the access time to the file system 1004 is
relatively slow, the media player 1000 can also include a cache
1006. The cache 1006 is, for example, Random-Access Memory (RAM)
provided by semiconductor memory. The relative access time to the
cache 1006 is substantially shorter than for the file system 1004.
However, the cache 1006 does not have the large storage capacity of
the file system 1004. Further, the file system 1004, when active,
consumes more power than does the cache 1006. The power consumption
is often a concern when the media player 1000 is a portable media
player that is powered by a battery (not shown). The media player
1000 also includes a RAM 1020 and a Read-Only Memory (ROM) 1022.
The ROM 1022 can store programs, utilities or processes to be
executed in a non-volatile manner. The RAM 1020 provides volatile
data storage, such as for the cache 1006.
[0080] The media player 1000 also includes a user input device 1008
that allows a user of the media player 1000 to interact with the
media player 1000. For example, the user input device 1008 can take
a variety of forms, such as a button, keypad, dial, etc. Still
further, the media player 1000 includes a display 1010 (screen
display) that can be controlled by the processor 1002 to display
information to the user. A data bus 1011 can facilitate data
transfer between at least the file system 1004, the cache 1006, the
processor 1002, and the CODEC 1012.
[0081] In one embodiment, the media player 1000 serves to store a
plurality of media items (e.g., songs) in the file system 1004.
When a user desires to have the media player play a particular
media item, a list of available media items is displayed on the
display 1010. Then, using the user input device 1008, a user can
select one of the available media items. The processor 1002, upon
receiving a selection of a particular media item, supplies the
media data (e.g., audio file) for the particular media item to a
coder/decoder (CODEC) 1012. The CODEC 1012 then produces analog
output signals for a speaker 1014. The speaker 1014 can be a
speaker internal to the media player 1000 or external to the media
player 1000. For example, headphones or earphones that connect to
the media player 1000 would be considered an external speaker.
[0082] The media player 1000 also includes a bus interface 1016
that couples to a data link 1018. The data link 1018 allows the
media player 1000 to couple to a host device (e.g., host computer
or power source). The data link 1018 can also provide power to the
media player 1000.
[0083] The various aspects, embodiments, implementations or
features of the invention can be used separately or in any
combination.
[0084] The invention is preferably implemented by hardware,
software or a combination of hardware and software. The software
can also be embodied as computer readable code on a computer
readable medium. The computer readable medium is any data storage
device that can store data which can thereafter be read by a
computer system. Examples of the computer readable medium include
read-only memory, random-access memory, CD-ROMs, DVDs, magnetic
tape, optical data storage devices, and carrier waves. The computer
readable medium can also be distributed over network-coupled
computer systems so that the computer readable code is stored and
executed in a distributed fashion.
[0085] The advantages of the invention are numerous. Different
aspects, embodiments or implementations may yield one or more of
the following advantages. One advantage of the invention is that a
portable media device can easily and rapidly determine whether a
power source is connected to its peripheral port and, if so, how
much power can be drawn from the power source via the peripheral
port. Another advantage of the invention is that power utilization
by a portable media device can be dependent on available power for
stable and reliable operation.
[0086] The many features and advantages of the present invention
are apparent from the written description and, thus, it is intended
by the appended claims to cover all such features and advantages of
the invention. Further, since numerous modifications and changes
will readily occur to those skilled in the art, the invention
should not be limited to the exact construction and operation as
illustrated and described. Hence, all suitable modifications and
equivalents may be resorted to as falling within the scope of the
invention.
* * * * *