Polymer And Solder Pillars For Connecting Chip And Carrier

Daubenspeck; Timothy H. ;   et al.

Patent Application Summary

U.S. patent application number 12/028848 was filed with the patent office on 2009-08-13 for polymer and solder pillars for connecting chip and carrier. Invention is credited to Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sulliwan.

Application Number20090200663 12/028848
Document ID /
Family ID40938203
Filed Date2009-08-13

United States Patent Application 20090200663
Kind Code A1
Daubenspeck; Timothy H. ;   et al. August 13, 2009

POLYMER AND SOLDER PILLARS FOR CONNECTING CHIP AND CARRIER

Abstract

A method of connecting chips to chip carriers, ceramic packages, etc. (package substrates) forms smaller than usual first solder balls and polymer pillars on the surface of a semiconductor chip and applies adhesive to the distal ends of the polymer pillars. The method also forms second solder balls, which are similar in size to the first solder balls, on the corresponding surface of the package substrate to which the chip will be attached. Then, the method positions the surface of the semiconductor chip next to the corresponding surface of the package substrate. The adhesive bonds the distal ends of the polymer pillars to the corresponding surface of the package substrate. The method heats the first solder balls and the second solder balls to join the first solder balls and the second solder balls into solder pillars.


Inventors: Daubenspeck; Timothy H.; (Colchester, VT) ; Gambino; Jeffrey P.; (Westford, VT) ; Muzzy; Christopher D.; (Burlington, VT) ; Sauter; Wolfgang; (Richmond, VT) ; Sulliwan; Timothy D.; (Underhill, VT)
Correspondence Address:
    FREDERICK W. GIBB, III;Gibb Intellectual Property Law Firm, LLC
    2568-A RIVA ROAD, SUITE 304
    ANNAPOLIS
    MD
    21401
    US
Family ID: 40938203
Appl. No.: 12/028848
Filed: February 11, 2008

Current U.S. Class: 257/737 ; 257/E21.511; 257/E23.068; 438/118; 438/125
Current CPC Class: H01L 24/11 20130101; H01L 2224/06505 20130101; H01L 2224/17051 20130101; H05K 2201/0379 20130101; H01L 2224/1403 20130101; H01L 2224/14 20130101; H01L 2224/1319 20130101; H01L 2224/1329 20130101; H01L 2924/14 20130101; H01L 2224/81193 20130101; H05K 3/3436 20130101; H01L 24/81 20130101; H01L 2924/00013 20130101; H01L 23/49811 20130101; H01L 24/90 20130101; H01L 2924/01013 20130101; H01L 2224/81139 20130101; H01L 2224/133 20130101; H01L 2224/83194 20130101; H01L 2224/14505 20130101; H01L 2224/13082 20130101; H01L 2224/81191 20130101; H01L 2924/01033 20130101; H05K 3/303 20130101; H01L 24/14 20130101; H01L 24/17 20130101; H01L 2224/11822 20130101; H01L 2924/01082 20130101; Y02P 70/613 20151101; H01L 2224/131 20130101; H01L 2224/0401 20130101; H01L 2924/01074 20130101; H01L 2224/838 20130101; H01L 24/83 20130101; H01L 2924/014 20130101; H05K 2201/10674 20130101; H05K 2201/2036 20130101; H01L 2224/16 20130101; H01L 23/49816 20130101; H01L 2924/01076 20130101; Y02P 70/50 20151101; H01L 2224/83191 20130101; H01L 2924/01022 20130101; H01L 2224/81801 20130101; H01L 2224/0603 20130101; H01L 2924/12044 20130101; H01L 24/16 20130101; H01L 2224/1319 20130101; H01L 2924/00014 20130101; H01L 2224/133 20130101; H01L 2924/00014 20130101; H01L 2224/1329 20130101; H01L 2924/00014 20130101; H01L 2224/131 20130101; H01L 2924/014 20130101; H01L 2924/00013 20130101; H01L 2224/13099 20130101; H01L 2924/3512 20130101; H01L 2924/00 20130101
Class at Publication: 257/737 ; 438/125; 438/118; 257/E23.068; 257/E21.511
International Class: H01L 23/498 20060101 H01L023/498; H01L 21/60 20060101 H01L021/60

Claims



1. A structure comprising: a semiconductor chip; a package substrate connected to said semiconductor chip; polymer pillars positioned between and connecting said semiconductor chip and said package substrate; and solder pillars positioned between and connecting said semiconductor chip and said package substrate.

2. The structure according to claim 1, all the limitations of which are incorporated herein by reference, wherein said solder pillars have a shape and a size similar to that of said polymer pillars.

3. The structure according to claim 1, all the limitations of which are incorporated herein by reference, wherein said solder pillars and said polymer pillars each have a first dimension between said semiconductor chip and said package substrate that is at least 2 times a second dimension that is perpendicular to said first dimension.

4. The structure according to claim 1, all the limitations of which are incorporated herein by reference, wherein said solder pillars provide greater physical support between said semiconductor chip and said package substrate relative to said solder pillars.

5. The structure according to claim 1, all the limitations of which are incorporated herein by reference, wherein said solder pillars lack lead.

6. A structure comprising: a semiconductor chip; a package substrate connected to said semiconductor chip; polymer pillars positioned between and connecting said semiconductor chip and said package substrate; and solder pillars positioned between and connecting said semiconductor chip and said package substrate, wherein said polymer pillars comprise optical transmission media adapted to transmit optical signals between said semiconductor chip and said package substrate, wherein said solder pillars comprise electrical transmission media adapted to transmit electrical signals between said semiconductor chip and said package substrate, and wherein said solder pillars comprise two joined solder balls.

7. The structure according to claim 6, all the limitations of which are incorporated herein by reference, wherein said solder pillars have a shape and a size similar to that of said polymer pillars.

8. The structure according to claim 6, all the limitations of which are incorporated herein by reference, wherein said solder pillars and said polymer pillars each have a first dimension between said semiconductor chip and said package substrate that is at least 2 times a second dimension that is perpendicular to said first dimension.

9. The structure according to claim 6, all the limitations of which are incorporated herein by reference, wherein said solder pillars provide greater physical support between said semiconductor chip and said package substrate relative to said solder pillars.

10. The structure according to claim 6, all the limitations of which are incorporated herein by reference, wherein said solder pillars lack lead.

11. A method comprising: forming first solder balls on a surface of a semiconductor chip; forming polymer pillars on said surface of said semiconductor chip; forming second solder balls on a corresponding surface of a package substrate; positioning said surface of said semiconductor chip next to said corresponding surface of said package substrate such that said polymer pillars contact said corresponding surface of said package substrate and such that said first solder balls contact corresponding ones of said second solder balls; and heating said first solder balls and said second solder balls to join said first solder balls and said second solder balls into solder pillars.

12. The method according to claim 11, all the limitations of which are incorporated herein by reference, wherein said polymer pillars extend further from said surface of said semiconductor chip than said first solder balls.

13. The method according to claim 11, all the limitations of which are incorporated herein by reference, wherein combined diameters of said first solder balls and said second solder balls is equal to or greater than a dimension that said polymer pillars extend from said surface of said semiconductor chip.

14. The method according to claim 11, all the limitations of which are incorporated herein by reference, wherein said polymer pillars maintain relative positions of said surface of said integrated circuit chip and said corresponding surface of said package substrate during said heating of said first solder balls and said second solder balls.

15. The method according to claim 11, all the limitations of which are incorporated herein by reference, wherein said heating comprises heating to a temperature at least equal to a melting point of said first solder balls and said second solder balls.

16. A method comprising: forming first solder balls on a surface of a semiconductor chip; forming polymer pillars on said surface of said semiconductor chip; applying adhesive to distal ends of said polymer pillars, wherein said distal ends comprise ends of said polymer pillars that are furthest away said surface of said semiconductor chip; forming second solder balls on a corresponding surface of a package substrate; positioning said surface of said semiconductor chip next to said corresponding surface of said package substrate such that said distal ends of said polymer pillars contact said corresponding surface of said package substrate and such that said first solder balls contact corresponding ones of said second solder balls, wherein said adhesive bonds said distal ends of said polymer pillars to said corresponding surface of said package substrate; and heating said first solder balls and said second solder balls to join said first solder balls and said second solder balls into solder pillars.

17. The method according to claim 16, all the limitations of which are incorporated herein by reference, wherein said polymer pillars extend further from said surface of said semiconductor chip than said first solder balls to an extent such that said applying of said adhesive to said distal ends of said polymer pillars is performed without applying adhesive to said first solder balls.

18. The method according to claim 16, all the limitations of which are incorporated herein by reference, wherein combined diameters of said first solder balls and said second solder balls is equal to or greater than a dimension that said polymer pillars extend from said surface of said semiconductor chip.

19. The method according to claim 16, all the limitations of which are incorporated herein by reference, wherein said polymer pillars maintain relative positions of said surface of said integrated circuit chip and said corresponding surface of said package substrate during said heating of said first solder balls and said second solder balls.

20. The method according to claim 16, all the limitations of which are incorporated herein by reference, wherein said heating comprises heating to a temperature at least equal to a melting point of said first solder balls and said second solder balls.
Description



BACKGROUND

[0001] 1. Field of the Invention

[0002] The embodiments of the invention generally relate to methods of connecting chips to chip carriers, ceramic packages, etc. (package substrates) and to a method that forms smaller than usual first solder balls and polymer pillars on the surface of a semiconductor chip and forms second solder balls on the corresponding surface of the package substrate to which the chip will be attached. The method heats the first solder balls and the second solder balls to join the first solder balls and the second solder balls into solder pillars.

[0003] 2. Description of the Related Art

[0004] In conventional systems, solder balls are used to join chips to the package. However, it is becoming increasingly difficult to ensure solder ball reliability due to the following trends: smaller solder ball size (for higher I/O density); larger chip size; plastic packaging (with larger coefficient of thermal expansion (CTE) than ceramic packages); and the use of Pb-free solder (with higher reflow temperature and higher modulus than Pb-containing solder). The coefficient of thermal expansion mismatch between the chip and the package can result in high stress in the solder joints, which can cause cracks and eventually device failure.

SUMMARY

[0005] In view of the foregoing, an embodiment of the invention provides a method of connecting chips to chip carriers, ceramic packages, etc. (package substrates) that forms smaller than usual first solder balls and polymer pillars on the surface of a semiconductor chip. The method applies adhesive to the distal ends of the polymer pillars.

[0006] The polymer pillars extend further from the surface of the semiconductor chip than the first solder balls to an extent such that the applying of the adhesive to the distal ends of the polymer pillars is performed without applying adhesive to the first solder balls.

[0007] The method also forms second solder balls, which are similar in size to the first solder balls, on the corresponding surface of the package substrate to which the chip will be attached. Then, the method positions the surface of the semiconductor chip next to the corresponding surface of the package substrate such that the distal ends of the polymer pillars contact the corresponding surface of the package substrate and such that the first solder balls contact corresponding ones of the second solder balls.

[0008] The combined diameters of the first solder balls and the second solder balls is equal to or greater than a dimension that the polymer pillars extend from the surface of the semiconductor chip. Thus, when the polymer pillars contact the surface of the substrate, the first solder balls are pushed against the second solder balls and the solder balls make very good contact with each other. The method heats the first solder balls and the second solder balls to join the first solder balls and the second solder balls into solder pillars. The heating process heats the first and second solder balls to a temperature at least equal to a melting point of the first solder balls and the second solder balls (the heating process reflows the solder). After the solder cools below its melting point, the resulting solder structure forms as solder pillars.

[0009] The adhesive bonds the distal ends of the polymer pillars to the corresponding surface of the package substrate. Thus, because they are firmly attached between the chip and the substrate, the polymer pillars maintain relative positions of the surface of the integrated circuit chip and the corresponding surface of the package substrate during the heating of the first solder balls and the second solder balls.

[0010] The first and second solder balls (which can be lead-free solder) are approximately the same size on the substrate and on the chip, but are only approximately one-half the exterior size (approximately one quarter of the volume) of a standard C4 (controlled collapsible chip connection) solder balls. The C4 solder balls are conventionally only formed on the chip when forming connections to the substrate.

[0011] After the heating process (reflow), the two smaller solder balls would be expected to have somewhere between 1/2 and 1/4 the volume of solder contained in the single conventional C4 bump (because each smaller solder ball has only approximately one quarter of the volume of a standard C4 solder ball). Thus, during reflow, the two smaller solder balls would be expected to collapse as occurs conventionally with the C4 solder balls. However, the height of the polymer pillars controls the stand-off distance between the chip surface and the corresponding substrate surface, which prevents the solder from collapsing into a spherical shape. Because of the presence of the polymer pillars, the solder balls join to form a solder pillar, whose shape is determined by a combination of the solder volume, the sizes of the back level metalization (BLM) and substrate pads, and the polymer pillar height. Further, the solder pillars provide greater physical support between the semiconductor chip and the package substrate relative to the solder pillars. By observing the resulting structure, it sometimes can be seen that the solder pillars actually comprise two joined solder balls.

[0012] The foregoing process produces a unique structure that comprises polymer pillars and solder pillars positioned between and connecting the semiconductor chip and the package substrate. The solder pillars have a shape and a size similar to that of the polymer pillars. However, the polymer pillars comprise optical transmission media (adapted to transmit optical signals between the semiconductor chip and the package substrate) while the solder pillars comprise electrical transmission media (adapted to transmit electrical signals between the semiconductor chip and the package substrate).

[0013] As described above, these solder and polymer pillars are elongated structures, as contrasted with the conventional rounded C4 solder balls (used conventionally to connect the chip and the substrate). Thus, the height (first dimension) of the solder pillars and the polymer pillars between the semiconductor chip and the package substrate is at least 2 times their width (second dimension that is perpendicular to the first dimension).

[0014] These and other aspects of the embodiments of the invention will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating preferred embodiments of the invention and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments of the invention without departing from the spirit thereof, and the embodiments of the invention include all such modifications.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The embodiments of the invention will be better understood from the following detailed description with reference to the drawings, in which:

[0016] FIG. 1 illustrates a schematic diagram of an integrated circuit assembly;

[0017] FIG. 2 illustrates a schematic diagram of an integrated circuit assembly;

[0018] FIG. 3 illustrates a schematic diagram of an integrated circuit assembly;

[0019] FIG. 4 illustrates a schematic diagram of an integrated circuit assembly;

[0020] FIG. 5 illustrates a schematic diagram of an integrated circuit assembly;

[0021] FIG. 6 illustrates a schematic diagram of an integrated circuit assembly;

[0022] FIG. 7 illustrates a schematic diagram of an integrated circuit assembly;

[0023] FIG. 8 illustrates a schematic diagram of an integrated circuit assembly;

[0024] FIG. 9 illustrates a schematic diagram of an integrated circuit assembly;

[0025] FIG. 10 illustrates a schematic diagram of an integrated circuit assembly; and

[0026] FIG. 11 illustrates a schematic diagram of an integrated circuit assembly.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0027] The embodiments of the invention and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. It should be noted that the features illustrated in the drawings are not necessarily drawn to scale. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments of the invention. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments of the invention may be practiced and to further enable those of skill in the art to practice the embodiments of the invention. Accordingly, the examples should not be construed as limiting the scope of the embodiments of the invention.

[0028] One solution to relieving stress in solder connections is to use elongated solder connections. For example, elongated solder connections can be formed by joining the chip to the package at the solder reflow temperature, mechanically separating the chip from the package to elongate the solder, and then cooling the solder in the "stretched state". This process provides an elongated solder connection for improved reliability; however, this process is difficult to implement in manufacturing.

[0029] Hence, an effective process for making elongated solder connections would be useful. It would also be advantageous to form electrical and optical I/Os on the same chip, which would be useful for connections between, for example, stacked chips or connections from the chip to the package. For example, U.S. Patent Publication 2006/0104566 to Bakir et al. (the complete disclosure of which is incorporated herein by reference) uses polymer pillars for the optical inputs/outputs and solder balls for the electrical inputs/outputs.

[0030] However, when polymer pillars are used in combination with rounded solder ball connections, the polymer pillars should be taller than the solder balls (to allow dipping into an adhesive). For example, as shown in FIG. 1, a semiconductor chip 102 includes contact pads 104 upon which solder balls 106 are formed. These solder balls form electrical input/output connections. In addition, the structure includes polymer pillars 108 that form optical input/output connections. For a detailed description of how such structures are formed, and the materials and processing for creating such structures, reference is made to the previously mentioned U.S. Patent Publication 2006/0104566, and such explanation is not repeated herein.

[0031] As shown in FIG. 1, the polymer pillars 108 are taller than the solder balls 106 by a measure labeled T1 in FIG. 1. In FIG. 2, the distal ends of the polymer pillars 108 are dipped into an adhesive 202, which results in the distal ends of the polymer pillars 108 being covered with adhesive 202 as shown in FIG. 3. Then, as shown in FIG. 4, the chip 102 can be positioned adjacent to a package substrate 404 such that the solder balls 106 make contact with pads 402 on the package substrate 404 and such that the polymer pillars 180 become attached to the package substrate 404 by means of the adhesive 202.

[0032] The height difference between the solder balls 106 and the polymer pillars 108, discussed above, (Ti) allows the polymer pillars 108 to be dipped into an adhesive 202, as shown in FIG. 2, without having the adhesive 202 contact the solder balls 106. Therefore, it is desirable to maintain a gap (shown as item 204 in FIG. 2) between the solder balls 106 and the adhesive 202, to prevent the solder balls 106 from becoming contaminated with the adhesive 202.

[0033] If the height difference T1 is too small, the solder balls may be contaminated by the adhesive 202 and may not form good connections with the pads 402. If the height difference T1 is too great, the solder balls may not be large enough to make contact with the bond pad 402. It is difficult to ensure that the solder balls 106 make contact to the bond pads 402 on the substrate because, if the solder balls 106 are too small, they may not reach the bond pads 402. To the contrary, if the solder balls 106 are too large, no gap 204 may be present and the solder balls may be covered with adhesive 202. This adhesive 202 can interfere with the ability of the solder balls 106 to bond with the pads 402.

[0034] In view of these issues, the processing sequence shown in FIGS. 5-9 is utilized to form a new structure and ensure that the electrical connections between the chip 102 and the package substrate 404 are formed properly. More specifically, as shown in FIGS. 5-9, a method is disclosed that creates a new structure and which properly forms electrical connections when both electrical and optical connections are utilized between semiconductor chips and packaging substrates.

[0035] More specifically, FIG. 5 illustrates a similar structure to that shown in FIG. 1; however, in FIG. 5, rather than using the full-size solder balls 106, the structure in FIG. 5 utilizes smaller solder balls 506. This increases the height difference to a measure shown as T2 which is greater than the height difference T1 shown in FIG. 1. For example, the smaller solder balls 506 could be approximately one-half to three-quarters of the height (H1, which is shown in FIG. 10 and discussed below) of the polymer pillars 108, which would allow T2 to be approximately one-quarter to one-half the height of the polymer pillar (H1).

[0036] Thus, in FIG. 6, the method applies adhesive 202 to the distal ends of the polymer pillars 108 (the distal ends are the ends of the polymer pillars 108 that are furthest away the surface of the semiconductor chip 102 opposite the ends that are connected to the semiconductor chip 102). This allows in the tips of the polymer pillars 108 be coated in adhesive 202 as shown in FIG. 7.

[0037] The polymer pillars 108 extend further from the surface of the semiconductor chip 102 than the first solder balls 506 to an extent such that the applying of the adhesive to the distal ends of the polymer pillars 108 is performed without applying adhesive to the first solder balls 506. In other words, the greater height difference T2 produces a larger gap 604 (when compared to gap 204 shown in FIG. 2) and provides a much greater margin for error than did the smaller height difference T1. The larger gap 604 substantially reduces the chance of the smaller solder balls 506 becoming contaminated with the adhesive 202, which increases yield and decreases waste.

[0038] In order to ensure that a good electrical connection is formed, the method also forms second solder balls 802, which are similar in size to the first solder balls 506, on the bond pads 402 of the corresponding surface of the package substrate 404 to which the chip 102 will be attached. Then, the method positions the surface of the semiconductor chip 102 next to the corresponding surface of the package substrate 404 such that the distal ends of the polymer pillars 108 contact the corresponding surface of the package substrate 404 and such that the first solder balls 506 contact corresponding ones of the second solder balls 802.

[0039] The combined diameters of the first solder balls 506 and the second solder balls 802 is equal to or greater than a dimension that the polymer pillars 108 extend from the surface of the semiconductor chip 102. Thus, when the polymer pillars 108 contact the surface of the substrate 404, the first solder balls 506 are pushed against the second solder balls 802 and the solder balls make very good contact with each other.

[0040] The method heats the first solder balls 506 and the second solder balls 802 to join the first solder balls 506 and the second solder balls 802 into solder pillars 902, as shown in FIG. 9. The heating process heats the first and second solder balls 802 to a temperature at least equal to a melting point of the first solder balls 506 and the second solder balls 802 (the heating process reflows the solder). After the solder cools below its melting point, the resulting solder structure forms as solder pillars 902.

[0041] The adhesive 202 bonds the distal ends of the polymer pillars 108 to the corresponding surface of the package substrate 404. Thus, because they are firmly attached between the chip 102 and the substrate 404 by the adhesive 202, the polymer pillars 108 maintain the relative positions of the surface of the integrated circuit chip 102 and the corresponding surface of the package substrate 404 during the heating of the first solder balls 506 and the second solder balls 802. This prevents the first and second solder balls 506, 802 from collapsing into a larger ball shape and, instead, forces the solder balls 506, 802 to take an elongated pillar-like shape upon cooling.

[0042] The first and second solder balls 802 (which can be lead-free solder) are approximately the same size on the substrate 404 and on the chip 102, but are only approximately one-half the exterior size (approximately one quarter of the volume) of the C4 solder balls that would be required if the processing shown in FIGS. 1-4 were being performed. As shown above, in FIGS. 1-4, the C4 solder balls are conventionally only formed on the chip 102 when forming connections to the substrate 404.

[0043] After the heating process (reflow), the two smaller solder balls would be expected to have somewhere between 1/2 and 1/4 the volume of solder contained in the single C4 bump used in FIG. 1-4 (because each smaller solder ball has only approximately one quarter of the volume of a standard C4 solder ball shown in FIG. 1-4). Thus, during reflow, the two smaller solder balls would be expected to collapse as occurs conventionally with the C4 solder balls.

[0044] However, the height of the polymer pillars 108 controls the stand-off distance between the chip 102 surface and the corresponding substrate 404 surface, which prevents the solder balls 506, 802 from collapsing into a spherical shape. Because of the presence of the polymer pillars 108, the solder balls 506, 802 join to form the solder pillar 902, whose shape is determined by a combination of the solder volume, the sizes of the substrate 404 pads, and the polymer pillar 108 height.

[0045] As described above, the solder and polymer pillars 108, 902 are elongated structures, as contrasted with the conventional rounded C4 solder balls 106 (used conventionally to connect the chip 102 and the substrate 404). Because they are elongated, the height (first dimension H1) of the solder pillars 902 and the polymer pillars 108 between the semiconductor chip 102 and the package substrate 404 is approximately at least 2 times their width (second dimension W2 that is perpendicular to the first dimension) as shown in FIG. 10. To the contrary, the height (first dimension H1) of the solder balls 106 between the semiconductor chip 102 and the package substrate 404 is about the same as their width (second dimension W1 that is perpendicular to the first dimension) as also shown in FIG. 10. The measures H1, W1, and W2 shown in FIG. 10 are only approximate relative measures and the pillars are not all exactly the same size, but are all similarly elongated. Thus, the solder pillars 902 are elongated, as contrasted with the rounded solder balls 106 shown in FIGS. 1-4.

[0046] Further, the solder pillars 902 provide greater physical support between the semiconductor chip 102 and the package substrate 404 relative to the solder pillars 902. The solder pillars 902 can have a somewhat uneven elongated shape. For example, by observing some embodiments of the resulting structure, it sometimes can be seen that the solder pillars 902 actually comprise two joined solder balls, as shown in FIG. 11.

[0047] The foregoing process produces a unique structure that comprises polymer pillars 108 and solder pillars 902 positioned between and connecting the semiconductor chip 102 and the package substrate 404. The solder pillars 902 have a shape and a size similar to that of the polymer pillars 108. However, the polymer pillars 108 comprise optical transmission media (adapted to transmit optical signals between the semiconductor chip 102 and the package substrate 404) while the solder pillars 902 comprise electrical transmission media (adapted to transmit electrical signals between the semiconductor chip 102 and the package substrate 404).

[0048] With the foregoing method shown in FIGS. 5-9, the larger gap 604 substantially reduces the chance of the smaller solder balls 506 becoming contaminated with the adhesive 202, which increases yield and decreases waste; yet, when the polymer pillars 108 contact the surface of the substrate 404, the first solder balls 506 are pushed against the second solder balls 802 and the solder balls make very good contact with each other, which increases yield and reliability. Therefore, the process and structure discussed above produces a new structure and increases yield and reliability.

[0049] The foregoing description of the specific embodiments will so fully reveal the modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments of the invention have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments of the invention can be practiced with modification within the spirit and scope of the appended claims.

* * * * *


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