U.S. patent application number 11/924416 was filed with the patent office on 2009-04-30 for methods and systems for reducing noise coupling in high speed digital systems.
This patent application is currently assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION. Invention is credited to Moises Cases, Bradley D. Herrman, Kent B. Howieson, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham, Caleb J. Wesley.
Application Number | 20090107705 11/924416 |
Document ID | / |
Family ID | 40580997 |
Filed Date | 2009-04-30 |
United States Patent
Application |
20090107705 |
Kind Code |
A1 |
Cases; Moises ; et
al. |
April 30, 2009 |
METHODS AND SYSTEMS FOR REDUCING NOISE COUPLING IN HIGH SPEED
DIGITAL SYSTEMS
Abstract
Methods and systems for reducing noise coupling in high-speed
digital systems. Exemplary embodiments include a method, including
etching a plurality of high speed signal traces onto a core
insulating layer, forming trenches on respective sides of the
plurality of high speed signal traces, thereby removing insulating
material adjacent to the plurality of high speed signal traces and
forming pedestals having remaining insulating material, the
plurality of high speed signal traces disposed on and coupled to
the remaining insulating material, coupling pre-preg material on
the high speed signal traces, removing the pre-preg material
adjacent the trenches, thereby retaining the pre-preg material
aligned with the high speed signal traces, and heating and pressing
a core layer to the pre-preg layer, and heating and pressing the
pre-preg layer to the core insulating layer.
Inventors: |
Cases; Moises; (Austin,
TX) ; Herrman; Bradley D.; (Cary, NC) ;
Howieson; Kent B.; (Austin, TX) ; Matoglu; Erdem;
(Austin, TX) ; Mutnury; Bhyrav M.; (Austin,
TX) ; Patel; Pravin S.; (Cary, NC) ; Pham; Nam
H.; (Round Rock, TX) ; Wesley; Caleb J.;
(Winston Salem, NC) |
Correspondence
Address: |
CANTOR COLBURN LLP - IBM RESEARCH TRIANGLE PARK
20 Church Street, 22nd Floor
Hartford
CT
06103
US
|
Assignee: |
INTERNATIONAL BUSINESS MACHINES
CORPORATION
Armonk
NY
|
Family ID: |
40580997 |
Appl. No.: |
11/924416 |
Filed: |
October 25, 2007 |
Current U.S.
Class: |
174/255 ;
174/262; 29/852 |
Current CPC
Class: |
Y10T 156/1013 20150115;
H05K 2201/09236 20130101; H05K 2201/09318 20130101; Y10T 29/49155
20150115; H05K 1/024 20130101; Y10T 29/49165 20150115; H05K 3/4611
20130101; Y10T 29/49126 20150115; Y10T 29/4913 20150115; Y10T
29/49117 20150115; H05K 3/4697 20130101; Y10T 29/49158 20150115;
H05K 2203/063 20130101 |
Class at
Publication: |
174/255 ; 29/852;
174/262 |
International
Class: |
H05K 3/00 20060101
H05K003/00; H05K 1/03 20060101 H05K001/03 |
Claims
1-3. (canceled)
4. A printed circuit board apparatus having reduced noise coupling,
the apparatus comprising: a core layer having an upper and lower
surface, the upper and lower surface each including a copper sheet
layer; a pre-preg layer having an upper surface and a lower
surface, the upper surface of the pre-preg layer coupled to the
lower surface of the core layer; a core insulating layer having an
upper surface and a lower surface, the upper surface of the core
insulating layer coupled to the lower surface of the pre-preg
layer; a return current reference layer disposed on the lower
surface of the core insulator layer; and high-speed signal traces
disposed on the upper surface of the core insulating layer, each of
the high speed signal traces disposed on a pedestal defined by a
section of the pre-preg layer and the core insulating layer, each
pedestal being separated by an air gap disposed between adjacent
pedestals.
5. The apparatus as claimed in claim 4 wherein the high speed
signal traces are single layer nets, wherein each pedestal supports
a single layer net.
6. The apparatus as claimed in claim 4 wherein the high speed
signal traces are differential nets, wherein each pedestal supports
a differential net pair.
Description
TRADEMARKS
[0001] IBM.RTM. is a registered trademark of International Business
Machines Corporation, Armonk, N.Y., U.S.A. Other names used herein
may be registered trademarks, trademarks or product names of
International Business Machines Corporation or other companies.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] This invention relates to printed circuit board fabrication,
and particularly to methods and systems for reducing noise coupling
in high-speed digital systems.
[0004] 2. Description of Background
[0005] FIG. 1 illustrates a conventional printed circuit board
having a core layer 105 having a return current reference layer
106, a pre-preg layer 110 and a core insulator layer 120 having a
return current reference layer 115 and a number of single layer
nets 125. Cross-talk noise coupling on adjacent nets 125 (i.e.,
victim nets) can result in poor signal integrity in high speed
system. The effects of cross-talk noise can be intensified with
increased signal speeds.
[0006] Currently, many techniques have been proposed to reduce
noise and cross-talk coupling, but often rely on complex digital
signal processing (DSP) techniques and filtering algorithms to
achieve noise isolation.
[0007] There is currently a need to detect and implement, and at
the same time, achieve high noise isolation.
SUMMARY OF THE INVENTION
[0008] Exemplary embodiments include a printed circuit board
apparatus having reduced noise coupling, the apparatus including a
core layer having an upper and lower surface, the upper and lower
surface each including a copper sheet layer, a pre-preg layer
having an upper surface and a lower surface, the upper surface of
the pre-preg layer coupled to the lower surface of the core layer,
a core insulating layer having an upper surface and a lower
surface, the upper surface of the core insulating layer coupled to
the lower surface of the pre-preg layer, a return current reference
layer disposed on the lower surface of the core insulator layer and
high-speed signal traces disposed on the upper surface of the core
insulating layer, each of the high speed signal traces disposed on
a pedestal defined by a section of the pre-preg layer and the core
insulating layer, each pedestal being separated by an air gap
disposed between adjacent pedestals.
[0009] Further exemplary embodiments include a printed circuit
board fabrication method, including etching a plurality of high
speed signal traces onto a core insulating layer, forming trenches
on respective sides of the plurality of high speed signal traces,
thereby removing insulating material adjacent to the plurality of
high speed signal traces and forming pedestals having remaining
insulating material, the plurality of high speed signal traces
disposed on and coupled to the remaining insulating material,
coupling pre-preg material on the high speed signal traces,
removing the pre-preg material adjacent the trenches, thereby
retaining the pre-preg material aligned with the high speed signal
traces, wherein a width of a trench portion disposed in the
pre-preg material is greater than a width of a trench portion
disposed in the core insulating layer and heating and pressing a
core layer to the pre-preg layer, and heating and pressing the
pre-preg layer to the core insulating layer, wherein the plurality
of high-speed signal traces disposed on an upper surface of the
core insulating layer, each of the plurality of high speed signal
traces disposed on a pedestal defined by a section of the pre-preg
layer and the core insulating layer, each pedestal being separated
by an air gap disposed between adjacent pedestals.
[0010] System and computer program products corresponding to the
above-summarized methods are also described and claimed herein.
[0011] Additional features and advantages are realized through the
techniques of the present invention. Other embodiments and aspects
of the invention ale described in detail herein and are considered
a part of the claimed invention. For a better understanding of the
invention with advantages and features, refer to the description
and to the drawings.
TECHNICAL EFFECTS
[0012] As a result of the summarized invention, technically we have
achieved a solution which cross-talk noise coupling from adjacent
nets on PCBs is reduced.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The subject matter which is regarded as the invention is
particularly pointed out and distinctly claimed in the claims at
the conclusion of the specification. The foregoing and other
objects, features, and advantages of the invention are apparent
from the following detailed description taken in conjunction with
the accompanying drawings in which:
[0014] FIG. 1 illustrates a conventional printed circuit board;
[0015] FIG. 2 illustrates a PCB apparatus that reduces cross-talk
for single-ended nets in accordance with exemplary embodiments,
[0016] FIG. 3 illustrates a PCB apparatus that reduces cross-talk
for differential nets in accordance with exemplary embodiments;
[0017] FIG. 4 illustrates a flowchart of a printed circuit board
fabrication method for reducing cross talk in accordance with
exemplary embodiments; and
[0018] FIG. 5 illustrates a graph of noise coupling simulation
results.
[0019] The detailed description explains the preferred embodiments
of the invention, together with advantages and features, by way of
example with reference to the drawings.
DETAILED DESCRIPTION OF THE INVENTION
[0020] In exemplary embodiments, the systems and methods described
herein reduce cross-talk coupling or noise induction created by
capacitive and inductive coupling. Capacitive coupling occurs due
to the presence of dielectric medium. In exemplary embodiments, the
systems and methods described herein include adjacent printed
circuit board (PCB) stripline structures that are surrounded with
air. A PCB trace on an inner layer is supported in an air cavity by
a pedestal of insulating material. The pedestal is created by
digging trenches in core laminate and pre-preg. In exemplary
embodiments, pre-preg (pre-impregnated) refers to a layer of
exemplary structures described herein, of insulation material
inserted between the etched cores. In exemplary embodiments, the
pre-preg can be a combination of mat, fabric, non-woven material or
roving with resin, usually cured to the B-stage, ready for molding.
A standard pre-preg contains more resin than is desired in the
finished part; excess resin is bled off during cure. A net resin
pre-preg contains the same resin content that is desired in the
finished part; no resin bleed. Pre-preg containing a chemical
thickening agent is called a mold-mat and those in sheet form are
called sheet molding compounds.
[0021] In exemplary embodiments, the systems and methods described
herein reduce cross-talk noise coupling from adjacent nets on PCBs.
In exemplary embodiments, the systems and methods described herein
decrease spacing between adjacent traces without any increase in
noise coupling.
[0022] Capacitive coupling occurs due to presence of a dielectric
medium as discussed above. The higher the value of the dielectric
constant, Dk, of the dielectric medium, the stronger the capacitive
coupling. In exemplary embodiment, trenches are cut and scoured out
on each side of the signal traces with a laser (or any other
etching mechanism, such as chemical, etc.). A pedestal of high
dielectric constant material supports the trace. The thickness of
core and pre-preg determine the distance of the trace from the
conducting layer on other side of core. By the proximity rule, the
return path is on the conducting layer(s) closest to the signal
trace.
[0023] In exemplary embodiments, air is trenched in the dielectric
between the adjacent side by side signal traces. Since the relative
dielectric of the material between the signal and the reference
layers is much greater than air, the result is a structure where
the capacitance from signal trace to return path is much greater
than the capacitance for signal trace to signal trace. Since the
cross talk is define by coupling ratio of coupled capacitance to
total capacitance, the trace can be closer in proximity with little
coupling and the current will return through the reference planes
and does not couple with adjacent traces.
[0024] Exemplary embodiments described herein include systems and
methods for both single-ended and differential nets as now
described.
[0025] Turning now to the drawings in greater detail, FIG. 2
illustrates a PCB apparatus 200 that reduces cross-talk for
single-ended nets. In exemplary embodiments, the apparatus 200
includes a core layer 205, a pre-preg layer 210 and a core
insulating layer 220 having a return current reference layer 215
and a number of single layer nets 225. In exemplary embodiments,
the core layer 205 and the core insulator layer 220 are an
insulating material. In exemplary embodiments, the core layer 205
includes copper sheets 206 bonded on each surface of the core layer
205, in which the lower layer is a return current reference layer.
In exemplary embodiments, an upper copper sheet bonded on an upper
surface on the core insulating layer 220 is etched to create the
single layer nets 225. A lower copper sheet bonded to the lower
surface of the core insulating layer 220 is retained as the return
current reference layer 215. In exemplary embodiments, the
apparatus 200 further includes trenches 230 that have been etched
into both the core insulating layer 220 and the pre-preg layer 210.
In exemplary embodiments, the formation of the trenches 230 further
defines distinct pedestals 235, each pedestal 235 supporting a
single layer net 225. As described herein, the trenches 230'are cut
and scoured out on each side of the single layer nets 225 (i.e.,
the signal traces), thereby creating air gaps between respective
pedestals 235.
[0026] FIG. 3 illustrates a PCB apparatus 300 that reduces
cross-talk for differential nets in accordance with exemplary
embodiments. In exemplary embodiments, the apparatus 300 includes a
core layer 305, a pre-preg layer 310 and a core insulating layer
320 having a return current reference layer 315 and a number of
differential nets 325. In exemplary embodiments, the core layer 305
mid the core insulator layer 320 are an insulating material. In
exemplary embodiments, the core layer 305 includes copper sheets
306 bonded on each surface of the core layer 305, in which the
lower layer is a return current reference layer. In exemplary
embodiments, an upper copper sheet bonded on an upper surface on
the core insulating layer 320 is etched to create the differential
nets 325. A lower copper sheet bonded to the lower surface of the
core insulating layer 320 is retained as the return current
reference layer 315. In exemplary embodiments, the apparatus 300
further includes trenches 330 that have been etched into both the
core insulating layer 320 and the pre-preg layer 310. In exemplary
embodiments, the formation of the trenches 330 further defines
distinct pedestals 335, each pedestal 335 supporting a differential
net 325. As described herein, the trenches 330 are cut and scoured
out on each side of the single layer nets 325 (i.e., the signal
traces), thereby creating air gaps between respective pedestals
335.
[0027] FIG. 4 illustrates a flowchart of a printed circuit board
fabrication method 400 for reducing cross talk in accordance with
exemplary embodiments. At block 405, traces (i.e., the single layer
nets 225 or the differential nets 325) are etched onto the core
insulator layers 220, 320. At block 410, the trenches 230, 330 are
cut on each side the high speed signal trace so that all insulating
material in the proximity of the nets 225, 325 is removed. The
pedestals 235, 335 are formed from the remaining insulating
material under the nets 225, 325. At block 415, sections of the
pre-preg layers 210, 310 are cut, removed, and aligned above the
target high speed signal trace (e.g., the nets 225, 325), which had
trenches 230, 330 on each and supported by a pedestal 235, 335. In
exemplary embodiments, the cut out sections are larger in the
pre-preg layers 210, 310 than the core insulating layers 220, 320
to prevent the pre-preg layers 210, 310 from expanding into the
trenches 230, 330 that are in formation. At block 420, the stack of
core layers 205, 305, core insulating layers 220, 320 and the
pre-preg layers 210, 310 are pressed and heated.
[0028] FIG. 5 illustrates a graph 500 of noise coupling simulation
results. The graph 500 plots noise level versus frequency comparing
a noise coupling plot 505 in conventional PCBs against a reduced
noise coupling plot 510 of a PCB in accordance with exemplary
embodiments.
[0029] The capabilities of the present invention can be implemented
in software, firmware, hardware or some combination thereof.
[0030] As one example, one or more aspects of the present invention
can be included in an article of manufacture (e.g., one or more
computer program products) having, for instance, computer usable
media. The media has embodied therein, for instance, computer
readable program code means for providing and facilitating the
capabilities of the present invention. The article of manufacture
can be included as a part of a computer system or sold
separately.
[0031] Additionally, at least one program storage device readable
by a machine, tangibly embodying at least one program of
instructions executable by the machine to perform the capabilities
of the present invention can be provided.
[0032] The flow diagrams depicted herein are just examples. There
may be many variations to these diagrams or the steps (or
operations) described therein without departing from the spirit of
the invention. For instance, the steps may be performed in a
differing order, or steps may be added, deleted or modified. All of
these variations are considered a part of the claimed
invention.
[0033] While the preferred embodiment to the invention has been
described, it will be understood that those skilled in the art,
both now and in the future, may make various improvements and
enhancements which fall within the scope of the claims which
follow. These claims should be construed to maintain the proper
protection for the invention first described.
* * * * *