U.S. patent application number 12/274165 was filed with the patent office on 2009-03-12 for switched mode power supply having variable minimum switching frequency.
This patent application is currently assigned to Semtech Corporation. Invention is credited to John Kenneth Fogg, Yin-Chih Yang.
Application Number | 20090066308 12/274165 |
Document ID | / |
Family ID | 39302508 |
Filed Date | 2009-03-12 |
United States Patent
Application |
20090066308 |
Kind Code |
A1 |
Fogg; John Kenneth ; et
al. |
March 12, 2009 |
Switched Mode Power Supply Having Variable Minimum Switching
Frequency
Abstract
In a switched mode power supply (SMPS) that regulates an output
voltage in response to load conditions by switching an inductor
circuit between a supply voltage and ground at a switching
frequency, under light loading conditions, the switching frequency
of the SMPS is reduced down to a variable minimum switching
frequency sufficiently high to avoid audible noise generation.
Inventors: |
Fogg; John Kenneth; (Cary,
NC) ; Yang; Yin-Chih; (Taipei, TW) |
Correspondence
Address: |
COATS & BENNETT, PLLC
1400 Crescent Green, Suite 300
Cary
NC
27518
US
|
Assignee: |
Semtech Corporation
Morrisville
NC
|
Family ID: |
39302508 |
Appl. No.: |
12/274165 |
Filed: |
November 19, 2008 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11549744 |
Oct 16, 2006 |
7471072 |
|
|
12274165 |
|
|
|
|
Current U.S.
Class: |
323/284 |
Current CPC
Class: |
H02M 1/44 20130101; H02M
3/156 20130101 |
Class at
Publication: |
323/284 |
International
Class: |
G05F 1/00 20060101
G05F001/00 |
Claims
1. A method of operating a switched mode power supply, comprising:
regulating an output voltage in response to load conditions by
switching an inductor circuit between a supply voltage and ground
at a switching frequency; under light loading conditions, reducing
the switching frequency down to a variable minimum switching
frequency sufficiently high to avoid audible noise generation.
2. The method of claim 1 further comprising tuning the minimum
switching frequency for each application in which the switched mode
power supply is deployed.
3. The method of claim 1 wherein the variable minimum switching
frequency is established by a resistance value applied to a timer
circuit in the switched mode power supply.
4. The method of claim 3 further comprising varying the resistance
value for one or more applications including the switched mode
power supply to establish the minimum switching frequency
sufficiently high to avoid audible noise generation by circuits in
that application.
5. The method of claim 4 further comprising applying a
corresponding fixed resistance value to a plurality of the
applications including the switched mode power supply.
Description
[0001] This application is a divisional application of, and claims
priority from, copending U.S. application Ser. No. 11/549,744. The
'744 application, entitled "Switched Mode Power Supply Having
Variable Minimum Switching Frequency," was filed on Oct. 16, 2006,
and is expressly incorporated herein by reference in its
entirety.
BACKGROUND
[0002] The present invention relates generally to the field of
switched-mode power supplies and in particular to a switched-mode
power supply having a variable minimum switching frequency.
[0003] Numerous mechanisms exist for implementing switched mode
power supplies (SMPSs). The use of a switched inductor output
circuit stands as a non-limiting example of one common
implementation. In switched inductor topologies, the SMPS actively
regulates its output voltage by switching the output inductor into
and out of electrical connection with a supply voltage according to
some form of regulation error feedback signal or other regulation
control signal. When the inductor maintains continuous current as
it is switched into and out of connection with the supply, the
power supply is said to be operating in Continuous Conduction Mode
(CCM).
[0004] SMPSs can improve their overall operating efficiencies by
operating in "discontinuous conduction mode" (DCM) under certain
load conditions. For example, a given SMPS may be configured to
enter DCM responsive to detecting zero or negative current in the
inductor. In other words, when the load current drawn from the SMPS
falls to a light level, the SMPS may improve its overall operating
efficiency by suspending active regulation switching operations,
thus reducing switching losses. The SMPS thus effectively turns its
switched output off and allows the load to "float." CCM operation
may be re-entered responsive to, e.g., the value of the output
voltage.
[0005] Copending U.S. patent application Ser. No. 11/387,943,
"Switched Mode Power Supply Method and Apparatus," assigned to the
assignee of the present application and incorporated by reference
herein in its entirety, discloses a SMPS having "smart" output
voltage regulation in DCM, whereby the floating load voltage is
monitored, and regulated by entering CCM or activating an output
voltage pull-down if the voltage exceeds one or more predetermined
thresholds.
[0006] Under light loads, where the SMPS may operate primarily in
DCM, entering CCM relatively infrequently, the effective switching
frequency may be reduced to less than 20 kHz, which is within the
range of human hearing (roughly 20 Hz-20 kHz). In some
applications, the SMPS output switching may cause mechanical
vibrations in one or more circuit components, generating
objectionable audible noise. One way to eliminate this possibility
is to restrict the minimum switching frequency to a value in the
ultrasonic range, such as 25 kHz or above. However, this limits the
efficiency benefits that can be achieved by DCM under light load
conditions by operating at frequencies below ultrasonic.
SUMMARY
[0007] The minimum switching frequency of a switched mode power
supply (SMPS) is adjusted by setting a maximum duration for
switching cycles in DCM operation. A resistance value applied to an
external pin of the SMPS controls the duration of a timer that is
reset in CCM and activated upon entering DCM. Upon expiration of
the variable duration, the SMPS reverts to CCM for at least one
switching cycle. This allows the SMPS minimum effective switching
frequency to be set, for each application in which the SMPS is
deployed, at a level that avoids audible noise (which may be lower
than an ultrasonic frequency), thus taking maximum advantage of the
efficiencies of DCM operation under light load conditions.
[0008] In one aspect, the present invention relates to a switched
mode power supply (SMPS). The SMPS includes a regulation circuit
configured to operate selectively in a discontinuous conduction
mode (DCM) and in a continuous conduction mode (CCM). The SMPS also
includes a timer activated upon the regulation circuit entering DCM
and indicating a variable duration. The SMPS additionally includes
a control circuit configured to monitor an output voltage of the
switched mode power supply circuit and the timing circuit during
DCM operation of the regulation circuit, and revert the regulation
circuit to CCM operation responsive to the earlier of the output
voltage reaching a defined voltage limit or the duration
elapsing.
[0009] In another aspect, the present invention relates to a method
of controlling a switched mode power supply (SMPS) that selectively
operates in a continuous conduction mode (CCM) and a discontinuous
conduction mode (DCM) to regulate an output voltage. The current in
a switching circuit inductor associated with the output voltage is
monitored. The SMPS is switched from CCM to DCM operation in
response to detecting zero or negative inductor current. The output
voltage is monitored, and the SMPS is switched from DCM to CCM
operation in response to detecting the output voltage at or below a
reference voltage level. The time the SMPS operates in DCM is
monitored, and after a variable duration of operation in DCM, the
SMPS is switched from DCM to CCM operation.
[0010] In yet another aspect, the present invention relates to a
method of maximizing the efficiency of a switched mode power supply
while suppressing audible noise generated by the power supply. The
switched mode power supply is selectively operated in a continuous
conduction mode (CCM) and a discontinuous conduction mode (DCM) as
a function of load conditions. The duration that the switched mode
power supply operates in DCM is monitored. The switched mode power
supply is reverted from DCM operation to CCM operation after a
variable duration so as to establish a minimum effective switching
frequency sufficiently high to avoid audible noise generation.
[0011] In still another aspect, the present invention relates to a
method of operating a switched mode power supply. An output voltage
is regulated in response to load conditions by switching an
inductor circuit between a supply voltage and ground at a switching
frequency. Under light loading conditions, the switching frequency
is reduced down to a variable minimum switching frequency
sufficiently high to avoid audible noise generation.
BRIEF DESCRIPTION OF DRAWINGS
[0012] FIG. 1 is a functional block diagram of a switched mode
power supply.
[0013] FIG. 2 is a timing diagram showing CCM and DCM
operation.
[0014] FIG. 3 is a timing diagram showing a transition from DCM to
CCM operation in response to the expiration of a variable
duration.
[0015] FIG. 4 is a block diagram depicting functional blocks of a
switched mode power supply.
[0016] FIG. 5 is a flow diagram depicting control of a switched
mode power supply.
DETAILED DESCRIPTION
[0017] FIG. 1 illustrates a switched mode power supply (SMPS) 10
that is configured to provide power to an external load 12 at a
regulated output voltage. To that end, the SMPS 10 controls an
inductive switching circuit 14 that comprises transistor switches
M1 and M2, diodes D1 and D2, which may be integral with M1 and M2,
and a switched inductor L. A feedback circuit 16 provides
regulation control feedback for the SMPS circuit 10 and, in the
illustrated embodiment, comprises a voltage divider formed by
resistors R1 and R2. The center tap of the voltage divider provides
a feedback signal (FB) to a regulation feedback input of the SMPS
10.
[0018] The SMPS 10 selectively operates in Continuous Conduction
Mode (CCM), wherein it drives the switching circuit 14 to maintain
either M1 or M2 on at all times, or in Discontinuous Conduction
Mode (DCM), wherein it generally turns both M1 and M1 off in the
switching circuit 14. DCM mode offers power savings by avoiding the
gate charge losses associated with the switching and may be used,
for example, at times when the current into the load 12 is less
than the ripple current.
[0019] The operation of one embodiment of the SMPS 10 is depicted
in the timing diagram of FIG. 2. In this embodiment, in CCM
operation, the high side gate drive (HSGD) "on" duration is fixed,
and the low side gate drive (LSGD) is driven in response to a
comparison between the output voltage V.sub.c (as seen at the
output capacitor) and a lower voltage threshold. In particular,
when V.sub.c reaches the lower threshold, the LSGD turns off and
the HSGD turns on, charging the output capacitor, through the
switching inductor, from the voltage source. After a fixed HSGD
duration, the HSGD turns off and the LSDG turns on, drawing current
from ground through the switch M2. As well known by those of skill
in the art, in other embodiments of the SMPS 10, the HSGD duration
or on-time and LSGD duration or off-time can be generated by
alternate control schemes.
[0020] As depicted in FIG. 2, when the inductor current I.sub.L is
near zero, the SMPS 10 transitions to DCM operation, with neither
the HSGD nor the LSGD being driven. The output voltage thus
"floats," and will generally decay slowly via leakage currents
(although, particularly if I.sub.L is negative, V.sub.c may rise,
requiring regulation as described in the application Ser. No.
11/387,943 incorporated above). When the output voltage V.sub.c
reaches the lower threshold, it triggers HSGD to turn on, charging
the output capacitor, as shown.
[0021] In general, under light load conditions, the output voltage
V.sub.c in DCM may remain above the lower voltage threshold for
relatively long durations, resulting in no switching activity. This
reduces the overall effective switching frequency of the SMPS 10.
In particular, it may reduce the switching frequency into the human
audible range, i.e., below 20 kHz. In some applications, this may
induce vibrations in components or other mechanical devices,
generating an objectionable, audible noise. This effect, however,
depends almost entirely on the specific configuration of components
in each particular application in which the SMPS 10 is
deployed.
[0022] As used herein, a "light load" or "light load current"
refers to little or zero inductor current I.sub.L. For example, in
one embodiment a light load may comprise any inductor current
I.sub.L that is 30% or less of the maximum output current. In
general, a light load may be defined as inductor current I.sub.L
less than a predetermined threshold.
[0023] In some applications, no audible noise is generated as the
SMPS 10 switching frequency drops all the way to DC. In other
applications, an audible noise may be detected as soon as the SMPS
10 switching frequency drops below 20 kHz. In still other
applications, an audible noise may be generated only at specific
frequencies, for example 9.5 kHz. Accordingly, using the "brute
force" approach to noise abatement of restricting the SMPS 10
switching frequency to the ultrasonic range (i.e., 25 kHz or
above), while effective in all cases, fails to capitalize on the
power savings and increased efficiency of operating the SMPS 10 at
lower switching frequencies in applications where noise is only
generated at lower frequencies, or not at all.
[0024] FIG. 3 depicts operation of the SMPS 10 in which the minimum
switching frequency is controlled by forcing the SMPS 10 out of DCM
operation after a variable duration. Initially, both the HSGD and
LSGD are off, and the SMPS 10 is in DCM operation. The output
voltage V.sub.c decays to the lower threshold, initiating a CCM
switching cycle and resetting a timer. As the inductor current
I.sub.L drops to or near zero, the SMPS 10 reverts to DCM
operation, with both HSGD and LSGD off, and the timer is activated.
The output voltage V.sub.c decays only slightly, and does not cross
the lower threshold prior to the expiration of a variable duration,
marked by the deassertion of the timer output. This event causes
the LSGD to turn on, pulling the output voltage V.sub.c quickly to
the lower threshold, which forces another SMPS 10 switching cycle,
recharging the output capacitor.
[0025] According to one or more embodiments of the present
invention, the minimum effective SMPS 10 switching frequency is
variable, and in one embodiment is set by a current generated by
connecting a resistance value between an external pin of the SMPS
10 and ground. This current (in effect, the resistance value)
alters the duration of a timer that limits DCM operation. In one
embodiment, the timer is a monostable multivibrator, also known in
the art as a "one-shot" timer. The timer may be activated upon each
transition from CCM to DCM. If the SMPS 10 does not return to CCM
operation (such as by the output voltage V.sub.c crossing the lower
threshold) prior to the expiration of the one-shot duration, the
SMPS 10 transitions from DCM to CCM for at least one switching
cycle.
[0026] FIG. 4 depicts a functional block diagram of the SMPS 10,
according to one embodiment. Control logic 20 directs a regulation
circuit 22 to generate HSGD and LSGD signals to drive the switching
circuit 14 in CCM or DCM. The control logic 20 receives an input
from a voltage monitor 24 that detects when the output voltage
V.sub.c reaches or crosses the lower voltage threshold, by
comparing a proportional voltage generated by the feedback circuit
16 to an appropriate reference value. The output of the voltage
monitor indicates that the control logic 20 should direct the
regulation circuit 22 to transition from DCM to CCM for at least
one switching cycle. Note that additional voltage monitoring
circuits 24 may be included, such as in embodiments of the present
invention that use CCM regulation to guard against overvoltage in
DCM.
[0027] The control logic 20 additionally receives an output from a
timer 26 that generates a signal indicative of a variable duration.
The variable duration is determined by the value of a resistor 27
connected between an external pin of the SMPS 10 and ground. The
resistor 27 may be variable, as depicted, or fixed on-chip or
externally. A variable resistor 27 may be utilized during initial
testing of an application in which the SMPS 10 is deployed, to
ascertain whether, and at what switching frequency, audible noise
is generated. Once a particular application has been characterized
as to audible SMPS 10 switching noise, fixed resistors 27 having an
appropriate resistance value would be utilized in production, to
minimize costs.
[0028] The timer 26 additionally receives the mode output of the
control logic 20. The timer is reset when the regulation circuit 22
enters CCM and performs one or more switching cycles, and is
activated upon entering DCM, when the switching cycles are
suppressed. As discussed above, the expiration of the variable
duration indicates that the control logic 20 should direct the
regulation circuit 22 to enter CCM operation for at least one
switching cycle. Altering the variable duration indicated by the
timer 26 (via the resistor 27) alters the effective minimum
switching frequency of the SMPS 10.
[0029] The control logic 20 also receives an input from a current
monitor 28 that detects zero-crossings of the switching inductor
current I.sub.L. In one embodiment, the current monitor 28 compares
the CS+ and CS- signals tapping current on either side of the M2
switching transistor and diode. At light load currents I.sub.L
indicate that the control logic 20 should direct the regulation
circuit 22 to enter DCM operation.
[0030] FIG. 5 illustrates a method of SMPS 10 mode control that may
be implemented by processing logic included in the SMPS circuit 10.
Such logic may comprise hardware-based processing logic,
software/firmware based processing logic, or any combination
thereof.
[0031] The illustrated processing may be understood as representing
ongoing control processing, but for purposes of discussion,
processing "begins" with the SMPS 10 operating in CCM (block 30).
The switching inductor current I.sub.L is monitored, such as by the
current monitor circuit 28. If I.sub.L is high (block 32), CCM
operation is maintained (block 30). If the switching inductor
current I.sub.L is light (block 32), the control logic 20 directs
the regulation circuit 22 to transition to DCM operation (block
34). The timer 26 is activated.
[0032] The output voltage V.sub.c and a variable duration are
monitored during DCM operation, as indicated in FIG. 5 by a loop
formed by following the "NO" outputs of decision blocks 36 and 38.
In particular, as long as the output voltage V.sub.c remains above
the lower threshold (block 36) and the variable duration has not
expired (block 38), the SMPS 10 remains in DCM operation. If the
output voltage V.sub.c drops to the lower threshold (block 36), the
control logic 20 directs the regulation circuit 22 to enter CCM
operation (block 30). If, on the other hand, the output voltage
V.sub.c remains above the lower threshold (block 36), but the
variable duration expires (block 38), as may be indicated by an
output of the timer 26, the control logic 20 may direct the
regulation circuit 22 to turn on the LSGD signal, closing M2 and
pulling V.sub.c down to the lower voltage threshold (block 40).
Alternatively, another circuit may be used to discharge the output
capacitor and pull down the output voltage. The voltage monitor
circuit 24 detects that the output voltage V.sub.c is at or below
the lower threshold (block 36), and in response the control logic
20 directs the regulation circuit 22 to enter CCM operation (for at
least one switching cycle). The timer 26 is reset.
[0033] With the above details and examples in mind, those skilled
in the art will appreciate that the disclosed SMPS 10 overcomes a
significant problem associated with traditional SMPS circuits
offering DCM operation by providing for a variable minimum
switching frequency that can be tuned to the audible
characteristics of each application in which the SMPS is deployed.
Broadly, the SMPS 10 embodies a method and apparatus capable of
capitalizing on the efficiency benefits of DCM operation under
light load conditions well into the audible range by controlling
the minimum switching frequency.
[0034] Although the present invention has been described herein
with respect to particular features, aspects and embodiments
thereof, it will be apparent that numerous variations,
modifications, and other embodiments are possible within the broad
scope of the present invention, and accordingly, all variations,
modifications and embodiments are to be regarded as being within
the scope of the invention. The present embodiments are therefore
to be construed in all aspects as illustrative and not restrictive
and all changes coming within the meaning and equivalency range of
the appended claims are intended to be embraced therein.
* * * * *