U.S. patent application number 12/188463 was filed with the patent office on 2009-02-12 for semiconductor light emitting device and method of manufacturing the same.
Invention is credited to Dae Sung KANG, Hyo Kun Son.
Application Number | 20090039364 12/188463 |
Document ID | / |
Family ID | 40345622 |
Filed Date | 2009-02-12 |
United States Patent
Application |
20090039364 |
Kind Code |
A1 |
KANG; Dae Sung ; et
al. |
February 12, 2009 |
SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE
SAME
Abstract
Provided are a semiconductor light emitting device and a method
of manufacturing the same. The semiconductor light emitting device
comprises a first conductive type semiconductor layer, an active
layer, a first thin insulating layer, and a second conductive type
semiconductor layer. The active layer is formed on the first
conductive type semiconductor layer. The first thin insulating
layer is formed on the active layer. The second conductive type
semiconductor layer is formed on the thin insulating layer.
Inventors: |
KANG; Dae Sung; (Gwangju,
KR) ; Son; Hyo Kun; (Gwangju, KR) |
Correspondence
Address: |
BIRCH STEWART KOLASCH & BIRCH
PO BOX 747
FALLS CHURCH
VA
22040-0747
US
|
Family ID: |
40345622 |
Appl. No.: |
12/188463 |
Filed: |
August 8, 2008 |
Current U.S.
Class: |
257/96 ;
257/E33.032; 438/47 |
Current CPC
Class: |
H01L 33/025 20130101;
H01L 33/145 20130101; H01L 33/02 20130101; H01L 33/0025 20130101;
H01L 33/06 20130101; H01L 33/32 20130101; H01L 33/14 20130101; H01L
33/30 20130101 |
Class at
Publication: |
257/96 ; 438/47;
257/E33.032 |
International
Class: |
H01L 33/00 20060101
H01L033/00 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 9, 2007 |
KR |
10-2007-0080102 |
Claims
1. A semiconductor light emitting device comprising: a first
conductive type semiconductor layer; an active layer on the first
conductive type semiconductor layer; a first thin insulating layer
on the active layer; and a second conductive type semiconductor
layer on the thin insulating layer.
2. The semiconductor light emitting device according to claim 1,
wherein the first thin insulating layer is provided a high
resistive layer and a low conductive layer compared with the second
conductive type semiconductor layer.
3. The semiconductor light emitting device according to claim 1,
wherein the first thin insulating layer comprises at least one of
GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.
4. The semiconductor light emitting device according to claim 1,
wherein the first thin insulating layer is doped with a P-type
dopant, and comprised a p-type carrier concentration of about
5.times.10.sup.18 /cm.sup.3 or less.
5. The semiconductor light emitting device according to claim 1,
wherein a thickness of the first thin insulating layer is greater
than about 0 nm and less than or equal to about 9 nm.
6. The semiconductor light emitting device according to claim 1,
comprising at least one second thin insulating layer in the second
conductive type semiconductor layer.
7. The semiconductor light emitting device according to claim 6,
wherein the second thin insulating layer is doped with a P-type
dopant to have an insulating property and comprises at least one of
GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.
8. The semiconductor light emitting device according to claim 6,
wherein the second thin insulating layer is disposed as a high
resistive layer in the second conductive type semiconductor
layer.
9. A semiconductor light emitting device comprising: a first
conductive type semiconductor layer; an active layer on the first
conductive type semiconductor layer; a second conductive type
semiconductor layer on the active layer; an electrode layer on the
second conductive type semiconductor layer; and a thin insulating
layer between the active layer and the electrode layer.
10. The semiconductor light emitting device according to claim 9,
wherein the thin insulating layer is between a quantum barrier
layer of the active layer and the second conductive type
semiconductor layer.
11. The semiconductor light emitting device according to claim 9,
wherein the second conductive type semiconductor layer comprises at
least two layers, and the thin insulating layer comprises a first
thin insulating layer between the active layer and the second
conductive type semiconductor layer; and a second thin insulating
layer between two layers of the second conductive type
semiconductor layer.
12. The semiconductor light emitting device according to claim 9,
wherein the thin insulating layer comprises: a first thin
insulating layer between the active layer and the second conductive
type semiconductor layer; and a second thin insulating layer
between the second conductive type semiconductor layer and the
electrode layer.
13. The semiconductor light emitting device according to claim 9,
wherein the thin insulating layer is doped with a group II element,
and comprised a p-type carrier concentration of about
5.times.10.sup.18/cm.sup.3 or less.
14. The semiconductor light emitting device according to claim 9,
wherein the thin insulating layer serves as a high resistive layer
and a low conductive layer compared with the second conductive type
semiconductor layer.
15. The semiconductor light emitting device according to claim 9,
comprising an N-type semiconductor layer on the second conductive
type semiconductor layer, wherein the first conductive type
semiconductor layer is an N-type semiconductor layer, and the
second conductive type semiconductor layer is a P-type
semiconductor layer.
16. The semiconductor light emitting device according to claim 9,
comprising at least one of an undoped semiconductor layer, a buffer
layer, a substrate, and a first electrode layer under the first
conductive type semiconductor layer.
17. The semiconductor light emitting device according to claim 9,
wherein the electrode layer comprises at least one of a transparent
electrode layer and a second electrode layer.
18. A method of manufacturing a semiconductor light emitting
device, the method comprising: forming a first conductive type
semiconductor layer; forming an active layer on the first
conductive type semiconductor layer; forming a first thin
insulating layer on the active layer; and forming a second
conductive type semiconductor layer on the first thin insulating
layer.
19. The method according to claim 18, wherein the thin insulating
layer is doped with a P-type dopant in a hole concentration
5.times.10.sup.18/cm or less.
20. The method according to claim 18, comprising forming at least
one second thin insulating layer in or on the second conductive
type semiconductor layer.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] The present application claims priority under 35 U.S.C. 119
to Korean Patent Application No. 10-2007-0080102 (filed on Aug. 9,
2007), which is hereby incorporated by reference in its
entirety.
BACKGROUND
[0002] The present disclosure relates to a semiconductor light
emitting device and a method of manufacturing the same.
[0003] Groups III-V nitride semiconductors have been variously
applied to an optical device such as blue and green light emitting
diodes (LED), a high speed switching device, such as a MOSFET
(Metal Semiconductor Field Effect Transistor) and an HEMT (Hetero
junction Field Effect Transistors), and a light source of a
lighting device or a display device. The nitride semiconductor is
mainly used for the LED (Light Emitting Diode) or an LD (laser
diode), and studies have been continuously conducted to improve the
manufacturing process or a light efficiency of the nitride
semiconductor.
SUMMARY
[0004] Embodiments provide a semiconductor light emitting device
comprising a thin insulating layer on an active layer and a method
of manufacturing the same.
[0005] Embodiments provide a semiconductor light emitting device
comprising a thin insulating layer using a P-type dopant between an
active layer and a second conductive type semiconductor layer and a
method of manufacturing the same.
[0006] Embodiments provide a semiconductor light emitting device,
where At least one thin insulating layer is formed between an
active layer and an electrode layer to diffuse holes and decrease a
leakage current, and a method of manufacturing the same.
[0007] An embodiment provides a semiconductor light emitting device
comprising: a first conductive type semiconductor layer; an active
layer on the first conductive type semiconductor layer; a first
thin insulating layer on the active layer; and a second conductive
type semiconductor layer on the thin insulating layer.
[0008] An embodiment provides a semiconductor light emitting device
comprising: a first conductive type semiconductor layer; an active
layer on the first conductive type semiconductor layer; a second
conductive type semiconductor layer on the active layer; an
electrode layer on the second conductive type semiconductor layer;
and a thin insulating layer between the active layer and the
electrode layer.
[0009] An embodiment provides a method of manufacturing a
semiconductor light emitting device, the method comprising: forming
a first conductive type semiconductor layer; forming an active
layer on the first conductive type semiconductor layer; forming a
first thin insulating layer on the active layer; and forming a
second conductive type semiconductor layer on the first thin
insulating layer.
[0010] The details of one or more embodiments are set forth in the
accompanying drawings and the description below. Other features
will be apparent from the description and drawings, and from the
claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1 is a side sectional view of a semiconductor light
emitting device according to a first embodiment.
[0012] FIG. 2 is a side sectional view of a semiconductor light
emitting device according to a second embodiment.
[0013] FIG. 3 is a side sectional view of a lateral semiconductor
light emitting device using FIG. 1.
[0014] FIG. 4 is a side sectional view of a vertical semiconductor
light emitting device using FIG. 1.
[0015] FIG. 5 is a reverse current versus voltage graph for a
related art LED and an LED according to a first embodiment.
[0016] FIG. 6 is a forward current versus voltage graph for a
related art LED and an LED according to a first embodiment.
[0017] FIG. 7 is a graph showing a reliability test for a related
art LED and an LED according to a first embodiment for a
predetermined time.
DETAILED DESCRIPTION OF THE EMBODIMENTS
[0018] Hereinafter, semiconductor light emitting devices and
methods of manufacturing the same in accordance with embodiments
will be described with reference to the accompanying drawings.
Reference will now be made in detail to the embodiments of the
present disclosure, examples of which are illustrated in the
accompanying drawings. In the following description, words "above,"
"one," "below," and "underneath" are based on the accompanying
drawings. In addition, a thickness of each layer is only
exemplarily illustrated.
[0019] FIG. 1 is a side sectional view of a semiconductor light
emitting device according to a first embodiment.
[0020] Referring to FIG. 1, a semiconductor light emitting device
100 comprises a substrate 110, a buffer layer 120, an undoped
semiconductor layer 130, a first conductive type semiconductor
layer 140, an active layer 150, a thin insulating layer 160, and a
second conductive type semiconductor layer 170.
[0021] The substrate 110 may be formed of one selected from the
group consisting of sapphire (Al.sub.2O.sub.3), GaN, Sic, ZnO, Si,
GaP, GaAs, and InP. Also, the substrate 110 may comprise a
conductive substrate. However, a material of the substrate 110
should not be limited thereto.
[0022] A nitride semiconductor is grown on the substrate 110 using
a growth device. The growth device may comprise an E-beam
evaporator, a physical vapor deposition (PVD) apparatus, a chemical
vapor deposition (CVD) apparatus, a plasma laser deposition (PLD)
apparatus, a dual-type thermal evaporator sputtering apparatus, a
metal organic chemical vapor deposition apparatus, but not limited
thereto.
[0023] The butter layer 120 is formed on the substrate 110, and the
undoped semiconductor layer 130 is disposed on the buffer layer
120. Here, the buffer layer 120 decreases a lattice constant
difference between the nitride semiconductor and the substrate 110
and may selectively comprise GaN, AlN, AlGaN, InGaN, or the like.
The undoped semiconductor layer 130 may be formed as an undoped GaN
layer and serves as a substrate for growth of a nitride
semiconductor. At least one or neither of the buffer layer 120 and
the undoped semiconductor layer 130 may be formed on the substrate
110, but not limited thereto.
[0024] The first conductive type semiconductor layer 140 is formed
on the undoped semiconductor layer 130. The first conductive type
semiconductor layer 140 may be formed as an electrode contact layer
doped with a first conductive type dopant. The first conductive
type semiconductor layer 140 may be formed as an N-type
semiconductor layer. The N-type semiconductor layer may comprise a
compound of a group III element and a group V element, for example,
a semiconductor material having a composition ratio of
In.sub.xAl.sub.yGa.sub.1-x-yN (0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1, 1.ltoreq.x+y.ltoreq.1). That is, the N-type
semiconductor layer may comprise at least one of GaN, InN, AlN,
InGaN, AlGaN, InAlGaN, and AlInN. The first conductive type dopant
is an N-type dopant, and the N-type dopant comprises Si, Ge, Sn, or
the like.
[0025] Here, a semiconductor layer doped with a dopant may be
disposed between the undoped semiconductor layer 130 and the first
conductive type semiconductor layer 140, but not limited
thereto.
[0026] The active layer 150 is formed on the first conductive type
semiconductor layer 140 and has a single quantum well structure or
a multiple quantum well structure. For example, the active layer
150 may comprise one cycle or more of a quantum well layer 151 and
a quantum barrier layer 152. The quantum well layer 151 may be
formed of InGaN, GaN, or InAlGaN, and the quantum barrier layer 152
may be formed of AlGaN, GaN, or InAlGaN, but not limited thereto. A
light emitting material of the active layer 150 may vary depending
on a light emitting wavelength such as a blue wavelength, a red
wavelength, a green wavelength, or the like.
[0027] For example, the quantum well layer 151 and the quantum
barrier layer 152 may be formed of InGaN and AlGaN, respectively,
by selectively supplying NH.sub.3, TMGa (or TEGa), trimethylindium
(TMIn), and TMAl as a source gas using N.sub.2 as a carrier gas at
a predetermined growth temperature, e.g., a temperature ranging
from about 700.degree. C. to about 950.degree. C. Here, the quantum
barrier layer 152 has an N-type semiconductor property although it
is not doped. The quantum barrier layer 152 may be disposed as the
uppermost layer of the active layer 150, but not limited
thereto.
[0028] A conductive type cladding layer (not shown) may be formed
on/under the active layer 150. The conductive type cladding layer
may be formed as an AlGaN layer.
[0029] The thin insulating layer 160 is formed on the active layer
150, and the second conductive type semiconductor layer 170 is
formed on the thin insulating layer 160. Here, the thin insulating
layer 160 is formed on the quantum barrier layer 152 of the active
layer 150.
[0030] The thin insulating layer 160 is a thin layer with an
insulating property, and may serve as a high resistive layer and a
low conductive layer compared with the second conductive type
semiconductor layer 170.
[0031] The thin insulating layer 160 may be doped with a very small
amount of a P-type dopant such as Mg, Zn, Ca, Sr, or Ba, or a group
II element. The thin insulating layer 160 may be a GaN thin
insulating layer. For example, the GaN thin insulating layer may be
formed by supplying NH.sub.3 and TMGa (or TEGa) as a source gas and
supplying a P-type dopant such as Mg at a predetermined
temperature, e.g., 900.degree. C. or more. The GaN thin insulating
layer comprises a p-type carrier concentration ranging from about
5.times.10.sup.17/cm.sup.3 to about 5.times.10.sup.18/cm.sup.3.
Here, an undoped GaN layer comprises N-type carriers of about
5.times.10.sup.16/cm.sup.3 though it is not intentionally doped.
Therefore, a very small amount of the P-type dopant is provided in
order to remove the N-type property when the GaN thin insulating
layer is grown. Accordingly, the GaN thin insulating layer can have
a insulating property.
[0032] A hole concentration of the thin insulating layer 160, (that
is, a background hole concentration) may be about b
5.times.10.sup.18/cm.sup.3 or less. The background hole
concentration means a hole concentration of the uppermost quantum
barrier layer of the active layer 150, and the hole concentration
of the thin insulating layer 160 may be the hole concentration of
the quantum barrier layer 152, that is, about
5.times.10.sup.18/cm.sup.3 or less.
[0033] The thin insulating layer 160 may be formed to a thickness
ranging from about 1 nm to about 9 nm. Since the thin insulating
layer 160 has properties of an insulating layer and a high
resistive layer, holes that move from the second conductive type
semiconductor layer 170 to the active layer 150 may move in
vertical and horizontal directions in the thin insulating layer
160. That is, since the movement speed of the holes in a horizontal
direction is higher than that in a vertical direction in the thin
insulating layer 160, the holes to move to the active layer 160 can
be blocked and diffused.
[0034] Also, although the thin insulating layer 160 is formed as
the GaN thin layer, it may be formed as an insulating layer using
at least one of compound semiconductors such as GaN, InN, AlN,
InGaN, AlGaN, InAlGaN, or AlInN.
[0035] The second conductive type semiconductor layer 170 may be
disposed as an electrode contact layer doped with a second
conductive type dopant on the thin insulating layer 160. The second
conductive type semiconductor layer 170 may be formed as a P-type
semiconductor layer, and the p-type semiconductor layer may
selectively comprise GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN,
or the like. The second conductive type dopant is a P-type dopant,
and the P-type dopant comprises Mg, Zn, Ca, Sr, Ba, or the like.
The second conductive type semiconductor layer 170 may have a
doping concentration of about 5.times.10.sup.17/cm.sup.3 or more
and a thickness ranging from about 500 .ANG. to about 1000 .ANG.,
but not limited thereto.
[0036] An N-type semiconductor layer may be disposed as a third
conductive type semiconductor layer (not shown) on the second
conductive type semiconductor layer 170. In the first embodiment,
the first conductive type semiconductor layer 140 is an N-type
semiconductor layer and the second conductive type semiconductor
layer 170 is a P-type semiconductor layer, but a reverse structure
thereof may be formed. A light emitting structure according to the
embodiments may comprise one of a P-N junction, an N-P junction, an
N-P-N junction, and a P-N-P junction.
[0037] A transparent electrode layer may be formed on the second
conductive type semiconductor layer 170, and a second electrode
layer is formed on the transparent electrode layer. Here, in the
case of an N-P-N junction structure, the transparent electrode
layer may be disposed on the third conductive type semiconductor
layer that is the N-type semiconductor layer.
[0038] In the semiconductor light emitting device 100, since the
thin insulating layer 160 is disposed between the active layer 150
and the second conductive type semiconductor layer 170, a current
scarcely flows at a low voltage of about 2.5 V or less and an
operating current using tunneling flows at only about 3 V or more.
Also, since the holes are diffused in the thin insulating layer 160
and are injected into the active layer 150, the active layer 150
can improve optical characteristics such as the internal quantum
efficiency. In addition, light can be emitted uniformly in an
entire region of the active layer 150.
[0039] FIG. 2 is a side sectional view of a semiconductor light
emitting device according to a second embodiment. Like reference
numerals refer to like elements in the first and second
embodiments, and the same descriptions thereof will be omitted.
[0040] Referring to FIG. 2, a semiconductor light emitting device
100A comprises a substrate 110, a buffer layer 120, an undoped
semiconductor layer 130, a first conductive type semiconductor
layer 140, an active layer 150, a first thin insulating layer 160,
and a second conductive type semiconductor layer 170A comprising a
second thin insulating layer 173.
[0041] The first thin insulating layer 160 is formed between the
active layer 150 and the second conductive type semiconductor layer
170A. The first embodiment may be referred to for the first thin
insulating layer 160.
[0042] The second conductive type semiconductor layer 170A
comprises a second A conductive type semiconductor layer 171, the
second thin insulating layer 173, and a second B conductive type
semiconductor layer 175. The second A conductive type semiconductor
layer 171 and the second B conductive type semiconductor layer 175
may be formed as a P-type semiconductor layer doped with a P-type
dopant. The second conductive type semiconductor layer 170A may
have a doping concentration of about 5.times.10.sup.17/cm.sup.3 and
a thickness ranging from about 500 .ANG. to about 1000 .ANG., but
not limited thereto.
[0043] The second thin insulating layer 173 may be formed between
the second A conductive type semiconductor layer 171 and the second
B conductive type semiconductor layer 175. The second thin
insulating layer 173 has an insulating property. Also, the second
thin insulating layer 173 may serve as a high resistive layer and a
low conductive layer, compared with the second A conductive type
semiconductor layer 171 and the second B conductive type
semiconductor layer 175.
[0044] The second thin insulating layer 173 is doped with a very
small amount of a P-type dopant or a group II element to have an
insulating property. Here, the second thin insulating layer 173 may
be doped with a P-type carrier concentration ranging from about
5.times.10.sup.17/cm.sup.3 to about 5.times.10.sup.18/cm.sup.3 to
have a hole concentration of about 5.times.10.sup.18/cm.sup.3 or
less. A thickness of the second thin insulating layer 173 may be
greater than about 0 nm, and less than or equal to about 9 nm.
[0045] The second thin insulating layer 173 may comprise at least
one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN,
InAlGaN, or AlInN.
[0046] The second thin insulating layer 173 diffuses holes injected
through the second B conductive type semiconductor layer 175, and
then the first thin insulating layer 160 diffuses the holes
injected through the second A conductive type semiconductor layer
171. Therefore, the holes injected into the active layer 150 can be
diffused uniformly, thereby improving the internal quantum
efficiency.
[0047] Also, each thin insulating layer may be disposed between
second conductive type semiconductor layers. In addition, the thin
insulating layer may be disposed between the second conductive type
semiconductor layer and a transparent electrode layer. The forming
position and the number of the thin insulating layer may be
modified in the scope of spirits of the embodiments.
[0048] FIG. 3 is a side sectional view of a lateral semiconductor
light emitting device using FIG. 1.
[0049] Referring to FIG. 3, a lateral semiconductor light emitting
device 100B comprises a first electrode layer 181 on the first
conductive type semiconductor layer 140 and a second electrode
layer 183 on the second conductive type semiconductor layer 170.
When a forward current is applied to the first electrode layer 181
and the second electrode layer 183, holes injected through the
second conductive type semiconductor layer 170 are diffused in the
thin insulating layer 160, and then injected into the active layer
150. Therefore, the holes can be injected uniformly in an entire
region of the active layer 150, thereby improving the internal
quantum efficiency.
[0050] FIG. 4 is a side sectional view of a vertical semiconductor
light emitting device using FIG. 1.
[0051] Referring to FIG. 4, a vertical semiconductor light emitting
device 100C comprises a reflective electrode layer 185 on the
second conductive type semiconductor layer 170 and a conductive
supporting substrate 187 on the reflective electrode layer 185. The
reflective electrode layer 185 may be formed of one selected from
Al, Ag, Pd, Rh, and Pt, and the conductive supporting substrate 187
may be formed of copper or gold, but not limited thereto.
[0052] Here, the substrate 110, the buffer layer 120, and the
undoped semiconductor layer 130 that are illustrated in FIG. 1 are
removed using a physical or/and chemical method. According to the
physical method, the substrate 110 may be separated by applying a
laser with a predetermined wavelength to the substrate 110, and the
buffer layer 120 may be removed using wet or dry etching. According
to the chemical method, the substrate 110 may be separated by
injecting an etchant into the buffer layer 120. The buffer layer
120 and the undoped semiconductor layer 130 may be removed using
chemical etching. A first electrode layer 181 may be formed under
the first conductive type semiconductor layer 140.
[0053] FIG. 5 is a reverse current versus voltage graph for a
related art LED and an LED according to the first embodiment, and
FIG. 6 is a forward current versus voltage graph for a related art
LED and an LED according to the first embodiment.
[0054] Referring to FIGS. 5 and 6, under the same voltage
condition, a forward current and a reverse current of the LED of
FIG. 1 are lower than those of the related art LED. Therefore, the
LED of FIG. 1 can decrease the leakage current.
[0055] Also, referring to FIG. 6, a current scarcely flows at a low
voltage, e.g., about 2 V or less, and flows at about 3 V, which is
an operating voltage of the LED, or more. That is, a current flows
by tunneling at about 3 V or more in the LED of FIG. 1.
[0056] FIG. 7 is a graph showing a reliability test for a related
art LED and an LED according to the first embodiment for a
predetermined time.
[0057] Referring to FIG. 7, a current constantly flows for a long
time in the LED according to the first embodiment, thereby
improving the reliability, compared with the related art LED.
[0058] In descriptions of the embodiments, it will be understood
that when a layer (or film), a region, a pattern, or components is
referred to as being `on` or `under` another substrate, layer (or
film), region, or patterns, it can be directly on the other layer
or substrate, or intervening layers may also be present. Also, in
the descriptions of the embodiments, sizes of elements illustrated
in drawings are one example, and the present disclosure is not
limited to the illustrated drawings.
[0059] Although embodiments have been described with reference to a
number of illustrative embodiments thereof, it should be understood
that numerous other modifications and embodiments can be devised by
those skilled in the art that will fall within the spirit and scope
of the principles of this disclosure. More particularly, various
variations and modifications are possible in the component parts
and/or arrangements of the subject combination arrangement within
the scope of the disclosure, the drawings and the appended claims.
In addition to variations and modifications in the component parts
and/or arrangements, alternative uses will also be apparent to
those skilled in the art.
* * * * *