U.S. patent application number 12/219007 was filed with the patent office on 2008-11-20 for silicon carbide semiconductor device having high channel mobility and method for manufacturing the same.
This patent application is currently assigned to DENSO CORPORATION. Invention is credited to Takeshi Endo, Jun Kawai, Eiichi Okuno, Kensaku Yamamoto, Tsuyoshi Yamamoto.
Application Number | 20080283845 12/219007 |
Document ID | / |
Family ID | 37802808 |
Filed Date | 2008-11-20 |
United States Patent
Application |
20080283845 |
Kind Code |
A1 |
Endo; Takeshi ; et
al. |
November 20, 2008 |
Silicon carbide semiconductor device having high channel mobility
and method for manufacturing the same
Abstract
A silicon carbide semiconductor device having a MOS structure
includes: a substrate; a channel area in the substrate; a first
impurity area; a second impurity area; a gate insulating film on
the channel area; and a gate on the gate insulating film. The
channel area provides an electric current path. The channel area
and the gate insulating film have an interface therebetween. The
interface includes a dangling bond, which is terminated by a
hydrogen atom or a hydroxyl. The interface has a hydrogen
concentration equal to or larger than 2.6.times.10.sup.20
cm.sup.-3.
Inventors: |
Endo; Takeshi; (Obu-city,
JP) ; Yamamoto; Tsuyoshi; (Kariya-city, JP) ;
Kawai; Jun; (Anjo-city, JP) ; Yamamoto; Kensaku;
(Chiryu-city, JP) ; Okuno; Eiichi; (Mizuho-city,
JP) |
Correspondence
Address: |
POSZ LAW GROUP, PLC
12040 SOUTH LAKES DRIVE, SUITE 101
RESTON
VA
20191
US
|
Assignee: |
DENSO CORPORATION
Kariya-city
JP
|
Family ID: |
37802808 |
Appl. No.: |
12/219007 |
Filed: |
July 15, 2008 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11511236 |
Aug 29, 2006 |
|
|
|
12219007 |
|
|
|
|
Current U.S.
Class: |
257/77 ;
257/E29.072 |
Current CPC
Class: |
H01L 29/78 20130101;
H01L 21/049 20130101; H01L 29/7838 20130101; H01L 29/518 20130101;
H01L 29/66068 20130101; H01L 29/7828 20130101; H01L 29/513
20130101; H01L 29/0847 20130101; H01L 29/045 20130101 |
Class at
Publication: |
257/77 ;
257/E29.072 |
International
Class: |
H01L 29/15 20060101
H01L029/15 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 31, 2005 |
JP |
2005-251365 |
Jun 12, 2006 |
JP |
2006-162448 |
Claims
1. A silicon carbide semiconductor device having a MOS structure
comprising: a substrate made of silicon carbide; a channel area for
providing an electric current path, wherein the channel area is
made of silicon carbide and disposed in the substrate; a first
impurity area disposed on an upstream side of the electric current
path; a second impurity area disposed on a downstream side of the
electric current path; a gate insulating film disposed on a surface
of the channel area; and a gate disposed on the gate insulating
film, wherein the channel area provides the electric current path
as a channel by controlling a voltage applied to the gate so that
an electric current in the electric current path flowing between
the first impurity area and the second impurity area is controlled,
the channel area and the gate insulating film have an interface
therebetween, the interface includes a dangling bond, which is
terminated by a hydrogen atom or a hydroxyl, and the interface has
a hydrogen concentration equal to or larger than
2.6.times.10.sup.20 cm.sup.-3.
2. The silicon carbide semiconductor device according to claim 1,
wherein the interface includes another dangling bond, which is
terminated by a nitrogen atom.
3. The silicon carbide semiconductor device according to claim 1,
wherein the substrate has a main surface, which is provided by a
(11-20)-plane.
4. The silicon carbide semiconductor device according to claim 1,
wherein the hydrogen atom terminating the dangling bond has a
desorbing amount, which represents a maximum peak in a range
between 800.degree. C. and 900.degree. C.
5-49. (canceled)
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is based on Japanese Patent Applications
No. 2005-251365 filed on Aug. 31, 2005, and No. 2006-162448 filed
on Jun. 12, 2006, the disclosures of which are incorporated herein
by reference.
FIELD OF THE INVENTION
[0002] The present invention relates to a silicon carbide
semiconductor device having high channel mobility and a method for
manufacturing the same.
BACKGROUND OF THE INVENTION
[0003] It is conventionally disclosed in U.S. Pat. No. 6,764,963
that the channel mobility in the MOS structure can be improved by
performing processing in hydrogen anneal or a wet atmosphere in the
SiC semiconductor device in which face a set to a (11-20)-plane in
the plane azimuth of a crystal face is used in a channel.
Concretely, it is intended that the channel mobility is improved by
selecting concentration or temperature of the hydrogen anneal or
the wet atmosphere.
[0004] However, it is not still sufficient in the channel mobility
obtained in a technique shown in U.S. Pat. No. 6,764,963, and it is
expected to intend a further improvement of the channel
mobility.
SUMMARY OF THE INVENTION
[0005] In view of the above-described problem, it is an object of
the present disclosure to provide a silicon carbide semiconductor
device having high channel mobility. It is another object of the
present disclosure to provide a method for manufacturing a silicon
carbide semiconductor device having high channel mobility.
[0006] According to a first aspect of the present disclosure, a
silicon carbide semiconductor device having a MOS structure
includes: a substrate made of silicon carbide; a channel area for
providing an electric current path, wherein the channel area is
made of silicon carbide and disposed in the substrate; a first
impurity area disposed on an upstream side of the electric current
path; a second impurity area disposed on a downstream side of the
electric current path; a gate insulating film disposed on a surface
of the channel area; and a gate disposed on the gate insulating
film. The channel area provides the electric current path as a
channel by controlling a voltage applied to the gate so that an
electric current in the electric current path flowing between the
first impurity area and the second impurity area is controlled. The
channel area and the gate insulating film have an interface
therebetween. The interface includes a dangling bond, which is
terminated by a hydrogen atom or a hydroxyl. The interface has a
hydrogen concentration equal to or larger than 2.6.times.10.sup.20
cm.sup.-3.
[0007] The above device is characterized in that dangling bond of
an interface of the channel area and the gate insulating film is
terminated by an element of H or OH, and hydrogen concentration at
the interface is set to 2.6.times.10.sup.20 cm.sup.-3 or more.
Thus, if the dangling bond of the interface of the channel area and
the gate insulating film is terminated by the element of H or OH,
and the hydrogen concentration at the interface is set to a high
value of 2.6.times.10.sup.20 cm.sup.-3 or more, it is possible to
set a silicon carbide semiconductor device of high channel
mobility.
[0008] According to a second aspect of the present disclosure, a
method for manufacturing a silicon carbide semiconductor device
having a MOS structure is provided. The method includes steps of:
preparing a substrate made of silicon carbide; forming a channel
area on the substrate, wherein the channel area is made of silicon
carbide, and provides an electric current path; forming a first
impurity area on an upstream side of the electric current path;
forming a second impurity area on a downstream side of the electric
current path; forming a gate insulating film on a surface of the
channel area; forming a gate on the gate insulating film; and
heating and cooling the substrate. The channel area provides the
electric current path as a channel by controlling a voltage applied
to the gate so that an electric current in the electric current
path flowing between the first impurity area and the second
impurity area is controlled. In the step of heating and cooling the
substrate, the substrate is cooled in a wet atmosphere or a
hydrogen atmosphere in a temperature range between 800.degree. C.
and 900.degree. C. so that a dangling bond of an interface between
the gate insulating film and the channel area is terminated by a
hydrogen atom or a hydroxyl.
[0009] The above method is characterized in that a heat treatment
process is included, and a wet atmosphere or a hydrogen atmosphere
is continuously maintained in a temperature area of 800 to
900.degree. C. at a temperature lowering time in the heat treatment
process so as to terminate dangling bond of an interface of the
gate insulating film and the channel area by an element of H or OH.
Thus, at the temperature lowering time in the heat treatment
process, the wet atmosphere or the hydrogen atmosphere is
continuously maintained in the temperature area of 800 to
900.degree. C. as the termination-desorption temperature, and
temperature is lowered until the termination-desorption temperature
or less. Therefore, the dangling bond of the interface of the gate
insulating film and the channel area can be terminated by the
element of H or OH. Therefore, the silicon carbide semiconductor
device of high channel mobility can be set.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The above and other objects, features and advantages of the
present invention will become more apparent from the following
detailed description made with reference to the accompanying
drawings. In the drawings:
[0011] FIG. 1 is a cross sectional view showing the sectional
construction of an inversion type lateral MOSFET to which a first
embodiment mode of the present invention;
[0012] FIGS. 2A to 2C are cross sectional views showing
manufacturing processes of the inversion type lateral MOSFET shown
in FIG. 1;
[0013] FIGS. 3A to 3C are cross sectional views showing
manufacturing processes of the inversion type lateral MOSFET
subsequent to FIGS. 2A to 2C;
[0014] FIG. 4 is a graph schematically showing atmosphere and
temperature controls of a gate oxide film forming process;
[0015] FIG. 5 is a typical schematic view showing a situation in
which dangling bond of the interface of a gate oxide film 6 and a p
type base layer 2 constituting a channel area is terminated by an
element of H or OH;
[0016] FIG. 6 is a cross sectional view showing a manufacturing
process of an inversion type lateral MOSFET shown in a second
embodiment mode of the present invention;
[0017] FIG. 7 is a graph schematically showing atmosphere and
temperature controls of the round-off oxidation process of the
gate;
[0018] FIGS. 8A and 8B are cross sectional views showing
manufacturing processes of an inversion type lateral MOSFET shown
in a third embodiment mode of the present invention;
[0019] FIG. 9 is a graph schematically showing atmosphere and
temperature controls of the reflow process of the interlayer
insulating film;
[0020] FIG. 10 is a cross sectional view showing the sectional
construction of an accumulation type lateral MOSFET to which a
fourth embodiment mode of the present invention;
[0021] FIGS. 11A to 11D are cross sectional views showing
manufacturing processes of the accumulation type lateral MOSFET
shown in FIG. 10;
[0022] FIGS. 12A to 12C are cross sectional views showing
manufacturing processes of the accumulation type lateral MOSFET
subsequent to FIGS. 11A to 11D;
[0023] FIGS. 13A to 13C are cross sectional views showing
manufacturing processes of the accumulation type lateral MOSFET
subsequent to FIGS. 12A to 12C;
[0024] FIG. 14 is a cross sectional view showing the sectional
construction of a planar type MOSFET to which a fifth embodiment
mode of the present invention;
[0025] FIGS. 15A to 15D are cross sectional views showing
manufacturing processes of the planar type MOSFET shown in FIG.
14;
[0026] FIGS. 16A to 16C are cross sectional views showing
manufacturing processes of the planar type MOSFET subsequent to
FIGS. 15A to 15D;
[0027] FIGS. 17A to 17C are cross sectional views showing
manufacturing processes of the planar type MOSFET subsequent to
FIGS. 16A to 16C;
[0028] FIGS. 18A to 18C are cross sectional views showing
manufacturing processes of the planar type MOSFET subsequent to
FIGS. 17A to 17C;
[0029] FIGS. 19A to 19C are cross sectional views showing
manufacturing processes of the planar type MOSFET subsequent to
FIGS. 18A to 18C;
[0030] FIG. 20 is a cross sectional view showing the sectional
construction of an inversion type lateral MOSFET to which a sixth
embodiment mode of the present invention;
[0031] FIGS. 21A to 21C are cross-sectional views showing
manufacturing processes of the inversion type lateral MOSFET shown
in FIG. 20;
[0032] FIGS. 22A and 22B are cross-sectional views showing
manufacturing processes of the inversion type lateral MOSFET
subsequent to FIGS. 21A to 21C;
[0033] FIG. 23 is a graph schematically showing atmosphere and
temperature controls of a gate oxide film forming process shown in
another embodiment mode;
[0034] FIG. 24 is a graph schematically showing atmosphere and
temperature controls of the gate oxide film forming process shown
in another embodiment mode;
[0035] FIGS. 25A and 25B are graphs showing results in which the
relation of channel mobility with respect to a gate voltage and the
magnitude of a drain electric current is examined;
[0036] FIG. 26A is a cross-sectional view of a MOS capacitor as a
sample used in an experiment, and FIG. 26B is a graph showing the
relation of switching temperature of an atmosphere and interface
state density;
[0037] FIGS. 27A and 27B are graphs respectively showing hydrogen
concentrations in the vicinity of the interface of SiC and a gate
oxide film (SiO.sub.2) in MOSFET manufactured by a conventional
technique and a consideration technique;
[0038] FIG. 28 is a graph showing the relation of anneal
temperature and channel mobility;
[0039] FIG. 29A is a graph showing results in which desorption
temperature of deuterium is analyzed by a thermal desorption
spectroscopy analysis, and FIG. 29B is a graph showing results in
which desorption temperature of heavy water is analyzed by the
thermal desorption spectroscopy analysis;
[0040] FIG. 30 is a graph showing examination results of hydrogen
concentration when anneal temperature is set to 1000.degree. C. and
an anneal process is performed for 10 minutes;
[0041] FIG. 31 is a graph showing results in which the relation of
channel mobility with respect to the gate voltage and the magnitude
of the drain electric current is examined;
[0042] FIG. 32 is a graph showing examination results of anneal
temperature dependence of channel mobility.
[0043] FIG. 33 is a graph showing results in which the channel
mobility with respect to the gate voltage and the magnitude of the
drain electric current are examined with respect to MOSFET
performing Ar anneal processing of 700.degree. C.;
[0044] FIG. 34 is a graph showing evaluation results of the channel
mobility of the lateral type MOSFET;
[0045] FIG. 35 is a graph showing results in which the channel
mobility with respect to the gate voltage and the magnitude of the
drain electric current are examined when wet anneal is performed at
900.degree. C.;
[0046] FIG. 36 is a graph showing results in which the relation of
the channel mobility with respect to the gate voltage and the
magnitude of the drain electric current is examined;
[0047] FIG. 37 is a graph showing results in which the relation of
the channel mobility with respect to the gate voltage and the
magnitude of the drain electric current is examined; and
[0048] FIG. 38A is a graph showing drain voltage (VD)-drain
electric current (ID) characteristics, and FIG. 38B is a graph
showing blocking characteristics.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0049] To study a silicon carbide semiconductor device having high
channel mobility, the present inventors have considered channel
mobility when a gate oxide film is formed in a wet atmosphere and
wet anneal or hydrogen anneal is performed. Thus, it has been
confirmed that no sufficient channel mobility can be obtained by
merely forming the gate oxide film at a predetermined concentration
or a predetermined temperature in the wet atmosphere, or merely
performing the hydrogen anneal at a predetermined concentration or
a predetermined temperature.
[0050] It is effective to improve the channel mobility that
interface state density at an interface of SiC and the gate oxide
film in a MOS structure is reduced. It is considered to reduce the
interface state density in this way that dangling bond of the
interface of SiC and the gate oxide film is terminated by an
element of H or OH. Concretely, channel mobility can be improved
when a state in which H or OH enters a defective portion of a lower
layer portion abutting on SiC among the gate oxide film is
held.
[0051] The present inventors have eagerly taken considerations so
as to realize such a structure. Thus, it has been confirmed that
temperature for terminating the dangling bond of the interface of
SiC and the gate oxide film by H or OH, in other words, desorbing
temperature (hereinafter called termination-desorption temperature)
is determined. It has been also confirmed that it is important to
realize the above structure whether or not it attains an atmosphere
for desorbing no H or OH at this termination-desorption
temperature.
[0052] Namely, H or OH is terminated and desorbed at the
termination-desorption temperature. Therefore, the desorption is
caused if it is under a situation in which the desorption has an
advantage over the termination at this temperature. In contrast to
this, the desorption can be prevented if it is under a situation in
which the termination has an advantage over the desorption.
[0053] Therefore, if no wet atmosphere is formed in attaining the
termination-desorption temperature even when gate oxidation is
performed in the wet atmosphere, H or OH is desorbed from the
dangling bond so that the above structure cannot be realized.
Further, if no hydrogen atmosphere is always set under temperature
exceeding the termination-desorption temperature even when the
hydrogen anneal is performed, H or OH is desorbed and the above
structure cannot be finally realized.
[0054] Therefore, the present inventors manufactured an inversion
type lateral MOSFET of 10 .mu.m in channel length and 70 .mu.m in
channel width in a SiC substrate having face a, i.e., a
(11-20)-plane as a main surface by using a conventional technique
and a consideration technique for maintaining the wet atmosphere
until the termination-desorption temperature or less at a
temperature lowering time when the gate oxide film was formed by
the wet oxidation. The present inventors also examined electric
field effect channel mobility (hereinafter called channel mobility)
with respect to a gate voltage and the magnitude of a drain
electric current.
[0055] Concretely, the gate oxide film is formed by performing the
wet oxidation for 80 minutes at 1080.degree. C. as the conventional
technique. Thereafter, it is switched from the wet atmosphere to an
N.sub.2 atmosphere, and temperature is lowered at 10.degree. C./min
until 600.degree. C., and MOSFET is manufactured, and channel
mobility, etc. are examined. Further, as the consideration
technique, the gate oxide film is formed by performing wet
oxidation similar to that in the conventional case. At a
temperature lowering time of this gate oxide film forming process,
temperature is lowered at 10.degree. C./min until 600.degree. C.
while the wet atmosphere is maintained. MOSFET is then manufactured
and channel mobility, etc. are examined. As its result, results
shown in FIGS. 25A and 25B have been obtained.
[0056] As shown in FIG. 25A, channel mobility is very small in the
case of the conventional technique. This shows that no sufficient
channel mobility can be obtained by merely forming the gate oxide
film in the wet atmosphere.
[0057] In contrast to this, as shown in FIG. 25B, in the case of
the consideration technique, channel mobility is high and the drain
electric current becomes large. It is considered from these results
that it is possible to prevent desorption from having an advantage
over the termination of H or OH from the dangling bond and prevent
the desorption by setting a state for maintaining the wet
atmosphere in lowering temperature until 600.degree. C. supposed as
the termination-desorption temperature or less.
[0058] In an experiment made here, the wet atmosphere is maintained
until 600.degree. C. at the temperature lowering time of the gate
oxide film forming process, and is then switched to the nitrogen
atmosphere on the basis of the following experimental results.
[0059] FIG. 26A is a cross-sectional view of a MOS capacitor as a
sample used in the experiment. FIG. 26B shows the relation of
switching temperature of the atmosphere and the interface state
density.
[0060] As shown in FIG. 26A, an n type epitaxial layer 101 having
1.times.10.sup.16 cm.sup.-3 in impurity concentration is formed on
an n.sup.+ type layer 100. A gate oxide film 102 is formed by
performing gate oxidation in a substrate having a surface set to
face a. In the gate oxidation at this time, temperature is raised
until 1080.degree. C. in the nitrogen atmosphere, and the nitrogen
atmosphere is then switched to the wet atmosphere and the wet
oxidation is performed for 80 minutes, and temperature is lowered
at 10.degree. C./min in the wet atmosphere as it is. At this time,
the switching temperature from the wet atmosphere to the nitrogen
atmosphere is changed to 1080.degree. C., 800.degree. C. and
600.degree. C. Ni 103 and Ni 104 having 500 nm in thickness are
then evaporated on front and rear faces. Thereafter, Ni is
patterned so as to have .PHI. 500 .mu.m so that a MOS capacitor is
constructed.
[0061] The interface state density (D.sub.it) of each MOS capacitor
changed with respect to the switching temperature is then
evaluated. As a result, it has been confirmed that the interface
state density is reduced by lowering the switching temperature from
the wet atmosphere at the temperature lowering time to the nitrogen
atmosphere. Thus, the interface state density can be reduced in
accordance with the switching temperature from the wet atmosphere
to the nitrogen atmosphere, and channel mobility can be improved.
Therefore, in the above embodiment mode, the wet atmosphere is
maintained until 600.degree. C. at the temperature lowering time of
the gate oxide film forming process, and is then switched to the
nitrogen atmosphere.
[0062] Hydrogen concentrations of the interface are compared by an
SIMS analysis to verify termination effects of the dangling bond
using H or OH in the above experiment. FIGS. 27A and 27B are views
showing the hydrogen concentrations near the interface of SiC and
the gate oxide film (SiO.sub.2) in MOSFETs manufactured by the
conventional technique and the consideration technique.
[0063] As shown in these figures, when the hydrogen concentrations
at the interface of SiC and the gate oxide film are compared, the
hydrogen concentration is about 1.3.times.10.sup.20 cm.sup.-3 in
accordance with the conventional technique. In contrast to this,
the hydrogen concentration is about 2.6.times.10.sup.20 cm.sup.-3
in accordance with the consideration technique. Therefore, it is
understood that the hydrogen concentration of the consideration
technique is therefore about twice the hydrogen concentration of
the conventional technique. Namely, the dangling bond can be
terminated by an element of H or OH by adopting the consideration
technique in comparison with the conventional technique. It can be
said from these contents that channel mobility is improved by
raising the hydrogen concentration at the interface, i.e., by
terminating the dangling bond by the element of H or OH.
[0064] Thus, the dangling bond at the interface of SiC and the gate
oxide film can be terminated by H or OH by continuing the wet
atmosphere until at least the termination-desorption temperature or
less at the temperature lowering time in forming the gate oxide
film.
[0065] On the other hand, it can be said from a way of thinking
similar to such knowledge that the gate oxide film is formed by a
technique different from the wet oxidation using the wet
atmosphere, and the atmosphere is switched to the wet atmosphere at
only the temperature lowering time, and the dangling bond of the
interface of SiC and the gate oxide film can be also terminated by
H or OH at the temperature lowering time.
[0066] For example, the gate oxide film is formed by performing
oxidation in a dry atmosphere, an N.sub.2O atmosphere, an NO
atmosphere, an ozone atmosphere, an H.sub.2O radical atmosphere,
etc., or depositing LTO, TEOS, HTO, etc. by CVD, etc. At this time,
the interior of a chamber for forming the gate oxide film attains a
high temperature state. Therefore, the atmosphere is switched to
the wet atmosphere by introducing H.sub.2O from this state into the
chamber, and temperature is lowered until the
termination-desorption temperature or less.
[0067] Here, the explanation has been made with respect to the case
in which the gate insulating film is constructed by an oxide film.
However, when this technique is used, the gate insulating film can
be also constructed by an insulating film of another kind. For
example, HfO.sub.2, HfSiON, HfAlO, Al.sub.2O.sub.3,
Ta.sub.2O.sub.5, Si.sub.3N.sub.4, etc. are enumerated.
[0068] Similarly, similar matters may be also separately performed
by an anneal process after the gate oxide film forming process
without terminating the dangling bond of the interface of SiC and
the gate oxide film by H or OH at the temperature lowering time in
forming the gate oxide film (gate insulating film). If both these
matters are performed, the dangling bond of the interface of SiC
and the gate oxide film can be more terminated by H or OH so that
channel mobility can be also more improved.
[0069] Next, the wet atmosphere is maintained until the temperature
lowering time of the gate oxide film forming process, and the gate
oxide film is formed as mentioned above to analyze the above
termination-desorption temperature. Thereafter, anneal is performed
at various temperatures within an Ar atmosphere causing no
termination of the dangling bond due to H or OH. FIG. 28 shows its
experimental results.
[0070] FIG. 28 shows the relation of anneal temperature and channel
mobility by using MOSFET of a structure used in an experiment of
FIGS. 25A and 25B. This figure also shows the above relation when
no anneal process is performed at all as a reference.
[0071] As shown in this figure, when no anneal process is performed
at all, channel mobility becomes a large value of 179
cm.sup.2/Vs.
[0072] In contrast to this, the case that the anneal process is
performed will be seen. When the anneal temperature is 600 to
700.degree. C., channel mobility is increased in comparison with
the case that no anneal process is performed at all. Channel
mobility reaches 205 cm.sup.2/Vs at 700.degree. C. When the anneal
temperature is 800.degree. C., channel mobility becomes 199
cm.sup.2/Vs, and begins to be reduced. As the anneal temperature is
raised from this temperature, channel mobility is suddenly reduced.
When the anneal temperature becomes 1000.degree. C., it is
understood that channel mobility approximately becomes a value
close to zero.
[0073] It can be confirmed from this result that the desorption of
H or OH is mainly caused at 800 to 900.degree. C., and is advanced
at these temperatures or more. The dangling bond due to H or OH is
terminated in the same temperature area as the desorption.
Accordingly, it is considered that the termination-desorption
temperature is mainly 800 to 900.degree. C. Further, it can be
confirmed that channel mobility is increased in comparison with a
sample in which no anneal is performed until the anneal of
800.degree. C. Accordingly, channel mobility can be further
improved by performing the anneal of 800.degree. C. or less,
preferably, 700.degree. C. or less after the gate oxide film
formation.
[0074] Further, a thermal desorption spectroscopy analysis is made
to specify the termination-desorption temperature in detail.
Concretely, the temperature of a substrate forming the gate oxide
film within a vacuum chamber is raised by laser heating, and a
desorbed element is examined by a mass spectrometer. Thus,
desorption gas and desorption temperature can be specified in
detail.
[0075] However, a large amount of hydrogen also exists within the
atmospheric air. Therefore, it becomes difficult to distinguish
this hydrogen and a very small amount of hydrogen of the MOS
interface. Therefore, deuterium (D) as an isotope of hydrogen
almost not existing within the atmospheric air is used in a
termination element of the dangling bond, and a technique for
analyzing this deuterium is used. Since hydrogen and deuterium are
isotopes, it is considered that natures relating to the termination
and the desorption are almost the same.
[0076] A concrete manufacturing method of an analyzing sample will
next be described. First, a 4H--SiC substrate of an n type having a
main surface set to a (11-20)-plane is used as a substrate. Wet
oxidation is performed by bubbling heavy water (D.sub.2O) by a
bubbling oxidation method with respect to this substrate so that a
gate oxide film is formed. In a forming recipe of the gate oxide
film, H.sub.2O in FIG. 4 described later is changed to D.sub.2O.
The thermal desorption spectroscopy analysis is then made by this
sample. The analyzing element is set to D.sub.2 and D.sub.2O.
D.sub.2 is formed by bonding desorbed D, and D.sub.2O is formed by
bonding desorbed OD to D, and the analysis is made by supposing
D.sub.2O of moisture within the insulating film.
[0077] FIG. 29A is a graph showing an analyzing result relative to
D.sub.2 (M/z=4) spectrum. FIG. 29B is a graph showing an analyzing
result relative to D.sub.2O (M/z=20) spectrum. The axis of ordinate
in each of these figures shows electric current intensity of the
mass spectrometer. The graph described as a background in each of
these figures shows the analyzing result in a state in which there
is no sample. Amounts provided by subtracting background amounts
from the graphs of the analyzing results of D.sub.2 and D.sub.2O
show pure mass analyzing amounts of D.sub.2 and D.sub.2O.
[0078] As shown in FIG. 29A, the desorption of D.sub.2 is generated
at 700.degree. C. to 1000.degree. C., and a peak of the desorption
is particularly shown at 800.degree. C. to 900.degree. C. and very
preferable conformity to temperature for reducing channel mobility
is shown. Thus, it is possible to specify that the
termination-desorption temperature of the dangling bond of H or OH
is 700.degree. C. to 1000.degree. C., particularly, 800.degree. C.
to 900.degree. C. On the other hand, as shown in FIG. 29B, the
desorption of D.sub.2O is generated at 600.degree. C. to
800.degree. C., and a peak of the desorption is particularly shown
at 600.degree. C. to 700.degree. C. This corresponds to the
improvement of channel mobility until the anneal of 700.degree. C.
or less, or 800.degree. C. or less. It is considered from these
contents that the termination element of the dangling bond
contributing to channel mobility is mainly hydrogen. Further, it is
also considered that the anneal processing for removing moisture
within the gate insulating film contributes to the improvement of
channel mobility.
[0079] FIG. 30 shows results in which hydrogen concentration is
examined when anneal temperature is set to 1000.degree. C. and an
Ar anneal process is performed for 10 minutes in such an experiment
as a reference. As shown in this figure, the hydrogen concentration
of the interface of SiC and the gate oxide film is reduced in
comparison with the case shown in FIG. 27B. Thus, it can be
confirmed that H or OH is desorbed from the dangling bond of the
interface of SiC and the gate oxide film.
[0080] The following matters can be said from this result to
perform the anneal process in which the termination has an
advantage over the desorption of H or OH. Namely, the anneal
temperature is set to the termination-desorption temperature or
more. Further, while an atmosphere for terminating the dangling
bond by H or OH at the time of the termination-desorption
temperature or more is set, this atmosphere is continuously
maintained until the termination-desorption temperature or less is
attained at the temperature lowering time of the anneal
process.
[0081] Accordingly, it is preferable to perform the anneal process
in which the anneal temperature is set to 800.degree. C. or more,
and the atmosphere for terminating the dangling bond by H or OH is
always continuously set when the anneal temperature becomes
800.degree. C. or more (preferably, 700.degree. C. or more).
[0082] The termination-desorption temperature explained here is
also similarly set with respect to the temperature lowering time in
the gate oxide film forming process. Namely, if the wet atmosphere
is continuously maintained during 800 to 900.degree. C. at the
temperature lowering time, preferably from 1000.degree. C. or more
to 700.degree. C. or less, it is possible to maintain a state in
which the dangling bond of the interface of SiC and the gate oxide
film is also terminated by H or OH after the gate oxide film
forming process.
[0083] Subsequently, on the basis of obtaining of the result of a
high terminating effect of the dangling bond due to H or OH at 800
to 900.degree. C. as mentioned above, an anneal effect in this
temperature area is verified.
[0084] Concretely, the verification is performed by manufacturing
the MOSFET of a structure used in the experiment of FIGS. 25A and
25B. In this case, when the MOSFET of the structure used in the
experiment of FIGS. 25A and 25B is manufactured, the wet atmosphere
is continuously maintained until the termination-desorption
temperature, and the gate oxide film is formed. A polysilicon film
provided by doping n type impurities on this gate oxide film is
formed and is then patterned so that a gate electrode is formed and
the anneal processing using the wet atmosphere is performed. The
annealing processing also provides the round-off oxidation process
for rounding a corner of the gate poly silicon film. Temperatures
at anneal starting and stopping times are set to 600.degree. C.,
and temperature is raised and lowered in a temperature gradient of
10.degree. C./min, and the anneal process is performed for 120
minutes at a highest temperature of 850.degree. C. With respect to
the MOSFET via such a process, channel mobility with respect to a
gate voltage and the magnitude of a drain electric current are
examined so that results shown in FIG. 31 are obtained.
[0085] As can be seen from this figure, channel mobility becomes
196 cm.sup.2/Vs. Namely, first, channel mobility is improved by
forming the gate oxide film by continuously maintaining the wet
atmosphere until the termination-desorption temperature. Further,
high channel mobility can be maintained by performing the anneal
processing in the wet atmosphere, and channel mobility can be also
further raised.
[0086] In particular, in a state in which the interface of SiC and
the gate oxide film is covered with the gate electrode as after the
gate electrode is formed, the thickness of a layer covering the
interface is increased and the gate electrode plays a role as a cap
layer. Therefore, when the anneal processing is performed under a
situation in which the termination of the dangling bond due to H or
OH has an advantage over the desorption, the dangling bond can be
terminated by H or OH while the desorption of H or OH is further
prevented by the cap layer. Therefore, there is a high possibility
that channel mobility is further raised. In particular, when the
gate electrode is polysilicon, hydrogen is generated by an
oxidizing reaction in the wet atmosphere, and contributes to the
dangling bond termination. Therefore, there is a high possibility
that channel mobility is further raised.
[0087] Similar to FIG. 28, FIG. 32 shows results in which anneal
temperature dependence within an Ar atmosphere of channel mobility
is examined with respect to MOSFET performing round-off oxidation.
Similarly, channel mobility is improved until 700.degree. C., and
reaches 216 cm.sup.2/Vs at its maximum at 700.degree. C. When the
anneal temperature is 800.degree. C., channel mobility becomes 196
cm.sup.2/Vs, and begins to be reduced. As the anneal temperature is
raised from this temperature, channel mobility is suddenly reduced.
When the anneal temperature becomes 1000.degree. C., it is
understood that channel mobility approximately becomes a value
close to zero. It can be specified from this result that the
termination-desorption temperature of the dangling bond of H or OH
is 700.degree. C. to 1000.degree. C., particularly, 800.degree. C.
to 900.degree. C. Further, it is also possible to confirm that
moisture removing anneal of 800.degree. C. or less, preferably,
700.degree. C. or less is effective to improve channel
mobility.
[0088] FIG. 33 is a view showing results in which channel mobility
with respect to a gate voltage and the magnitude of a drain
electric current are examined with respect to the MOSFET performing
the round-off oxidation and the Ar anneal at 700.degree. C. in this
way. Channel mobility becomes 216 cm.sup.2/VS.
[0089] Further, temperature dependence of the anneal processing
(wet anneal) in the wet atmosphere is considered to realize high
channel mobility. Concretely, the lateral type MOSFET is
manufactured and examined as follows.
[0090] In the gate insulating film forming process, a TEOS film
having 100 nm is formed at 680.degree. C. by using an LPCVD device,
and the wet anneal is then performed. In the wet anneal,
temperature is raised at 10.degree. C./min in the wet atmosphere
from 600.degree. C., and is held for 10 minutes at the wet anneal
temperature. Thereafter, temperature is lowered at 10.degree.
C./min until 600.degree. C. in the wet atmosphere as it is. The wet
anneal temperature is set to four levels of 1080.degree. C.,
1000.degree. C., 950.degree. C. and 900.degree. C. Round-off
oxidation processing of 850.degree. C. is also further performed at
all levels to raise channel mobility.
[0091] FIG. 34 is a view showing an evaluation result of channel
mobility of the lateral type MOSFET manufactured as mentioned
above. As shown in this figure, it is understood that channel
mobility is raised as temperature is close to 800 to 900.degree. C.
as the termination-desorption temperature. It is also understood
that channel mobility is lowered as the temperature of the wet
anneal is raised. It can be the from this result that there is a
high possibility that the termination effect of the dangling bond
is raised as the wet anneal temperature is close to 700 to
1000.degree. C. (particularly, 800 to 900.degree. C.) as the
termination-desorption temperature. Accordingly, it is preferable
to set the wet anneal or wet oxidation temperature to 700 to
1000.degree. C. as the termination-desorption temperature,
particularly, 800 to 900.degree. C.
[0092] FIG. 35 is a view showing results in which channel mobility
with respect to the gate voltage and the magnitude of the drain
electric current are examined when the wet anneal is performed at
900.degree. C. Channel mobility becomes a very high value of 244
cm.sup.2/Vs.
[0093] Subsequently, the MOSFET of a structure used in the
experiment of FIGS. 25A and 25B is also manufactured and verified
with respect to a case (hydrogen anneal) using a hydrogen
atmosphere instead of the wet atmosphere. When the MOSFET of the
structure used in the experiment of FIGS. 25A and 25B is
manufactured, the gate oxide film is formed by a recipe of FIG. 4
described later, and the hydrogen anneal is performed after the
gate oxide film is formed. In a condition of the hydrogen anneal,
temperature is raised at 10.degree. C./min from 600.degree. C. to
900.degree. C. in the hydrogen atmosphere, and is held for 30
minutes at 900.degree. C. within the hydrogen atmosphere.
Thereafter, temperature is lowered until 600.degree. C. at
10.degree. C./min in the hydrogen atmosphere as it is. As a result
of the evaluation of channel mobility of the completed MOSFET, a
channel mobility of 186 cm.sup.2/Vs is obtained and no
deterioration of characteristics is caused. It can be said from
this result that effects similar to those obtained by performing
anneal in the wet atmosphere can be also obtained when the hydrogen
anneal is performed.
[0094] Further, in the above description, the atmosphere of the
gate oxide film forming process, or the atmosphere of the anneal
processing is considered from the view point that the dangling bond
of the interface of SiC and the gate oxide film is terminated by H
or OH. However, when a device process design is made, for example,
there is also a case in which a heat treatment process of high
temperature exceeding 850.degree. C. is performed as in an
interlayer insulating film reflow, etc. This case is also
considered by manufacturing the MOSFET of the structure used in the
experiment of FIGS. 25A and 25B.
[0095] Concretely, when the MOSFET of the structure used in the
experiment of FIGS. 25A and 25B is manufactured, the wet anneal
also performing the round-off oxidation of polysilicon constituting
the gate is performed for 120 minutes at 850.degree. C., and
starting and stopping temperatures of the wet atmosphere are set to
600.degree. C., and a temperature raising-lowering rate is set to
10.degree. C./min.
[0096] Further, an interlayer insulating film is formed by forming
BPSG as a film at 420.degree. C. by plasma CVD. Thereafter, the
reflow is performed for 10 minutes at 950.degree. C. within the wet
atmosphere. At this time, the starting and stopping temperatures of
the wet atmosphere are set to 600.degree. C., and the temperature
raising-lowering rate is set to 10.degree. C./min.
[0097] With respect to the MOSFET via such a process, channel
mobility with respect to the gate voltage and the magnitude of the
drain electric current are examined, and results shown in FIG. 36
are obtained.
[0098] When a heat treatment process except for the above gate
oxide film forming process, etc. is performed in a device process
design, there is also a possibility that H or OH is desorbed from
the dangling bond of the interface of SiC and the gate oxide
film.
[0099] However, as can be seen from FIG. 36, such a heat treatment
process can be also set such that no large characteristic
deterioration of 172 cm.sup.2/Vs in channel mobility is caused by
using the wet atmosphere in a temperature area of 600.degree. C. or
more. Therefore, it can be said that it is possible to restrain H
or OH from being desorbed from the dangling bond of the interface
of SiC and the gate oxide film by performing such a heat treatment
process in the wet atmosphere. Here, the heat treatment process is
performed as the wet atmosphere, but similar contents are also the
when the heat treatment process is performed as the hydrogen
atmosphere.
[0100] Finally, verification similar to that in the above case is
performed with respect to an accumulation type lateral MOSFET
(e.g., see JP-A-10-308510) for forming an accumulation type channel
constructed by an impurity layer of the same electric conductivity
type as a source area and a drain area instead of the inversion
type lateral MOSFET of the structure used in the experiment of
FIGS. 25A and 25B.
[0101] In FIG. 37, a gate oxide film is formed by performing wet
oxidation similar to that in the conventional case. In a state in
which the wet atmosphere is maintained as it is at the temperature
lowering time of this gate oxide film forming process, temperature
is lowered at 10.degree. C./min until 700.degree. C. as the
termination-desorption temperature or less so that MOSFET is
manufactured. Channel mobility with respect to the gate voltage and
drain electric current characteristics are then examined.
[0102] As shown in this figure, the result of a high channel
mobility of 186 cm.sup.2/Vs can be also obtained with respect to
the accumulation type lateral MOSFET. Thus, the wet atmosphere or
the hydrogen atmosphere can be also maintained until the
termination-desorption temperature or less is attained in the gate
oxide film forming process with respect to the semiconductor device
of the accumulation type as well as the semiconductor device of the
inversion type. Otherwise, the improvement of channel mobility can
be intended by setting the wet atmosphere or the hydrogen
atmosphere when temperature exceeds 700.degree. C. or more in the
anneal process after the gate oxide film forming process, and other
heat treatment processes.
[0103] A planar type MOSFET of the accumulation type having 25
.mu.m in cell pitch is manufactured and a characteristic inspection
is manufactured and characteristically inspected as a reference to
verify whether the MOSFET of a vertical type is operated well or
not. This result is shown in FIGS. 38A and 38B. FIG. 38A shows
drain voltage (VD) and drain electric current (ID) characteristics,
and FIG. 38B shows blocking characteristics. As shown in these
figures, the characteristics of 4.5 m.OMEGA.cm.sup.2 when gate
voltage=10V and drain voltage (VD)=2V and withstand voltage 660 V
when gate voltage .dbd.0V are obtained. Thus, it has been confirmed
that the planar type MOSFET of the accumulation type is accurately
operated.
[0104] In view of the above verification, a silicon carbide
semiconductor device is provided as follows.
First Embodiment
[0105] A first embodiment mode of the present invention will be
explained. In this embodiment mode, one embodiment mode of the
present invention is applied to an inversion type lateral MOSFET.
FIG. 1 shows a sectional construction of the inversion type lateral
MOSFET. FIGS. 2 and 3 show manufacturing processes of the inversion
type lateral MOSFET shown in FIG. 1. The structure of the inversion
type lateral MOSFET of this embodiment mode and its manufacturing
method will be explained with reference to these figures.
[0106] As shown in FIG. 1, one face side of a substrate 1 of a
p.sup.+ type constructed by SiC is set to a main surface, and a
p/p.sup.+ substrate forming a p type base layer 2 constructed by
SiC epitaxially grown on the main surface is used as a
semiconductor substrate. For example, the substrate 1 of the
p.sup.+ type is constructed by 4H--SiC and the main surface is set
to face a, i.e., a (11-20)-plane and impurity concentration is set
to about 5.times.10.sup.18 cm.sup.-3. For example, the impurity
concentration of the p type base layer 2 is set to about
5.times.10.sup.16 cm.sup.-3. The inversion type lateral MOSFET is
formed by using such a p/p.sup.+ substrate in the semiconductor
substrate.
[0107] A p.sup.+ type base contact area (hereinafter simply called
a contact area) 3 is formed in a surface layer portion of the p
type base layer 2. The impurity concentration of this contact area
3 is set to be higher than that of the p type base layer 2. For
example, the impurity concentration of the contact area 3 is set to
a high concentration of 3.times.10.sup.20 cm.sup.-3 or more, and
the contact area 3 is set to 0.4 .mu.m in depth. This contact area
3 is used to fix an electric potential of the p type base layer
2.
[0108] An n.sup.+ type source area 4 and an n.sup.+ type drain area
5 are formed in a surface layer portion of the p type base layer 2
so as to be separated from the contact area 3. These areas are
formed so as to be separated from each other. For example, these
n.sup.+ type source area 4 and n.sup.+ type drain area 5 are set to
a high concentration of 3.times.10.sup.20 cm.sup.-3 or more, and
are set to 0.3 .mu.m in depth.
[0109] A portion nipped by the n.sup.+ type source area 4 and the
n.sup.+ type drain area 5 among the surface layer portion of the p
type base layer 2 is set to a channel area, and a gate oxide film 6
of e.g., 52 nm in film thickness is formed so as to cover at least
the surface of the channel area. A structure for terminating
dangling bond by an element of H or OH is formed at the interface
of this gate oxide film 6 and the p type base layer 2 constituting
the channel area.
[0110] For example, a gate 7 constructed by polysilicon provided by
doping n type impurities (e.g., P (phosphorus)) is patterned on the
surface of the gate oxide film 6.
[0111] Further, for example, an interlayer insulating film 8
constructed by LTO is formed so as to cover the remaining portion
of the gate 7 and the gate oxide film 6. Contact holes 9a to 9c
connected to the contact area 3, the n.sup.+ type source area 4 and
the n.sup.+ type drain area 5 are formed in this interlayer
insulating film 8 and the gate oxide film 6, and a contact hole 9d
connected to the gate 7 is formed in the interlayer insulating film
8.
[0112] A base electrode 10 for electric potential fixation
electrically connected to the contact area 3, a source electrode 11
electrically connected to the n.sup.+ type source area 4, a drain
electrode 12 electrically connected to the n.sup.+ type drain area
5, and a gate electrode 13 electrically connected to the gate 7 are
arranged through the respective contact holes 9a to 9d so that the
inversion type lateral MOSFET is constructed.
[0113] In the inversion type lateral MOSFET constructed in this
way, the channel area formed in a surface layer portion of the p
type base layer 2 is set to an electric current path, and an
electric current is flowed between the n.sup.+ type source area 4
and the n.sup.+ type drain area 5 arranged in upper and lower
streams of the electric current path. The electric current flowed
to the channel area is controlled by controlling a voltage applied
to the gate 7 so that the electric current flowed between the
n.sup.+ type source area 4 and the n.sup.+ type drain area 5 can be
controlled.
[0114] Next, a manufacturing method of the inversion type lateral
MOSFET shown in FIG. 1 will be explained by using FIGS. 2 and
3.
[0115] First, as shown in FIG. 2A, a semiconductor substrate
constructed by the p/p.sup.+ substrate formed by the substrate 1 of
the p.sup.+ type and the p type base layer 2 is prepared. As shown
in FIG. 2B, for example, LTO 20 is then formed as a film in this
semiconductor substrate, concretely, on the surface of the p type
base layer 2. LTO 20 is opened on a forming schedule area of the
contact area 3 via a photolithography process. Thereafter, for
example, Al (aluminum) ions are implanted as p type impurities.
[0116] Next, after LTO 20 is removed, for example, LTO 21 is again
formed as a film as shown in FIG. 2C. LTO 21 is opened on a forming
schedule area of the n.sup.+ type source area 4 and the n.sup.+
type drain area 5 via the photolithography process. Thereafter, for
example, P (phosphorus) ions are implanted as n type
impurities.
[0117] Thereafter, after LTO 21 is removed, for example, activation
anneal is performed for 30 minutes at 1600.degree. C. so that the
implanted p type impurities and n type impurities are activated.
Thus, the contact area 3, the n.sup.+ type source area 4 and the
n.sup.+ type drain area 5 are formed.
[0118] Subsequently, a gate oxide film forming process is
performed, and a gate oxide film 6 is formed as shown in FIG. 3A.
Concretely, the gate oxide film 6 is formed by gate oxidation using
a pyrogenic method using a wet atmosphere. At this time, atmosphere
and temperature controls of the gate oxide film forming process are
performed as shown in FIG. 4.
[0119] Namely, temperature rises in a temperature gradient of
10.degree. C./min as a nitrogen (N.sub.2) atmosphere from room
temperature to 1080.degree. C. When temperature reaches
1080.degree. C., the atmosphere is set to a wet (H.sub.2O)
atmosphere, and this temperature is held for 80 minutes. Thus, for
example, the gate oxide film 6 having 52 nm in film thickness is
formed. Thereafter, while the wet atmosphere is maintained,
temperature is lowered at 10.degree. C./min. At this time, the wet
atmosphere is maintained until temperature is lowered to
600.degree. C. or less. This temperature is not limited to
600.degree. C., but may be also set to 800.degree. C. or less as
termination-desorption temperature or less, preferably, 700.degree.
C. or less.
[0120] Thus, the wet atmosphere is maintained at a temperature
lowering time of the gate oxide film forming process. Thus, a
structure for terminating dangling bond by an element of H or OH is
formed at the interface of the gate oxide film 6 and the p type
base layer 2 constituting the channel area. FIG. 5 typically shows
its situation. As shown in this figure, for example, a state in
which H or OH enters the gate oxide film 6 formed on the surface of
the p type base layer 2 is attained.
[0121] Thereafter, as shown in FIG. 3B, a polysilicon layer
provided by doping n type impurities on the surface of the gate
oxide film 6 is formed as a film under a temperature of 600.degree.
C. Thereafter, a gate 7 is formed by patterning using an
unillustrated resist.
[0122] Further, as shown in FIG. 3C, for example, an interlayer
insulating film 8 constructed by LTO is formed at 420.degree. C.,
and is patterned. Thus, contact holes 9a to 9c connected to the
contact area 3, the n.sup.+ type source area 4 and the n.sup.+ type
drain area 5 are formed in the interlayer insulating film 8 and the
gate oxide film 6, and a contact hole 9d connected to the gate 7 is
formed in the interlayer insulating film 8.
[0123] A Ni (nickel) film is then formed so as to bury the interior
of the contact holes 9a to 9d, and is then patterned so that
various kinds of electrodes 10 to 13 are formed. At this time,
since the contact area 3, the n.sup.+ type source area 4 and the
n.sup.+ type drain area 5 are set to high concentrations as
mentioned above, these areas come in ohmic contact with various
kinds of electrodes 10 to 13 without performing a heat treatment
process, etc. Thus, the inversion type lateral MOSFET shown in FIG.
1 is completed.
[0124] In the manufacturing method of the inversion type lateral
MOSFET explained above, as mentioned above, temperature is lowered
until the termination-desorption temperature or less while the wet
atmosphere is maintained at the temperature lowering time of the
gate oxide film forming process. Therefore, dangling bond at the
interface of the gate oxide film 6 and the p type base layer 2
constituting the channel area can be terminated by an element of H
or OH. Therefore, the inversion type lateral MOSFET of high channel
mobility can be set.
[0125] Further, the forming process of the interlayer insulating
film 8 and the forming processes of various kinds of electrodes 10
to 13 are performed after the gate oxide film forming process.
However, the temperatures of all the processes are set to be less
than the termination-desorption temperature of H or OH. Therefore,
it is possible to prevent H or OH from being desorbed from the
dangling bond of the interface of the gate oxide film 6 and the p
type base layer 2 constituting the channel area by these processes.
Thus, a reduction of the channel mobility can be prevented.
Second Embodiment Mode
[0126] A second embodiment mode of the present invention will be
explained. In this embodiment mode, one embodiment mode of the
present invention is also applied to the inversion type lateral
MOSFET. However, this embodiment mode differs from the first
embodiment mode in that the manufacturing method of the inversion
type lateral MOSFET is partially changed. The structure of the
inversion type lateral MOSFET, etc. in this embodiment mode are
similar to those in the first embodiment mode. The inversion type
lateral MOSFET of this embodiment mode will next be explained.
However, the explanation will be made with respect to only
different points from the first embodiment mode, and is omitted
with respect to portions similar to those of the first embodiment
mode.
[0127] The inversion type lateral MOSFET of this embodiment mode is
manufactured by adding a manufacturing process shown in FIG. 6 to
the manufacturing method of the inversion type lateral MOSFET shown
in FIGS. 2 and 3 in the first embodiment mode.
[0128] Namely, after respective processes shown in FIGS. 2A to 2C
and FIGS. 3A and 3B are performed, processing shown in FIG. 6 is
performed. Thereafter, processing shown in FIG. 3C, etc. are
performed. Thus, the inversion type lateral MOSFET of a structure
similar to that of the first embodiment mode is manufactured.
[0129] Concretely, round oxidation of the surface of the gate 7
formed in the process shown in FIG. 3B is performed in the process
shown in FIG. 6. For example, oxidation (wet oxidation) is
performed within the wet atmosphere at 850.degree. C. for 120
minutes. An oxide film 7a is formed on the surface of the gate 7,
and the surface of the gate 7 is rounded.
[0130] At this time, atmosphere and temperature controls of the wet
oxidation are performed as shown in FIG. 7.
[0131] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as a nitrogen (N.sub.2) atmosphere from room
temperature to 600.degree. C. (less than termination-desorption
temperature). When temperature reaches 600.degree. C., the wet
(H.sub.2O) atmosphere is set and temperature is raised in the same
temperature gradient until 850.degree. C. When temperature reaches
850.degree. C., this temperature is held for 120 minutes so that an
oxide film 7a is formed on the surface of the gate 7. Thereafter,
temperature is lowered at 10.degree. C./min while the wet
atmosphere is maintained as it is. At this time, the wet atmosphere
is maintained until temperature is lowered to 600.degree. C. When
temperature reaches 600.degree. C., it is again returned from the
wet atmosphere to a nitrogen atmosphere, and temperature is lowered
until the room temperature. The starting and stopping temperatures
of this wet atmosphere are not limited to 600.degree. C., but may
be also set to 800.degree. C. or less as the termination-desorption
temperature or less, preferably, 700.degree. C. or less.
[0132] Thus, the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
round-off oxidation of the gate 7. Thus, it is possible to prevent
that an element of H or OH is desorbed from the dangling bond of
the interface of the gate oxide film 6 and the p type base layer 2
constituting the channel area.
[0133] Accordingly, when heat treatment is taken at high
temperature after the gate oxide film forming process as in this
embodiment mode, the wet atmosphere is set when the
termination-desorption temperature or more is attained. Thus, the
improvement of channel mobility can be intended.
[0134] Further, such round-off oxidation is performed in a state in
which the gate oxide film 6 is covered with the gate 7. Therefore,
the gate 7 plays a role as a cap layer. Therefore, when an anneal
process is performed under a situation in which the termination of
the dangling bond due to H or OH has an advantage over the
desorption, the dangling bond can be terminated by H or OH while
the desorption of H or OH is further prevented by the cap layer.
Therefore, there is a high possibility that channel mobility is
further raised. In particular, in the case of polysilicon, hydrogen
is generated by an oxidizing reaction in the wet atmosphere, and
contributes to the dangling bond termination. Therefore, there is a
high possibility that channel mobility is further raised.
Third Embodiment Mode
[0135] A third embodiment mode of the present invention will be
explained. In this embodiment mode, one embodiment mode of the
present invention is also applied to the inversion type lateral
MOSFET. However, this embodiment mode differs from the first or
second embodiment mode in that the manufacturing method of the
inversion type lateral MOSFET is partially changed. The structure
of the inversion type lateral MOSFET, etc. in this embodiment mode
are similar to those in the first or second embodiment mode. The
inversion type lateral MOSFET of this embodiment mode will next be
explained. However, only different points from the first or second
embodiment mode will be explained, and the explanations of portions
similar to those of the first or second embodiment mode are
omitted.
[0136] The inversion type lateral MOSFET of this embodiment mode is
manufactured by changing the forming process of the interlayer
insulating film 8 shown in FIG. 3C to processes shown in FIGS. 8A
and 8B among the manufacturing method of the inversion type lateral
MOSFET shown in the above FIGS. 2 to 3 (and FIG. 6).
[0137] Namely, after the respective processes shown in FIGS. 2A to
2C and FIGS. 3A and 3B are performed (or, after the processing
shown in FIG. 6 is further performed), processings shown in FIGS.
8A and 8B are performed instead of the processing shown in FIG. 3C.
Thus, the inversion type lateral MOSFET of a structure similar to
that of each of the first and second embodiment modes is
manufactured.
[0138] Concretely, in a process shown in FIG. 8A, an interlayer
insulating film 8 is formed as a film on the surfaces (or the
surfaces of the oxide film 7a and the gate oxide film 6 formed in
the process shown in FIG. 6) of the gate 7 and the gate oxide film
6 formed in the process shown in FIG. 3B. Thereafter, contact holes
9a to 9d are formed in the interlayer insulating film 8 and the
gate oxide film 6 as shown in FIG. 8B.
[0139] At this time, PSG is formed as a film at 420.degree. C. by
e.g., plasma CVD in the process shown in FIG. 8A. Thereafter, for
example, a reflow is performed within the wet atmosphere at
950.degree. C. for 10 minutes so that the interlayer insulating
film 8 is formed. The atmosphere and temperature controls of the
wet oxidation at this time are performed as shown in FIG. 9.
[0140] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as a nitrogen (N.sub.2) atmosphere from the room
temperature to 600.degree. C. (less than the termination-desorption
temperature). When temperature reaches 600.degree. C., the wet
(H.sub.2O) atmosphere is set and temperature is raised in the same
temperature gradient until 950.degree. C. When temperature reaches
950.degree. C., the reflow process is performed by holding this
temperature for 10 minutes. Thereafter, while the wet atmosphere is
maintained, temperature is lowered at 10.degree. C./min. At this
time, the wet atmosphere is maintained until temperature is lowered
to 600.degree. C. When temperature reaches 600.degree. C., it is
again returned from the wet atmosphere to the nitrogen atmosphere,
and temperature is lowered until the room temperature. The starting
and stopping temperatures of this wet atmosphere are not limited to
600.degree. C., but may be also set to 800.degree. C. or less as
the termination-desorption temperature or less, preferably
700.degree. C. or less. Further, a hydrogen atmosphere may be also
set instead of the wet atmosphere as another method. In this case,
temperature is raised in a temperature gradient of 10.degree.
C./min as the nitrogen (N.sub.2) atmosphere from the room
temperature to 600.degree. C. (less than the termination-desorption
temperature). When temperature then reaches 600.degree. C., the
hydrogen atmosphere is set and temperature is raised in the same
temperature gradient until 950.degree. C. When temperature reaches
950.degree. C., the reflow process is performed by holding this
temperature for 10 minutes. Thereafter, while the hydrogen
atmosphere is maintained, temperature is lowered at 10.degree.
C./min. At this time, the hydrogen atmosphere is maintained until
temperature is lowered to 600.degree. C. When temperature reaches
600.degree. C., it is again returned from the hydrogen atmosphere
to the nitrogen atmosphere, and temperature is lowered until the
room temperature. The starting and stopping temperatures of this
hydrogen anneal are not limited to 600.degree. C., but may be also
set to 800.degree. C. or less as the termination-desorption
temperature or less, preferably, 700.degree. C. or less.
[0141] Thus, the wet atmosphere or the hydrogen atmosphere is
maintained when the termination-desorption temperature or more in
the reflow process of the interlayer insulating film 8 is attained.
Thus, it is possible to prevent H or OH from being desorbed from
the dangling bond of the interface of the gate oxide film 6 and the
p type base layer 2 constituting the channel area.
[0142] Accordingly, when heat treatment is taken at high
temperature after the gate oxide film forming process as in this
embodiment mode, the wet atmosphere or the hydrogen atmosphere is
also set when the termination-desorption temperature or more is
attained. Thus, the improvement of channel mobility can be
intended.
[0143] Further, such a reflow process is performed in a state in
which the gate oxide film 6 is covered with plural films of the
gate 7, etc. Therefore, the plural films of the gate 7, etc. play a
role as a cap layer. Therefore, when the anneal process is
performed under a situation in which the termination of the
dangling bond due to H or OH has an advantage over the desorption,
the dangling bond can be terminated by H or OH while the desorption
of H or OH is further prevented by the cap layer. Therefore,
channel mobility can be further raised.
Fourth Embodiment Mode
[0144] A fourth embodiment mode of the present invention will be
explained. In this embodiment mode, one embodiment mode of the
present invention is applied to an accumulation type lateral
MOSFET. FIG. 10 shows a sectional construction of the accumulation
type lateral MOSFET. FIGS. 11 to 13 show manufacturing processes of
the accumulation type lateral MOSFET shown in FIG. 10. The
structure and manufacturing method of the accumulation type lateral
MOSFET of this embodiment mode will be explained with reference to
these figures.
[0145] As shown in FIG. 10, the accumulation type lateral MOSFET is
formed in a substrate 31 of the n.sup.+ type constructed by SiC
with one face side as a main surface. For example, the substrate 31
of the n.sup.+ type is constructed by 4H--SiC, and the main surface
is set to face a, i.e., a (11-20)-plane, and impurity concentration
is set to about 5.times.10.sup.18 cm.sup.-3.
[0146] An n type drift layer 32 constructed by SiC epitaxially
grown is formed on the main surface of this substrate 31. For
example, the n type drift layer 32 is set to about
1.times.10.sup.16 cm.sup.-3 in impurity concentration, and 10 .mu.m
in thickness.
[0147] A p type base layer 33 is formed in a surface layer portion
of the n type drift layer 32. For example, this p type base layer
33 is set to about 1.times.10.sup.19 cm.sup.-3 and 0.7 .mu.m in
depth.
[0148] An n type channel layer (hereinafter called a channel
epitaxial layer) 34 for constructing a channel area epitaxially
grown is formed on the p type base layer 33. For example, this
channel epitaxial layer 34 is set to about 1.times.10.sup.16
cm.sup.-3 in concentration and 0.3 .mu.m in film thickness
(depth).
[0149] A contact area 35 of the p.sup.+ type is formed so as to
pass through this channel epitaxial layer 34 and reach the p type
base layer 33. For example, this contact area 35 is set to a high
concentration of 3.times.10.sup.20 cm.sup.-3 or more, and 0.4 .mu.m
in depth.
[0150] An n.sup.+ type source area 36 and an n.sup.+ type drain
area 37 are formed on both sides through the channel epitaxial
layer 34 so as to be separated from this contact area 35. These
areas 36 and 37 are formed so as to be separated from each other.
For example, these n.sup.+ type source area 36 and n.sup.+ type
drain area 37 are set to a high concentration of 3.times.10.sup.20
cm.sup.-3 or more, and 0.3 .mu.m in depth.
[0151] Further, a portion nipped by the n.sup.+ type source area 36
and the n.sup.+ type drain area 37 among a surface layer portion of
the channel epitaxial layer 34 is set to a channel area, and a gate
oxide film 38 of e.g., 38 nm in film thickness is formed so as to
cover at least the surface of the channel area. A structure for
terminating the dangling bond by an element of H or OH is formed at
the interface of this gate oxide film 38 and the channel epitaxial
layer 34 constituting the channel area.
[0152] For example, a gate 39 constructed by polysilicon formed by
doping n type impurities (e.g., P (phosphorus)) is patterned on the
surface of the gate oxide film 38.
[0153] Further, an interlayer insulating film 40 constructed by
e.g., LTO is formed so as to cover the remaining portion of the
gate 39 and the gate oxide film 38. Contact holes 41a to 41c
connected to the contact area 35, the n.sup.+ type source area 36
and the n.sup.+ type drain area 37 are formed in these interlayer
insulating film 40 and gate oxide film 38. A contact hole 41d
connected to the gate 39 is formed in the interlayer insulating
film 40.
[0154] A base electrode 42 for electric potential fixation
electrically connected to the contact area 35, a source electrode
43 electrically connected to the n.sup.+ type source area 36, a
drain electrode 44 electrically connected to the n.sup.+ type drain
area 37, and a gate electrode 45 electrically connected to the gate
39 are arranged through the respective contact holes 41a to 41d so
that the accumulation type lateral MOSFET is constructed.
[0155] In the accumulation type lateral MOSFET constructed in this
way, the channel epitaxial layer 34, i.e., the channel area is set
to an electric current path, and an electric current is flowed
between the n.sup.+ type source area 36 and the n.sup.+ type drain
area 37 arranged in upper and lower streams of the electric current
path. The width of a depletion layer formed in the channel area is
then controlled by controlling a voltage applied to the gate 39 and
the electric current flowed to this depletion layer is controlled
so that the electric current flowed between the n.sup.+ type source
area 36 and the n.sup.+ type drain area 37 can be controlled.
[0156] The manufacturing method of the accumulation type lateral
MOSFET shown in FIG. 10 will next be explained by using FIGS. 11 to
13.
[0157] First, as shown in FIG. 11A, a substrate 31 of the n.sup.+
type is prepared. As shown in FIG. 11B, an n type drift layer 32 is
epitaxially grown on the main surface of the substrate 31 such that
the n type drift layer 32 has about 1.times.10.sup.16 cm.sup.-3 in
impurity concentration and 10 .mu.m in thickness.
[0158] Thereafter, as shown in FIG. 1C, Al ions as p type
impurities are implanted into a surface layer portion of the n type
drift layer 32. Thereafter, activation anneal is performed at
1600.degree. C. for 30 minutes. Thus, for example, a p type base
layer 33 having about 1.times.10.sup.19 cm.sup.-3 in impurity
concentration and 0.7 .mu.m in depth is formed. As shown in FIG.
11D, for example, a channel epitaxial layer 34 having about
1.times.10.sup.16 cm.sup.-3 in concentration and 0.3 .mu.m in film
thickness (depth) is epitaxially grown on this p type base layer
33.
[0159] Next, as shown in FIG. 12A, for example, LTO 50 is formed as
a film, and is then opened in a forming schedule area of the
contact area 35 via a photolithography process. Al ions are then
implanted with LTO 50 as a mask.
[0160] Further, after LTO 50 is removed, for example, LTO 51 is
again formed as a film as shown in FIG. 12B, and is opened on a
forming schedule area of the n.sup.+ type source area 36 and the
n.sup.+ type drain area 37 via a photolithography process.
Thereafter, for example, P ions are implanted as n type
impurities.
[0161] Thereafter, after LTO 51 is removed, for example, activation
anneal is performed at 1600.degree. C. for 30 minutes so that the
implanted p type impurities and n type impurities are activated.
Thus, the contact area 35, the n.sup.+ type source area 36 and the
n.sup.+ type drain area 37 are formed.
[0162] Subsequently, a gate oxide film forming process is
performed, and a gate oxide film 38 is formed as shown in FIG. 12C.
Concretely, the gate oxide film 38 is formed by gate oxidation
using the pyrogenic method using the wet atmosphere. At this time,
atmosphere and temperature controls of the gate oxide film forming
process are performed as shown in FIG. 4 shown in the first
embodiment mode. However, time for holding a temperature of
1080.degree. C. is set to 60 minutes, and switching temperature
from the wet atmosphere at a temperature lowering time to the
nitrogen atmosphere is set to 700.degree. C.
[0163] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as the nitrogen (N.sub.2) atmosphere from the
room temperature to 1080.degree. C. When temperature reaches
1080.degree. C., the wet (H.sub.2O) atmosphere is set and this
temperature is held for 60 minutes. Thus, for example, a gate oxide
film 38 having 38 nm in film thickness is formed. Thereafter, while
the wet atmosphere is maintained, temperature is lowered at
10.degree. C./min. At this time, the wet atmosphere is maintained
until temperature is lowered to 700.degree. C. or less.
[0164] Thus, the wet atmosphere is maintained at the temperature
lowering time of the gate oxide film forming process. Thus, a
structure for terminating dangling bond by an element of H or OH is
formed at the interface of the gate oxide film 38 and the channel
epitaxial layer 34 constituting the channel area.
[0165] Thereafter, as shown in FIG. 13A, a polysilicon layer
provided by doping n type impurities on the surface of the gate
oxide film 38 is formed as a film under a temperature of
600.degree. C., and is then patterned by using an unillustrated
resist so that a gate 39 is formed.
[0166] Further, as shown in FIG. 13B, round-off oxidation of the
surface of the gate 39 is performed. For example, the oxidation
(wet oxidation) is performed within the wet atmosphere at
850.degree. C. for 120 minutes, and an oxide film 39a is formed on
the surface of the gate 39, and the surface of the gate 39 is
rounded.
[0167] At this time, the atmosphere and temperature controls of the
wet oxidation are performed as shown in FIG. 7 shown in the second
embodiment mode, and the wet atmosphere is maintained when the
termination-desorption temperature or more is attained. Thus, it is
possible to prevent H or OH from being desorbed from the dangling
bond of the interface of the gate oxide film 38 and the channel
epitaxial layer 34.
[0168] Subsequently, an interlayer insulating film 40 is formed as
shown in FIG. 13C. For example, BPSG is formed as a film by plasma
CVD at 420.degree. C. Thereafter, for example, a reflow is
performed within the wet atmosphere at 950.degree. C. for 10
minutes so that the interlayer insulating film 40 is formed. The
atmosphere and temperature controls of the wet oxidation at this
time are performed as shown in FIG. 9 shown in the third embodiment
mode, and the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
reflow process of the interlayer insulating film 40. Thus, it is
possible to prevent H or OH from being desorbed from the dangling
bond of the interface of the gate oxide film 38 and the channel
epitaxial layer 34.
[0169] Thereafter, the interlayer insulating film 40 is patterned.
Thus, contact holes 41a to 41c connected to the contact area 35,
the n.sup.+ type source area 36 and the n.sup.+ type drain area 37
are formed in the interlayer insulating film 40 and the gate oxide
film 38. A contact hole 41d connected to the gate 39 is formed in
the interlayer insulating film 40.
[0170] A Ni film is then formed so as to bury the interiors of the
contact holes 41a to 41d, and is then patterned so that various
kinds of electrodes 42 to 45 are formed. At this time, since the
contact area 35, the n.sup.+ type source area 36 and the n.sup.+
type drain area 37 are set to high concentrations as mentioned
above, these areas come in ohmic contact with various kinds of
electrodes 42 to 45 without performing a heat treatment process,
etc. Thus, the accumulation type lateral MOSFET shown in FIG. 10 is
completed.
[0171] In the manufacturing method of the accumulation type lateral
MOSFET explained above, as mentioned above, temperature is lowered
until the termination-desorption temperature or less while the wet
atmosphere is maintained at the temperature lowering time of the
gate oxide film forming process. Therefore, the dangling bond of
the interface of the gate oxide film 38 and the channel epitaxial
layer 34 can be terminated by an element of H or OH. Thus, the
accumulation type lateral MOSFET of high channel mobility can be
set.
[0172] Further, the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
round-off oxidation of the gate 39. Thus, it is possible to prevent
H or OH from being desorbed from the dangling bond of the interface
of the gate oxide film 38 and the channel epitaxial layer 34.
[0173] Further, the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
reflow process of the interlayer insulating film 40. Thus, it is
possible to prevent H or OH from being desorbed from the dangling
bond of the interface of the gate oxide film 38 and the channel
epitaxial layer 34.
[0174] Accordingly, when heat treatment is taken at high
temperature after the gate oxide film forming process as in this
embodiment mode, the wet atmosphere is also set when the
termination-desorption temperature or more is attained. Thus, the
improvement of channel mobility can be intended.
Fifth Embodiment Mode
[0175] A fifth embodiment mode of the present invention will be
explained. In this embodiment mode, one embodiment mode of the
present invention is applied to a planar type MOSFET. FIG. 14 shows
a sectional construction of the planar type MOSFET. FIGS. 15 to 19
show manufacturing processes of the planar type MOSFET shown in
FIG. 14. The structure and manufacturing method of the planar type
MOSFET of this embodiment mode will be explained with reference to
these figures.
[0176] As shown in FIG. 14, the planar type MOSFET is formed in a
substrate 61 of the n.sup.+ type constructed by SiC with one face
side as a main surface. For example, the substrate 61 of the
n.sup.+ type is constructed by 4H--SiC and the main surface is set
to face a, i.e., a (11-20)-plane, and the substrate 61 has about
5.times.10.sup.18 cm.sup.-3 impurity concentration.
[0177] An n type drift layer 62 constructed by SiC epitaxially
grown is formed on the main surface of this substrate 61. For
example, the n type drift layer 62 is set to about
1.times.10.sup.16 cm.sup.-3 in impurity concentration and 10 .mu.m
in thickness.
[0178] Plural p type base areas 63 are formed so as to be spaced
from each other at a predetermined interval in a surface layer
portion of the n type drift layer 62. For example, this p type base
area 63 is set to about 1.times.10.sup.19 cm.sup.-3 and 0.7 .mu.m
in depth.
[0179] Further, an n type channel layer (hereinafter called a
channel epitaxial layer) 64 for constructing a channel area
epitaxially grown is formed on the p type base area 63. For
example, this channel epitaxial layer 64 is set to about
1.times.10.sup.16 cm.sup.-3 in concentration and 0.3 .mu.m in film
thickness (depth).
[0180] A contact area 65 of the p.sup.+ type is formed so as to
pass through this channel epitaxial layer 34 and reach the p type
base area 63. For example, this contact area 65 is set to a high
concentration of 3.times.10.sup.20 cm.sup.-3 or more, and 0.4 .mu.m
in depth.
[0181] Further, n.sup.+ type source areas 66, 67 are formed on both
sides through the channel epitaxial layer 64 on the inside from
this contact area 65. These n.sup.+ type source areas 66, 67 are
formed so as to be separated from each other. For example, these
n.sup.+ type source areas 66, 67 are set to a high concentration of
3.times.10.sup.20 cm.sup.-3 or more and 0.3 .mu.m in depth.
[0182] Further, a portion located on the p type base area 63 among
a surface layer portion of the channel epitaxial layer 64 is set to
a channel area, and a gate oxide film 68 having e.g., 38 nm in film
thickness is formed so as to cover at least the surface of the
channel area. A structure for terminating dangling bond by an
element of H or OH is formed at the interface of this gate oxide
film 68 and the channel epitaxial layer 64 constituting the channel
area.
[0183] For example, a gate 69 constructed by polysilicon formed by
doping n type impurities (e.g., P (phosphorus)) is patterned on the
surface of the gate oxide film 68.
[0184] Further, for example, an interlayer insulating film 70
constructed by LTO is formed so as to cover the remaining portion
of the gate 69 and the gate oxide film 68. A contact hole 71
connected to the contact area 65 and the n.sup.+ type source areas
66, 67, an unillustrated contact hole connected to the gate 69,
etc. are formed in this interlayer insulating film 70 and the gate
oxide film 68. A source electrode 72 constructed by a contact
portion 72a electrically connected to the contact area 65 and the
n.sup.+ type source areas 66, 67, and a wiring electrode 72b
constructed by Al is arranged through the contact hole 71.
[0185] On the other hand, a drain contact area 73 of the n.sup.+
type set to concentration higher than that of the substrate 61 is
formed on the rear face side of the substrate 61. For example, a
drain electrode 74 as a rear face electrode constructed by Ni is
formed in this drain contact area 73. The planar type MOSFET is
constructed by such a structure.
[0186] In the planar type MOSFET constructed in this way, the
channel epitaxial layer 64, i.e., the channel area is set to an
electric current path, and an electric current is flowed between
the n.sup.+ type source areas 66, 67 and the drain contact area 73
arranged in upper and lower streams of the electric current path.
The width of a depletion layer formed in the channel area is
controlled by controlling a voltage applied to the gate 69, and the
electric current flowed to this depletion layer is controlled.
Thus, the electric current flowed between the n.sup.+ type source
areas 66, 67 and the drain contact area 73 can be controlled.
[0187] Next, the manufacturing method of the planar type MOSFET
shown in FIG. 14 will be explained by using FIGS. 15 to 19.
[0188] First, a substrate 61 of the n.sup.+ type is prepared as
shown in FIG. 15A. Thereafter, as shown in FIG. 15B, an n type
drift layer 62 is epitaxially grown on the main surface of the
substrate 61 such that the n type drift layer 62 has about
1.times.10.sup.16 cm.sup.-3 in impurity concentration and 10 .mu.m
in thickness.
[0189] Thereafter, for example, LTO 80 is formed as a film as shown
in FIG. 15C, and is then opened on a forming schedule area of a p
type base area 63 via a photolithography process. Al ions as p type
impurities are then implanted into a surface layer portion of the n
type drift layer 62 with LTO 80 as a mask. Thereafter, LTO 80 is
removed as shown in FIG. 15D, and activation anneal is performed at
1600.degree. C. for 30 minutes. Thus, for example, a p type base
area 63 having about 1.times.10.sup.19 cm.sup.-3 in impurity
concentration and 0.7 .mu.m in depth is formed.
[0190] Subsequently, as shown in FIG. 16A, for example, a channel
epitaxial layer 64 having about 1.times.10.sup.16 cm.sup.-3 in
concentration and 0.3 .mu.m in film thickness (depth) is
epitaxially grown on this p type base area 63.
[0191] Next, for example, LTO 81 is formed as a film as shown in
FIG. 16B, and is then opened in a forming schedule area of a
contact area 65 via a photolithography process. Al ions are then
implanted with LTO 81 as a mask.
[0192] Further, after LTO 81 is removed, for example, LTO 82 is
formed as a film and protects a substrate surface as a film as
shown in FIG. 16C. Thereafter, P ions are implanted from the rear
face of the substrate 61.
[0193] Further, after LTO 82 is removed, for example, LTO 83 is
formed as a film as shown in FIG. 17A, and is opened on a forming
schedule area of n.sup.+ type source areas 66, 67 via the
photolithography process. Thereafter, for example, P ions are
implanted as n type impurities.
[0194] Thereafter, LTO 83 is removed as shown in FIG. 17B.
Thereafter, for example, activation anneal is performed at
1600.degree. C. for 30 minutes so that the implanted p type
impurities and n type impurities are activated. Thus, the contact
area 65 and the n.sup.+ type source areas 66, 67 are formed.
[0195] Subsequently, as shown in FIG. 17C, a gate oxide film 68 is
formed by performing a gate oxide film forming process. Concretely,
the gate oxide film 68 is formed by gate oxidation using the
pyrogenic method using the wet atmosphere. At this time, atmosphere
and temperature controls of the gate oxide film forming process are
performed as shown in FIG. 4 shown in the first embodiment mode.
However, time for holding a temperature of 1080.degree. C. is set
to 60 minutes, and switching temperature from the wet atmosphere at
a temperature lowering time to the nitrogen atmosphere is set to
700.degree. C.
[0196] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as the nitrogen (N.sub.2) atmosphere from the
room temperature to 1080.degree. C. When temperature reaches
1080.degree. C., the wet (H.sub.2O) atmosphere is set and this
temperature is held for 60 minutes. Thus, for example, a gate oxide
film 68 of 38 nm in film thickness is formed. Thereafter,
temperature is lowered at 10.degree. C./min while the wet
atmosphere is maintained. At this time, the wet atmosphere is
maintained until temperature is lowered to 700.degree. C. or
less.
[0197] Thus, the wet atmosphere is maintained at the temperature
lowering time of the gate oxide film forming process. Thus, a
structure for terminating dangling bond by an element of H or OH is
formed at the interface of the gate oxide film 68 and the channel
epitaxial layer 64 constituting the channel area.
[0198] Thereafter, as shown in FIG. 18A, a polysilicon layer
provided by doping n type impurities on the surface of the gate
oxide film 68 is formed as a film under a temperature of
600.degree. C., and is then patterned by using an unillustrated
resist so that a gate 69 is formed.
[0199] Further, as shown in FIG. 18B, round-off oxidation of the
surface of the gate 69 is performed. For example, the oxidation
(wet oxidation) is performed within the wet atmosphere at
850.degree. C. for 120 minutes so that an oxide film 69a is formed
on the surface of the gate 69 and the surface of the gate 69 is
rounded.
[0200] At this time, atmosphere and temperature controls of the wet
oxidation are performed as shown in FIG. 7 shown in the second
embodiment mode. The wet atmosphere is maintained when the
termination-desorption temperature or more is attained. However,
switching temperature from the nitrogen atmosphere at a temperature
rising time to the wet atmosphere, and switching temperature from
the wet atmosphere at a temperature lowering time to the nitrogen
atmosphere are set to 700.degree. C. Thus, it is possible to
prevent H or OH from being desorbed from dangling bond of the
interface of the gate oxide film 68 and the channel epitaxial layer
64.
[0201] Subsequently, an interlayer insulating film 70 is formed as
shown in FIG. 18C. For example, BPSG is formed as a film at
420.degree. C. by plasma CVD. Thereafter, for example, a reflow is
performed within the wet atmosphere at 950.degree. C. for 10
minutes so that the interlayer insulating film 70 is formed. The
atmosphere and temperature controls of the wet oxidation at this
time are performed as shown in FIG. 9 shown in the third embodiment
mode. The wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
reflow process of the interlayer insulating film 70. However,
switching temperature from the nitrogen atmosphere at the
temperature rising time to the wet atmosphere, and switching
temperature from the wet atmosphere at the temperature lowering
time to the nitrogen atmosphere are set to 700.degree. C. Thus, it
is possible to prevent H or OH from being desorbed from dangling
bond of the interface of the gate oxide film 68 and the channel
epitaxial layer 64.
[0202] Thereafter, the interlayer insulating film 70 is patterned
as shown in FIG. 19A. Thus, a contact hole 71 connected to the
contact area 65 and the n.sup.+ type source areas 66, 67 is formed
in the interlayer insulating film 70 and the gate oxide film
68.
[0203] As shown in FIG. 19B, a Ni film is formed so as to bury the
interior of the contact hole 71, and is then patterned so that a
contact portion 72a of various kinds of source electrodes 72 is
formed. Further, as shown in FIG. 19C, a drain electrode 74 using
Ni is formed on the rear face side of the substrate 61 so as to
abut on a drain contact area 73.
[0204] Thereafter, anneal processing of 700.degree. C. or less is
performed within an Ar atmosphere so as to set the contact portion
72a and the drain electrode 74 to ohmic contact. At this time,
since the contact area 65 and the n.sup.+ type source areas 66, 67
are set to high concentrations as mentioned above, these areas
sufficiently come in ohmic contact with various kinds of electrodes
72a even when a heat treatment process of high temperature, etc.
are not performed.
[0205] However, if the anneal processing is performed within a
hydrogen atmosphere, the heat treatment of 700.degree. C. or more
can be taken. If the hydrogen atmosphere is used in this way, for
example, the anneal processing of 1000.degree. C. can be also
performed. Thus, it is possible to restrain the desorption of H or
OH from the dangling bond of the interface of the gate oxide film
68 and the channel epitaxial layer 64, and reduce contact
resistance.
[0206] Finally, an unillustrated contact hole connected to the gate
69 is formed by using an unillustrated resist with respect to the
interlayer insulating film 70. Thereafter, a wiring electrode 72b
is formed by Al so that a source electrode 72 is formed and a
planar type MOSFET shown in FIG. 14 is completed.
[0207] In the manufacturing method of the planar type MOSFET
explained above, as mentioned above, temperature is lowered until
the termination-desorption temperature or less while the wet
atmosphere is maintained at the temperature lowering time of the
gate oxide film forming process. Therefore, dangling bond of the
interface of the gate oxide film 68 and the channel epitaxial layer
64 can be terminated by an element of H or OH. Thus, the planar
type MOSFET of high channel mobility can be set.
[0208] Further, the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in round-off
oxidation of the gate 69. Thus, it is possible to prevent H or OH
from being desorbed from the dangling bond of the interface of the
gate oxide film 68 and the channel epitaxial layer 64.
[0209] Further, the wet atmosphere is maintained when the
termination-desorption temperature or more is attained in the
reflow process of the interlayer insulating film 70. Thus, it is
possible to prevent H or OH from being desorbed from the dangling
bond of the interface of the gate oxide film 68 and the channel
epitaxial layer 64.
[0210] Accordingly, when heat treatment is taken at high
temperature after the gate oxide film forming process as in this
embodiment mode, the wet atmosphere is set when the
termination-desorption temperature or more is attained. Thus, the
improvement of channel mobility can be intended.
Sixth Embodiment Mode
[0211] A sixth embodiment mode of the present invention will be
explained. In this embodiment mode, the structure of the gate
insulating film of the inversion type lateral MOSFET shown in the
first embodiment mode is changed. FIG. 20 shows a sectional
construction of the inversion type lateral MOSFET of this
embodiment mode. FIGS. 21 and 22 show manufacturing processes of
the inversion type lateral MOSFET shown in FIG. 20. The structure
and manufacturing method of the inversion type lateral MOSFET of
this embodiment mode will be explained with reference to these
figures.
[0212] As shown in FIG. 20, in this embodiment mode, the gate
insulating film 6 of the inversion type lateral MOSFET shown in the
first embodiment mode is constructed by an ONO film formed by a
three-layer structure of a silicon oxide film 6a, a silicon nitride
film 6b and a silicon oxide film 6c.
[0213] Next, the manufacturing method of the inversion type lateral
MOSFET shown in FIG. 20 will be explained by using FIGS. 21 to 22.
The explanation is omitted with respect to portions similar to
those of the first embodiment mode in this manufacturing method,
and only different portions from the first embodiment mode will be
explained.
[0214] First, as shown in FIG. 21A, a p/p.sup.+ type substrate
having a p type base layer 2 formed on the main surface of a
substrate 1 of the p.sup.+ type is prepared. A structure for
forming a contact area 3, an n.sup.+ type source area 4 and an
n.sup.+ type drain area 5 in a surface layer portion of the p type
base layer 2 is prepared. Wet oxidation is performed at
1080.degree. C. for 80 minutes by the pyrogenic method. Thereafter,
when temperature is lowered and reaches 700.degree. C., it is
switched from the wet atmosphere to the nitrogen atmosphere. Thus,
a silicon oxide film 6a of about 52 nm in oxide film thickness is
formed.
[0215] Subsequently, as shown in FIG. 21B, a silicon nitride film
6b is formed on the surface of the silicon oxide film 6a by using
an LP-CVD device such that the silicon nitride film 6b has a film
thickness of about 15 nm. At this time, film forming temperature is
set to 800.degree. C. It is possible to set the desorption of a
terminal element not to be generated by setting the film forming
temperature to 800.degree. C. or less in this way.
[0216] Subsequently, as shown in FIG. 21C, the surface of the
silicon nitride film 6b is oxidized by wet oxidation of 950.degree.
C., and a silicon oxide film (top oxide film) 6c having about 7 nm
in film thickness is formed. The wet oxidation at this time is set
such that the wet atmosphere is set from 700.degree. C. and
temperature is raised and the wet atmosphere is also maintained at
the temperature lowering time until temperature reaches 700.degree.
C. It is possible to set the desorption of the terminal element not
to be generated by setting the wet atmosphere at 700.degree. C. or
more in this way. In particular, in the case of this process, a cap
effect is obtained, and hydrogen is generated by an oxidizing
reaction of the silicon nitride film 6b in addition to this cap
effect. Therefore, a terminating effect of the dangling bond of the
MOS interface is improved, and an improving effect of channel
mobility can be obtained.
[0217] Thereafter, as shown in FIG. 22A, after a process for
forming a gate oxide film 7 on the surface of the silicon oxide
film 6c is performed, an interlayer insulating film 8 is formed by
forming LTO as a film at 420.degree. C. Thereafter, as shown in
FIG. 22B, a base electrode 10, a source electrode 11, a drain
electrode 12 and a gate electrode 13 are further formed via a
process for forming contact holes 9a to 9c connected to the contact
area 3, the n.sup.+ type source area 4 and the n.sup.+ type drain
area 5, etc. Thus, the inversion type lateral MOSFET of this
embodiment mode is completed.
[0218] Thus, the inversion type lateral MOSFET for constructing the
gate insulating film 6 by the ONO film may be also set. Here, the
insulating film nipped by the silicon oxide films 6a, 6c among the
gate insulating film 6 is set to the silicon nitride film 6b.
However, in addition, a high dielectric film of HfO.sub.2, HfSiON,
HfAlO, Al.sub.2O.sub.3, Ta.sub.2O.sub.5, etc. may be also
interposed. In this case, oxidation temperature of the top oxide
film formed by oxidizing the surface of the high dielectric film
may be suitably changed from the case of the silicon nitride film
6b.
Other Embodiment Modes
[0219] (1) In the above embodiment modes, the explanations have
been made with respect to the case for forming gate oxide films 6,
38, 68 by the wet oxidation. However, if it is desirous to
terminate the dangling bond of the interface of the gate oxide
films 6, 38, 68 and the p type base layer 2 and the channel
epitaxial layers 34, 64 by an element of H or OH during the gate
oxide film forming process, the wet atmosphere or the hydrogen
atmosphere is maintained at the temperature lowering time of at
least the gate oxide film forming process.
[0220] Accordingly, the gate oxide films 6, 38, 68 can be also
formed by another technique except for the wet oxidation, and it
can be switched to the wet atmosphere at only the temperature
lowering time, and the dangling bond of the interface of SiC and
the gate oxide films 6, 38, 68 can be also terminated by H or OH at
the temperature lowering time.
[0221] For example, oxidation is performed by a dry atmosphere, an
N.sub.2O atmosphere, an NO atmosphere, an ozone atmosphere, an
H.sub.2O radical atmosphere, etc., or the gate oxide film is formed
by deposition of LTO, TEOS, HTO, etc. by CVD, etc. At subsequent
temperature lowering time, it is switched to the wet atmosphere by
introducing H.sub.2O into a chamber for forming the gate oxide
film, and temperature is lowered until the termination-desorption
temperature or less.
[0222] Here, the explanation has been made with respect to the case
for constructing the gate insulating film by the oxide film.
However, when this technique is used, the gate insulating film can
be also constructed by an insulating film of another kind. For
example, HfO.sub.2, HfSiON, HfAlO, Al.sub.2O.sub.3,
Ta.sub.2O.sub.5, Si.sub.3N.sub.4, etc. are used.
[0223] (2) In each of the above embodiment modes, the case for
setting the wet atmosphere at the temperature lowering time of the
gate oxide film forming process is shown. However, anneal
processing for improving characteristics may be also performed by
using the wet atmosphere or the hydrogen atmosphere after the gate
oxide film forming process.
[0224] For example, after the process shown in FIG. 3A of the first
embodiment mode is performed as follows, anneal processing using
the wet atmosphere is subsequently performed. FIG. 23 schematically
shows atmosphere and temperature controls of an anneal process
using the wet atmosphere.
[0225] First, for example, HTO is formed as a film by introducing
N.sub.2O and SiH.sub.4 gases at 800.degree. C. using e.g., a CVD
device, etc., and a gate oxide film 6 is formed. Thereafter, the
anneal process using the wet atmosphere is performed.
[0226] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as the nitrogen (N.sub.2) atmosphere from the
room temperature to 1080.degree. C. When temperature reaches
1080.degree. C., the wet (H.sub.2O) atmosphere is set and the
anneal processing is performed by holding this temperature for 10
minutes. Thereafter, temperature is lowered at 10.degree. C./min
while the wet atmosphere is maintained. At this time, the wet
atmosphere is maintained until temperature is lowered to
600.degree. C. or less.
[0227] Thus, the anneal processing is performed after the gate
oxide film forming process, and the wet atmosphere is maintained at
the temperature lowering time of the anneal processing. Thus, the
dangling bond of the interface of the gate oxide film 6 and the p
type base layer 2 constituting the channel area can be terminated
by an element of H or OH.
[0228] Effects similar to those of each of the above embodiment
modes can be also obtained by this way. If the anneal processing is
performed after the gate oxide film forming process in this way,
the gate oxide film may be also formed by a technique except for
the wet oxidation as mentioned above, and the gate insulating film
may be also formed by an insulating film of another kind instead of
the oxide film.
[0229] It is also effective to perform such anneal processing for
the purpose of a further characteristic improvement after the gate
oxide films 6, 38, 68 are formed by the wet atmosphere.
[0230] Here, the anneal processing is performed just after the gate
oxide film forming process, i.e., before the gate forming process,
but may be also performed after the gate forming process, after an
interlayer insulating film forming process, etc. In accordance with
such a construction, the gates 6, 38, 68 and the interlayer
insulating films 8, 40, 70 play a role as a cap layer. Therefore, a
characteristic improvement of the interface of the gate oxide films
6, 38, 68 and SiC can be further made.
[0231] (3) Similarly, at the temperature lowering time of the gate
oxide film forming process, the wet atmosphere is always set during
a period until temperature is lowered to 600.degree. C. However, it
is sufficient to continuously maintain the wet atmosphere in a
temperature area including the range of at least the
termination-desorption temperature.
[0232] For example, atmosphere and temperature controls as shown in
FIG. 24 can be performed in the process shown in FIG. 3A of the
first embodiment mode.
[0233] Namely, temperature is raised in a temperature gradient of
10.degree. C./min as the nitrogen atmosphere from the room
temperature to 1300.degree. C. Next, when temperature reaches
1300.degree. C., oxidation is performed for 80 minutes in an
N.sub.2O atmosphere (N.sub.2 dilution) and the gate oxide film 6 is
formed. Subsequently, it is returned to the nitrogen atmosphere,
and temperature is lowered in a temperature gradient of 10.degree.
C./min. When temperature then reaches 1000.degree. C., it is
switched to the wet atmosphere. Temperature is lowered at
10.degree. C./min while the wet atmosphere is maintained until
temperature is lowered to 600.degree. C. or less. Thereafter, when
temperature becomes 600.degree. C., it is again returned to the
nitrogen atmosphere and temperature is lowered until the room
temperature.
[0234] Thus, if the wet atmosphere is maintained in a temperature
area including at least the termination-desorption temperature at
the temperature lowering time of the gate oxide film forming
process, the dangling bond of the interface of the gate oxide film
6 and the p type base layer 2 constituting the channel area can be
terminated by an element of H or OH.
[0235] When the N.sub.2O atmosphere is used in this way, the
dangling bond of the interface of the gate oxide film 6 and the p
type base layer 2 constituting the channel area can be also
terminated by N in addition to H or OH. Thus, an interface state
density can be further reduced, and channel mobility can be further
improved. Further, similar contents can be also the and the
improvement of channel mobility can be also intended when the gate
oxidation is performed by using an NO atmosphere without limiting
the atmosphere to the N.sub.2O atmosphere.
[0236] (4) In each of the above embodiment modes, the wet
atmosphere is formed by the pyrogenic method, but may be also
formed by a bubbling method for boiling H.sub.2O.
[0237] (5) In the above second to fifth embodiment modes, a
combination of a technique for setting the wet atmosphere at the
temperature lowering time of the gate oxide film forming process,
and a technique for performing the anneal processing, the reflow
processing, etc. in the wet atmosphere or the hydrogen atmosphere
is explained. However, the combination of these techniques is not
indispensable, and the above effects can be also obtained by
independently using each of the techniques.
[0238] (6) In the above embodiment modes, face a of 4H--SiC, i.e.,
a(11-20)-plane is used, but another face may be also used and
another crystal structure may be also used.
[0239] (7) In the above embodiment modes, the inversion type
lateral MOSFET, the accumulation type lateral MOSFET and the planar
type MOSFET have been explained as examples as the semiconductor
device of the MOS structure. However, these MOSFETs are merely
shown as one example of the semiconductor device of the MOS
structure. For example, the present invention can be also applied
to IGBT of the MOS structure, and can be also applied to MOSFET of
a trench gate type. In short, the present invention can be also
applied to the semiconductor device of any MOS structure.
[0240] (8) In each of the above embodiment modes, the wet
atmosphere or the hydrogen atmosphere is not necessarily set to
100%, but may be also diluted with another gas.
[0241] (9) When the azimuth of a crystal is shown, a bar (-) should
be originally affixed onto a predetermined desirable number, but a
limit of an expression based on a personal computer application
exists. Therefore, in this specification, the bar is set to be
affixed before the predetermined desirable number.
[0242] The above disclosure has the following aspects.
[0243] According to a first aspect of the present disclosure, a
silicon carbide semiconductor device having a MOS structure
includes: a substrate made of silicon carbide; a channel area for
providing an electric current path, wherein the channel area is
made of silicon carbide and disposed in the substrate; a first
impurity area disposed on an upstream side of the electric current
path; a second impurity area disposed on a downstream side of the
electric current path; a gate insulating film disposed on a surface
of the channel area; and a gate disposed on the gate insulating
film. The channel area provides the electric current path as a
channel by controlling a voltage applied to the gate so that an
electric current in the electric current path flowing between the
first impurity area and the second impurity area is controlled. The
channel area and the gate insulating film have an interface
therebetween. The interface includes a dangling bond, which is
terminated by a hydrogen atom or a hydroxyl. The interface has a
hydrogen concentration equal to or larger than 2.6.times.10.sup.20
cm.sup.-3.
[0244] The above device is characterized in that dangling bond of
an interface of the channel area and the gate insulating film is
terminated by an element of H or OH, and hydrogen concentration at
the interface is set to 2.6.times.10.sup.20 cm.sup.-3 or more.
Thus, if the dangling bond of the interface of the channel area and
the gate insulating film is terminated by the element of H or OH,
and the hydrogen concentration at the interface is set to a high
value of 2.6.times.10.sup.20 cm.sup.-3 or more, it is possible to
set a silicon carbide semiconductor device of high channel
mobility.
[0245] Alternatively, the interface may include another dangling
bond, which is terminated by a nitrogen atom. In this case, the
dangling bond of the interface of the channel area and the gate
insulating film is terminated by a nitrogen element in addition to
the element of H or OH. Thus, an interface level can be further
reduced by also terminating the dangling bond of the interface of
the channel area and the gate insulating film by the nitrogen
element so that an improvement of channel mobility can be
intended.
[0246] Alternatively, the substrate may have a main surface, which
is provided by a (11-20)-plane. In this case, a main surface of the
substrate is set to a (11-20)-plane. Mismatching of a lattice
constant with respect to SiO.sub.2 is reduced by using such a plane
azimuth. Therefore, no dangling bond is easily generated, and a
silicon carbide semiconductor device of high channel mobility can
be particularly obtained.
[0247] Alternatively, the hydrogen atom terminating the dangling
bond may have a desorbing amount, which represents a maximum peak
in a range between 800.degree. C. and 900.degree. C. In the above
silicon carbide semiconductor device, it is confirmed that a
desorbing amount of hydrogen for terminating the dangling bond
becomes a peak at 800 to 900.degree. C.
[0248] According to a second aspect of the present disclosure, a
method for manufacturing a silicon carbide semiconductor device
having a MOS structure is provided. The method includes steps of:
preparing a substrate made of silicon carbide; forming a channel
area on the substrate, wherein the channel area is made of silicon
carbide, and provides an electric current path; forming a first
impurity area on an upstream side of the electric current path;
forming a second impurity area on a downstream side of the electric
current path; forming a gate insulating film on a surface of the
channel area; forming a gate on the gate insulating film; and
heating and cooling the substrate. The channel area provides the
electric current path as a channel by controlling a voltage applied
to the gate so that an electric current in the electric current
path flowing between the first impurity area and the second
impurity area is controlled. In the step of heating and cooling the
substrate, the substrate is cooled in a wet atmosphere or a
hydrogen atmosphere in a temperature range between 800.degree. C.
and 900.degree. C. so that a dangling bond of an interface between
the gate insulating film and the channel area is terminated by a
hydrogen atom or a hydroxyl.
[0249] The above method is characterized in that a heat treatment
process is included, and a wet atmosphere or a hydrogen atmosphere
is continuously maintained in a temperature area of 800 to
900.degree. C. at a temperature lowering time in the heat treatment
process so as to terminate dangling bond of an interface of the
gate insulating film and the channel area by an element of H or OH.
Thus, at the temperature lowering time in the heat treatment
process, the wet atmosphere or the hydrogen atmosphere is
continuously maintained in the temperature area of 800 to
900.degree. C. as the termination-desorption temperature, and
temperature is lowered until the termination-desorption temperature
or less. Therefore, the dangling bond of the interface of the gate
insulating film and the channel area can be terminated by the
element of H or OH. Therefore, the silicon carbide semiconductor
device of high channel mobility can be set.
[0250] Alternatively, the step of heating and cooling the substrate
may be performed as heat treatment of the step of forming the gate
insulating film. This method is characterized in that the heat
treatment process is performed as heat treatment of the gate
insulating film forming process, and the wet atmosphere or the
hydrogen atmosphere is continuously maintained in the temperature
area of 800 to 900.degree. C. at a temperature lowering time of the
gate insulating film forming process. Thus, for example, effects
shown in claim 5 can be obtained by continuously maintaining the
wet atmosphere or the hydrogen atmosphere at the temperature
lowering time of heat treatment of the gate insulating film forming
process.
[0251] Alternatively, in the step of heating and cooling the
substrate as the heat treatment of the step of forming the gate
insulating film, the substrate may be cooled in the wet atmosphere
or the hydrogen atmosphere until a temperature is equal to or lower
than 800.degree. C. In this case, it is preferable that the wet
atmosphere or the hydrogen atmosphere is continuously maintained
until temperature is lowered to 800.degree. C. or less at the
temperature lowering time of the gate insulating film forming
process as well as the temperature area of 800 to 900.degree.
C.
[0252] Further, in the step of heating and cooling the substrate as
the heat treatment of the step of forming the gate insulating film,
the substrate may be cooled in the wet atmosphere or the hydrogen
atmosphere until a temperature is equal to or lower than
700.degree. C. In this case, it is more preferable that the wet
atmosphere or the hydrogen atmosphere is continuously maintained
until temperature is lowered to 700.degree. C. or less at the
temperature lowering time of the gate insulating film forming
process.
[0253] Alternatively, in the step of forming the gate insulating
film, a gate oxide film as the gate insulating film may be formed
by a wet oxidation method in such a manner that the substrate is
heated up to a temperature equal to or higher than 800.degree. C.
in the wet atmosphere. This method is characterized in that a gate
oxide film is formed as the gate insulating film by performing wet
oxidation for raising temperature to 800.degree. C. or more within
the wet atmosphere in the gate insulating film forming process.
Thus, the gate insulating film can be constructed by the gate oxide
film by performing the wet oxidation for raising temperature to
800.degree. C. or more within the wet atmosphere.
[0254] Alternatively, in the step of forming the gate insulating
film, the wet atmosphere for performing the wet oxidation method
may be maintained when the substrate is cooled. In this case, the
above effects can be obtained by also maintaining the wet
atmosphere for performing the wet oxidation at the temperature
lowering time.
[0255] Alternatively, the gate insulating film may be formed by a
technique different from the wet oxidation method using the wet
atmosphere in the step of forming the gate insulating film. This
method is characterized in that the gate insulating film is formed
by a technique different from the wet oxidation using the wet
atmosphere in the gate insulating film forming process. Thus, the
gate insulating film can be also formed by the technique different
from the wet oxidation using the wet atmosphere. For example, the
gate oxide film is formed by depositing LTO, TEOS, HTO, etc. by a
dry atmosphere, an N.sub.2O atmosphere, an NO atmosphere, an ozone
atmosphere, an H.sub.2O radical, CVD, etc. An insulating film
except for oxide films of HfO.sub.2, HfSiON, HfAlO,
Al.sub.2O.sub.3, Ta.sub.2O.sub.5, Si.sub.3N.sub.4, etc. may be also
used.
[0256] Alternatively, in the step of forming the gate insulating
film, a gate oxide film as the gate insulating film may be formed
by an oxidation method with an N.sub.2O atmosphere or an NO
atmosphere. In this case, if the gate insulating film is
constructed by a gate oxide film by performing oxidation within the
N.sub.2O atmosphere or the NO atmosphere, the dangling bond of the
interface of the channel area and the gate insulating film can be
also terminated by a nitrogen element in addition to the element of
H or OH. Thus, the interface state density can be further reduced
and the improvement of channel mobility can be intended.
[0257] Alternatively, in the step of heating and cooling the
substrate as the heat treatment of the step of forming the gate
insulating film, a predetermined temperature in a range between
800.degree. C. and 900.degree. C. may be maintained for a
predetermined time when the substrate is cooled. This method is
characterized in that a predetermined temperature within a
temperature range of 800 to 900.degree. C. is held for a
predetermined time at the temperature lowering time of the gate
insulating film forming process. Thus, if the predetermined
temperature of the temperature area of 800 to 900.degree. C. is
maintained for the predetermined time, i.e., if the
termination-desorption temperature is set to a long time, a
termination effect of the dangling bond due to H and OH can be
improved.
[0258] Alternatively, in the step of heating and cooling the
substrate as the heat treatment of the step of forming the gate
insulating film, a predetermined temperature in a range between
700.degree. C. and 1000.degree. C. may be maintained for a
predetermined time when the substrate is cooled. In this case, when
a predetermined temperature within a temperature range of 700 to
1000.degree. C. is held for a predetermined time at the temperature
lowering time of the gate insulating film forming process, the
termination effect of the dangling bond due to H and OH can be also
improved.
[0259] Alternatively, the step of heating and cooling the substrate
may be performed as an anneal process for improving characteristics
of the interface between the gate insulating film and the channel
area after the step of forming the gate insulating film. This
method is characterized in that the heat treatment process is
performed as anneal processing for improving characteristics of the
interface of the gate insulating film and the channel area after
the gate insulating film forming process. Thus, the heat treatment
process can be also performed as the anneal processing for
improving the characteristics of the interface of the gate
insulating film and the channel area after the gate insulating film
forming process. Such anneal processing can be also performed
together with the heat treatment during the gate insulating film
forming process, and can be also performed instead of the heat
treatment during the gate insulating film forming process.
[0260] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate may be cooled in the wet atmosphere
or the hydrogen atmosphere in a temperature range between
800.degree. C. and 900.degree. C. In this case, the wet atmosphere
or the hydrogen atmosphere is continuously maintained in a
temperature area of 800 to 900.degree. C. at the temperature
lowering time of at least the anneal processing.
[0261] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate may be cooled in the wet atmosphere
or the hydrogen atmosphere until a temperature is equal to or lower
than 800.degree. C. In this case, it is preferable that the wet
atmosphere or the hydrogen atmosphere is continuously maintained
until temperature is lowered to 800.degree. C. or less.
[0262] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate may be cooled in the wet atmosphere
or the hydrogen atmosphere in a temperature range between
700.degree. C. and 1000.degree. C. In this case, it is more
preferable that the wet atmosphere or the hydrogen atmosphere is
continuously maintained in a temperature area of 700 to
1000.degree. C. at the temperature lowering time of the anneal
processing.
[0263] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate may be cooled in the wet atmosphere
or the hydrogen atmosphere until a temperature is equal to or lower
than 700.degree. C. In this case, it is further preferable when the
wet atmosphere or the hydrogen atmosphere is continuously
maintained until temperature is lowered to 700.degree. C. or
less.
[0264] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate may be heated in the wet atmosphere
or the hydrogen atmosphere in a temperature range equal to or
higher than 800.degree. C. In this case, the wet atmosphere or the
hydrogen atmosphere is preferably continuously maintained in a
temperature area of 800.degree. C. or more at a temperature rising
time of the anneal processing as well as the temperature lowering
time of the anneal processing.
[0265] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, the substrate is heated in the wet atmosphere or
the hydrogen atmosphere in a temperature range equal to or higher
than 700.degree. C. In this case, it is more preferable if the wet
atmosphere or the hydrogen atmosphere is continuously maintained in
a temperature area of 700.degree. C. or more.
[0266] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, a predetermined temperature in a range between
800.degree. C. and 9.00.degree. C. may be maintained for a
predetermined time when the substrate (1, 31, 61) is cooled. This
method is characterized in that a predetermined temperature within
a temperature range of 800 to 900.degree. C. is held for a
predetermined time at the temperature lowering time of the anneal
processing. Thus, if the predetermined temperature of the
temperature area of 800 to 900.degree. C. is maintained for the
predetermined time, i.e., if the termination-desorption temperature
is set to a long time, the termination effect of the dangling bond
due to H and OH can be improved.
[0267] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, a predetermined temperature in a range between
700.degree. C. and 1000.degree. C. may be maintained for a
predetermined time when the substrate is cooled. In this case, when
a predetermined temperature within a temperature range of 700 to
1000.degree. C. is held for a predetermined time at the temperature
lowering time of the anneal processing, the termination effect of
the dangling bond due to H and OH can be also improved.
[0268] Alternatively, the method may further include a step of:
forming a cap layer on a surface of the gate insulating film. The
step of heating and cooling the substrate as the anneal process is
performed after the step of forming the cap layer. This method is
characterized in that a process for forming a cap layer on a
surface of the gate insulating film is included, and the anneal
processing is performed after the cap layer forming process. Thus,
if the anneal processing is performed after the cap layer is
formed, the dangling bond can be terminated by H or OH while the
desorption of H or OH is further prevented by the cap layer.
Therefore, channel mobility can be further raised.
[0269] Alternatively, the step of forming the cap layer may be
performed together with the step of forming the gate so that the
cap layer provides the gate. In this case, the gate forming process
can be enumerated as the cap layer forming process, and the gate
can be formed as the cap layer. Further, as shown in claim 29, the
cap layer forming process can also include a process for forming an
interlayer insulating film so as to cover the gate, and the
interlayer insulating film can be formed as the cap layer.
[0270] Alternatively, the gate as the cap layer may be made of
polysilicon. In this case, if the cap layer is formed by
polysilicon when the cap layer is set to the gate, it does not
react on the gate insulating film even when the anneal processing
is performed. Therefore, it is suitable as the cap layer. Further,
in the case of polysilicon, hydrogen is generated by an oxidizing
reaction in the wet atmosphere, and contributes to the dangling
bond termination. Therefore, there is a high possibility that
channel mobility is further raised.
[0271] Alternatively, the step of heating and cooling the substrate
as the anneal process may be performed as round-off oxidation of
the gate. The round-off oxidation is performed in the wet
atmosphere. In this case the heat treatment process can be
performed as round-off oxidation of the gate (constructed by
polysilicon, and the round-off oxidation is performed in the wet
atmosphere.
[0272] Alternatively, the round-off oxidation may be performed in a
temperature range between 800.degree. C. and 900.degree. C. In this
case, higher channel mobility is obtained by performing the
round-off oxidation at 800.degree. C. to 900.degree. C. as the
termination-desorption temperature. Further, a round-off oxide film
preferable in controllability can be formed since an oxidizing rate
is suitable.
[0273] Alternatively, in the step of forming the cap layer, an
interlayer insulating film may be formed to cover the gate, and the
cap layer provides the interlayer insulating film.
[0274] Alternatively, the method may further include steps of:
forming an interlayer insulating film to cover the gate; and
performing a reflow process to the interlayer insulating film. The
step of heating and cooling the substrate (1, 31, 61) provides the
step of performing a reflow process. This method is characterized
in that this invention includes a process for forming the
interlayer insulating film so as to cover the gate, and a process
for performing reflow processing of the interlayer insulating film,
and the heat treatment process is performed as the reflow
processing of the interlayer insulating film. Thus, the heat
treatment process can be also performed as the reflow processing of
the interlayer insulating film so that higher channel mobility can
be obtained.
[0275] Alternatively, the wet atmosphere or the hydrogen atmosphere
may be maintained in a temperature range equal to or higher than
800.degree. C. after the step of forming the gate insulating film.
This method is characterized in that the wet atmosphere or the
hydrogen atmosphere is continuously maintained in a temperature
area of 800.degree. C. or more in performing a process of
800.degree. C. or more after the gate insulating film forming
process. When a device process design is made, for example, there
is also a case in which the heat treatment process of high
temperature exceeding 850.degree. C. is performed as in an
interlayer insulating film reflow, etc. In such a case, it is
possible to prevent H or OH from being desorbed from the dangling
bond of the interface of the channel area and the gate insulating
film by continuously maintaining the wet atmosphere or the hydrogen
atmosphere in the temperature area of 800.degree. C. or more.
[0276] Alternatively, the wet atmosphere or the hydrogen atmosphere
may be maintained in a temperature range equal to or higher than
700.degree. C. after the step of forming the gate insulating film.
If the wet atmosphere or the hydrogen atmosphere is continuously
maintained in a temperature area of 700.degree. C. or more in
performing a process of 700.degree. C. or more after the gate
insulating film forming process, the desorption of H or OH can be
further prevented.
[0277] Alternatively, all steps after the step of forming the gate
insulating film may be performed in a temperature range equal to or
lower than 800.degree. C. This method is characterized in that all
processes performed after the gate insulating film forming process
are performed at 800.degree. C. or less. Thus, when the dangling
bond of the interface of the channel area and the gate insulating
film is terminated by an element of H or OH by the gate insulating
film forming process, the desorption of H or OH can be prevented if
all subsequent processes are performed at 800.degree. C. or less.
Here, all the processes performed after the gate insulating film
forming process are performed at 800.degree. C. or less.
[0278] Alternatively, all steps after the step of forming the gate
insulating film are performed in a temperature range equal to or
lower than 700.degree. C. In this case, the above effects can be
more reliably obtained if all the processes performed after the
gate insulating film forming process are performed at 700.degree.
C. or less.
[0279] Alternatively, the method may further include steps of:
forming a source area as the first impurity layer having an
impurity concentration equal to or higher than 3.times.10.sup.20
cm.sup.-3 to contact the channel area; and forming a source
electrode, a part of which is made of nickel, the part contacting
the source area.
[0280] Alternatively, the method may further include steps of:
forming a drain area as the second impurity layer having an
impurity concentration equal to or higher than 3.times.10.sup.20
cm.sup.-3 to contact the channel area or to be disposed on a back
side of the substrate; and forming a drain electrode, a part of
which is made of nickel, the part contacting the drain area.
[0281] Alternatively, the method may further include steps of:
forming a base area in the substrate, wherein the base area has an
electric conductivity type different from the first impurity area
and the second impurity area; forming a contact area to contact the
base area, wherein the contact area has the same electric
conductivity type as the base area and an impurity concentration
equal to or higher than 3.times.10.sup.20 cm.sup.-3; and forming an
electrode for fixing an electric potential of the base area,
wherein the electrode has a part contacting the contact area, the
part being made of nickel.
[0282] The above methods are characterized in that a source area
corresponding to a first impurity layer, a drain area corresponding
to a second impurity layer, or a contact area is set to
3.times.10.sup.20 cm.sup.-3 in impurity concentration, and a
portion coming in contact with a source electrode, a drain
electrode or an electrode is formed by Ni. Thus, ohmic contact can
be set if the source area, the drain area or the contact area is
formed at the high concentration of 3.times.10.sup.20 cm.sup.-3 or
more and the contact portion therewith is set to Ni.
[0283] Alternatively, the method may further include a step of:
annealing the source electrode, the drain electrode, or the
electrode. The step of annealing is performed in a temperature
range equal to or lower than 800.degree. C. In this case, when an
electrode anneal process is performed at 800.degree. C. or less, no
ohmic contact is easily obtained. Therefore, it is effective that
the impurity concentration of the source area, the drain area or
the contact area is set to high concentration, and Ni is used as an
electrode material.
[0284] Alternatively, the method may further include a step of:
annealing the source electrode, the drain electrode, or the
electrode. The step of annealing is performed in a temperature
range equal to or lower than 700.degree. C. In this case, if the
electrode anneal process is performed at 700.degree. C. or less,
the above effects can be more reliably obtained.
[0285] Alternatively, the method may further include a step of:
annealing the substrate at a temperature equal to or lower than
800.degree. C. in an atmosphere different from the wet atmosphere
after the step of heating and cooling the substrate. This method is
characterized in that the anneal process is performed at
800.degree. C. or less in an atmosphere different from the wet
atmosphere of Ar, N.sub.2, O.sub.2, H.sub.2, etc. after the heat
treatment process. Thus, moisture within the gate insulating film
can be removed and the improvement of channel mobility can be
further intended by performing the anneal process in the atmosphere
different from the wet atmosphere.
[0286] Alternatively, the step of annealing the substrate may be
performed at a temperature equal to or lower than 700.degree. C. In
this case, if the anneal process is performed at 700.degree. C. or
less, the desorption of hydrogen can be further restrained so that
the improvement of channel mobility can be further intended.
[0287] Alternatively, the step of forming the gate insulating film
may include steps of: forming a first silicon oxide film on the
surface of the channel area; forming an intermediate insulating
film on the first silicon oxide film, the intermediate insulating
film being made of silicon nitride film or a high dielectric film;
and forming an oxide film by oxidizing the surface of the
intermediate insulating film. In the step of forming the oxide
film, the wet atmosphere or the hydrogen atmosphere is maintained
in a temperature range equal to or higher than 800.degree. C. when
a temperature is lowered. This method is characterized in that the
forming process of the gate insulating film includes a process for
forming a first silicon oxide film on the surface of the channel
area; a process for forming an intermediate insulating film
constructed by a silicon nitride film or a high dielectric film on
the first silicon oxide film; and a process for forming an oxide
film by oxidizing the surface of the intermediate insulating film;
and, in the process for forming the oxide film by oxidizing the
surface of the intermediate insulating film, the wet atmosphere or
the hydrogen atmosphere is continuously maintained in a temperature
area of 800.degree. C. or more at a temperature lowering time of at
least this oxidation. Thus, the gate insulating film can be also
set to a multilayer structure, and reliability of the gate
insulating film can be further raised. In this case, the
termination effect of the dangling bond due to H and OH can be
improved by continuously maintaining the wet atmosphere or the
hydrogen atmosphere in a temperature area of 800.degree. C. or more
at the temperature lowering time of oxidation.
[0288] Alternatively, in the step of forming the oxide film, the
wet atmosphere or the hydrogen atmosphere is maintained in a
temperature range equal to or higher than 700.degree. C. when a
temperature is lowered.
[0289] Alternatively, the step of heating and cooling the substrate
may have a highest temperature in the wet atmosphere or the
hydrogen atmosphere, the highest temperature equal to or lower than
1000.degree. C.
[0290] Alternatively, the step of heating and cooling the substrate
may have a highest temperature in the wet atmosphere or the
hydrogen atmosphere, the highest temperature in a range between
800.degree. C. and 900.degree. C.
[0291] Alternatively, the step of heating and cooling the substrate
may have a highest temperature in the wet atmosphere or the
hydrogen atmosphere, the highest temperature in a range between
900.degree. C. and 1000.degree. C.
[0292] In the above methods, highest temperature of the wet
atmosphere or the hydrogen atmosphere can be set to 1000.degree. C.
or less in the heat treatment process, e.g., the gate oxide film
forming process and the anneal process performed thereafter. Thus,
channel mobility can be improved by setting the highest temperature
of the heat treatment process, e.g., the gate oxide film forming
process and the anneal process performed thereafter to 1000.degree.
C. or less as a termination desorption temperature range,
particularly, 800.degree. C. to 900.degree. C.
[0293] Alternatively, in the step of forming the gate insulating
film, a gate oxide film as the gate insulating film may be formed
by performing a wet oxidation at a temperature equal to or higher
than 1000.degree. C. in the wet atmosphere. This method is
characterized in that gate oxidation temperature is set to
1000.degree. C. or more in the gate oxide film forming process. The
gate oxide film can be formed for a short time by forming the gate
oxide film at such temperature.
[0294] Alternatively, in the step of heating and cooling the
substrate as the anneal process after the step of forming the gate
insulating film, a wet oxidation is performed at a temperature
equal to or higher than 1000.degree. C. in the wet atmosphere. This
method is characterized in that the wet oxidation for raising
temperature to 1000.degree. C. or more within the wet atmosphere is
performed in the anneal processing. Thus, temperature may be also
set to 1000.degree. C. or more in the anneal processing.
[0295] Alternatively, the substrate may have a main surface, which
is provided by a (11-20)-plane. This method is characterized in
that a main surface of the substrate is set to a (11-20)-plane.
Mismatching of a lattice constant with respect to SiO.sub.2 is
reduced by using such a plane azimuth. Therefore, no dangling bond
is easily generated, and a silicon carbide semiconductor device of
high channel mobility can be particularly obtained.
[0296] While the invention has been described with reference to
preferred embodiments thereof, it is to be understood that the
invention is not limited to the preferred embodiments and
constructions. The invention is intended to cover various
modification and equivalent arrangements. In addition, while the
various combinations and configurations, which are preferred, other
combinations and configurations, including more, less or only a
single element, are also within the spirit and scope of the
invention.
* * * * *