U.S. patent application number 12/116271 was filed with the patent office on 2008-10-30 for electronic devices and methods for forming the same.
This patent application is currently assigned to LEXMARK INTERNATIONAL INC.. Invention is credited to Frank E. Anderson, Robert W. Cornell, Yimin Guan.
Application Number | 20080268584 12/116271 |
Document ID | / |
Family ID | 37901113 |
Filed Date | 2008-10-30 |
United States Patent
Application |
20080268584 |
Kind Code |
A1 |
Anderson; Frank E. ; et
al. |
October 30, 2008 |
ELECTRONIC DEVICES AND METHODS FOR FORMING THE SAME
Abstract
Methods for forming electronic devices, such as those having a
flexible substrate and printed material on the flexible substrate.
In one embodiment, the method may include applying materials to a
flexible substrate to form the electronic device. At least some of
the materials applied to the flexible substrate may be applied
using a printing apparatus. The substrate may be annealed when at
least some of the materials are present on the flexible substrate.
The resulting electronic device may have a high charge carrier
mobility in the range from about 10 cm.sup.2/V-s to about 100
cm.sup.2/V-s.
Inventors: |
Anderson; Frank E.;
(Sadieville, KY) ; Cornell; Robert W.; (Lexington,
KY) ; Guan; Yimin; (Lexington, KY) |
Correspondence
Address: |
LEXMARK INTERNATIONAL, INC.;INTELLECTUAL PROPERTY LAW DEPARTMENT
740 WEST NEW CIRCLE ROAD, BLDG. 082-1
LEXINGTON
KY
40550-0999
US
|
Assignee: |
LEXMARK INTERNATIONAL INC.
Lexington
KY
|
Family ID: |
37901113 |
Appl. No.: |
12/116271 |
Filed: |
May 7, 2008 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11241221 |
Sep 30, 2005 |
7414262 |
|
|
12116271 |
|
|
|
|
Current U.S.
Class: |
438/151 ;
257/E21.409; 257/E21.413; 257/E29.211; 257/E29.295 |
Current CPC
Class: |
H01L 27/1292 20130101;
H01L 29/74 20130101; H01L 29/78603 20130101; H01L 29/66757
20130101 |
Class at
Publication: |
438/151 ;
257/E21.409 |
International
Class: |
H01L 21/336 20060101
H01L021/336 |
Claims
1. A method for forming an electronic device, the method
comprising: applying materials to a flexible substrate to form an
electronic device, wherein at least some of the materials are
applied using a printing apparatus; and annealing the substrate
when at least some of the materials reside thereon.
2. The method as recited in claim 1, wherein the electronic device
comprises a three terminal device.
3. The method as recited in claim 3, wherein the electronic device
has a high charge carrier mobility.
4. The method as recited in claim 4, wherein the charge carrier
mobility is in range of from about 10 cm.sup.2/V-s to about 100
cm.sup.2/V-s.
5. The method as recited in claim 1, wherein the substrate
comprises a silicon material and a flexible stainless steel
material.
6. The method as recited in claim 5, wherein the materials include
at least one of a dopant, a dielectric, and a conductive material,
at least one of which is applied by the printing apparatus.
7. The method as recited in claim 6, wherein the substrate further
comprises a gate material, wherein the device includes a first
terminal formed by the conductive material and connected to the
gate material through an aperture in the dielectric, a second
terminal formed by the conductive material and connected to the
dopant through an aperture in the dielectric, and a third terminal
formed by the conductive material and connected to the dopant
through an aperture in the dielectric.
8. A method of forming a multi-terminal device comprising: printing
dopant on a substrate having a semiconductor layer to produce a
plurality of doped regions within the substrate as part of a
multi-terminal device, wherein the doped regions provide a charge
carrier mobility of greater than 10 cm.sup.2/V-s.
9. The method according to claim 8, wherein the doped regions
comprise a source and a drain.
10. The method according to claim 8, wherein the multi-terminal
device is a transistor having three terminals.
11. The method according to claim 8, wherein the printer comprises
an inkjet printing apparatus.
12. The method according to claim 8 further comprising annealing
the substrate to diffuse dopant into the doped regions.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This patent application is a divisional of U.S. patent
application Ser. No. 11/241,221 filed Sep. 30, 2005, entitled
"Electronic Devices and Methods For Forming the Same" which is
incorporated herein by reference.
FIELD OF THE INVENTION
[0002] This invention relates to methods for forming electronic
devices and, more particularly, to methods for forming printed
transistors with high charge carrier mobility.
BACKGROUND OF THE INVENTION
[0003] Traditionally, transistor production requires a highly
complex, cost intensive, prolonged process. Today, due to highly
developed inkjet technologies, printed transistors overcome these
drawbacks and provide fast, low-cost production with high
transistor yields. In addition to overcoming the drawbacks of
traditional transistors, these printed transistors may be applied
to flexible substrates thus allowing them to be implemented in many
technologies, such as active matrix flat panel displays, RFID tags,
and Smart Cards. However, because printed transistors inherently
possess a charge carrier mobility drastically less than
traditionally formed transistors, they have not entirely replaced
conventional transistors in today's markets.
[0004] Charge carrier mobility is defined as electron or hole
diffusivity per volt (cm.sup.2/V-s) and is a measure of how fast
charge moves through a given material when an electric field is
applied. High charge carrier mobility in a transistor correlates to
higher switching speeds and thus permits a transistor with high
charge carrier mobility to be implemented in many applications and
technologies. Printed transistors typically possess a charge
carrier mobility of only around 0.01 to 1 cm.sup.2/V-s while
traditionally formed transistors have charge carrier mobilities of
over 100 cm.sup.2/V-s.
[0005] Materials with higher charge carrier mobility than used in
printed transistors typically require annealing. However, the
annealing process has not been used for conventional printed
transistors. Printing utilizes a flexible substrate, and
conventional flexible substrates are not able to withstand the high
temperatures utilized in the annealing process. Therefore,
conventional printed transistors have been suited only for
applications which permit slow switching speeds.
[0006] In many applications, multi-terminal electronic devices made
from thin-film amorphous/polycrystalline semiconductive material,
such as amorphous silicon, copper indium diselenide or cadmium
telluride, have high charge carrier mobility. However, such
materials typically require annealing, and typical substrates used
in printing cannot withstand the high temperatures used in
annealing. Therefore, other more expensive processes are utilized
to produce such devices.
SUMMARY OF THE INVENTION
[0007] One aspect of the present invention is a method for forming
an electronic device. The method comprises applying materials to
the substrate to form an electronic device, wherein at least some
of the materials are applied using a printing apparatus. The
substrate is annealed when at least some of the materials reside
thereon.
[0008] Another aspect of the present invention is a method of
forming a multi-terminal device. The method comprises printing
dopant on a substrate having a semiconductor layer to produce a
plurality of doped regions within the substrate as part of a
multi-terminal device. The doped regions provide a charge carrier
mobility of greater than 10 cm.sup.2/V-s.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] It is believed that the present invention will be better
understood from the following description of illustrative
embodiments taken in conjunction with the accompanying drawings,
wherein like reference numerals indicate corresponding structures
throughout the views and in which:
[0010] FIG. 1 is a flow diagram of a method for producing a
printed, high charge carrier mobility transistor in accordance with
one illustrative embodiment of the present invention;
[0011] FIG. 2 is a schematic view of a printer system for printing
a high charge carrier mobility transistor on a substrate in
accordance with one illustrative embodiment of the present
invention;
[0012] FIG. 3 is a cross sectional view of a substrate on which
printed, high charge carrier mobility transistors may be produced,
according to an embodiment of the present invention;
[0013] FIG. 4 is a cross sectional view of a substrate with laser
cut recesses for exposing a semiconductor layer, according to an
embodiment of the present invention;
[0014] FIG. 5 is a cross sectional view of a substrate with dopant
applied to recesses, according to an embodiment of the present
invention;
[0015] FIG. 6 is a cut away view of a substrate with dopant
diffused into a semiconductor layer of a substrate, according to an
embodiment of the present invention;
[0016] FIG. 7 is a cross sectional view of a substrate with
dielectric applied to the substrate and apertures within the
dielectric for providing electrodes therethrough, according to an
embodiment of the present invention;
[0017] FIG. 8 is a cross sectional view of a printed, high charge
carrier mobility transistor on a substrate, according to an
embodiment of the present invention;
[0018] FIG. 9 is a cross sectional view of an electrical
representation of a transistor that can be produced according to
principles of the present invention; and
[0019] FIG. 10 is a cross sectional view of an electrical
representation of a thyristor that can be produced according to
principles of the present invention.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0020] In general, and as illustrated by the flow diagram in FIG.
1, one embodiment of the invention relates to printing a
multi-terminal device with at least three terminals, such as a
transistor, that has high charge carrier mobilities, such as in the
range of 10 cm.sup.2/V-s to 100 cm.sup.2/V-s. While the
illustrative embodiment demonstrates a transistor, other
multi-terminal devices may be achieved, such as a thyristor, a
three terminal voltage regulator, or a TRIAC. In this embodiment, a
flexible semiconductor substrate is provided which can be both
processed by a printing apparatus (e.g., a printer, a copier, a
multifunctional device having printing functionality, such as a
printer copier-scanner, and the like) and annealed, and on which
the multi-terminal device may therefore be printed. This is shown
at block 12.
[0021] The substrate may be composed of a variety of stratified
layers used in semiconductor technologies, and may include a
semiconductor layer on a flexible backing. As shown at block 13,
the substrate may be cut, such that recesses may be defined within
the substrate to expose a portion of the semiconductor layer for
forming the terminals. This cutting process may be achieved in
numerous manners and may eliminate only a few layers from the
substrate.
[0022] A dopant may be applied to the recesses and subsequently
diffused so as to create doped areas with high charge carrier
mobility within the semiconductor layer, as shown at blocks 14 and
15. These dopants may be donor or acceptor impurities sufficient to
increase charge carrier mobilities in a semiconductor. The dopants
may be applied by using a printing apparatus, such as a thermal ink
jet printer for example.
[0023] The diffusing operation can include an annealing step
wherein the substrate with dopants is heated to high temperatures
such as by using a furnace, or a pulsed laser beam. A dielectric
material may be applied to the substrate in such a manner so as to
coat the substrate while also providing apertures therethrough, as
shown at blocks 16 and 17 of FIG. 1. The dielectric may be applied
selectively to form the apertures by use of a printing apparatus,
such as a laser printer for example, or by blanket coating the
dielectric and then laser cutting the apertures. The apertures can
provide access to the dopant and gate areas for application of
conductive material. Accordingly, the conductive material may be
provided in the form of an electrode such that the conductive
material is provided within the dielectric apertures and
electrically connected to various areas of the substrate to form
terminals, as shown at block 18. This material can be applied using
a printer. Thus, according to the method of FIG. 1, an annealable
and flexible substrate is processed using a printing apparatus to
form a multi-terminal device which can have high charge carrier
mobility.
[0024] As discussed further herein, and as shown generally in FIG.
2, a printer 20 may be implemented to print a multi-terminal device
on a flexible, annealable substrate 34. Printer 20 may employ an
external CPU 32 (e.g., PC or laptop) to provide print commands to
an internal controller 42, and may comprise a print head 22, a
print head motor 24, a feed roller 26 and a feed roller motor 28.
External CPU 32 may be utilized to control various aspects of the
device to be printed, and, in combination with the controller 41,
to control various aspects of the printer such as material or ink
selection, print head speed, indexing of the substrate 34, and
selective application of the materials to the substrate.
[0025] Print head motor 24 may be utilized to control print head 22
which may include nozzles for selectively applying material (e.g.,
ink, dopant, dielectric or conductive material) to the substrate
along the same axis as print head carrier 30. Feed roller 26 and
feed roller motor 28 may be utilized to supply substrate 34 through
printer 20, along an axis perpendicular to print head carrier 30.
Print head motor 24 and feed roller motor 28 may work in concert
such that any point on substrate 34 may be accessed by print head
22, thereby facilitating formation of multi-terminal devices
anywhere on substrate 34.
[0026] More specifically, and as demonstrated in the illustrative
embodiment, printer 20 may be an inkjet printer which may apply
dopant, dielectric and/or conductive material to create a
transistor on substrate 34. In such an embodiment, printer 20 may
be any thermal inkjet printer capable of ejecting fluid droplets,
such as dopant, dielectric or conductive material, onto substrate
34 from thermal nozzles within inkjet print head 22 by heating the
material using heaters, such as resistors 35, and ejecting the
material through nozzles 37. It should be understood that although
printer 20 is illustrated as a thermal inkjet printer, other
printers are contemplated, such as a piezoelectric inkjet printer
or a laser printer, and such printers may have a variety of
components, such as disclosed in U.S. Pat. No. 6,234,612, the
entire disclosure of which is hereby incorporated herein by
reference. Additionally, it should be understood that if a thermal
inkjet printer is employed, the fluids in print head 22 may be
limited to fluids conducive to ejection from such print head
22.
[0027] In one illustrative embodiment and as demonstrated in FIG.
3, a multi-terminal device may be printed upon a stratified
substrate 134. As illustrated, stratified substrate 134 may
comprise layered surfaces such as a gate electrode layer 36, an
oxide layer 38, a semiconductor layer 40, and a base substrate 42.
A suitable stratified substrate 134 is commercially available as
Iowa Thin Films product PowerFilm, such as disclosed in U.S. Pat.
No. 5,385,848, the entire disclosure of which is hereby incorporate
herein by reference. Various methods may be utilized for creating
the substrate 134. For example, the substrate 134 may be formed by
roll coating amorphous silicon and other layers onto a flexible
substrate by using a thin strip of stainless steel, so as to create
an annealable and flexible product that can be processed by a
printer. However, it should be understood that although stratified
substrate 134 is illustrated as comprising four specific layers,
each layer may comprise various materials and thicknesses depending
upon the desired multi-terminal device or desired application.
[0028] Base substrate 42 may consist of a material having
sufficient surface tension such that other layers of material may
be applied thereupon. Base substrate 42 may also be durable enough
to withstand the intense heat required during an annealing process.
Although as illustrated, base substrate 42 may comprise stainless
steel, other materials may be implemented to achieve the desired
surface tension, flexibility, and/or durability, such as copper
foil, or aluminum foil.
[0029] It is further demonstrated in the present embodiment that
base substrate 42 may be a flexible material. While a material such
as stainless steel may be thinly distributed to achieve
flexibility, other substrates and/or thicknesses may be employed to
achieve the desired rigidity or flexibility. Semiconductor layer 40
may be included within stratified substrate 134 and may comprise
any material sufficient to achieve charge carrier mobilities in the
range of 10 cm.sup.2/V-s to 100 cm.sup.2/V-s.
[0030] Although semiconductor layer 40 is illustrated in the
present embodiment as an amorphous silicon layer, other
semiconductor materials may be used, such as copper indium
diselenide or cadmium telluride. Additionally, in order to achieve
charge mobilities in the range of 10 cm.sup.2/V-s to 100
cm.sup.2/V-s, semiconductor layer 40 may be doped with a
concentration of impurities. The impurity may either be a donor
impurity, as demonstrated in the illustrative embodiment, such that
an n-type semiconductor with excess holes may be formed, or the
impurity or may be an acceptor impurity such that a p-type
semiconductor with excess electrons may be formed.
[0031] Oxide layer 38 may be included within stratified substrate
134 and may comprise any material sufficient to electrically
isolate semiconductor layer 40 from gate electrode layer 36.
Although oxide layer 38 is illustrated in the present embodiment as
a silicon oxide layer, other electrically isolating materials may
be used, such as silicon nitride, or diamond-like carbon. Gate
electrode layer 36 may be included within stratified substrate 134
and may comprise any material sufficient to ensure electrical
contact with conductive material. Although gate electrode layer 36
is illustrated in the present embodiment as a polysilicon layer,
other materials may be used, such as tungsten or tantalum silicide.
Accordingly, substrate 134 is flexible and annealable and can be
processed using a printer to form electronic devices with high
charge carrier mobility, according to embodiments of the present
invention.
[0032] As illustrated in FIG. 4, recesses 44, 46 may be formed
within stratified substrate 134. These recesses 44, 46 may be
implemented such that semiconductor layer 40 may be exposed and
dopant may be applied therein. Because recess size and depth
constraints may influence the overall performance of a
multi-terminal device, the illustrative embodiment demonstrates
that recesses 44, 46 may be formed via laser cutting. However,
alternative processes known in the art may be employed to adhere to
particular recess size and depth constraints, such as lithography
(e.g., photolithography, etch masks, or shadow masks). In
alternative embodiments, device or design variations may result in
different recess configurations. For example, if the stratified
layers within substrate 134 are varied, the depth of recesses 44,
46 may differ as a result of the varying location of semiconductor
layer 40 within stratified substrate 134.
[0033] Similarly, when a continual cutting process is implemented,
one continuous recess may be formed, such that other material may
fill portions of the recess to define multiple recesses.
Alternatively, depending on the multi-terminal device ultimately
developed on substrate 134, such as for example, a thyristor, a
three terminal voltage regulator, or a TRIAC, the shape, quantity
and location of recesses 44, 46 may differ. Similarly, recesses 44,
46 also may be configured to provide for an integrated circuit,
wherein multi-terminal devices are located throughout the
configuration of recesses 44, 46.
[0034] Still referring to FIG. 4, a gate portion 48 may be formed
adjacent to recesses 44, 46 and may comprise a section of gate
electrode layer 36 and oxide layer 38 remaining from the formation
of recesses 44, 46. Such gate portion 48 may provide electrical
isolation from semiconductor layer 40. Similar to recesses 44, 46,
because the width of gate portion 48 may influence overall
performance of a printed, multi-terminal device, the illustrative
embodiment demonstrates that gate portion 48 may be formed via
laser cutting. However, other alternative processes known in the
art may be employed to adhere to particular width constraints, such
as lithography (e.g., photolithography, etch masks, or shadow
masks).
[0035] Similar again to recesses 44, 46, in alternative
embodiments, device or design variations may result in different
gate portion 48 configurations. For example, when the stratified
layers within substrate 134 are varied, the size of gate portion 48
may change as a result of the varying depth of semiconductor layer
40 within stratified substrate 134. Similarly, depending on the
multi-terminal device ultimately developed upon substrate 134, the
width, location and quantity of gate portion 48 may differ.
[0036] As illustrated in FIG. 5, a dopant 50 may be applied to
recesses 44, 46 for later diffusion into semiconductor layer 40 of
stratified substrate 134. Dopant 50 may be a material sufficient to
dope recesses 44, 46 opposite from semiconductor layer 40. For
example, in the illustrative embodiment, n-type semiconductor layer
40 may be doped with an acceptor impurity such that a p-type
semiconductor with excess holes may be created thereon. In an
alternative embodiment, a p-type semiconductor layer 40 may be
doped with a donor impurity such that a n-type semiconductor with
excess electrons may be created thereon.
[0037] As demonstrated in the illustrative embodiment, dopant 50
may be an acceptor impurity of a Group III element material, such
as Boron. As further demonstrated in the illustrative embodiment,
dopant 50 may be applied via thermal inkjet printer wherein
droplets of dopant 50 may be ejected from print head 22. However,
alternative embodiments are contemplated, wherein dopant 50 may be
applied using other printing techniques such as piezoelectric
inkjet, laser or screen printing.
[0038] As illustrated in FIG. 6, dopant 50 may be diffused into
semiconductor layer 40 to create doped regions 144, 146 which may
be doped oppositely from semiconductor layer 40. Many diffusion
methods are known in the art and may be implemented, such as
localized heating with a digital source, laser, or ion
implantation. However, as demonstrated in the illustrated
embodiment, an annealing process which heats stratified substrate
134 to about 600-800.degree. C. may be implemented.
[0039] Referring again to FIGS. 2-6, it should be understood that
stratified substrate 134, dopant 50, and the diffusion method may
affect the range of charge carrier mobilities achieved in a
particular application. In the illustrative embodiment, stratified
substrate 134 may be implemented, dopant material 50 may be applied
and stratified substrate 134 may be annealed in order to achieve a
desired charge carrier mobility range of 10 cm.sup.2/V-s to 100
cm.sup.2/V-s. However, it should be understood that any suitable
stratified substrate 134, dopant 50, and diffusion method may be
implemented to achieve a charge carrier mobility range of 10
cm.sup.2/V-s to 100 cm.sup.2/V-s. In one exemplary embodiment, the
flexibility of the substrate 134 allows for the dopant and/or other
materials to be applied using a printer, such as a laser printer or
an inkjet printer for example.
[0040] As illustrated in FIG. 7, a dielectric material 52 may be
applied to stratified substrate 134 such that current flow through
dielectric material 52 may be limited, thereby reducing leakage
current and unwanted heat throughout a multi-terminal device
implemented on stratified substrate 134. In the illustrative
embodiment, dielectric material 52 may be spun-on-glass and may be
applied as a blanket coat using a spin coating process. However, in
alternative embodiments, other dielectric materials may be
implemented, such as polystyrene, and other application methods may
be implemented, such as application via printer, reel-to-reel
application or any other method known in the art. For example,
dielectric material 52 could be selectively applied via a laser
printer. Dielectric material 52 and the application method may be
implemented to comport with a particular multi-terminal device,
however, because dielectric material 52 may not be necessary in a
particular multi-terminal device, dielectric material 52 may be
absent altogether from stratified substrate 134.
[0041] Still referring to FIG. 7, when dielectric material 52 is
applied to stratified substrate 134, apertures 244, 246 may be
created through dielectric material 52 and may provide access to
doped regions 144, 146 and gate portion 48 of stratified substrate
134. If dielectric material 52 is blanket coated, as demonstrated
in the illustrative embodiment, apertures 244, 246 may be opened
using laser cutting or any other method appropriate for selectively
removing dielectric material, such as wet or dry etching. If
dielectric material 52 is applied via printer, apertures 244, 246
may be formed by selectively applying dielectric material 52 around
each desired aperture. It should be understood that apertures 244,
246 are merely demonstrated to comport with a printed transistor by
providing access to doped regions 144, 146 and gate portion 48, and
may be any size, location or quantity depending upon the desired
multi-terminal device or application.
[0042] As illustrated in FIG. 8, electrodes 54, 56 may be
electrically coupled to doped regions 144, 146 while electrode 58
may be electrically coupled to gate portion 48. In the illustrated
embodiment, electrodes 54, 56 and 58 may be applied via thermal
inkjet printer through apertures 244, 246 and electrodes 54, 56 and
58 may be any conductive material capable being ejected from a
printer, such as silver ink or copper ink, or gold ink or other
conductive ink. Although a thermal inkjet printer is demonstrated
in the illustrative embodiment, as discussed above, other printing
techniques may be implemented such as piezoelectric inkjet or laser
printing. In the illustrative embodiment, electrodes 54, 56 and 58
may be electrically coupled to produce terminals, such that
electrodes 54, 56 facilitate electron flow through semiconductor
layer 40 and electrode 56 facilitates application of a particular
charge to enable such electron flow. It should be understood that
electrodes 54, 56 and 58 are merely demonstrated to comport with a
transistor by facilitating electron flow to doped regions 144, 146
and application of a charge to gate portion 48, and may be any
size, location or quantity depending upon the desired
multi-terminal device or application.
[0043] In the illustrative embodiment and still referring FIG. 8,
the multi-terminal device printed on stratified substrate 134 may
be a printed transistor. Such a transistor may comprise doped
regions 144, 146 within semiconductor layer 40 which are
electrically coupled to electrodes 54 and 56, respectively. The
embodiment may also comprise a gate portion 48 which is
electrically coupled to electrode 58.
[0044] The structure formed by doped region 144 and electrode 54
may commonly be referred to as a source 344 and the structure
formed by doped region 146 and electrode 56 may commonly be
referred to as a drain 346. Similarly, the other structure formed
by gate portion 48 and electrode 58 may commonly be referred to as
a gate 348. As illustrated, gate 348 may be positioned between
source 344 and drain 346 such that source 344 and drain 346
facilitate electron flow to the doped regions 144, 146 of
semiconductor layer 40 and gate 348 facilitates application of a
particular polarity to enable electron flow therebetween.
Consistent with the transistor illustrated in FIG. 8, FIG. 9
illustrates an electrical representation of such transistor so that
an additional illustrative embodiment may be demonstrated and
understood.
[0045] As illustrated electrically in FIG. 10, an additional
embodiment of a multi-terminal device may be a thyristor. Such a
thyristor may comprise an anode, cathode and gate. It should be
understood to one skilled in the art that similar components
disclosed above comprise the current embodiment and that the
current embodiment may be achieved through similar methods. For
example, and as illustrated in FIGS. 2-8, recesses 204, 206 may be
formed within a flexible, stratified substrate 134 such that n-type
semiconductor layer 40 may be exposed and printed thereon using a
printer. Additionally, n-type semiconductor layer 40 may be doped
with an acceptor impurity such that a p-type semiconductor with
excess holes may be created within recesses 144, 146. Similarly,
dielectric material 52 may be provided over stratified substrate
134.
[0046] Apertures 244, 246, together with electrodes 54, 56 may
provide electrical connection to doped regions 144, 146 to create
gate 444 and anode 446, but aperture 248 may be provided outside
doped regions 144, 146 such that electrode 56 may be electrically
connected to a gate portion 48 lying outside of doped regions 144,
146 to create cathode 156. The dopant 50, dielectric 52, electrodes
54, 56 and 58, and/or other materials can be applied by a printer
to create this three terminal device. The device will exhibit high
charge carrier mobility, such as in the range of 10 cm.sup.2/V-s to
100 cm.sup.2/V-s and therefore can be used in applications where
high switching speed is desired.
[0047] The foregoing description of the various embodiments of the
invention has been presented for the purposes of illustration and
description. It is not intended to be exhaustive or to limit the
invention to the precise form disclosed. Many alternatives,
modifications and variations will be apparent to those skilled in
the art of the above teaching. Accordingly, while some of the
alternative embodiments of the printed transistor with high charge
carrier mobility and the methods for producing such have been
discussed specifically, other embodiments will be apparent or
relatively easily developed by those of ordinary skill in the art.
Accordingly, this invention is intended to embrace all
alternatives, modifications and variations that have been discussed
herein.
* * * * *