U.S. patent application number 11/836609 was filed with the patent office on 2008-10-02 for semiconductor integrated circuit.
Invention is credited to Masashi Arakawa, Takeshi Iwamoto, Kazushi Kono, Shigeki Obayashi, Toshiaki Yonezu.
Application Number | 20080237787 11/836609 |
Document ID | / |
Family ID | 39289087 |
Filed Date | 2008-10-02 |
United States Patent
Application |
20080237787 |
Kind Code |
A1 |
Yonezu; Toshiaki ; et
al. |
October 2, 2008 |
SEMICONDUCTOR INTEGRATED CIRCUIT
Abstract
The present invention aims at offering the semiconductor
integrated circuit which can perform reliable relief processing
using an electric fuse. The present invention is provided with a
fuse wiring, a first electrode pad, a second electrode pad, a
pollution-control layer, and a first via hole wiring and a second
via hole wiring. And a fuse wiring is cut by passing beyond a
predetermined current value. A first electrode pad is connected to
one side of a fuse wiring. A second electrode pad is connected to
the other of a fuse wiring. A pollution-control layer is formed in
the upper layer and the lower layer of a fuse wiring via an
insulating layer. It is formed via an insulating layer to the side
surface of a fuse wiring, it connects with a pollution-control
layer, and the first via hole wiring of a pair surrounds a fuse
wiring. To a fuse wiring, the second via hole wiring of a pair is
formed in the outside of a first via hole wiring so that a first
via hole wiring may be surrounded.
Inventors: |
Yonezu; Toshiaki; (Tokyo,
JP) ; Iwamoto; Takeshi; (Tokyo, JP) ;
Obayashi; Shigeki; (Tokyo, JP) ; Arakawa;
Masashi; (Tokyo, JP) ; Kono; Kazushi; (Tokyo,
JP) |
Correspondence
Address: |
MILES & STOCKBRIDGE PC
1751 PINNACLE DRIVE, SUITE 500
MCLEAN
VA
22102-3833
US
|
Family ID: |
39289087 |
Appl. No.: |
11/836609 |
Filed: |
August 9, 2007 |
Current U.S.
Class: |
257/529 ;
257/E23.01 |
Current CPC
Class: |
H01L 2924/0002 20130101;
H01L 2924/0002 20130101; H01L 23/5256 20130101; H01L 2924/00
20130101 |
Class at
Publication: |
257/529 ;
257/E23.01 |
International
Class: |
H01L 23/48 20060101
H01L023/48 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 11, 2006 |
JP |
2006-219370 |
Feb 9, 2007 |
JP |
2007-30263 |
Claims
1. A semiconductor integrated circuit, comprising: a fuse wiring
cut by passing beyond a predetermined current value; a first
electrode pad connected to one side of the fuse wiring; a second
electrode pad connected to the other side of the fuse wiring; a
pollution-control layer formed in an upper layer and a lower layer
of the fuse wiring via an insulating layer; a first via hole wiring
of a pair which is formed via the insulating layer to a side
surface of the fuse wiring, connects with the pollution-control
layer, and surrounds the fuse wiring; and a second via hole wiring
of a pair formed in an outside of the first via hole wiring to the
fuse wiring so that the first via hole wiring may be
surrounded.
2. A semiconductor integrated circuit according to claim 1, wherein
one end of the first via hole wiring is close to the first
electrode pad, and the other end of the second via hole wiring is
close to the second electrode pad.
3. A semiconductor integrated circuit according to claim 1, wherein
400 nm or more of distance of the pollution-control layer and the
first via hole wiring, and the fuse wiring is secured.
4. A semiconductor integrated circuit according to claim 1, wherein
between the pollution-control layer and the fuse wiring, two or
more layers of fine layers are formed at least.
5. A semiconductor integrated circuit according to claim 1, further
comprising: a crack expansion prevention layer discontinuous in a
wiring direction of the fuse wiring, the crack expansion prevention
layer formed in an upper layer and a lower layer of the fuse wiring
via the insulating layer between the fuse wiring and the
pollution-control layer.
6. A semiconductor integrated circuit, comprising: a fuse wiring
cut by passing beyond a predetermined current value; a first
electrode pad connected to one side of the fuse wiring; a second
electrode pad connected to the other side of the fuse wiring; and a
crack expansion prevention layer discontinuous in a wiring
direction of the fuse wiring, the crack expansion prevention layer
formed in an upper layer and a lower layer of the fuse wiring via
an insulating layer.
7. A semiconductor integrated circuit according to claim 6, wherein
400 nm or more of distance of the crack expansion prevention layer
and the fuse wiring is secured.
8. A semiconductor integrated circuit according to claim 6, wherein
between the crack expansion prevention layer and the fuse wiring,
two or more layers of fine layers are formed at least.
9. A semiconductor integrated circuit according to claim 1, further
comprising: a plurality of first plugs electrically connected with
the first electrode pad; and a plurality of second plugs
electrically connected with the second electrode pad; wherein a
total of a contact cross section with the first electrode pad of
the first plugs is the same as a total of a contact cross section
with the second electrode pad of the second plugs.
10. A semiconductor integrated circuit according to claim 1,
further comprising: a plurality of first plugs electrically
connected with the first electrode pad; and a plurality of second
plugs electrically connected with the second electrode pad; wherein
a cross section of the second plug is the same as a cross section
of the first plug, and a number of the second plug is the same as a
number of the first plug.
11. A semiconductor integrated circuit according to claim 1,
wherein the fuse wiring is formed in a fine layer.
12. A semiconductor integrated circuit according to claim 1,
wherein the pollution-control layer has a portion electrically cut
at least one place in a position corresponding to a fuse wiring
which functions as an electric fuse.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application claims priority from Japanese patent
application No. 2006-219370 filed on Aug. 11, 2006, and No.
2007-30263 filed on Feb. 9, 2007, the content of which is hereby
incorporated by reference into this application.
[0002] 1. Field of the Invention
[0003] The present invention is an invention concerning a
semiconductor integrated circuit, and especially relates to the
semiconductor integrated circuit provided with a fuse.
[0004] 2. Description of the Background Art
[0005] By forming a fuse in a semiconductor integrated circuit, the
fuse was cut, the value of resistance was adjusted and relief
processing, such as transposing a defective element to a normal
element, was performed. And generally the laser fuse cut by the
laser beam irradiation from the outside was used as a fuse
conventionally used for relief processing.
[0006] However, since laser irradiation was done and fuse cutting
was done from the outside, the laser fuse cannot perform relief
processing after a mold. Since memory space's doing realization of
high-capacity in a memory or SOC (System On a Chip) and SIP (System
in Package) are used, in order to improve the yield at an early
stage, relief processing is needed after a mold. However, since the
laser irradiation from the outside cut with the laser fuse, relief
processing was able to be performed only on the bare wafer.
[0007] The electric fuse which sends current and is cut and which
is relievable even if it is on site or after molding, naturally on
wafer is used for the semiconductor integrated circuit. Since it
cut by doing laser irradiation from the outside, the trimming
dedicated device and the relief processing step were required of
the laser fuse. However, since it can trim immediately after a test
using a circuit tester with an electric fuse, it is newly
unnecessary in trimming equipment or a relief processing step. This
electric fuse is described to Patent Reference 1 or Patent
Reference 2.
[0008] [Patent Reference 1] Japanese Unexamined Patent Publication
No. 2005-39220
[0009] [Patent Reference 2] Japanese Unexamined Patent Publication
No. 2005-57186
SUMMARY OF THE INVENTION
[0010] When using an electric fuse for a semiconductor integrated
circuit, it is necessary to minimize the area of a relieving
circuit including an electric fuse as much as possible. In order to
generate current required for cutting of an electric fuse
especially, a power supply circuit is required. In order to
minimize the area of this power supply circuit as much as possible,
it is necessary to minimize current required for cutting.
[0011] When an electric fuse is cut, there is a problem of a crack
occurring from a cut section, or the wiring material of a cut
section dispersing, polluting a periphery, and reducing the
reliability of a semiconductor integrated circuit.
[0012] Then, the present invention aims at offering the
semiconductor integrated circuit which can perform reliable relief
processing using an electric fuse.
[0013] The solving means concerning the present invention comprises
a fuse wiring cut by passing beyond a predetermined current value,
a first electrode pad connected to one side of the fuse wiring, a
second electrode pad connected to the other of the fuse wiring, a
pollution-control layer formed in an upper layer and a lower layer
of the fuse wiring via an insulating layer, a first via hole wiring
of a pair which is formed via the insulating layer to a side
surface of the fuse wiring, connects with the pollution-control
layer, and surrounds the fuse wiring, and a second via hole wiring
of a pair formed in an outside of the first via hole wiring to the
fuse wiring so that the first via hole wiring may be
surrounded.
[0014] A semiconductor integrated circuit described in the present
invention is provided with the first via hole wiring of the pair
which connects with a pollution-control layer and surrounds a fuse
wiring, and the second via hole wiring of a pair formed so that a
first via hole wiring may be surrounded. When an electric fuse is
cut, it prevents the wiring material of a cut section dispersing
and polluting a periphery, and has the effect of improving the
reliability of a semiconductor integrated circuit. In a
semiconductor integrated circuit described in the present
invention, since the influence of the up-and-down layer on the fuse
wiring at the time of fuse cutting can be suppressed by arranging a
pollution-control layer, the up-and-down layer concerned can be
wired and reduction of chip size is attained.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] FIG. 1 is a block diagram explaining the usage use of the
electric fuse used for a semiconductor integrated circuit;
[0016] FIG. 2 is a perspective view of the electric fuse concerning
Embodiment 1 of the present invention;
[0017] FIG. 3 is a cross-sectional view of the semiconductor
integrated circuit concerning Embodiment 1 of the present
invention;
[0018] FIG. 4 is the SEM photography of the electric fuse
concerning Embodiment 1 of the present invention;
[0019] FIG. 5 is the SEM photography in which a plurality of
electric fuses concerning Embodiment 1 of the present invention are
arranged;
[0020] FIG. 6 is the SEM photography of the electric fuse
concerning Embodiment 2 of the present invention;
[0021] FIG. 7 is the section SEM photography of the electric fuse
concerning Embodiment 2 of the present invention;
[0022] FIG. 8 is a plan view of the electric fuse concerning
Embodiment 2 of the present invention;
[0023] FIGS. 9 and 10 are cross-sectional views of the electric
fuse concerning Embodiment 2 of the present invention;
[0024] FIGS. 11 and 12 are drawings explaining the relation of the
crack expansion prevention layer of an electric fuse and crack
concerning Embodiment 2 of the present invention;
[0025] FIGS. 13 to 15 are drawings explaining the distance of the
pollution-control layer of an electric fuse and fuse wiring
concerning Embodiment 2 of the present invention;
[0026] FIGS. 16 to 18 are drawings showing the fuse current before
and after the cutting processing of the electric fuse concerning
Embodiment 2 of the present invention; and
[0027] FIGS. 19 and 20 are cross-sectional views of the electric
fuse concerning Embodiment 3 of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Embodiment 1
[0028] First, the usage use of the electric fuse used for a
semiconductor integrated circuit is explained using FIG. 1. FIG. 1
is the drawing which expressed the processing after wafer test (WT)
101 schematically. In FIG. 1, a test and relief processing can be
completed at one step by performing electric fuse trimming 102
after wafer test (WT) 101. On the other hand, it is necessary to
perform laser trimming 103 of a separated process after wafer test
(WT) 101, and, in the case of the semiconductor integrated circuit
using a laser fuse, two steps are needed for performing test and
relief processing. Therefore, one step can be skipped by using an
electric fuse for a semiconductor integrated circuit. That is, by
combining an electric fuse and BIST (built in self-test), it
becomes possible to build a self repair test, and the cost of a
test can be reduced.
[0029] In FIG. 1, when a non defective unit and a defective unit
are sorted out by final test (FT) 104 done after the mold of a
semiconductor integrated circuit, and it is an electric fuse, a
defective unit can be made non-defective-unit by bit relief
processing 105. That is, the relief after burn-in etc. is attained
by using an electric fuse for a semiconductor integrated circuit,
and productivity improves.
[0030] The wiring blowout type electricity fuse is used in the
semiconductor integrated circuit concerning this embodiment.
Generally polysilicon was used for this electric fuse as a fuse
wiring material until now. Since the frequency in use of metal
wiring will increase from now on, Cu, Al, Ti, Ta, etc. come to be
used as a fuse wiring material. So, this embodiment explains the
electric fuse which used Cu as a fuse wiring material. Even if it
uses fuse wiring materials other than Cu, an effect equivalent to
the effect described below can be acquired.
[0031] The perspective view of the electric fuse related to this
embodiment at FIG. 2 is shown, and the cross-sectional view of the
semiconductor integrated circuit which includes the electric fuse
related at this embodiment at FIG. 3 is shown. In FIG. 2, electrode
pad 2 for feeding power is connected to one side of fuse wiring 1,
and electrode pad 3 for GND supply is connected to the other. In
order to electrically connect this electrode pad 2 for feeding
power and power supply circuit (not shown), a plurality of plugs 4
for feeding power are formed in electrode pad 2 for feeding power.
In order to electrically connect electrode pad 3 for GND supply,
and a power supply circuit (not shown), a plurality of plugs 5 for
GND supply are formed in electrode pad 3 for GND supply. Fuse
length is the length of fuse wiring 1 from electrode pad 2 for
feeding power to electrode pad 3 for GND supply.
[0032] A required thing is designing the structure of the blown-out
type electricity fuse which is 100% of a relief rate, and makes
cutting current the minimum from a viewpoint of the structural
design of a fuse. However, fuse wirings 1 which can be stably cut
with the minimum cutting current differ according to fuse width,
fuse thickness, material, etc. In fuse wiring 1 shown in FIG. 2,
fuse width was set as 0.12 .mu.m, fuse thickness was set as 250 nm,
and material was set as Cu.
[0033] With the electric fuse concerning this embodiment, in order
to always generate a cutting part in the central part of fuse
wiring 1, the number of plugs 4 for feeding power and the number of
plugs 5 for GND supply are made into the same number. Each cross
section of plug 4 for feeding power and plug 5 for GND supply is
the same. Hereby, when applying current and cutting at an electric
fuse, the heat of fuse wiring 1 generated in application of current
escapes from plug 4 for feeding power, and plug 5 for GND supply
uniformly, and it can cut in the mostly central part of fuse wiring
1.
[0034] However, the number of plugs 4 for feeding power and the
number of plugs 5 for GND supply are not necessarily restricted to
the same number. When the total of a contact cross section with
electrode pad 2 for feeding power of a plurality of plugs 4 for
feeding power is the same as the total of a contact cross section
with electrode pad 3 for GND supply of a plurality of plugs 5 for
GND supply, it is good.
[0035] The electric fuse concerning this embodiment is formed in a
fine layer in the semiconductor integrated circuit with which a
global layer is about 1000 nm, a semi global layer is about 350 nm,
and a fine layer is about 200 nm. In this embodiment, although the
fine layer is about 200 nm, generally the layer about 300 nm--about
100 nm is called fine layer. With the cross-sectional view shown in
FIG. 3, the fine layer from M1 layer to M5 layer is illustrated.
And although fuse wiring 1 may be formed in any M1 layer to M5
layer shown in FIG. 3, it is formed in M3 layer by this
embodiment.
[0036] In FIG. 3, the wiring layer from M1 layer to M5 layer is
formed via TEOS layer 7 on Si substrate 6. And it separates by a
SiCN layer between each wiring layer, and separates by SiOC between
each wiring in the same wiring layer. In FIG. 3, the enlarged view
of fuse wiring 1 corresponding to the A-A' surface of FIG. 2 is
illustrated. With this enlarged view, barrier metal layer 8 is
formed between fuse wiring 1 of Cu, and SiOC of an insulating film.
This barrier metal layer 8 is formed by Ta or TaN.
[0037] In order to cut fuse wiring 1, it is necessary to change the
material of fuse wiring 1 from a solid to a liquid. That is, it is
necessary to send current through fuse wiring 1 and to raise the
temperature of fuse wiring 1 self at the lowest to the melting
point (for a melting point to be about 1100.degree. C., when
material is Cu) of the material concerned.
[0038] Next, the SEM (Scanning Electron Microscope) photography of
an electric fuse is shown in FIG. 4. A state that fuse wiring 1 of
middle was cut and the deposit part of the wiring material has
spread near the concerned cut section is shown by FIG. 4. When the
deposit part generated at the time of cutting of this fuse wiring 1
occurs near electrode pad 2 for feeding power, or the electrode pad
3 for GND supply, there is concern which produces the bad influence
of short-circuiting with other adjoining wirings. Therefore, in the
electric fuse concerning this embodiment, the number of plug 4 for
feeding power connected to electrode pad 2 for feeding power and
the number of plug 5 for GND supply connected to electrode pad 3
for GND supply were made into the same number, and the cut section
is controlled to occur in the central part of fuse wiring 1.
[0039] The simulation of the heat generated in fuse wiring 1 is
done by the case where the number of plug 4 for feeding power and
the number of plug 5 for GND supply are made into the same number,
and the case where it is made a different number. As a result, when
the number of plug 4 for feeding power and the number of plug 5 for
GND supply are made into the same number, compared with the case
where it is made a different number, the portion which reaches
beyond a melting point becomes short within fuse wiring 1. And it
turned out that the portion more than melting point temperature
concentrates on the central part of fuse wiring 1.
[0040] In the semiconductor integrated circuit concerning this
embodiment, as shown in the SEM photography of FIG. 5, a plurality
of electric fuses are formed. In FIG. 5, although a plurality of
electric fuses are located in a line with the horizontal direction,
the present invention may be structure which is not restricted to
this but is located in a line with a longitudinal direction.
Several of the electric fuse shown in FIG. 5 are cut in the central
part of the fuse wiring.
Embodiment 2
[0041] The SEM photography for a cut section of fuse wiring 1 is
shown in FIG. 6, and the section SEM photography for a cut section
of fuse wiring 1 is shown in it at FIG. 7. FIG. 6 and FIG. 7 show a
state that Cu component of the cut section of fuse wiring 1 which
became high temperature has deposited as a Cu crack to the upper
oxide film when fuse wiring 1 is cut in high electric current. At
FIG. 7, by FIB (Focused Ion Beam) etc., a section is cut from the
cut section of fuse wiring 1, and SEM observation is performed.
[0042] Cu crack shown in FIG. 6 and FIG. 7 extends by stress
application of temperature, bias, etc., and there is a possibility
of having a bad influence on the reliability of a semiconductor
integrated circuit. Cu which dispersed on the outskirts at the time
of cutting of fuse wiring 1 may be diffused around a fuse, may
cause metallic contamination, and may cause the malfunction of a
nearby transistor etc.
[0043] So, with the electric fuse concerning this embodiment, crack
expansion prevention layer 10 shown in FIG. 8 through FIG. 10 as
crack expansion preventive measures is formed. This crack expansion
prevention layer 10 arranges many wirings about width 0.10 .mu.m in
parallel to the short side of fuse wiring 1 as crack progress
prevention layer 10 in the up-and-down layer (at the layer
structure shown in FIG. 3, they are M2 layer and M4 layer) of fuse
wiring 1, as shown in FIG. 9 or FIG. 10. That is, crack expansion
prevention layer 10 forms the discontinuous layer to the wiring
direction of fuse wiring 1. Since this crack expansion prevention
layer 10 is formed in a wiring layer, it is formed with wiring
materials, such as Cu.
[0044] FIG. 8 shows the plan view of the electric fuse concerning
this embodiment. And the cross-sectional view in a B-B' surface of
the electric fuse shown in FIG. 8 is FIG. 9, and the
cross-sectional view in a C-C' surface of the electric fuse shown
in FIG. 8 is FIG. 10. The description of M1-M5 shown in right-hand
side at FIG. 9 and FIG. 10 corresponds with the layer structure
shown in FIG. 3.
[0045] With the electric fuse concerning this embodiment,
pollution-control layer 11, and via hole wirings 12 and 13 shown in
FIG. 8 through FIG. 10 are formed as measures against metallic
contamination by Cu scattering of fuse wiring 1. This
pollution-control layer 11 is formed in the further upper layer (at
the layer structure shown in FIG. 3, it is M5 layer), and a further
lower layer of crack expansion prevention layer 10 (at the layer
structure shown in FIG. 3, it is M1 layer) platy, as shown in FIG.
9 or FIG. 10. And via hole wiring 12 is formed so that an M5 layer
pollution-control layer 11 and M1 layer pollution-control layer 11
may be connected and fuse wiring 1 may be surrounded.
[0046] With the electric fuse concerning this embodiment, as shown
in FIG. 8 or FIG. 9, via hole wiring 13 is formed in the outside of
via hole wiring 12 to fuse wiring 1. It means that this had formed
the double pollution-control layer to the horizontal direction of
fuse wiring 1 with the electric fuse concerning this embodiment.
Via hole wirings 12 and 13 are wirings which connect the wiring
layer from M5 layer to M1 layer, and are formed with wiring
materials, such as Cu.
[0047] With the electric fuse concerning this embodiment, one end
of via hole wiring 12 approaches electrode pad 2 for feeding power,
and the other end of via hole wiring 13 is close to electrode pad 3
for GND supply. Here, that the one end of via hole wiring 12
approaches electrode pad 2 for feeding power means the state where
they are approaching to the degree which can prevent dispersed Cu,
although an insulating film exists between via hole wiring 12 and
electrode pad 2 for feeding power. It is also the same that the
other end of via hole wiring 13 approaches electrode pad 3 for GND
supply.
[0048] Unless it passes through the portion pinched with via hole
wiring 12 and via hole wiring 13 passing through between via hole
wiring 12 and electrode pads 3 for GND supply, it becomes
impossible hereby, for Cu which dispersed by cutting of fuse wiring
1 to come out of an electric fuse. That is, by making via hole
wiring 12 and via hole wiring 13 into alternate structure, as shown
in FIG. 8, distance until Cu which dispersed results out of an
electric fuse is earned, and the reliability of the semiconductor
integrated circuit is increased.
[0049] With the electric fuse concerning this embodiment, via hole
wiring 12 and via hole wiring 13 presupposed that alternate
structure like FIG. 8 is taken. However, the present invention may
not be restricted to this but may be an alternate structure (a part
of via hole wiring 13 touches electrode pad 2 for feeding power
physically via an insulating film, and a part of via hole wiring 12
touches electrode pad 3 for GND supply physically via an insulating
film) contrary to FIG. 8. In the present invention, via hole wiring
12 and via hole wiring 13 do not necessarily need to become
alternate structure. Electrode pad 2 for feeding power and
electrode pad 3 for GND supply may be close to the ends of via hole
wirings 12 and 13, and do not need to be close.
[0050] Next, crack expansion prevention layer 10 has a structure
discontinuous to the wiring direction of fuse wiring 1, as shown in
FIG. 8 or FIG. 10. This is for setting it as the structure where
the relief rate lowering by short-circuit with crack expansion
prevention layer 10 is avoided, and crack expansion can be
prevented at the time of cutting of fuse wiring 1. The case of the
structure where crack expansion prevention layer 10 is following
the wiring direction of fuse wiring 1 at FIG. 11 is shown. Since
crack expansion prevention layer 10 is following the wiring
direction in FIG. 11 when crack 14 generated into the portion from
which fuse wiring 1 was cut touches crack expansion prevention
layer 10, fuse wiring 1 which must have been cut will conduct via
crack 14 and crack expansion prevention layer 10. Therefore, when
crack expansion prevention layer 10 is following the wiring
direction of fuse wiring 1, the relief rate of an electric fuse
will fall.
[0051] On the other hand, the case of structure with crack
expansion prevention layer 10 discontinuous to the wiring direction
of fuse wiring 1 is shown in FIG. 12 like this embodiment. In FIG.
12, even if crack 14 generated into the portion from which fuse
wiring 1 was cut touches crack expansion prevention layer 10, since
crack expansion prevention layer 10 is discontinuous to a wiring
direction, it does not conduct via crack 14 and crack expansion
prevention layer 10. Therefore, in the case of discontinuous crack
expansion prevention layer 10 shown in FIG. 12, crack expansion can
be prevented, without the relief rate of an electric fuse
falling.
[0052] Next, as the electric fuse concerning this embodiment is
shown in FIG. 8 and FIG. 10, at least 400 nm or more (in the case
of a fine layer, they are two or more layers) of distance of crack
expansion prevention layer 10, pollution-control layer 11 and via
hole wiring 12, and fuse wiring 1 is opened. Hereby, the electric
fuse concerning this embodiment can avoid decline in a relief
rate.
[0053] The distance of crack expansion prevention layer 10,
pollution-control layer 11 and via hole wiring 12, and fuse wiring
1 is explained concretely. FIG. 13 shows the cross-sectional view
of the electric fuse when pollution-control layer 11 is formed in
M4 layer and distance with fuse wiring 1 in M3 layer is set to 200
nm. FIG. 14 shows the cross-sectional view of the electric fuse
when pollution-control layer 11 is formed in M2 layer and distance
with fuse wiring 1 in M3 layer is set to 200 nm. FIG. 15 shows the
cross-sectional view of the electric fuse when pollution-control
layer 11 is formed in M1 and M5 layers and distance with fuse
wiring 1 in M3 layer is set to 400 nm.
[0054] And the result of having measured the fuse current before
and after cutting processing (processing which applies the current
beyond a predetermined current value for cutting) to the electric
fuse of the structure shown in FIG. 13 through FIG. 15 is shown in
FIG. 16 through FIG. 18, respectively. 1000 electric fuses of the
structure shown in FIG. 13 through FIG. 15 existed, respectively,
and the result shown in FIG. 16 through FIG. 18 has measured the
fuse current before and after cutting processing to each electric
fuse. Therefore, the horizontal axis of FIG. 16 through FIG. 18
constitutes a fuse number to 1-1000.
[0055] The result shown in FIG. 16 is the result of using the
electric fuse of the structure shown in FIG. 13. Although, as for
fuse current, about 0.02A is flowing before the cutting processing
of an electric fuse in the result of FIG. 16, and almost all fuse
current is about 1.0E-07A or about 1.0E-08A after the cutting
processing of an electric fuse. However, what varies from about
1.0E-04A to about 1.0E-06A, and the thing which has defective
cutting which flows in more than 1.0E-03A are included. That is,
the result of FIG. 16 means that the relief rate in an electric
fuse falls, when the distance of pollution-control layer 11 in M4
layer and fuse wiring 1 is 200 nm.
[0056] Similarly, the result shown in FIG. 17 is the result of
using the electric fuse of the structure shown in FIG. 14. In the
result of FIG. 17, as for fuse current, about 0.02A is flowing
before the cutting processing of an electric fuse. After the
cutting processing of an electric fuse, although almost all fuse
current is about 1.0E-07A, poor cutting which flows in more than
1.0E-03A is included. That is, the result shown in FIG. 17 means
that the relief rate in an electric fuse falls, when the distance
of pollution-control layer 11 in M2 layer and fuse wiring 1 is 200
nm.
[0057] On the other hand, the result shown in FIG. 18 is the result
of using the electric fuse of the structure shown in FIG. 15. In
the result of FIG. 18, as for fuse current, about 0.02A is flowing
before the cutting processing of an electric fuse. Almost all fuse
current is stable about 1.0E-08A after the cutting processing of an
electric fuse. That is, the result shown in FIG. 18 means that the
relief rate in an electric fuse does not fall, when the distance of
pollution-control layer 11 in M1, M5 layers and fuse wiring 1 is
400 nm.
[0058] When pollution-control layer 11 approaches fuse wiring 1 too
much from the result shown in FIG. 16 through FIG. 18, the heat
generated at the time of the cutting processing of fuse wiring 1 is
transmitted to pollution-control layer 11, and escapes, and the
temperature of fuse wiring 1 does not reach to a melting point at
the time of cutting, but it is thought that poor cutting occurs.
Therefore, with the electric fuse concerning this embodiment, in
order to make force current into the minimum and to disconnect it
stably, it is necessary to keep the distance of pollution-control
layer 11 and fuse wiring 1 at at least 400 nm.
[0059] When it thinks from a viewpoint which misses the heat
generated at the time of the cutting processing of fuse wiring 1,
it is necessary to also keep the same the distance of crack
expansion prevention layer 10, via hole wiring 12, and fuse wiring
1 at at least 400 nm. Hereby, the electric fuse concerning this
embodiment can avoid decline in a relief rate.
[0060] Since one layer is about 200 nm when forming the wiring
layer shown in FIG. 15 etc. in a fine layer, it is necessary to
detach at least two or more layers, and to form crack expansion
prevention layer 10 or pollution-control layer 11 from fuse wiring
1.
[0061] It was the structure of having formed crack expansion
prevention layer 10, and pollution-control layer 11, and via hole
wirings 12 and 13 with the electric fuse concerning this embodiment
as shown in FIG. 8. However, the present invention is not
restricted to this, but as long as the pollution control by
scattering of a wiring material can be disregarded, it may form
only crack expansion prevention layer 10. In the present invention,
as long as crack expansion can be disregarded, only
pollution-control layer 11, and via hole wirings 12 and 13 may be
formed.
Embodiment 3
[0062] In Embodiment 2, as shown in FIG. 10, pollution-control
layer 11 is provided as measures against metallic contamination by
Cu scattering of fuse wiring 1. This pollution-control layer 11 is
formed in the further upper layer of crack expansion prevention
layer 10 (at the layer structure shown in FIG. 3, it is M5 layer),
and a further lower layer (at the layer structure shown in FIG. 3,
it is M1 layer) platy via member 20.
[0063] As fuse wiring 1 is shown in FIG. 16 through FIG. 18, in
order to obtain the characteristics of an electric fuse in the case
of the structure shown in FIG. 10, it was a premise that at least
one of member 20 between fuse wiring 1 and crack expansion
prevention layer 10 and members 20 between crack expansion
prevention layer 10 and pollution-control layer 11 is insulated. As
a method of securing insulation of member 20, when using an
insulating material for the material of member 20 itself, it may
not be restricted, but the structure of forming an insulating film
between member 20 and pollution-control layer 11 etc. may be
used.
[0064] On the other hand, with the electric fuse concerning this
embodiment, as shown in FIG. 19, cut section 21 is formed in
pollution-control layer 11 between members 20. Here, in
pollution-control layer 11 between members 20, it is
pollution-control layer 11 located by left-hand side member 20 from
member 20 of the right-hand side in a drawing, and
pollution-control layer 11 of the position corresponding to fuse
wiring 1 which functions as an electric fuse is said.
[0065] Cut section 21 shown in FIG. 19 is not restricted when cut
physically, but it should just electrically be cut. At this
embodiment, there is no need of giving insulation to member 20 by
forming cut section 21 in pollution-control layer 11. It becomes
possible to form member 20 in the same process as via hole wirings
12 and 13 shown in FIG. 9. Therefore, the electric fuse concerning
this embodiment simplifies a process, and has the characteristic
effect of reducing cost.
[0066] Cut section 21 shown in FIG. 19 was structure which two
right and left form to each of pollution-control layer 11 of the
upper layer and a lower layer. However, the present invention is
not restricted to this, but as shown in FIG. 20, it should just
form one cut section 21 in each pollution-control layer 11. With
the structure shown in FIG. 20, one cut section 21 is formed at a
time in the upper layer and lower layer pollution-control layer 11
of the right-hand side in a drawing. In pollution-control layer 11
of the upper layer and a lower layer, at the same position or at
the same side, it is not necessary to form cut section 21.
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