U.S. patent application number 11/563302 was filed with the patent office on 2008-05-29 for avalanche photodiode detector.
Invention is credited to Joseph C. Boisvert, Dmitri D. Krut, Rengarajan Sudharsanan, Ping Yuan.
Application Number | 20080121866 11/563302 |
Document ID | / |
Family ID | 39365628 |
Filed Date | 2008-05-29 |
United States Patent
Application |
20080121866 |
Kind Code |
A1 |
Yuan; Ping ; et al. |
May 29, 2008 |
AVALANCHE PHOTODIODE DETECTOR
Abstract
An avalanche photodiode detector is provided. The avalanche
photodiode detector comprises an absorber region having an
absorption layer for receiving incident photons and generating
charged carriers; and a multiplier region having a multiplication
layer; wherein the multiplier region is on a mesa structure
separate from the absorber region and is coupled to the absorber
region by a bridge for transferring charged carriers between the
absorber region and multiplier region.
Inventors: |
Yuan; Ping; (Van Nuys,
CA) ; Boisvert; Joseph C.; (Thousand Oaks, CA)
; Krut; Dmitri D.; (Encino, CA) ; Sudharsanan;
Rengarajan; (Stevenson Ranch, CA) |
Correspondence
Address: |
KLEIN, O'NEILL & SINGH, LLP
43 CORPORATE PARK, SUITE 204
IRVINE
CA
92606
US
|
Family ID: |
39365628 |
Appl. No.: |
11/563302 |
Filed: |
November 27, 2006 |
Current U.S.
Class: |
257/14 ; 257/438;
257/E31.033; 257/E31.055; 257/E31.064 |
Current CPC
Class: |
H01L 31/108 20130101;
H01L 31/035236 20130101; H01L 31/035281 20130101; H01L 31/1075
20130101; B82Y 20/00 20130101; Y02E 10/50 20130101 |
Class at
Publication: |
257/14 ; 257/438;
257/E31.055 |
International
Class: |
H01L 31/102 20060101
H01L031/102 |
Claims
1. An avalanche photodiode detector, comprising: an absorber region
formed over a semiconductor substrate and having an absorption
layer for receiving incident photons and generating charged
carriers, at least one insulating layer electrically isolating the
absorber region from the semiconductor substrate; and a multiplier
region formed over the semiconductor substrate and having a
multiplication layer; wherein the multiplier region is on a mesa
structure separate from the absorber region and is coupled to the
absorber region by a bridge, for transferring charged carriers from
the absorber region to the multiplier region.
2. The avalanche photodiode detector of claim 1, wherein the
absorber region further includes a pair of first contacts.
3. The avalanche photodiode detector of claim 2, wherein bias
across the absorber region is maintained by the first contacts.
4. The avalanche photodiode detector of claim 1, wherein the
multiplier region further includes a pair of second contacts.
5. The avalanche photodiode detector of claim 4 wherein bias across
the multiplier region is maintained by the second contacts.
6. The avalanche photodiode detector of claim 1, wherein the
absorber region and the multiplier region are formed over a
semiconductor substrate layer.
7. The avalanche photodiode detector of claim 1, wherein a Schottky
junction is used for injecting carriers in the multiplication
layer.
8. The avalanche photodiode detector of claim 1, wherein a quantum
well and an N-well is used for injecting carriers in the
multiplication layer.
9. The avalanche photodiode detector of claim 1, wherein the bridge
is a metal bridge.
10. The avalanche photodiode detector of claim 1 absorber region
includes a first surface facing in a first direction, the
multiplier region includes a second surface facing in the first
direction, and the first surface has a larger area than the second
surface.
11-48. (canceled)
19. The avalanche photodiode detector of claim 1, further
comprising three insulating layers electrically isolating the
absorber region from the semiconductor substrate.
20. An avalanche photodiode detector, comprising: an absorber
region formed over a semiconductor substrate and having an
absorption layer for receiving incident photons and generating
charged carriers; and a multiplier region formed over the
semiconductor substrate and having a multiplication layer; wherein
the multiplier region is on a mesa structure separate from the
absorber region and is coupled to the absorber region by a bridge,
for transferring charged carriers from the absorber region to the
multiplier region; and further wherein the absorber region includes
a first surface facing in a first direction, the multiplier region
includes a second surface facing in the first direction, and the
first surface has a larger area than the second surface.
21. The avalanche photodiode detector of claim 19, wherein the
absorber region further includes a pair of first contacts.
22. The avalanche photodiode detector of claim 20, wherein bias
across the absorber region is maintained by the first contacts.
23. The avalanche photodiode detector of claim 19, wherein the
multiplier region further includes a pair of second contacts.
24. The avalanche photodiode detector of claim 22, wherein bias
across the multiplier region is maintained by the second
contacts.
25. The avalanche photodiode detector of claim 19, wherein the
absorber region and the multiplier region are formed over a
semiconductor substrate layer.
26. The avalanche photodiode detector of claim 19, wherein a
Schottky junction is used for injecting carriers in the
multiplication layer.
27. The avalanche photodiode detector of claim 19, wherein a
quantum well and an N-well is used for injecting carriers in the
multiplication layer.
28. The avalanche photodiode detector of claim 19, wherein the
bridge is a metal bridge.
29. The avalanche photodiode detector of claim 19, further
comprising at least one insulating layer electrically isolating the
absorber region from the semiconductor substrate.
30. The avalanche photodiode detector of claim 29, further
comprising three insulating layers electrically isolating the
absorber region from the semiconductor substrate.
Description
1. FIELD OF THE INVENTION
[0001] The present invention relates generally to photodiode
detectors, and more particularly to avalanche photodiode
detectors.
2. BACKGROUND
[0002] Avalanche photodiode detectors (APDs) are photosensitive
devices that detect optical power by converting an input signal
(photons) to an electrical signal. The input signal is amplified by
an "avalanche effect" when carriers are infected in an area with
high electrical field. This occurs because multiple electron-hole
pairs are created for each absorbed photon.
[0003] An APD typically comprises of a plurality of stacked layers
including a multiplication layer and an absorption layer on a
semiconductor substrate. The absorption layer absorbs incident
photons to create electron/holes that are transferred to the
multiplication layer. The multiplication layer multiplies the
electrons/holes. This occurs when electron/holes have sufficient
energy to create a new electron and hole. Initial carriers and
newly created carriers may create additional electrons and holes
(hence the name "avalanche") by repeating the multiplication
process.
[0004] In a conventional APD, all layers are grown in one epitaxial
growth. This may lead to some interface defects. Due to interface
defects there may be some carrier traps and recombination centers,
which reduce overall quantum efficiency and after pulsing
performance of an APD.
[0005] Furthermore, simultaneous growth of absorption and
multiplication layers does not provide flexibility in selecting
different materials for these layers.
[0006] Therefore there is a need for an avalanche photodiode that
overcomes the foregoing problems in conventional APDs.
SUMMARY OF THE INVENTION
[0007] In one aspect of the present invention, an avalanche
photodiode detector is provided. The avalanche photodiode detector
comprises an absorber region having an absorption layer for
receiving incident photons and generating charged carriers; and a
multiplier region having a multiplication layer; wherein the
multiplier region is on a mesa structure separate from the absorber
region and is coupled to the absorber region by a bridge for
transferring charged carriers from the absorber region to the
multiplier region.
[0008] In another aspect of the present invention, an avalanche
photodiode detector is provided. The avalanche photodiode detector
comprises an absorption layer formed over a semiconductor
substrate, for receiving incident photons and generating charged
carriers; a contact layer formed on the absorption layer; a first
P-doped layer formed on the absorption layer; a multiplication
layer formed over the contact layer; a second P doped layer formed
on the multiplication layer; a first contact provided on the second
P-doped layer; a second contact provided on the contact layer; and
a third contact provided on the substrate; wherein the voltage
difference across the first contact and the second contact controls
the multiplication layer, and the voltage difference between the
second contact and the third contact controls the absorption
layer.
[0009] In yet another aspect of the present invention, an avalanche
photodiode detector is provided. The avalanche photodiode detector
comprises an absorber region having an absorption layer for
receiving incident photons and generating charged carriers; a
multiplier region having a multiplication layer; wherein the
multiplier region is built on a separate mesa structure, and may be
of a different material than the absorber region; and is wired to
the absorber region to transfer charged carriers.
[0010] This brief summary has been provided so that the nature of
the invention may be understood quickly. A more complete
understanding of the invention may be obtained by reference to the
following detailed description of the preferred embodiments thereof
in connection with the attached drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The foregoing features and other features of the present
invention will now be described with reference to the drawings of a
preferred embodiment. In the drawings, the same components have the
same reference numerals. The illustrated embodiment is intended to
illustrate, but not to limit the invention. The drawings include
the following Figures:
[0012] FIG. 1 shows a block diagram of an APD structure;
[0013] FIG. 2A shows a schematic of an APD structure on separate
mesas, according to an aspect of the present invention;
[0014] FIG. 2B shows the top view of the APD structure of FIG.
2A;
[0015] FIG. 2C shows a schematic of a APD structure with a
N-Contact and quantum wells, according to an aspect of the present
invention;
[0016] FIG. 3 shows an APD structure with single mesa, according to
an aspect of the present invention; and
[0017] FIG. 4 shows a schematic of a hybrid APD structure,
according to an aspect of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] In one aspect of the present invention, a three terminal APD
structure with separate absorption and multiplication layer (also
referred to as "TT-SAM APD or APD") is provided. The absorption
layer and multiplication layer may be grown separately and hence
are controlled independently. This allows one to select different
materials for the absorption and multiplication layer. The APD of
the present invention also provides an additional terminal. The
additional terminal enables individual control of bias across an
absorption (Absorber") region and a multiplication ("Multiplier")
region.
[0019] To facilitate an understanding of APD structure, a general
overview of a conventional APD structure will be described. The
specific structural components and layers of APD of the present
invention, will then be described with reference to general
structure of APD.
[0020] FIG. 1 shows a top level block diagram of a conventional APD
structure. APD 100 includes a P-InP substrate layer 110; a P-InP
buffer layer 102 and an N-InP multiplication layer 103; an
n-InGaAsP grading (or bandgap-transition) layer and charge layer
104 of an intermediate bandgap; and an n-InGaAs narrow-bandgap
absorption layer 105. Charge layer 104 is generally provided to
control the electric fields in the absorption and multiplication
layers, 103 and 105, respectively, and reduce charge accumulation
at the interface between them. Layers 106 and 107 are metal
contacts, which may be made of, for example, AuInZn or AuSn.
[0021] During operation of APD 100, incident photons 101 are
absorbed in absorption layer 105, and charged carriers (holes and
electrons) are created through a photogeneration process. Charged
carriers are multiplied in multiplication layer 103 resulting in
internal gain within APD 100. Incident photons 101 may enter APD
through substrate layer 110 (as shown in FIG. 1) or through
absorption layer 105.
[0022] In APD 100, electric field profile is controlled by charge
layer 104. To ensure a low electric field in absorption layer 105
and a high field in multiplication layer 103, doping level in
charge layer 104 needs to be precisely controlled. In practice, it
is difficult to control doping level in charge layer 105. The
present invention provides an APD structure that eliminates use of
charge layer, overcoming inherent problems associates with the use
of charge layer.
[0023] FIGS. 2A and 2B show an APD structure according to one
aspect of the present invention. FIG. 2A is a cross-sectional view
and FIG. 2B is a top view of APD structure 200.
[0024] Referring to FIG. 2A, a three terminal SAN APD structure
200A (also referred to as "TT-SAM" or "APD" interchangeably) is
shown. APD 200A comprises of separate absorber region 203A and
multiplier region 211A formed over a semiconductor substrate layer
208. Substrate layer 208 is preferably a semi-insulating layer. In
one aspect, substrate layer 208 may be an indium phosphide (InP)
layer. Absorber region 203A and multiplier region 211A may be grown
in one epitaxial run or separately.
[0025] Absorber region 203A includes a first insulating layer 207A.
Insulating layer 207A is formed of InAlAs and may have a thickness
between 0.7 .mu.m-1.5 .mu.m. Above first insulating layer 207A, a
second insulating layer 207 is formed. Second insulating layer 207
is formed of InAlAs and has a thickness of between 0.2 .mu.m-1.5
.mu.m. Above second insulating layer 207, a third insulating layer
205 is provided. This third insulating layer 205 may be formed of
InP and has a thickness of about 0.2 .mu.m to 0.5 .mu.m.
[0026] Above third insulator layer 205, an N-doped contact layer
204 is formed. N-doped contact layer 204 is formed of a suitable
material having appropriate thickness. In one aspect, N-doped
contact layer 204 is formed of InP, and may have a thickness
between 0.5 .mu.m-1.0 .mu.m.
[0027] First insulating layer 207A, second insulating layer 207 and
third insulating layers 205 act as insulators and do not allow flow
of charge/electrons to the substrate layer 208. This also prevents
any unintentional leakage of current through N-doped contact layer
204 to the substrate layer 208.
[0028] Above contact layer 204, an absorption layer 203 is
provided. Absorption layer 203 may be formed of a material having
bandgap of 0.5-0.7 eV. In one aspect, absorption layer 203 is
formed of InGaAs, and may have a thickness between 1-5 .mu.m.
[0029] Above absorption layer 203, a wide bandgap window layer 201
may be provided. In one aspect, window layer 201 may be formed of
InP or InGaAsP. Contacts 202 and 206 are also provided on absorber
region 203A. A separate bias is applied across absorber region 203A
and potential difference between contacts 202 and 206 controls
absorber region 203A functionality.
[0030] Multiplier region 211A includes an N-doped layer 207B.
N-doped Layer 207B is preferably formed of InAlAs and has a
thickness of between of 0.7 .mu.m to 1.5 .mu.m.
[0031] A multiplication layer 211 is grown on N-doped layer 207B.
In one aspect, multiplication layer 211 comprises InAlAs.
Multiplication layer 211 may have a thickness range of 0.02 .mu.m
to 1.5 .mu.m.
[0032] It is within the scope of the present invention to use other
suitable materials known in the art to form absorption layer 203,
contact layer 204, window layer 201, multiplication layer 211,
N-doped 207B, P-doped layer 210 or substrate layer 208.
[0033] Above multiplication layer 211, a P-doped InP layer 210 is
grown. P-doped layer 210 may have a thickness in the range of 0.2
.mu.m to 0.5 .mu.m.
[0034] Contacts 209 and 212 are also provided in multiplier region
211A. Contact 212 is provided over a conducting layer 212A.
Conducting layer 212A is formed over the substrate layer 208.
Conducting layer 212A has a thickness of 0.35 .mu.m to 0.75
.mu.m.
[0035] A separate bias is applied across multiplier region 211A and
voltage difference between contacts 209 and 212 controls the
electric field in multiplication layer 211.
[0036] Absorber region 203A and multiplier region 211A are joined
by a metal contact bridge 206A via contacts 206 and 206B. Metal
bridge 206A transfers charge between absorber region 203A and
multiplier region 211A. A passivation layer 206C (an insulator
region) may also be provided beneath the metal bridge 206A.
[0037] The bias condition of Schottky junction 206D, which is
influenced by voltage difference between contacts 202 and 209,
controls carrier injection from absorber region 203A to multiplier
region 211A. 206 and 200B are metal contacts and may be N-metal
contacts, while contacts 202 and 209 may be P-metal contacts. Metal
bridge 206A and metal contacts 206 and 206B may be a formed of a
connected metal having the same potential.
[0038] Incident photons 220 enter APD structure 200A via layer 201.
Incident photons 220 are absorbed in absorber region 203A, and
charged carriers (holes and electrons) are created through a
photogeneration process. The charged carriers are injected into
multiplier 211A and initiate an avalanche multiplication resulting
in internal gain within APD 200A.
[0039] Absorber region 203A and multiplier region 211A are
decoupled and both regions have individual isolated mesas.
Therefore the size and type of material for absorber region 203A
and multiplier region 211A can be controlled independently.
[0040] For APD 200A, dark current, dark count rate (DCR), device
capacitance and bandwidth benefit from a smaller multiplier region
211A area. A larger absorber region 203A area with low electric
field collects photons efficiently without significant sacrifice in
all these aspects.
[0041] To maintain efficient carrier injection from absorber region
203A into multiplier region 211A, a Schottky junction 206D is used
in contact with undoped multiplication layer 211. Schottky junction
206D is used to inject photon-generated electrons into multiplier
region 211A. This junction is adjacent to but not in the primary
carrier path in the avalanche process and hence avoids
recombination by holes generated by avalanching in the multiplier
region 211A. The avalanche-generated holes are collected at contact
209.
[0042] APD 200A does not have a charge layer. Instead of charge
layer, the carrier injection from absorber region 203A to
multiplier region 211A is controlled by the bias condition of
Schottky junction 206D, which is influenced by the 2-D potential
distribution at the injection contact. In operation, this
distribution is determined by the voltage differences between
contacts 202 and 209, and 209 and 212.
[0043] In an alternative embodiment shown in FIG. 2C, injection
efficiency of an APD 200B may further be improved with an N-well
(210B) and quantum wells (210A). By replacing Schottky junction
206D with a p-n junction, leakage current from injection is
minimized 2-D electron gas formed in quantum well (210A) transports
injected electrons to a high field region quickly and effectively
while keeping holes from deviating from the multiplier region 211A.
In the photon counting applications, because there is no hole to
recombine in the beginning of a gate pulse, the injected elections
will trigger the avalanche events effectively, or realize higher
quantum efficiency. In one aspect of the present invention, quantum
well 110A may have a thickness range from 50 .ANG.-100 .ANG., and
the N-well may be formed by diffusion or ion-implantation.
[0044] It is within the scope of present invention to
simultaneously grow a part of absorber region and multiplier
region. This simultaneously grown region may then be separated and
processed independently. As shown in APD 200A and 200C, first
insulating layer 207A and N-doped layer 207B are formed of InAlAs.
After growing a layer of InAlAs, it is separated into at least two
parts. One part, 207A, forms an insulating layer while the other
part is doped to form N-doped layer 207B. Similarly, multiplication
layer 211 and P-doped layer are grown simultaneously as second
insulating layer 207 and third insulating layer 205.
[0045] FIG. 3 shows APD 300 in another aspect of the present
invention. APD 300 includes a single mesa structure. Substrate
layer 307 is formed of a semiconductor material, for example InP.
Substrate layer 307 may have a thickness range of 200 .mu.m-500
.mu.m. An absorption layer 306 of thickness 1 .mu.m-5 .mu.m is
grown on substrate layer 307. Absorption layer 306 is preferably an
InGaAs layer. Above absorption layer 306, a P-doped layer 305A is
formed. P-doped layer 305A may have a thickness of 1 .mu.m to 5
.mu.m.
[0046] A N-doped layer 305 of InP is formed over P-doped layer
305A. N-doped layer 305 may have a thickness of about 0.1 .mu.m. A
multiplication layer 302 of InP or InAlAs is formed on doped layer
305. Multiplication layer 302 may have a thickness between 0.02
.mu.m-1.0 .mu.m. A P-layer 301 of InP is formed above
multiplication layer 302 having a thickness between 0.2 .mu.m-1.0
.mu.m.
[0047] It is within the scope of the invention to use other
suitable materials known in the art to form absorption layer 306,
P-doped layer 305A, N-doped layer 305, multiplication layer 302 or
P-layer 302.
[0048] Contact 310 is provided over P-layer 301 while N-doped layer
305 has two contacts 303 and 304. Photons 309 enter via substrate
layer 307. Incident photons 309 are absorbed in absorption layer
306, and charged carriers (holes and electrons) are created through
a photogeneration process. The charged carriers initiate an
avalanche multiplication in multiplication layer 302 resulting in
internal gain within APD 300.
[0049] In APD 300, charge is injected when electrons pass through
N-doped layer 305. In order to maintain efficient carrier injection
and reverse bias in the absorption layer 306 while sustaining
electric field uniformity in multiplication layer 302, a tunnel
Junction with a p-type layer between 305 and 306 is inserted
between the two function regions.
[0050] APD 300 also does not have a charge layer. Instead of charge
layer, bias difference between contacts 310 and 303 controls
multiplication layer 302. Similarly, voltage difference between
contacts 304 and 308 controls absorption layer 306.
[0051] APD configuration 300 has a larger absorption layer 306 area
coupled to a smaller multiplication mesa 302. The smaller
multiplication mesa 302 reduces dark count rate while minimizing
bias across absorption layer 306, thus increasing overall usable
quantum efficiency of APD 300.
[0052] In yet another aspect of the present invention, a hybrid APD
400 as shown in FIG. 4, is provided. By hybrid it means that
different materials having different characteristic properties may
be used for forming absorber region 400A and multiplier region 400B
of APD 400. Conventionally, it has been difficult to integrate
Silicon material with InGaAs or InP or similar materials to form
APDs. In one aspect of the present invention, hybrid APD 400,
overcomes these material constraints.
[0053] In APD 400, different materials for multiplier region 400B
and absorber region 400A are used, and wafer bonding may be used to
join the different materials.
[0054] Absorber region 400A is preferably formed of InP while
multiplier region 400B may be formed of Silicon. It is well known
that material growth constraints exist between materials like
InGaAs or InP and silicon. However, with hybrid integration, these
material growth constraints between absorber and multiplier regions
(400A and 400B) are avoided providing a wider spectrum of materials
available for device optimization.
[0055] Absorber region 400A includes a P-doped layer 415 of InP or
InAlAs of thickness range of 0.2 .mu.m-1.0 .mu.m. Absorption layer
413 of InGaAs is formed over P-doped layer 415. Absorption layer
413 may have a thickness range of 0.2 .mu.m-0.5 .mu.m.
[0056] An N-doped layer 412 of InP, InAlAs or InGaAsP is formed
over absorption layer 413. N-doped layer 412 may have a thickness
range of 0.2 .mu.m-0.5 .mu.m. Contacts 411 and 414 control the bias
across absorption layer.
[0057] Multiplier region 400B includes a silicon substrate layer
409. An insulator layer 408 of silicon oxide is formed over silicon
substrate layer 409. Above insulator layer 408, there is N-well
region (405) and P-well region (407). A multiplication layer 406 is
provided between N-well region (405) and P-well region (406) for
transferring high field from N-well to P-well.
[0058] Absorber region 400A is wire bound (403) to a multiplier
region 400B via metal contacts 402 and 411. Schottky junction 402
is employed to improve injection efficiency for photon-generated
carriers. In order to avoid recombination with avalanche-generated
holes, Schottky junction 402 avoids mainstream avalanche current,
while a small potential difference between Vpin+ (404) and Vm-
(401) helps to inject electrons.
[0059] Voltage difference between contacts 401 and 404 determines
bias for multiplier region 400B while voltage difference between
contacts 411 and 414 determines bias for absorber region 400A.
[0060] Incident photons 410 enter absorber region 400A through
N-doped layer 412. Incident photons 410 are absorbed in the
absorber region 400A, and charged carriers (holes and electrons)
are created through a photogeneration process. The charged carriers
are injected through the Schottky junction (402) and initiate an
avalanche multiplication in multiplier region 400B resulting in
internal gain within APD 400.
[0061] APD 400 eliminates charge layer and interface defects
associates with the use of charge layer. APD 400 also allows one to
select different types of materials for multiplier region 400B and
absorber region 400A
[0062] The foregoing APDs (200A, 200B, 300 and 400) of the present
invention provide better quantum efficiency. APDs of the present
invention eliminate use of charge layer between absorption layer
and multiplication layer by introducing an extra terminal between
absorber region (203A or 400A) and multiplier region (211A or
400B). The electric fields in absorber (203A or 400A) and
multiplier regions (211A or 400B) are controlled individually by
the potential differences between the three terminals. The
decoupling of the two functional regions, multiplier region and
absorber region, helps in maintaining a low but sufficient field in
the absorber. This also allows one to independently optimize the
size, material and layer structure of the two regions.
[0063] While the adaptive aspects of the present invention list
specific materials with specific thickness for forming absorption
layer, multiplication layer, contact layer, P-doped layer and
N-doped layer, it will be understood by those skilled in the art
that similar materials, exhibiting similar properties of varying
thickness may be used, and equivalents may be substituted for
elements thereof without departing from the true scope of the
adaptive aspects of the present invention.
[0064] Although the present invention has been described with
reference to specific embodiments, these embodiments are
illustrative only and not limiting. Many other applications and
embodiments of the present invention will be apparent in light of
this disclosure and the following claims.
* * * * *