U.S. patent application number 10/592325 was filed with the patent office on 2007-12-27 for process for producing layered member and layered member.
Invention is credited to Shunro Fuke, Minoru Hagino, Tokuaki Nihashi, Masatomo Sumiya.
Application Number | 20070296335 10/592325 |
Document ID | / |
Family ID | 34975845 |
Filed Date | 2007-12-27 |
United States Patent
Application |
20070296335 |
Kind Code |
A1 |
Nihashi; Tokuaki ; et
al. |
December 27, 2007 |
Process for Producing Layered Member and Layered Member
Abstract
The object is to provide a photoelectric surface member which
allows higher quantum efficiency. In order to achieve this object,
a photoelectric surface member 1a is a crystalline layer formed by
a nitride type semiconductor material, and comprises a nitride
semiconductor crystal layer 10 where the direction from the first
surface 101 to the second surface 102 is the negative c polar
direction of the crystal, an adhesive layer 12 formed along the
first surface 101 of the nitride semiconductor crystal layer 10,
and a glass substrate 14 which is adhesively fixed to the adhesive
layer 12 such that the adhesive layer 12 is located between the
glass substrate 14 and the nitride semiconductor crystal layer
10.
Inventors: |
Nihashi; Tokuaki; (Shizuoka,
JP) ; Sumiya; Masatomo; (Ibaraki, JP) ;
Hagino; Minoru; (Shizuoka, JP) ; Fuke; Shunro;
(Shizuoka, JP) |
Correspondence
Address: |
DRINKER BIDDLE & REATH (DC)
1500 K STREET, N.W.
SUITE 1100
WASHINGTON
DC
20005-1209
US
|
Family ID: |
34975845 |
Appl. No.: |
10/592325 |
Filed: |
March 7, 2005 |
PCT Filed: |
March 7, 2005 |
PCT NO: |
PCT/JP05/03879 |
371 Date: |
June 21, 2007 |
Current U.S.
Class: |
313/542 ;
257/E21.09; 438/46 |
Current CPC
Class: |
Y10S 117/915 20130101;
H01L 31/1852 20130101; C30B 29/403 20130101; H01J 9/12 20130101;
H01L 31/1856 20130101; H01L 31/1848 20130101; H01J 40/06 20130101;
Y10S 117/902 20130101; H01J 1/34 20130101 |
Class at
Publication: |
313/542 ;
438/046; 257/E21.09 |
International
Class: |
H01J 1/34 20060101
H01J001/34; H01L 21/00 20060101 H01L021/00 |
Foreign Application Data
Date |
Code |
Application Number |
Mar 12, 2004 |
JP |
2004-071011 |
Claims
1. A layered member manufacturing method, comprising the steps of:
preparing a substrate for crystal growth which is a crystalline
substance with the main surface in the (111) plane orientation;
forming a buffer layer along the main surface of said substrate for
crystal growth; forming a nitride semiconductor crystal layer on
said buffer layer by crystal growth in the Group III element
surface (positive c polar) direction using a nitride type
semiconductor material; forming an adhesive layer on said nitride
semiconductor crystal layer; adhesively fixing the substrates onto
said adhesive layer; and removing said substrate for crystal growth
to obtain said buffer layer with a negative c polar surface.
2. The manufacturing method according to claim 1, further
comprising, after the step of removing said substrate for crystal
growth, a step of removing said buffer layer to obtain said nitride
semiconductor crystal layer with a negative c polar surface.
3. The manufacturing method according to claim 1, further
comprising, after the step of removing the substrate for crystal
growth, a step of causing crystal growth of the semiconductor
material on the negative c polar surface of said buffer layer.
4. The manufacturing method according to claim 2, further
comprising, after the step of removing the buffer layer, a step of
causing crystal growth of the semiconductor material on the
negative c polar surface of said nitride semiconductor crystal
layer.
5. The manufacturing method according to claim 1, further
comprising, prior to the step of removing the substrate for crystal
growth, a step of forming a protective layer which covers at least
the periphery of said substrate.
6. (canceled)
7. (canceled)
8. The manufacturing method according to claim 2, further
comprising, prior to the step of removing the substrate for crystal
growth, a step of forming a protective layer which covers at least
the periphery of said substrate.
9. The manufacturing method according to claim 3, further
comprising, prior to the step of removing the substrate for crystal
growth, a step of forming a protective layer which covers at least
the periphery of said substrate.
10. The manufacturing method according to claim 4, further
comprising, prior to the step of removing the substrate for crystal
growth, a step of forming a protective layer which covers at least
the periphery of said substrate.
11. A layered member, comprising: a nitride semiconductor crystal
layer which is a crystalline layer formed by a nitride type
semiconductor material and in which the direction from the first
surface thereof to the second surface thereof is the N surface
(negative c polar) direction of the crystal; an adhesive layer
formed along the first surface of said nitride semiconductor
crystal layer; and a substrate which is adhesively fixed to said
adhesive layer such that said adhesive layer is located between the
substrate and said nitride semiconductor crystal layer.
12. The layered member according to claim 11, wherein said layered
member is used as a photoelectric surface member for forming a
photoelectric surface which emits a photoelectron which has been
excited by incident light, said first surface is an incidence plane
where said light enters, and said second surface is an emission
plane which emits said photoelectrons, and said substrate is a
glass substrate formed to transmit said light.
Description
TECHNICAL FIELD
[0001] The present invention relates to a layered member and a
manufacturing method for a layered member comprising a layer formed
by a nitride type semiconductor material.
BACKGROUND ART
[0002] An example of a layered member comprising a layer formed by
a nitride type semiconductor material is a photoelectric surface
comprising a GaN layer as an active layer (for instance, see cited
patent 1). [0003] Cited patent 1: Japanese Patent Application
Laid-open No. H10-241554.
DISCLOSURE OF THE INVENTION
PROBLEMS TO BE SOLVED BY THE INVENTION
[0004] With a conventional photoelectric surface, the quantum
efficiency when an excited photoelectron is emitted by light
entering a nitride semiconductor crystalline layer as a light
absorbing layer has been increasing, but even higher quantum
efficiency and lower cost are being demanded for photoelectric
surfaces.
[0005] An object of the present invention is to provide a layered
member and a manufacturing method for a layered member which can
further increase quantum efficiency and achieved lower costs.
MEANS FOR SOLVING THE PROBLEMS
[0006] In order to achieve the aforementioned object, the present
inventors have performed evaluations from many aspects. For
material costs and productivity, sapphire substrates have a high
material cost, and an extremely long time is required when
mechanically processing so the price becomes even higher. In
contrast, silicon substrates with high quality are supplied at low
cost in large sheets. Furthermore, using a glass bonding method,
the productivity of the photoelectric surface process is excellent
compared to sapphire substrates. Recently, the market has been
demanding lower prices as well as demanding higher performance.
From this point of view, there is demand to satisfy both of these
requirements. Therefore the present inventors first focused
attention to the polarization of nitride type semiconductor
materials. Nitride type semiconductor materials have material
specific polarization properties which include spontaneous
polarization along the c axis of the crystal and piezo
polarization. To illustrate, if these polarization properties are
used in a photoelectric surface such as a photoelectron multiplier
tube or the like, the positive charge will increase above the
surface level because of polarization, and therefore strong band
bending will occur at the surface. Therefore the quantum efficiency
of the active layer is increased by utilizing the surface emission
of the photoelectrons. Furthermore, by widening the depleted layer,
a built-in field and active layer will be formed and the diffusion
length will be extended.
[0007] However, in order to utilize this polarization, the topmost
layer of the photoelectric surface must be a -c surface (surface in
the negative c polar direction, N surface direction) and a very
smooth surface must be achieved. However, with the MOCVD growth
method used for normal sapphire substrates (surface orientation of
main surface is (0001)c), the +c plane (plane in the positive c
polar direction, plane in the Group III element surface direction)
will be the growth direction. With this crystal growth method, the
growth of the -c surface is difficult to control and a highly
smooth surface can not be obtained.
[0008] As a result of further investigations into this point by the
present inventors, the following finding was made. Namely, when a
wafer is obtained using this crystal growth method, the surface on
the opposite side of the +c polar direction (hereinafter, +c
surface) is the -c polar direction surface (hereinafter, -c
surface). Furthermore, it was discovered that the plane orientation
of the crystal growth substrate used to grow the nitride type
semiconductor material also has an effect of achieving a smooth
surface. The present invention was achieved based on these
findings.
[0009] The manufacturing method of the layered member of the
present invention comprises the steps of: preparing a substrate for
crystal growth which is a crystalline substance with the main
surface in the (111) plane orientation; forming a buffer layer
along the main surface of the substrate for crystal growth; forming
a nitride semiconductor crystal layer on the buffer layer by
crystal growth in the Group III element surface (positive c polar)
direction using a nitride type semiconductor material; forming an
adhesive layer on the nitride semiconductor crystal layer;
adhesively fixing the substrates onto the adhesive layer; and
removing the substrate for crystal growth to obtain the buffer
layer with a negative c polar surface.
[0010] With the layered member manufacturing method of the present
invention, the plane orientation is (111) for the main surface of
the substrate for crystal growth which forms a nitride
semiconductor crystal layer by crystal growth through a buffer
layer, so the surface of the substrate side for growing crystals of
the nitride type semiconductor material can be the -c layer.
Furthermore, the substrate for growing crystals is removed after
the nitride semiconductor crystal layer and the substrate are
adhesively fixed together by an adhesive layer so the -c surface of
the buffer layer can be the topmost surface layer.
[0011] Furthermore, the layered member manufacturing method of the
present invention preferably further comprises, after the step of
removing the substrate for crystal growth, a step of removing the
buffer layer to obtain a nitride semiconductor crystal layer which
has a negative c polar surface. The buffer layer is removed, so the
-c layer of the nitride semiconductor crystal layer can be the
topmost surface layer.
[0012] Furthermore, the layered member manufacturing method of the
present invention preferably further comprises, after the step of
removing the substrate for crystal growth, a step of causing
crystal growth of the semiconductor material on the negative c
polar surface of the buffer layer. Crystal growth will occur on the
negative c polar surface so favorable crystal growth is
possible.
[0013] Furthermore, the layered member manufacturing method of the
present invention preferably further comprises, after the step of
removing the buffer layer, a step of causing crystal growth of the
semiconductor material on the negative c polar surface of the
nitride semiconductor crystal layer. Crystal growth will occur on
the negative c polar surface so favorable crystal growth is
possible.
[0014] Furthermore, the layered member manufacturing method of the
present invention preferably further comprises, prior to the step
of removing the substrate for crystal growth, a step of forming a
protective layer which covers at least the periphery of the
substrate. The periphery of the substrate will be covered by a
protective layer, and therefore, when removing the buffer layer and
the substrate for forming crystals by etching, for instance,
erosion of the substrate can be reduced.
[0015] The layered member of the present invention is comprising a
nitride semiconductor crystal layer which is a crystalline layer
formed by a nitride type semiconductor material and in which the
direction from the first surface thereof to the second surface
thereof is the N surface (negative c polar) direction of the
crystal; an adhesive layer formed along the first surface of the
nitride semiconductor crystal layer; and a substrate which is
adhesively fixed to the adhesive layer such that the adhesive layer
is located between the substrates and the nitride semiconductor
crystal layer.
[0016] With the layered member of the present invention, the
direction from the first surface to the second surface of the
nitride semiconductor crystal layer is the negative c polar
direction, so the second surface will be the -c surface.
[0017] Furthermore, with the layered member of the present
invention, the first surface is an incidence plane where the light
enters, the second surface is an emission plane which emits the
photoelectron, and the substrate is a glass substrate formed to
transmit light, and the layered member is preferably used as a
photoelectric surface member which emits photoelectrons which have
been excited by incident light. The second surface is the emission
plane, so the emission plane of the photoelectric surface member
can be the -c surface.
[0018] With the present invention, a layered member can be produced
where the topmost layer is the -c surface. Therefore, a layered
member and a manufacturing method for a layered member which can
have even higher quantum efficiency can be provided.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019] FIG. 1 is a diagram for describing the manufacturing method
of a photoelectric surface member which is an embodiment of the
present invention;
[0020] FIG. 2 is a diagram for describing the manufacturing method
of a photoelectric surface member which is an embodiment of the
present invention;
[0021] FIG. 3 is a diagram for describing the materials used in
manufacturing the photoelectric surface member which is an
embodiment of the present invention;
[0022] FIG. 4 is a diagram for describing the effect of the
photoelectric surface member which is an embodiment of the present
invention; and
[0023] FIG. 5 shows the energy distribution properties for p type
+c and -c GaN.
DESCRIPTION OF THE SYMBOLS
[0024] 1a--photoelectric surface member, 10--nitride semiconductor
crystal layer, 12--adhesive layer, 14--glass substrate, 16--cathode
electrode, 18--Cs--O layer.
BEST MODE FOR CARRYING OUT THE INVENTION
[0025] The findings of the present invention can easily be
understood by considering the following detailed description while
referring to the attached drawings which are shown only as
examples. Continuing, the best mode for carrying out the present
invention will be described while referring to the attached
drawings. Where possible, the same code has been attached to the
same parts and duplicate descriptions have been omitted.
Furthermore, the scale of the dimensions in the drawings do not
necessarily match that of the descriptions.
[0026] The manufacturing method of the photoelectric surface
material which is an embodiment of the present invention will be
described while referring to FIG. 1A-E and FIG. 2A-E. FIG. 1A-E and
FIG. 2 A-E are cross-section diagrams for describing the
manufacturing steps of the photoelectric surface member.
[0027] First, a silicon (111) substrate was prepared as the
substrate 50 for crystal growth (see FIG. 1A). The substrate 50 for
crystal growth which is a silicon (111) substrate is a crystalline
material and the surface orientation of the main surface 501 is
(111). Al.sub.xGa.sub.1-xN (0<X.ltoreq.1) is grown to
approximately several tens of nanometers, and buffer layer 52 is
formed on the main surface 501 of the silicon (111) substrate 50
(see FIG. 1B).
[0028] A nitride semiconductor crystal layer 10 with a thickness of
approximately several hundred nanometers is formed on the main
surface 521 of the buffer layer 52 by epitaxial growth using a
Group III-V nitride semiconductor gas material comprising Ga and N
(see FIG. 1C). The nitride semiconductor crystal layer 10 is doped
with magnesium to a level between approximately E19 and E20. As has
already been described, the surface orientation of the main surface
501 of the substrate 50 for crystal growth is (111), so the first
surface 101 of the nitride semiconductor crystal layer 10 is the +c
surface, and the second surface 102 is the -c surface.
[0029] A layer of silicon dioxide was overlaid with a thickness of
between 100 and 200 mn on to the first surface 101 of the nitride
semiconductor crystal layer 10 using the CVD method to form the
adhesive layer 12 (see FIG. 1D). Next, the glass substrate 14 was
prepared. The glass substrate 14 preferably has a thermal expansion
coefficient similar to the thermal expansion coefficient of the
substrate 50 for crystal growth, and preferably contains prescribed
alkali ion elements. Corning's 9741 and Schott's 8337B are examples
of these types of glass substrates 14.
[0030] After cleaning the glass substrate 14, the glass substrate
14 and a multilayered sheet with the configuration shown in FIG. 1D
(substrate 50 for crystal growth, buffer layer 52, nitride
semiconductor crystal layer 10, and adhesive layer 12 successively
overlaid) were rapidly heated to the glass softening point while
the main surface 121 of the adhesive layer 12 was brought into
contact with the glass substrate 14. At this time, a prescribed
loading was applied, and the multilayered sheet and the glass
substrate 14 were thermocompression bonded through the adhesive
layer 12 (see FIG. 1E).
[0031] In the condition shown in FIG. 1E, at least the glass
substrate 14 was covered by an adhesive Teflon sheet 54 (see FIG.
2A). Next, etching was performed at room temperature using (1 HF+1
HNO.sub.3+1 CH.sub.3COOH) as the etchant. The substrate 50 for
crystal growth was etched by this etching process, and the etching
was stopped by the buffer layer 52 (see FIG. 2B). Therefore, the
buffer layer 52 acted as the stopping layer.
[0032] Next, etching was performed using (1 KOH+10 H.sub.2O+0.01
H.sub.2O.sub.2) as the etchant to remove the buffer layer 52 (see
FIG. 2C). Normally, the etching speed of +c surface AlN and GaN is
extremely slow, but with this embodiment, the -c surface side is
etched so etching can be performed using the aforementioned
etchants. Note, the timing to complete the etching of the buffer
layer 52 is determined by the elapsed time, the confirmation
results of the flatness of the second surface 102 of the nitride
semiconductor crystal layer 10, and the transmissivity or the like
of the nitride semiconductor crystal layer 10.
[0033] When etching of the buffer layer 52 was complete, the
adhesive Teflon sheet 54 was removed. Next, a cathode electrode 16
was formed by the vapor deposition from the glass substrate 14 to
the second surface 102 of the nitride semiconductor crystal layer
10 (see FIG. 2D). Cr, Al, and Ni or the like may be used as the
material of the cathode electrode.
[0034] Finally, after cleaning the second surface 102 of the
nitride semiconductor crystal layer 10, a Cs--O layer 18 was formed
on the second layer 102 to obtain a photoelectric surface member 1a
(FIG. 2E). Note, any one or combination of Cs--I, Cs--Te, or Sb--Cs
or the like may be used as a layer containing alkali metal in place
of the Cs--O layer 18.
[0035] In the aforementioned process, the buffer layer 52 surface
obtained by removing the substrate 50 for crystal growth was a flat
-c polar surface. Using this -c polar surface as a substrate for
crystal growth (re-growth substrate), various devices with
excellent characteristics which use semiconductor materials can be
manufactured by growing one or more layers of high quality
semiconductor crystals such as Al.sub.xGa.sub.1-xN
(0.ltoreq.X.ltoreq.1) on the buffer layer 52.
[0036] Furthermore, the surface of the nitride semiconductor
crystal layer 10 obtained after removing the buffer layer 52 has a
flat -c polar surface. The aforementioned manufacturing process was
described as a process for manufacturing a photoelectric surface,
but if this nitride semiconductor crystal layer 10 is used as a
substrate for crystal growth (regrowth substrate), various devices
with excellent characteristics which use semiconductor materials
can be manufactured by growing one or more layers of high quality
semiconductor crystals such as Al.sub.xGa.sub.1-xN
(0.ltoreq.X.ltoreq.1) or InN or the like.
[0037] Note, the materials used for the layers and substrates are
not restricted to those described above. FIG. 3 shows an example of
a material which enables nitride semiconductor crystal layer 10 +c
surface growth and flattening of the nitride semiconductor crystal
layer 10 second surface 102. In the example shown in FIG. 3, if the
material of the substrate 50 for crystal growth is silicon and the
surface orientation is (111), AIN or AlN/GaN superlattice is
preferably used as the buffer layer 52 material, and GaN, AlGaN, or
InGaN is preferably used as the material of the nitride
semiconductor crystal layer 10. Furthermore, if the material of the
substrate 50 for crystal growth is GaAs and the surface orientation
is (111)A, InGaAsN is preferably used as the material of the buffer
layer 52, and GaN, AlGaN, or InGaN is preferably used as the
material for the nitride semiconductor crystal layer 10.
Furthermore, if the material of the substrate 50 for crystal growth
is GaP and the surface orientation is (111)A, InGaPN is preferably
used as the material for the buffer layer 52 and GaN, AlGaN, or
InGaN is preferably used as the material for the nitride
semiconductor crystal layer 10. Furthermore, in order to increase
the quantum efficiency of the photoelectron surface for any of
these cases, a step of forming an electron stopping layer 10 with a
larger bandgap after the step of forming the crystal layer is
preferable. This is because a potential barrier is formed on the
opposite side to the vacuum surface of the nitride semiconductor
crystal layer, and, of the photoelectrons generated, the
photoelectrons moving towards the opposite direction to the vacuum
escape surface direction are repelled to the opposite direction,
and therefore photoelectrons move towards the vacuum escape surface
direction. The material in this case is preferably AlN, AlGaN, or
BGaN.
[0038] The effect of this embodiment will be described. With the
manufacturing method of this embodiment, the surface orientation
will be (111) for the main surface 501 of the substrate 50 for
crystal growth for forming a nitride semiconductor crystal layer 10
using crystal growth through a buffer layer 52, and therefore the
surface of the substrate 50 for crystal growth side of the nitride
semiconductor crystal layer 10 can be a -c surface. Furthermore,
after adhesively fixing the nitride semiconductor crystal layer 10
and the glass substrate 14 through the adhesive layer 12, the
substrate 50 for crystal growth and the buffer layer 52 are
removed, so the -c surface of the nitride semiconductor crystal
layer 10 can be the second surface 102 which is the topmost
layer.
[0039] The effect of making the topmost layer of the nitride
semiconductor crystal layer 10 or in other words the second surface
102 (surface which emits photoelectrons) to be the -c surface will
be described while referring to FIG. 4 and FIG. 5. FIG. 4 is a
bandgap diagram for a photoelectric surface, and the broken line
shows the case where the topmost layer is the +c surface, and the
solid line shows the case where the topmost layer is the -c
surface. Generally, the surface energy band of a p type
semiconductor curve downward. To this is added the effect of
spontaneous polarization and piezo polarization. This polarization
effect is reversed depending on whether the surface is the +c
surface or the -c surface, and the latter case acts effectively. In
other words, if the N surface (-c surface) is the electron emission
plane, the polarity direction will change from bulk towards the
emission plane with both polarizations (spontaneous polarization
and piezo polarization) (fixed electric charge of the polarity but
the emission plane side is positive). In order to block this, the
density of the acceptors which undergo electron disassociation near
the surface is increased, the depletion layer is widened, and the
downward facing curve effect will increase as shown by the solid
line in FIG. 4. As a result, the vacuum level will be lowered by
that amount so the photoelectrons can more easily escape and the
quantum efficiency of the photoelectric surface will be increased.
Furthermore, because of the widening of the depletion layer, a
built-in field will be formed in the nitride semiconductor crystal
layer, and the diffusion length will increase (d.sub.1 and d.sub.2
in FIG. 4). Therefore, electrons in the deep location can reach the
surface and escape. As shown in FIG. 5, the energy distribution
properties determined from the relationship of the electron current
to the applied voltage show that the high-energy component of the
-cGaN is higher than that of +cGaN, and the acceleration effect due
to polarization is also shown. As a result, electrons which have
energy above the vacuum level (V.L.) of the surface are increased,
and the number of photoelectrons which can escape will be
higher.
* * * * *