U.S. patent application number 11/802684 was filed with the patent office on 2007-09-27 for semiconductor device and method of manufacturing the same.
This patent application is currently assigned to Kabushiki Kaisha Toshiba. Invention is credited to Koichi Kato, Daisuke Matsushita, Koichi Muraoka, Yasushi Nakasaki, Takashi Shimizu.
Application Number | 20070222003 11/802684 |
Document ID | / |
Family ID | 36779105 |
Filed Date | 2007-09-27 |
United States Patent
Application |
20070222003 |
Kind Code |
A1 |
Matsushita; Daisuke ; et
al. |
September 27, 2007 |
Semiconductor device and method of manufacturing the same
Abstract
According to an aspect of the present invention, there is
disclosed a semiconductor device comprising a semiconductor
substrate, and a gate insulating film of a P-channel MOS
transistor, formed on the semiconductor substrate. The gate
insulating film has an oxide film (SiO.sub.2), and a diffusion
preventive film (BN) containing boron and nitrogen atoms.
Inventors: |
Matsushita; Daisuke;
(Hiratsuka-shi, JP) ; Muraoka; Koichi;
(Sagamihara-shi, JP) ; Nakasaki; Yasushi;
(Yokohama-shi, JP) ; Kato; Koichi; (Yokohama-shi,
JP) ; Shimizu; Takashi; (Yokohama-shi, JP) |
Correspondence
Address: |
FINNEGAN, HENDERSON, FARABOW, GARRETT & DUNNER;LLP
901 NEW YORK AVENUE, NW
WASHINGTON
DC
20001-4413
US
|
Assignee: |
Kabushiki Kaisha Toshiba
Tokyo
JP
|
Family ID: |
36779105 |
Appl. No.: |
11/802684 |
Filed: |
May 24, 2007 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11197593 |
Aug 5, 2005 |
7238997 |
|
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11802684 |
May 24, 2007 |
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Current U.S.
Class: |
257/411 ;
257/E21.267; 257/E21.292; 257/E29.132; 257/E29.165;
257/E29.255 |
Current CPC
Class: |
H01L 21/02112 20130101;
H01L 29/513 20130101; H01L 21/28202 20130101; H01L 21/3143
20130101; H01L 21/318 20130101; H01L 21/02274 20130101; H01L 29/78
20130101; H01L 29/518 20130101 |
Class at
Publication: |
257/411 ;
257/E29.132; 257/E29.165 |
International
Class: |
H01L 29/76 20060101
H01L029/76 |
Foreign Application Data
Date |
Code |
Application Number |
Feb 7, 2005 |
JP |
2005-030586 |
Claims
1-27. (canceled)
28. A structure of a MOS transistor, comprising: a substrate
comprising a plurality of diffusion layers formed in a surface
region of the substrate and a channel region between the diffusion
layers; a gate insulating film formed on the channel region
including a first region comprising SiO.sub.2 or SiON and a second
region comprising SiN provided on the first region; and a gate
electrode formed on the gate insulating film, wherein the gate
insulating film further includes a third region, provided on the
second region, containing nitrogen atoms and 1.times.10.sup.18
cm.sup.-3 or more boron atoms.
29. The structure according to claim 29, wherein the gate electrode
is formed of a polysilicon containing boron atoms.
30. The structure according claim 29, wherein the thickness of the
gate insulating film is 2 nm or less.
31. The structure according to claim 29, wherein, in a case of the
first region being formed of SiON, the gate insulating film further
includes a fourth region comprising SiON between the second region
and the third region.
32. The structure according to claim 29 wherein a surface density
of boron atoms is higher than that of nitrogen atoms in the third
region.
33. The structure according to claim 29, wherein the MOS transistor
is a p-channel MOS transistor.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is based upon and claims the benefit of
priority from prior Japanese Patent Application No. 2005-030586,
filed Feb. 7, 2005, the entire contents of which are incorporated
herein by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a semiconductor device and
a method of manufacturing the device.
[0004] 2. Description of the Related Art
[0005] A demand for high performance of LSI is increasing with
sophistication of information in the society. Enhancement of the
performance is achieved mainly by miniaturization of MOS
transistors.
[0006] In the existing LSI, a gate insulating film of the MOS
transistor has a thickness of about 1.5 nm. When the
miniaturization simply progresses because of further enhancement of
the performance, it is expected in International Technology Roadmap
for Semiconductor (ITRS) that the thickness of the gate insulating
film of the MOS transistor is about 0.7 nm around 2010.
[0007] However, when the gate insulating film becomes thin in this
manner, a tunnel current flows through the gate insulating film at
an operation time of the MOS transistor. This is called gate leak,
and this is not preferable for the enhancement of the performance
of the LSI.
[0008] To solve the problem, a technique has been researched which
prevents the gate leak from being generated, even when the gate
insulating film is thinned.
[0009] For example, a technique has been noted to use, as the gate
insulating film, a material (high-k material) such as
nitrogen-containing silicon oxide having a permittivity larger than
that of silicon oxide which has heretofore been used well as the
material of the gate insulating film.
[0010] For example, SiON containing a high concentration of
nitrogen is one of candidates of the material (see, e.g., D.
Matsushita et al., Symp. VLSI Tech., (2004) 172). This material has
characteristics that the nitrogen concentration inside the gate
insulating film is sufficiently high, although silicon oxide is
used in an interface between the gate insulating film and a silicon
substrate. Accordingly, there can be provided a gate insulating
film having a high permittivity and satisfactory interface
characteristic.
[0011] However, there is a problem caused by the high concentration
of nitrogen in silicon oxide.
[0012] This is abnormal shift of flat band of a P-channel MOS
transistor (see, e.g., Z. Wang et al., IEEE Electron Device Lett.,
21 (2000) 170). That is, from a viewpoint of circuit design, when
the flat band of the P-channel MOS transistor shifts, an
impermissibly large problem is caused in the circuit
characteristic. To solve the problem, it is necessary to give up
the raising of the concentration of nitrogen in silicon oxide.
BRIEF SUMMARY OF THE INVENTION
[0013] According to an aspect of the present invention, there is
provided a semiconductor device comprising a semiconductor
substrate; and an insulating film formed on the semiconductor
substrate, the insulating film has a region containing oxygen atoms
and a region containing boron and nitrogen atoms.
[0014] According to an aspect of the present invention, there is
provided a semiconductor device comprising a semiconductor
substrate; and an insulating film formed on the semiconductor
substrate, the insulating film has a region containing nitrogen
atoms and a region containing boron and nitrogen atoms.
[0015] According to an aspect of the present invention, there is
provided a method of manufacturing a semiconductor device,
comprising a step of forming a region containing oxygen atoms on a
semiconductor substrate; and a step of forming a region containing
boron and nitrogen atoms on the region containing the oxygen
atoms.
[0016] According to an aspect of the present invention, there is
provided a method of manufacturing a semiconductor device,
comprising a step of forming a region containing nitrogen atoms on
a semiconductor substrate; and a step of forming a region
containing boron and nitrogen atoms on the region containing the
nitrogen atoms.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING
[0017] FIG. 1 is a sectional view showing a structure of an MOS
transistor according to a first embodiment;
[0018] FIG. 2 is a diagram showing a method of manufacturing a gate
insulating film of an MOS transistor of FIG. 1;
[0019] FIG. 3 is a characteristic diagram showing a
penetrating/diffusing resistance of boron;
[0020] FIG. 4 is a characteristic diagram showing a threshold
characteristic of the MOS transistor in accordance with a type of a
gate insulating film;
[0021] FIG. 5 is a sectional view showing a structure of an MOS
transistor according to a second embodiment;
[0022] FIG. 6 is a diagram showing a method of manufacturing a gate
insulating film of the MOS transistor of FIG. 5;
[0023] FIG. 7 is a characteristic diagram showing a
penetrating/diffusing resistance of boron;
[0024] FIG. 8 is a characteristic diagram showing a threshold
characteristic of the MOS transistor in accordance with a type of
the gate insulating film;
[0025] FIG. 9 is a characteristic diagram showing a moisture
resistance of an insulating film according to an example of the
present invention;
[0026] FIG. 10 is a sectional view showing a structure of an MOS
transistor according to a third embodiment;
[0027] FIG. 11 is a diagram showing a method of manufacturing a
gate insulating film of the MOS transistor of FIG. 10;
[0028] FIG. 12 is a characteristic diagram showing a
penetrating/diffusing resistance of boron;
[0029] FIG. 13 is a characteristic diagram showing a relation
between a nitrogen concentration in an insulating film and a flat
band voltage of the MOS transistor;
[0030] FIG. 14 is a sectional view showing a structure of an MOS
transistor according to a fourth embodiment;
[0031] FIG. 15 is a diagram showing a method of manufacturing a
gate insulating film of the MOS transistor of FIG. 14;
[0032] FIG. 16 is a characteristic diagram showing an EOT-Jg
characteristic of the insulating film according to an example of
the present invention;
[0033] FIG. 17 is a characteristic diagram showing a
penetrating/diffusing resistance of boron;
[0034] FIG. 18 is a characteristic diagram showing a relation
between a nitrogen concentration in an insulating film and a flat
band voltage of the MOS transistor; and
[0035] FIG. 19 is a characteristic diagram showing a moisture
resistance of the insulating film according to an example of the
present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0036] A semiconductor device of an aspect of the present invention
will be described below in detail with reference to the
accompanying drawing.
1. OUTLINE
[0037] In an aspect of the present invention, there is proposed an
insulating film capable of preventing penetrating or diffusing of
impurities, and having a high permittivity, small EOT, superior
moisture resistance, and small shift amount of a threshold voltage.
For example, in the aspect of the present invention, there is
proposed a structure of a gate insulating film of a P-channel MOS
transistor in which problems such as gate leak and flat band shift
are not caused even when a film is thinned.
[0038] First, a cause for the flat band shift will be studied.
[0039] The flat band shift occurs in the P-channel MOS transistor.
Here, in the P-channel MOS transistor, a polysilicon mainly
containing boron is used as a gate electrode. Boron diffuses to a
gate insulating film from the gate electrode, bonds to nitrogen in
the gate insulating film, and generates dangling bond of silicon.
This is a large cause for the flat band shift.
[0040] That is, highly concentrated nitrogen has heretofore been
contained in the gate insulating film for a purpose of reduction of
a threshold-value fluctuation of the MOS transistor by the
"penetrating of boron". Additionally, in subsequent generations, it
is necessary to inhibit generation of the dangling bond of silicon
by the "diffusing of boron".
[0041] In the example of the present invention, in order to mainly
prevent the dangling bond of silicon, a diffusion preventive film
containing boron and nitrogen atoms is formed on the surface of the
gate insulating film (silicon oxide, silicon nitride, SiON, etc.).
For example, boron nitride (BN) is used as the diffusion preventive
film.
[0042] Since the diffusion preventive film containing the boron and
nitrogen atoms has a high atomic density (Si.sub.3N.sub.4: 100
atoms/nm.sup.3, BN: 130 atoms/nm.sup.3) as compared with
Si.sub.3N.sub.4 generally used as the diffusion preventive film of
boron, boron can further be inhibited from being diffused. As a
result, it is possible to further enhance the nitrogen
concentration in the insulating film. Therefore, an equipment oxide
thickness (EOT) is substantially reduced without any gate leak or
flat band shift, and performance of LSI can be enhanced.
[0043] It is to be noted that to contain boron in the diffusion
preventive film, for example, the diffusion preventive film is used
by methods such as a magnetron sputtering process, a PLD process, a
chemical vapor development (CVD) process, and an ICP-CVD process
using a gas containing boron atoms such as
BC.sub.=3--NH.sub.3--H.sub.2--SiC.sub.=4, B.sub.2H.sub.6.
[0044] Accordingly, invasion of boron in the gate electrode into
the gate insulating film can be prevented, and the dangling bond of
silicon by bonding of boron and nitrogen can be eliminated.
Therefore, for example, the flat band shift accompanying the high
concentration of nitrogen in the gate insulating film can be
suppressed.
[0045] As a result, there can be provided the gate insulating film
of the P-channel MOS transistor having a high nitrogen
concentration (small EOT).
2. EMBODIMENTS
[0046] Next, several embodiments supposed to be best will be
described.
(1) First Embodiment
[0047] A semiconductor device and a method of manufacturing the
device according to a first embodiment will be described.
[0048] A. Structure
[0049] FIG. 1 shows a structure of a P-channel MOS transistor
according to a first embodiment.
[0050] P-type diffusion layers 12A, 12B are formed in a surface
region of an N-type silicon substrate (may be a well) 11. A gate
electrode 14 is formed on a channel region between the P-type
diffusion layers 12A, 12B via a gate insulating film 13. The gate
electrode 14 comprises a polysilicon containing P-type impurities
(e.g., boron).
[0051] Here, as shown in Example 1, the gate insulating film 13
comprises: silicon oxide (SiO.sub.2); a nitrogen-containing portion
formed on silicon oxide; and a diffusion preventive film formed on
the nitrogen-containing portion and containing boron and nitrogen
atoms.
[0052] The nitrogen-containing portion may be, for example, SiN
formed on silicon oxide, or SiON formed by introducing nitrogen
into a surface portion of silicon oxide. The diffusion preventive
film comprises, for example, BN.
[0053] Moreover, as shown in Example 2, the gate insulating film 13
may comprise: silicon oxide (SiO.sub.2); and a diffusion preventive
film (e.g., BN) formed on silicon oxide and containing boron and
nitrogen atoms.
[0054] In Examples 1 and 2, since the diffusion preventive film has
a function of simultaneously preventing both penetration and
diffusion of boron in the gate electrode 14, a flat band shift in
the P-channel MOS transistor can be effectively prevented even when
the gate insulating film becomes thin.
[0055] B. Manufacturing Method
[0056] Next, a method of manufacturing a gate insulating film in
the MOS transistor of FIG. 1 will be described with reference to
FIG. 2.
[0057] First, a silicon substrate 1 is treated with dilute HF, and
the surface of the silicon substrate 1 is terminated by hydrogen
(step ST1). Thereafter, the silicon substrate 1 is introduced into
a chamber (step ST2). Subsequently, an atmosphere in the chamber is
set to, for example, N.sub.2O of 35 Torr, a heater is controlled to
thereby set temperature of the surface of the silicon substrate 1
at 800.degree. C. or more, 1000.degree. C. or less (e.g.,
800.degree. C.), and this state is maintained for about 30 seconds.
As a result, silicon oxide (SiO.sub.2) 3A is formed on the silicon
substrate 1 (steps ST3 and ST4).
[0058] Subsequently, 16 sccm of Ar, 5.4 sccm of He, 0.3 sccm of
N.sub.2, 0.6 sccm of B.sub.2H.sub.6 are introduced to generate
H.sub.2, N.sub.2, Ar plasmas for about one second. Here, a flow
rate of B.sub.2H.sub.6 is set to about 10% of that of He.
Accordingly, the surface of silicon oxide 3A is etched by the
N.sub.2 and H.sub.2 plasmas, and BN 6 is formed into a thickness of
about 0.3 nm on silicon oxide 3A (step ST5).
[0059] The structure of Example 2 is completed by the
above-described steps.
[0060] It is to be noted that when a step of forming SiN or SiON is
added between the steps ST4 and ST5, the structure of Example 1 can
be obtained.
[0061] C. Effect
[0062] Effects by the semiconductor device and the manufacturing
method according to the first embodiment will be described.
[0063] FIG. 3 shows degrees of penetration and diffusion of boron
in a gate electrode by comparison in the structure of the gate
insulating film.
[0064] Here, four types of gate insulating films are shown as
examples, and it is assumed that any of them has a physical film
thickness (actual thickness of a portion for use as the gate
insulating film) of 2 nm.
[0065] First is a gate insulating film formed of only silicon oxide
(SiO.sub.2), second is a gate insulating film formed of silicon
oxide and silicon nitride (SiN), third is a gate insulating film
comprising BN formed into a thickness of 0.3 nm on silicon oxide,
and fourth is a gate insulating film comprising silicon nitride and
0.3 nm of BN formed on silicon oxide.
[0066] In the gate insulating film formed of silicon oxide only,
not only diffusing of boron but also penetrating of boron occur. In
this case, any flat band shift cannot be suppressed. In the gate
insulating film formed of silicon oxide and silicon nitride, the
penetration and diffusion of boron are suppressed to certain
degrees, but this is not complete.
[0067] On the other hand, in the gate insulating film comprising BN
formed on silicon oxide, the penetration and diffusion of boron are
substantially completely suppressed. In the gate insulating film
comprising silicon nitride and BN formed on silicon oxide, the
penetration and diffusion of boron are completely inhibited, and
the flat band shift can be prevented.
[0068] When the physical film thickness of the gate insulating film
indicates a value of 2 nm or less in this manner, the diffusion
preventive film (e.g., BN) containing the boron and nitrogen atoms
is formed on the surface of the gate insulating film. This is very
effective means for preventing the flat band shift by the
penetration and diffusion of boron from the gate electrode into the
gate insulating film.
[0069] FIG. 4 shows degrees of fluctuations of threshold voltage of
a P-channel MOS transistor at a time when four types of gate
insulating films compared in FIG. 3 are used.
[0070] .DELTA.Vth is a shift amount of the threshold voltage of the
P-channel MOS transistor by the penetration and diffusion of boron,
and corresponds to the fluctuation.
[0071] In the gate insulating film having the diffusion preventive
film (e.g., BN) containing the boron and nitrogen atoms, it is seen
that the shift amount .DELTA.Vth of the threshold voltage is small
as compared with a gate insulating film which does not have any
diffusion preventive film. This is because the penetration and
diffusion of boron from the gate electrode into the gate insulating
film are suppressed by the diffusion preventive film as described
above.
[0072] Therefore, according to the first embodiment, even when the
physical film thickness of the gate insulating film of the
P-channel MOS transistor indicates a value of 2 nm or less,
controllability of threshold voltage Vth does not deteriorate, and
this can contribute to enhancement of performance of the LSI.
(2) Second Embodiment
[0073] Next, a semiconductor device and a method of manufacturing
the device will be described according to a second embodiment. The
second embodiment is modification of the first embodiment. The
second embodiment is different from the first embodiment in that
silicon nitride is used as a gate insulating film instead of
silicon oxide.
[0074] A. Structure
[0075] FIG. 5 shows a structure of a P-channel MOS transistor
according to a second embodiment.
[0076] P-type diffusion layers 12A, 12B are formed in a surface
region of an N-type silicon substrate (may be a well) 11. A gate
electrode 14 is formed on a channel region between the P-type
diffusion layers 12A, 12B via a gate insulating film 13. The gate
electrode 14 comprises a polysilicon containing P-type impurities
(e.g., boron).
[0077] Here, the gate insulating film 13 comprises: silicon nitride
(SiN); and a diffusion preventive film formed on silicon nitride
and containing boron and nitrogen atoms.
[0078] It is to be noted that the gate insulating film 13 which is
constituted of silicon nitride may be a nitrogen-containing
insulating film, and the gate insulating film 13 may contain, for
example, an atom (excluding the boron atom) such as the oxygen atom
other than nitrogen and silicon atoms.
[0079] Moreover, the diffusion preventive film comprises, for
example, BN.
[0080] Since the diffusion preventive film has a function of
simultaneously preventing both penetration and diffusion of boron
in the gate electrode 14, a flat band shift in the P-channel MOS
transistor can be effectively prevented even if the gate insulating
film becomes thin.
[0081] B. Manufacturing Method
[0082] Next, a method of manufacturing a gate insulating film in
the MOS transistor of FIG. 5 will be described with reference to
FIG. 6.
[0083] First, a silicon substrate 1 is treated with dilute HF, and
the surface of the silicon substrate 1 is terminated by hydrogen
(step ST1). Thereafter, the silicon substrate 1 is introduced into
a chamber (step ST2). Subsequently, an atmosphere in the chamber is
set to, for example, NH.sub.3 of 740 Torr, a heater is controlled
to thereby set temperature of the surface of the silicon substrate
1 at 700.degree. C. or more, 750.degree. C. or less (e.g.,
700.degree. C.), and this state is maintained for about 100
seconds. As a result, silicon nitride (SiN) 2 is formed on the
silicon substrate 1 (steps ST3 and ST4).
[0084] Subsequently, 16 sccm of Ar, 5.4 sccm of He, 0.3 sccm of
N.sub.2, 0.6 sccm of B.sub.2H.sub.6 are introduced to generate
H.sub.2, N.sub.2, Ar plasmas for about one second. Here, a flow
rate of B.sub.2H.sub.6 is set to about 10% of that of He.
Accordingly, the surface of silicon nitride 2 is etched by the
N.sub.2 and H.sub.2 plasmas, and BN 6 is formed into a thickness of
about 0.3 nm on silicon nitride 2 (step ST5).
[0085] The gate insulating film of the P-channel MOS transistor of
FIG. 5 is completed by the above-described steps.
[0086] C. Effect
[0087] Effects by the semiconductor device and the manufacturing
method according to the second embodiment will be described.
[0088] FIG. 7 shows degrees of penetration and diffusion of boron
in a gate electrode by comparison in the structure of the gate
insulating film.
[0089] Here, two types of gate insulating films are shown as
examples, and it is assumed that either of them has a physical film
thickness of 1.5 nm. First is a gate insulating film formed of only
silicon nitride (SiN), and second is a gate insulating film
comprising BN formed into a thickness of 0.3 nm on silicon
nitride.
[0090] In the gate insulating film formed of silicon nitride only,
the penetration and diffusion of boron are suppressed to certain
degrees, but this is not complete. On the other hand, in the gate
insulating film comprising BN formed on silicon nitride, the
penetration and diffusion of boron are substantially completely
suppressed.
[0091] When the physical film thickness of the gate insulating film
indicates a value of 2 nm or less, the diffusion preventive film
(e.g., BN) containing the boron and nitrogen atoms is formed on the
surface of the gate insulating film. This is very effective means
for preventing the flat band shift by the penetration and diffusion
of boron from the gate electrode into the gate insulating film.
[0092] FIG. 8 shows degrees of fluctuations of threshold voltage of
a P-channel MOS transistor at a time when two types of gate
insulating films compared in FIG. 7 are used.
[0093] .DELTA.Vth is a shift amount of the threshold voltage of the
P-channel MOS transistor by the penetration and diffusion of boron,
and corresponds to the fluctuation.
[0094] In the gate insulating film having the diffusion preventive
film (e.g., BN) containing the boron and nitrogen atoms, it is seen
that the shift amount .DELTA.Vth of the threshold voltage is small
as compared with a gate insulating film which does not have any
diffusion preventive film. This is because the penetration and
diffusion of boron from the gate electrode into the gate insulating
film are suppressed by the diffusion preventive film as described
above.
[0095] Therefore, even in the second embodiment, when the physical
film thickness of the gate insulating film of the P-channel MOS
transistor indicates a value of 2 nm or less, controllability of
threshold voltage Vth can be prevented from being deteriorated, and
this can contribute to enhancement of performance of the LSI.
[0096] FIG. 9 is a graph showing changes of moisture resistance of
a gate insulating film in a case where (first embodiment) the
diffusion preventive film is formed on silicon oxide and in a case
where (second embodiment) the diffusion preventive film is formed
on silicon nitride.
[0097] It is seen from the figure that the gate insulating film
formed of silicon nitride (e.g., SiN) and the diffusion preventive
film (e.g., BN) is superior in moisture resistance to the gate
insulating film formed of silicon oxide (e.g., SiO.sub.2) and the
diffusion preventive film.
[0098] This is supposedly because by the use of silicon nitride in
the gate insulating film, a part of silicon nitride changes to
metal nitride, a bonded state between silicon nitride and the
diffusion preventive film is stabilized, and the gate insulating
film becomes inactive.
[0099] It is to be noted that when BN forming the diffusion
preventive film contains metal nitride such as Si.sub.3N.sub.4 in a
range of 0.05 to 0.15 wt %, characteristics such as peelability and
moisture resistance are largely enhanced.
[0100] In the second embodiment, since the diffusion preventive
film containing the boron and nitrogen atoms is formed on silicon
nitride, the penetration and diffusion of boron can be prevented,
and the gate insulating film can be strengthened.
(3) Third Embodiment
[0101] Next, a semiconductor device and a method of manufacturing
the device will be described according to a third embodiment. The
third embodiment is modification of the second embodiment. The
third embodiment is different from the second embodiment in that
silicon nitride whose interface has been oxidized is used as a gate
insulating film instead of silicon nitride.
[0102] A. Structure
[0103] FIG. 10 shows a structure of a P-channel MOS transistor
according to a third embodiment.
[0104] P-type diffusion layers 12A, 12B are formed in a surface
region of an N-type silicon substrate (may be a well) 11. A gate
electrode 14 is formed on a channel region between the P-type
diffusion layers 12A, 12B via a gate insulating film 13. The gate
electrode 14 comprises a polysilicon containing P-type impurities
(e.g., boron).
[0105] Here, the gate insulating film 13 comprises: silicon nitride
(SiON) whose interface has been oxidized; and a diffusion
preventive film formed on silicon nitride and containing boron and
nitrogen atoms.
[0106] It is to be noted that the gate insulating film 13 which is
constituted of silicon nitride may be a nitrogen-containing
insulating film, and it may contain, for example, an atom
(excluding the boron atom) such as the oxygen atom other than
nitrogen and silicon atoms.
[0107] Moreover, the diffusion preventive film comprises, for
example, BN.
[0108] Since the diffusion preventive film has a function of
simultaneously preventing both penetration and diffusion of boron
in the gate electrode 14, a flat band shift in the P-channel MOS
transistor can be effectively prevented even if the gate insulating
film becomes thin.
[0109] B. Manufacturing Method
[0110] Next, a method of manufacturing a gate insulating film in
the MOS transistor of FIG. 10 will be described with reference to
FIG. 11.
[0111] First, a silicon substrate 1 is treated with dilute HF, and
the surface of the silicon substrate 1 is terminated by hydrogen
(step ST1). Thereafter, the silicon substrate 1 is introduced into
a chamber (step ST2). Subsequently, an atmosphere in the chamber is
set to, for example, NH.sub.3 of 740 Torr, a heater is controlled
to thereby set temperature of the surface of the silicon substrate
1 at 700.degree. C. or more, 750.degree. C. or less (e.g.,
700.degree. C.), and this state is maintained for about 100
seconds. As a result, silicon nitride (SiN) 2 is formed on the
silicon substrate 1 (steps ST3 and ST4).
[0112] Next, the chamber is filled with, for example, N.sub.2O of
35 Torr, and a heater is controlled to thereby set temperature of
the surface of the silicon substrate 1 at 800.degree. C. or more,
1000.degree. C. or less (e.g., 800.degree. C.) and this state is
maintained for about 30 seconds. As a result, silicon nitride
(e.g., SiON) 3, 4 containing an oxygen atom are formed on an
interface of silicon nitride 2, that is, between the silicon
substrate 1 and silicon nitride 2, and on the upper surface of
silicon nitride 2 (step ST5).
[0113] Subsequently, 16 sccm of Ar, 5.4 sccm of He, 0.3 sccm of
N.sub.2, 0.6 sccm of B.sub.2H.sub.6 are introduced to generate
H.sub.2, N.sub.2, Ar plasmas for about one second. Here, a flow
rate of B.sub.2H.sub.6 is set to about 10% of that of He.
Accordingly, the surface of silicon-nitride 4 containing an oxygen
atom is etched by the N.sub.2 and H.sub.2 plasmas, and BN 6 is
formed into a thickness of about 0.3 nm on silicon nitride 4 (step
ST6).
[0114] The gate insulating film of the P-channel MOS transistor of
FIG. 10 is completed by the above-described steps.
[0115] C. Effect
[0116] Effects by the semiconductor device and the manufacturing
method according to the third embodiment will be described.
[0117] FIG. 12 shows degrees of penetration and diffusion of boron
in a gate electrode by comparison in the structure of the gate
insulating film.
[0118] Here, two types of gate insulating films are shown as
examples, and it is assumed that either of them has a physical film
thickness of 1.5 nm. First is a gate insulating film formed of
silicon nitride (SiON) whose interface has been oxidized, and
second is a gate insulating film comprising BN formed into a
thickness of 0.3 nm on silicon nitride whose interface has been
oxidized.
[0119] In the gate insulating film formed of silicon nitride whose
interface has been oxidized, the penetration and diffusion of boron
are suppressed to certain degrees, but this is not complete. On the
other hand, in the gate insulating-film comprising BN formed on
silicon nitride whose interface has been oxidized, the penetration
and diffusion of boron are substantially completely suppressed.
[0120] When the physical film thickness of the gate insulating film
indicates a value of 2 nm or less in this manner, the diffusion
preventive film (e.g., BN) containing the boron and nitrogen atoms
is formed on the surface of the gate insulating film. This is very
effective means for preventing the flat band shift by the
penetration and diffusion of boron from the gate electrode into the
gate insulating film.
[0121] FIG. 13 shows degrees of fluctuations of flat band voltage
of a P-channel MOS transistor at a time when two types of gate
insulating films compared in FIG. 12 are used. In this figure, we
can consider that fluctuations of flat band voltage are a nearly
equal to that of threshold voltage.
[0122] .DELTA.Vfb is a shift amount of the flat band voltage of the
P-channel MOS transistor by the penetration and diffusion of boron,
and corresponds to the fluctuation.
[0123] In the gate insulating film having the diffusion preventive
film (e.g., BN) containing the boron and nitrogen atoms, it is seen
that the shift amount .DELTA.Vfb of the flat band voltage is small
as compared with a gate insulating film which does not have any
diffusion preventive film.
[0124] Moreover, the abscissa indicates a nitrogen concentration N
[at. %] in the gate insulating film. That is, the following is seen
from the graph.
[0125] In the gate insulating film which does not have any
diffusion preventive film (e.g., BN), when a nitrogen concentration
increases in the gate insulating film, the shift amount .DELTA.Vfb
of the flat band voltage excessively increases. However, in the
gate, insulating film having the diffusion preventive film, even
when the nitrogen concentration increases in the gate insulating
film, the shift amount .DELTA.Vfb of the flat band voltage does not
excessively increase.
[0126] This is because, as described above, the diffusion
preventive film inhibits penetration and diffusion of boron from
the gate electrode into the gate insulating film.
[0127] Therefore, even in the third embodiment, when the physical
film thickness of the gate insulating film of the P-channel MOS
transistor indicates a value of 2 nm or less, controllability of
flat band voltage Vfb and threshold voltage can be prevented from
being deteriorated, and this can contribute to enhancement of
performance of the LSI.
[0128] It is to be noted that when BN forming the diffusion
preventive film contains metal nitride such as Si.sub.3N.sub.4 in a
range of 0.05 to 0.15 wt %, characteristics such as peelability and
moisture resistance are largely enhanced.
[0129] In the third embodiment, the diffusion preventive film
containing the boron and nitrogen atoms is formed on silicon
nitride whose interface has been oxidized, accordingly the
penetration and diffusion of boron can be prevented, and further
the gate insulating film can be strengthened.
(4) Fourth Embodiment
[0130] Next, a semiconductor device and a method of manufacturing
the device will be described according to a fourth embodiment. The
fourth embodiment is modification of the third embodiment. The
fourth embodiment is different from the third embodiment in that
the nitrogen concentration is raised in an oxidized portion (SiON)
between silicon nitride and the diffusion preventive film.
[0131] A. Structure
[0132] FIG. 14 shows a structure of a P-channel MOS transistor
according to a fourth embodiment.
[0133] P-type diffusion layers 12A, 12B are formed in a surface
region of an N-type silicon substrate (may be a well) 11. A gate
electrode 14 is formed on a channel region between the P-type
diffusion layers 12A, 12B via a gate insulating film 13. The gate
electrode 14 comprises a polysilicon containing P-type impurities
(e.g., boron).
[0134] Here, the gate insulating film 13 comprises: silicon nitride
(SiN) whose interface has been oxidized; and a diffusion preventive
film formed on silicon nitride and containing boron and nitrogen
atoms.
[0135] Moreover, the nitrogen concentration is increased in an
oxidized portion between silicon nitride and the diffusion
preventive film. That is, the nitrogen concentration of the portion
is higher than that of another portion.
[0136] It is to be noted that the gate insulating film 13 which is
constituted of silicon nitride may be a nitrogen-containing
insulating film, and it may contain, for example, an atom
(excluding the boron atom) such as the oxygen atom other than
nitrogen and silicon atoms.
[0137] Moreover, the diffusion preventive film comprises, for
example, BN.
[0138] Since the diffusion preventive film has a function of
simultaneously preventing both penetration and diffusion of boron
in the gate electrode 14, a flat band shift in the P-channel MOS
transistor can be effectively prevented even if the gate insulating
film becomes thin.
[0139] B. Manufacturing Method
[0140] Next, a method of manufacturing a gate insulating film in
the MOS transistor of FIG. 14 will be described with reference to
FIG. 15.
[0141] First, a silicon substrate 1 is treated with dilute HF, and
the surface of the silicon substrate 1 is terminated by hydrogen
(step ST1). Thereafter, the silicon substrate 1 is introduced into
a chamber (step ST2). Subsequently, an atmosphere in the chamber is
set to, for example, NH.sub.3 of 740 Torr, a heater is controlled
to thereby set temperature of the surface of the silicon substrate
1 at 700.degree. C. or more, 750.degree. C. or less (e.g.,
700.degree. C.), and this state is maintained for about 100
seconds. As a result, silicon nitride (SiN) 2 is formed on the
silicon substrate 1 (steps ST3 and ST4).
[0142] Next, the chamber is filled with, for example, N.sub.2O of
35 Torr, and a heater is controlled to thereby set temperature of
the surface of the silicon substrate 1 at 800.degree. C. or more,
1000.degree. C. or less (e.g., 800.degree. C.) and this state is
maintained for about 30 seconds. As a result, silicon nitrides
(e.g., SiON) 3, 4 containing the oxygen atom are formed on an
interface of silicon nitride 2, that is, between the silicon
substrate 1 and silicon nitride 2, and on the upper surface of
silicon nitride 2 (step ST5).
[0143] Subsequently, the chamber is filled with, for example,
N.sub.2 of 30 mTorr, and irradiated with plasmas (radicals) for
about 10 seconds. As a result, the nitrogen atom is introduced into
silicon nitride 4 containing the oxygen atom, and silicon nitride 4
containing the oxygen atom constitutes an oxynitride layer 5 (step
ST6).
[0144] Subsequently, 16 sccm of Ar, 5.4 sccm of He, 0.3 sccm of
N.sub.2, 0.6 sccm of B.sub.2H.sub.6 are introduced to generate
H.sub.2, N.sub.2, Ar plasmas for about one second. Here, a flow
rate of B.sub.2H.sub.6 is set to about 10% of that of He.
Accordingly, the surface of the oxynitride layer 5 containing
highly concentrated nitrogen is etched by the N.sub.2 and H.sub.2
plasmas, and BN 6 is formed into a thickness of about 0.3 nm on the
oxynitride layer 5 (step ST7).
[0145] The gate insulating film of the P-channel MOS transistor of
FIG. 14 is completed by the above-described steps.
[0146] C. Effect
[0147] Effects by the semiconductor device and the manufacturing
method according to the fourth embodiment will be described.
[0148] FIG. 16 shows EOT-Jg relations in a case where nitriding
(referred to as surface nitriding) is performed as shown in the
step ST6 of the manufacturing method and in a case where the
nitriding is not performed.
[0149] Here, EOT stands for equipment oxide thickness, and Jg
denotes an index indicating a degree of gate leak. When a value of
Jg decreases, the gate leak decreases, and satisfactory
characteristics are obtained.
[0150] The characteristics are shown by white circles with respect
to the gate insulating film comprising a BN film directly disposed
on an SiON film and having a physical film thickness of 1.5 nm. The
characteristics are shown by black circles with respect to the gate
insulating film comprising the BN film disposed on SiON after
nitriding the surface of the SiON film and having a physical film
thickness of 1.5 nm.
[0151] It is seen from the figure that the EOT-Jg relation is
improved, when the surface nitriding is performed, as compared with
the case where the nitriding is not performed. That is, when gate
leak is kept at a certain constant value, for example, 10.sup.2
[A/cm.sup.2], the EOT indicates a small value in the case where the
surface nitriding is performed, as compared with the case where the
nitriding is not performed.
[0152] This is supposedly because SiO.sub.2 formed on the surface
of the SiON film is nitrided by plasma nitriding, accordingly
oxygen and nitrogen are substituted, and permittivity of the gate
insulating film is enhanced.
[0153] FIG. 17 shows a degree of penetration and diffusion of boron
in the gate electrode by comparison in the structure of the gate
insulating film.
[0154] Here, two types of gate insulating films are shown as
examples, and it is assumed that either of them has a physical film
thickness of 1.5 nm. First is a gate insulating film formed of
silicon nitride (SiON) whose interface has been oxidized and a
diffusion preventive film (BN), and second is a gate insulating
film comprising silicon nitride whose interface subjected to
surface nitriding has been oxidized and the diffusion preventive
film.
[0155] In the gate insulating film which is not subjected to the
surface nitriding, the penetration and diffusion of boron are
suppressed to certain degrees, but this is not complete. On the
other hand, in the gate insulating film subjected to the surface
nitriding, the penetration and diffusion of boron are substantially
completely suppressed.
[0156] When the physical film thickness of the gate insulating film
indicates a value of 2 nm or less in this manner, the diffusion
preventive film (e.g., BN) containing the boron and nitrogen atoms
is formed on the surface of the gate insulating film, and further
the surface nitriding is performed. This is very effective means
for preventing the flat band shift by the penetration and diffusion
of boron from the gate electrode into the gate insulating film.
[0157] FIG. 18 shows degrees of fluctuations of flat band voltage
of a P-channel MOS transistor at a time when two types of gate
insulating films compared in FIG. 17 are used. In this figure, we
can consider that fluctuations of flat band voltage are nearly
equal to that of threshold voltage.
[0158] .DELTA.Vfb is a shift amount of the flat band voltage of the
P-channel MOS transistor by the penetration and diffusion of boron,
and corresponds to the fluctuation.
[0159] In the gate insulating film having the diffusion preventive
film (e.g., BN) containing the boron and nitrogen atoms, as shown
in FIG. 13, the shift amount .DELTA.Vfb of the flat band voltage is
small as compared with a gate insulating film which does not have
any diffusion preventive film.
[0160] Moreover, when the surface of the SiON film is nitrided, the
shift amount .DELTA.Vfb of the flat band voltage can further be
reduced as compared with the case where the surface nitriding is
hot performed.
[0161] Here, the abscissa indicates a nitrogen concentration N [at.
%] in the gate insulating film. That is, when the surface nitriding
is performed, the shift amount .DELTA.Vfb can be maintained at a
small value even with the increase of the nitrogen concentration in
the gate insulating film.
[0162] This is because combination of the surface nitriding with
the diffusion preventive film inhibits the penetration and
diffusion of boron from the gate electrode into the gate insulating
film.
[0163] Therefore, even in the fourth embodiment, when the physical
film thickness of the gate insulating film of the P-channel MOS
transistor indicates a value of 2 nm or less, controllability of
threshold voltage Vth and flat band voltage can be prevented from
being deteriorated, and this can contribute to enhancement of
performance of the LSI.
[0164] FIG. 19 is a graph showing changes of moisture resistances
of the gate insulating films in a case where (third embodiment) the
diffusion preventive film is formed on the SiON film and a case
where (fourth embodiment) the diffusion preventive film is formed
on the SiON film subjected to the surface nitriding.
[0165] It is seen from the figure that the gate insulating film
subjected to the surface nitriding is superior in moisture
resistance to the gate insulating film which is not subjected to
the surface nitriding.
[0166] This is because by the nitriding of the surface of the SiON
film to increase the nitrogen concentration, a part of silicon
nitride in the gate insulating film changes to metal nitride, a
bonded state between silicon nitride and the diffusion
preventive-film is stabilized, and the gate insulating film becomes
inactive.
[0167] It is to be noted that when BN forming the diffusion
preventive film contains metal nitride such as Si.sub.3N.sub.4 in a
range of 0.05 to 0.15 wt %, characteristics such as peelability and
moisture resistance are largely enhanced.
[0168] In the fourth embodiment, by combination of the
surface-nitrided SiON film and the diffusion preventive film
containing the boron and nitrogen atoms, the penetration and
diffusion of boron can be effectively prevented, and further the
gate insulating film can be strengthened.
3. OTHERS
[0169] In the above-described first to fourth embodiments, an
atomic density of a diffusion preventive film containing at least
boron and nitrogen atoms is higher than that of an oxide film or a
nitride film.
[0170] The diffusion preventive film preferably contains
1.times.10.sup.18 cm.sup.-3 or more of the boron atom.
[0171] Moreover, to sufficiently fulfill a function of the
diffusion preventive film, a surface density of the boron atom may
be set to be higher than that of the nitrogen atom in the diffusion
preventive film.
[0172] The diffusion preventive film is formed by generation of
plasmas in an atmosphere constituted of a gas containing the
nitrogen atom and a gas containing the boron atom. For example, the
gas containing the nitrogen atom contains any of NH.sub.3,
N.sub.2O, N, and N.sub.2.
[0173] When the example of the present invention is applied to a
gate insulating film of a P-channel MOS transistor, a gate
electrode is formed of a polysilicon containing the boron atom.
[0174] Here, the diffusion preventive film may be formed using, for
example, the polysilicon containing the boron atom. That is, after
forming the polysilicon containing the boron atom, the polysilicon
is exposed to the gas containing the nitrogen atom, and accordingly
the diffusion preventive film can be easily formed containing the
boron and nitrogen atoms.
[0175] According to the example of the present invention, there can
be provided an insulating film having a high nitrogen
concentration, high permittivity (high-K), small EOT, superior
moisture resistance, and small shift amount of threshold voltage.
As described above, this technique can contribute to realization of
a high-performance MOS transistor in which gate leak, flat band
shift and the like are suppressed, for example, when applied to the
gate insulating film of the P-channel MOS transistor.
[0176] Additional advantages and modifications will readily occur
to those skilled in the art. Therefore, the invention in its
broader aspects is not limited to the specific details and
representative embodiments shown and described herein. Accordingly,
various modifications may be made without departing from the spirit
or scope of the general invention concept as defined by the
appended claims and their equivalents.
* * * * *