U.S. patent application number 11/514248 was filed with the patent office on 2006-12-28 for method of manufacturing a capacitor for semiconductor device.
This patent application is currently assigned to SAMSUNG ELECTRONICS CO., LTD.. Invention is credited to Young-jin Cho, Jung-hyun Lee, Yo-sep Min.
Application Number | 20060289921 11/514248 |
Document ID | / |
Family ID | 27725829 |
Filed Date | 2006-12-28 |
United States Patent
Application |
20060289921 |
Kind Code |
A1 |
Lee; Jung-hyun ; et
al. |
December 28, 2006 |
Method of manufacturing a capacitor for semiconductor device
Abstract
A capacitor for use in a semiconductor device, a method of
fabricating the capacitor, and an electronic device adopting the
capacitor, wherein the capacitor includes upper and lower
electrodes, each formed of a platinum group metal; a thin
dielectric layer disposed between the upper and lower electrodes;
and a buffer layer disposed between the lower electrode and the
thin dielectric layer, the buffer layer including a metal oxide of
Group 3, 4, or 13. In the capacitor of the present invention,
oxidization of the lower electrode may be suppressed, and excellent
characteristics of the thin dielectric layer may be maintained.
Inventors: |
Lee; Jung-hyun;
(Yongin-city, KR) ; Min; Yo-sep; (Seoul, KR)
; Cho; Young-jin; (Bupyung-gu, KR) |
Correspondence
Address: |
LEE & MORSE, P.C.
3141 FAIRVIEW PARK DRIVE
SUITE 500
FALLS CHURCH
VA
22042
US
|
Assignee: |
SAMSUNG ELECTRONICS CO.,
LTD.
Suwon-city
KR
|
Family ID: |
27725829 |
Appl. No.: |
11/514248 |
Filed: |
September 1, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10930953 |
Sep 1, 2004 |
7105401 |
|
|
11514248 |
Sep 1, 2006 |
|
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10370625 |
Feb 24, 2003 |
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10930953 |
Sep 1, 2004 |
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Current U.S.
Class: |
257/310 ;
257/E21.009; 257/E21.3 |
Current CPC
Class: |
H01L 21/321 20130101;
H01L 28/55 20130101; H01L 21/02205 20130101; H01L 21/02186
20130101; H01L 28/56 20130101; H01L 21/02304 20130101; H01L 21/0228
20130101; H01L 21/02197 20130101; H01L 28/65 20130101; H01L 21/3141
20130101; H01L 27/0629 20130101 |
Class at
Publication: |
257/310 |
International
Class: |
H01L 29/94 20060101
H01L029/94 |
Foreign Application Data
Date |
Code |
Application Number |
Feb 28, 2002 |
KR |
2002-10982 |
Claims
1-4. (canceled)
5. A method of fabricating a capacitor for use in a semiconductor
device, the method comprising: forming a buffer layer on a lower
electrode of a platinum group metal by performing an atomic layer
deposition (ALD) process using a precursor for the buffer layer;
forming a thin dielectric layer by performing the ALD process using
a precursor for a thin dielectric layer on the buffer layer; and
forming an upper electrode of a platinum group metal on the thin
dielectric layer.
6. The method as claimed in claim 5, wherein the precursor for the
buffer layer is comprised of Ti(i-OPr).sub.2(tmhd).sub.2 (where
tmhd indicates tetramethylheptanedionate, and i-OPr indicates
isopropoxy), Al(CH.sub.3).sub.3 or Hf(OBu).sub.4 (where n-OBu
indicates n-butoxide).
7. The method as claimed in claim 5, wherein the ALD process for
forming the buffer layer is performed at a temperature of between
about 200-500.degree. C.
8. The method as claimed in claim 5, wherein the precursor for the
thin dielectric layer is comprised of at least one selected from
the group consisting of Sr(tmdh).sub.2, Sr(methd).sub.2,
TiO(tmhd).sub.2, and Ti(i-OPr).sub.2(tmhd).sub.2, (where tmhd
indicates tetramethylheptanedionate, methd indicates methoxyethoxy
tetramethylheptanedionate and i-OPr indicates isopropoxy).
9-16. (canceled)
17. The method as claimed in claim 5, wherein forming the buffer
layer includes using O.sub.3 as an oxidizer.
18. The method as claimed in claim 17, wherein the ALD process for
forming the buffer layer is performed at a temperature of between
about 200-500.degree. C.
19. The method as claimed in claim 18, wherein the precursor for
the buffer layer is comprised of Ti(i-OPr).sub.2(tmhd).sub.2 (where
tmhd indicates tetramethylheptanedionate, and i-OPr indicates
isopropoxy), Al(CH.sub.3).sub.3 or Hf(OBu).sub.4 (where n-OBu
indicates n-butoxide).
20. The method as claimed in claim 5, wherein forming the thin
dielectric layer includes using O.sub.3 as an oxidizer.
21. The method as claimed in claim 20, wherein forming the thin
dielectric layer is performed at a temperature between about
300-500.degree. C.
22. The method as claimed in claim 21, wherein the precursor for
the thin dielectric layer is comprised of at least one selected
from the group consisting of Sr(tmdh).sub.2, Sr(methd).sub.2,
TiO(tmhd).sub.2, and Ti(i-OPr).sub.2(tmhd).sub.2, (where tmhd
indicates tetramethylheptanedionate, methd indicates methoxyethoxy
tetramethylheptanedionate and i-OPr indicates isopropoxy).
Description
CROSS REFERENCE TO RELATED APPLICATION(S)
[0001] This is a divisional application based on pending
application Ser. No. 10/930,953, filed Sep. 1, 2004, which in turn
is a division of application Ser. No. 10/370,625, filed Feb. 24,
2003, the entire contents of which is hereby incorporated by
reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a capacitor for a
semiconductor device. More particularly, the present invention
relates to a capacitor for use in a semiconductor device having an
ability to effectively suppress the oxidization of a material for
an electrode when forming a thin dielectric layer, a manufacturing
method thereof, and an electronic device that employs the capacitor
and thus may be highly integrated.
[0004] 2. Description of the Related Art
[0005] The more integrated a memory is, the smaller the size of a
unit cell and the smaller the area of a capacitor. Thus, to realize
a capacitor having a large electrostatic capacity in a limited
area, extensive research into the use of a capacitor dielectric
having a large permittivity, e.g., a high-dielectric material, has
been conducted.
[0006] High-dielectric materials include tantalum oxide (TaO) and
strontium titanium oxide (SrTiO.sub.3), which have a larger
permittivity than low-dielectric materials such as SiO.sub.2 and
Si.sub.3N.sub.4. However, despite the use of a high-dielectric
material, a three-dimensional capacitor is still required to
realize a capacitor having a large capacitance. To this end, an
atomic layer deposition (ALD) method is used.
[0007] According to the ALD method, a desired metal oxide thin
dielectric film is obtained by chemically absorbing an
organometallic compound, which is a precursor, on a substrate, and
processing the thin film under an oxygen atmosphere. The ALD method
is advantageous in that an organic substance included in a
precursor can be removed by a strong oxidizer since the precursor
and the oxidizer are introduced using time division.
[0008] However, if a lower electrode, which is to be formed below a
thin dielectric layer when forming an atomic layer, is formed of a
material that is prone to oxidization, e.g., ruthenium (Ru), the Ru
electrode may be deformed and the thin dielectric layer may
deteriorate, as shown in FIG. 1. Therefore, it is difficult to
highly integrate the thin dielectric layer.
[0009] FIG. 1 illustrates a capacitor in which a thin strontium
titanium oxide (SrTiO.sub.3) layer is formed on a Ru lower
electrode by a conventional O.sub.3 atomic layer deposition (ALD)
method. Referring to FIG. 1, it is noted that the conventional
O.sub.3 ALD method causes a protrusion of the Ru lower electrode to
be generated in the capacitor.
[0010] As shown in FIG. 2, Ru easily changes into RuO.sub.2 or
RuO.sub.4 under an oxygen atmosphere, which causes the deformation
of the Ru electrode.
SUMMARY OF THE INVENTION
[0011] To solve the above-described problems, it is a first feature
of an embodiment of the present invention to provide a capacitor
for use in a semiconductor device, in which the oxidization of a
material for an electrode is effectively suppressed when forming a
thin dielectric layer.
[0012] It is a second a feature of an embodiment of the present
invention to provide a method of fabricating such a capacitor.
[0013] It is a third a feature of an embodiment of the present
invention to provide an electronic device employing such a
capacitor, in which a thin dielectric layer may be highly
integrated, and a method for forming the same.
[0014] Accordingly, to provide the first feature of an embodiment
of the present invention, there is provided a capacitor for use in
a semiconductor device including upper and lower electrodes, each
formed of a platinum group metal, a thin dielectric layer disposed
between the upper and lower electrodes, and a buffer layer disposed
between the lower electrode and the thin dielectric layer, the
buffer layer including a metal oxide of Group 3, 4, or 13.
[0015] To provide an aspect of the second feature of an embodiment
of the present invention, there is provided a method of fabricating
such a capacitor for use in a semiconductor device including
forming a buffer layer on a lower electrode of a platinum group
metal by performing an atomic layer deposition (ALD) process using
a precursor for the buffer layer, forming a thin dielectric layer
by performing the ALD process using a precursor for a thin
dielectric layer on the buffer layer, and forming an upper
electrode of a platinum group metal on the thin dielectric
layer.
[0016] To provide another aspect of the second feature of an
embodiment of the present invention, there is provided a method of
fabricating such a capacitor for use in a semiconductor device
including absorbing CO on a surface of a lower electrode of a
platinum group metal, placing the lower electrode under a reducing
atmosphere to produce a lattice oxygen, using the lattice oxygen to
form a thin dielectric layer by performing an ALD process using a
precursor for the thin dielectric layer, and forming an upper
electrode of a platinum group metal on the thin dielectric
layer.
[0017] To provide the third feature of an embodiment of the present
invention, there is provided an electronic device employing a
capacitor for a semiconductor device according to an embodiment of
the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above features and advantages of the present invention
will become more apparent by describing in detail a preferred
embodiment thereof with reference to the attached drawings in
which:
[0019] FIG. 1 illustrates a view of a capacitor formed by a
conventional O.sub.3 atomic layer deposition (ALD) method;
[0020] FIG. 2 is a graph illustrating variations in the degree of
activation, according to temperature, of ruthenium (Ru) oxide in
the capacitor of FIG. 1;
[0021] FIG. 3 illustrates a view for explaining a process in which
carbon monoxide (CO) absorbed on the surface of a Ru electrode
changes into a lattice oxygen, in accordance with the present
invention;
[0022] FIGS. 4A through 4C illustrate cross-sectional views showing
embodiments of a memory device employing a capacitor according to
the present invention;
[0023] FIG. 5 is a photograph taken by a transmission electron
microscope (TEM) of an SrTiO.sub.3 thin layer of a capacitor
according to one embodiment of the present invention;
[0024] FIG. 6 is a photograph taken by a scanning electron
microscope (SEM) of an SrTiO.sub.3 thin layer of a capacitor
according to another embodiment of the present invention; and
[0025] FIGS. 7A and 7B are graphs illustrating the electrical
characteristics of a capacitor according to still another
embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0026] Korean Patent Application No. 2002-10982, entitled
"Capacitor For Semiconductor Device, Manufacturing Method Thereof,
And Electronic Device," filed on Feb. 28, 2002, is incorporated by
reference herein in its entirety.
[0027] In the present invention, a buffer layer is formed between a
thin dielectric layer and an electrode to prevent the oxidization
of a platinum metal when forming the thin dielectric film.
Preferably, ruthenium (Ru) is the platinum metal used as a material
for the electrode. The buffer layer is formed of a metal oxide of
Group 3, 4, or 13, preferably, at least one selected from the group
consisting of TiO.sub.2, Al.sub.2O.sub.3, Ta.sub.2O.sub.5, and
HfO.sub.2. Such a buffer layer may be formed by an atomic layer
deposition (ALD) of a precursor for forming the buffer layer. The
precursor is an organometallic compound having a small sized ligand
or that is easily decomposed when being absorbed on a substrate and
causes the chemical absorption of a by-product. The use of such an
organometallic compound allows an atomic layer of a higher packing
density to be formed on an electrode.
[0028] A metal precursor includes Ti(i-OPr).sub.4 or
Ti(i-OPr).sub.2(tmhd).sub.2 for a TiO.sub.2 buffer layer (where
tmhd indicates tetramethylheptanedionate, and i-OPr indicates
isopropoxy); Al(CH.sub.3).sub.3 or AlCl.sub.3 for an
Al.sub.2O.sub.3 buffer layer; Ta(OEt).sub.5 (where OEt indicates
ethoxide) for a Ta.sub.2O.sub.5 buffer layer; and HfCl.sub.4 or
Hf(OBu).sub.4 for an HfO.sub.2 buffer layer.
[0029] As described above, if an atomic layer having a high packing
density is formed on an electrode, the surface of a Ru electrode is
not directly in contact with ozone (O.sub.3) or oxygen when a thin
dielectric layer is formed. Therefore, it is possible to prevent
deformation of the electrode or deterioration of the
characteristics of a thin dielectric layer caused by the
oxidization of the electrode.
[0030] The vapor deposition temperature of the precursor for a
buffer layer depends largely on the characteristics of the
precursor, but preferably is between about 200-500.degree. C. This
is because the reactivity between the precursor and O.sub.3, which
is used as an oxidizer, decreases when the deposition temperature
is less than 200.degree. C., and the precursor decomposes when the
deposition temperature is greater than 500.degree. C., thereby
preventing formation of a buffer layer using the ALD method.
[0031] Hereinafter, a method of fabricating a capacitor according
to the present invention for use in a semiconductor device will be
described.
[0032] First, a lower electrode is formed of a platinum group
metal. The platinum group metal is at least one element selected
from the group consisting of ruthenium (Ru), osmium (Os), iridium
(Ir), and platinum (Pt).
[0033] Then, the ALD process is performed using a precursor for a
buffer layer on the lower electrode to form a buffer layer.
[0034] Thereafter, the ALD process is performed using a precursor
for a thin dielectric layer on the buffer layer to form a thin
dielectric layer. Preferably, the thin dielectric layer is formed
of SrTiO.sub.3, BaTiO.sub.3, Pb(Zr,Ti)O.sub.3, or the like. To make
the thin dielectric layer of SrTiO.sub.3, one of Sr(tmhd).sub.2 or
Sr(methd).sub.2 (where methd indicates methoxyethoxy
tetramethylheptanedionate) is selected as the Sr source, one of
TiO(tmhd).sub.2 or TiO(i-OPr).sub.2(tmhd).sub.2 is selected as the
Ti source, and then the selected elements are mixed together. Next,
the ALD process is performed using the precursor for the thin
dielectric layer and oxygen gas or a heat source. Preferably, the
vapor deposition temperature of an atomic layer is between about
300-500.degree. C.
[0035] Then, the capacitor for use in a semiconductor device
according to the present invention is completed by forming an upper
electrode on the thin dielectric layer using a platinum group
metal.
[0036] In the present invention, a lattice oxygen obtained from
carbon monoxide (CO) that is absorbed in a material for an
electrode is preferably used for oxidation.
[0037] FIG. 3 illustrates a view for explaining a process of
producing lattice oxygen when a Ru electrode is used. Referring to
FIG. 3, CO absorbed on the Ru electrode is placed under a reducing
atmosphere and the carbon in the CO is removed in the form of
CH.sub.4. Thus, only lattice oxygen remains on the surface of Ru
electrode. The lattice oxygen remaining on the surface of the Ru
electrode is used as an oxidizer when a thin dielectric layer is
formed by the ALD process in a subsequent procedure.
[0038] A method of fabricating a capacitor for use in a
semiconductor device according to the present invention, using the
lattice oxygen, will now be described.
[0039] First, CO is absorbed on the surface of a lower electrode
made of an element of a platinum group metal. Next, the resultant
is placed under a reducing atmosphere to produce lattice oxygen. To
this end, the temperature may be maintained at about between
100-500.degree. C. This is because CO is difficult to reduce if the
temperature is lower than 100.degree. C., and CO is more easily
desorbed from the surface of a lower electrode carbon if the
process temperature is higher than 500.degree. C. The reducing
atmosphere is formed using a reducing gas such as hydrogen.
[0040] Thereafter, using the lattice oxygen, a thin dielectric
layer is formed by performing the ALD process using a precursor for
a thin dielectric layer. A method of forming the thin dielectric
layer and the required materials are as described above.
[0041] Then, a capacitor for use in a semiconductor device
according to the present invention is completed by forming an upper
electrode by forming an element of a platinum group metal on the
thin dielectric layer.
[0042] Such a capacitor may be applied to various electronic
devices such as a dynamic RAM (DRAM) device and non-volatile memory
(FRAM).
[0043] FIGS. 4A through 4C illustrate cross-sectional views of
several forms memory devices adopting a capacitor according to the
present invention. Specifically, FIG. 4A illustrates a
cross-sectional view of a memory device of a single transistor
type, FIG. 4B illustrates a cross sectional view of a one
transistor, one capacitor (1Tr-1C) type memory device, and FIG. 4C
illustrates a cross sectional view of a 1Tr-1C capacitor over bit
line (COB)-type memory device.
[0044] In FIGS. 4A-4C, reference numeral `40` denotes a silicon
substrate, `41` denotes an active region, `42` denotes a non-active
region, `43` denotes a lower structure, `44` denotes a gate
electrode, `45` denotes a polysilicon layer, `46` denotes a lower
electrode, `47` denotes a buffer layer of TiO.sub.2, `48` denotes a
thin dielectric layer of SrTiO.sub.3, `50` denotes an upper
electrode, and `52` denotes a capacitor.
[0045] In FIGS. 4A through 4C, various memory devices adopting a
preferred embodiment of a capacitor according to the present
invention are illustrated, but such a capacitor may be applied to
other electronic devices having a thin dielectric layer.
[0046] Hereinafter, a capacitor according to an embodiment of the
present invention will be specifically described by the following
exemplary embodiments.
First Embodiment
[0047] An atomic layer deposition (ALD) process was performed at
about 325.degree. C. using 0.1M of Ti(i-OPr).sub.2(tmhd).sub.2
dissolved in tetrahydrofuran (THF) and using O.sub.3 as an oxidizer
to form a buffer layer of TiO.sub.2 on a first Ru electrode.
[0048] Then, the ALD process was performed on the buffer layer at
about 400.degree. C., using Sr(mdthd).sub.2 and
Ti(i-OPr).sub.2(tmhd).sub.2 as a precursor and O.sub.3 as an
oxidizer to form a thin dielectric layer of SrTiO.sub.3.
[0049] Next, a second Ru electrode was formed on the thin
dielectric layer of SrTiO.sub.3, thereby completing a
capacitor.
Second Embodiment
[0050] A capacitor was prepared in the same manner as in the first
embodiment, except that the ALD process was performed at about
400.degree. C. with Al(CH.sub.3).sub.3 as a precursor for a buffer
layer and O.sub.3 as an oxidizer to form a buffer layer of
Al.sub.2O.sub.3 on a second Ru electrode.
Third Embodiment
[0051] CO was absorbed on the surface of a first Ru electrode and
processed under a hydrogen gas atmosphere at about 400.degree. C.
to produce lattice oxygen. Then, a thin dielectric layer of
SrTiO.sub.3 was prepared in the same manner as in the first
embodiment.
[0052] Then, a second Ru electrode was formed on the thin
dielectric layer of SrTiO.sub.3, thereby completing a
capacitor.
[0053] FIG. 5 illustrates the laminated cross-section of a thin
dielectric layer of SrTiO.sub.3 formed on the Ru thin layer
according to the first embodiment taken by a transmission
electronic microscope (TEM).
[0054] Referring to FIG. 5, the buffer layer of TiO.sub.2 is formed
below the thin layer of SrTiO.sub.3, and the Ru electrode is
positioned under the buffer layer of TiO.sub.2. It is noted that a
protrusion is not formed in the Ru electrode.
[0055] FIG. 6 is a photograph of the laminated cross-section of the
thin dielectric layer of SrTiO.sub.3 formed on the Ru thin layer
according to the second embodiment of the present invention, taken
by a scanning electronic microscope (SEM).
[0056] From FIG. 6, it is noted that, due to the buffer layer, a
protrusion does not occur in the Ru electrode, and roughness of the
surface of the capacitor does not increase when a thin dielectric
layer of SrTiO.sub.3 is deposited.
[0057] FIGS. 7A and 7B are graphs illustrating the electrical
characteristics of the capacitor made according to the third
embodiment of the present invention. Specifically, FIG. 7A
illustrates variations in the current density according to voltage
in the capacitor. FIG. 7A reveals that 10.sup.-7 A/cm.sup.2 at 1V,
which is the standard set for a DRAM, is generally satisfied by the
capacitor prepared in the third embodiment. FIG. 7B shows
variations in t.sub.ox according to bias voltage. Here, `t.sub.ox`
is a thickness of SiO.sub.2, and may be expressed by the following
general equation: t.sub.ox={(a dielectric constant of SiO2)(an area
of an upper electrode in a capacitor)}/{a capacitance of the
capacitor}.
[0058] A smaller value of t.sub.ox indicates a higher quality
dielectric layer.
[0059] In FIG. 7A, a white tetragonal symbol indicates variations
in the current density as voltage in the capacitor is changed from
a negative value to a positive value. A black tetragonal symbol
indicates variations in the current density as voltage in the
capacitor is changed from a positive value to a negative value. In
FIG. 7B, a white tetragonal symbol indicates t.sub.ox according to
a bias voltage, and a black tetragonal symbol indicates a
dielectric loss factor (TAN .delta.).
[0060] Referring to FIG. 7B, the t.sub.ox of a dielectric layer is
6.8 .ANG. just after being deposited, and is 7 .ANG. at a bias
voltage of 1V, which is the t.sub.ox of a dielectric layer required
for a DRAM of more than 16 Gigabytes.
[0061] As described above, in a capacitor according to the present
invention, oxidization of a lower Ru electrode may be suppressed
even when forming a thin dielectric layer by performing an ALD
process with a strong oxidizer such as O.sub.3. By suppressing
oxidization, deformation of the lower Ru electrode may be
prevented, and deterioration of the characteristics of the thin
dielectric layer may be inhibited. Accordingly, a capacitor
according to the present invention retains the excellent electrical
characteristics of a thin dielectric layer as required by a highly
integrated memory, and therefore may be used in an electronic
device such as a DRAM.
[0062] Preferred embodiments of the present invention have been
disclosed herein and, although specific terms are employed, they
are used in a generic and descriptive sense only and not for
purpose of limitation. Accordingly, it will be understood by those
of ordinary skill in the art that various changes in form and
details may be made without departing from the spirit and scope of
the present invention as set forth in the following claims.
* * * * *