U.S. patent application number 11/362247 was filed with the patent office on 2006-12-07 for capacitive resonators.
Invention is credited to Siavash Pourkamali Anaraki, Farrokh Ayazi.
Application Number | 20060273416 11/362247 |
Document ID | / |
Family ID | 32033479 |
Filed Date | 2006-12-07 |
United States Patent
Application |
20060273416 |
Kind Code |
A1 |
Ayazi; Farrokh ; et
al. |
December 7, 2006 |
Capacitive resonators
Abstract
A micro-electro-mechanical system (MEMS) capacitive resonator
and methods for manufacturing the same are invented and disclosed.
In one embodiment, an apparatus comprises a
micro-electro-mechanical system (MEMS) capacitive resonator, the
resonator comprising support means, a semiconductor resonating
member coupled to the support means, and electrodes comprised of a
different material than the semiconductor resonating member,
wherein the electrodes are capacitively coupled to the
semiconductor resonating member.
Inventors: |
Ayazi; Farrokh; (Atlanta,
GA) ; Anaraki; Siavash Pourkamali; (Tehran,
IR) |
Correspondence
Address: |
THOMAS, KAYDEN, HORSTEMEYER & RISLEY, LLP
100 GALLERIA PARKWAY, NW
STE 1750
ATLANTA
GA
30339-5948
US
|
Family ID: |
32033479 |
Appl. No.: |
11/362247 |
Filed: |
February 24, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10632176 |
Jul 31, 2003 |
7023065 |
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11362247 |
Feb 24, 2006 |
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60401723 |
Aug 7, 2002 |
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60469532 |
May 9, 2003 |
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Current U.S.
Class: |
257/414 |
Current CPC
Class: |
H03H 9/2463 20130101;
H03H 2009/02496 20130101; H03H 2009/02503 20130101; H03H 3/0072
20130101 |
Class at
Publication: |
257/414 |
International
Class: |
H01L 29/82 20060101
H01L029/82; H01L 27/14 20060101 H01L027/14 |
Goverment Interests
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
[0003] The U.S. government has a paid-up license in this invention
and the right in limited circumstances to require the patent owner
to license others on reasonable terms as provided for by the terms
of Contract No. DAAH01-01-1-R004 awarded by the U.S. Army.
Claims
1. Apparatus comprising: a micro-electro-mechanical system (MEMS)
capacitive resonator, comprising: support means; a semiconductor
resonating member coupled to the support means; and electrodes
comprised of a different material than the semiconductor resonating
member, wherein the electrodes are capacitively coupled to the
semiconductor resonating member.
2. The apparatus of claim 1, further comprising a plurality of MEMS
capacitive resonators coupled to the support means.
3. The apparatus of claim 1, wherein the semiconductor resonating
member is comprised of single-crystalline silicon.
4. The apparatus of claim 1, wherein the electrodes are comprised
of polysilicon.
5. The apparatus of claim 1, wherein the electrodes each comprise a
height-to-width ratio greater than 1.
6. The apparatus of claim 1, wherein the electrodes comprise a
drive electrode and sense electrode for the resonator.
7. The apparatus of claim 1, wherein the electrodes are configured
to receive a varying voltage for tuning the frequency of the
resonator.
8. The apparatus of claim 1, further comprising a
semiconductor-on-insulator substrate from which at least a portion
of the resonator is derived, the substrate electrically isolated
from the support means.
9. The apparatus of claim 1, wherein the thickness of the
semiconductor resonating member and the electrodes comprise a
thickness of approximately 3 microns or greater.
10. The apparatus of claim 1, wherein the semiconductor resonator
is configured in an in-plane beam configuration.
11. The apparatus of claim 9, wherein the in-plane beam
configuration comprises the semiconductor resonating member
configured as a beam, the beam supported by the support means
configured as one or more support members, the beam having a
defined width and height, the beam configuration comprising the
electrodes configured as actuation, sense and tuning electrodes,
the electrodes separated from the beam by a sub-micron gap.
12. The apparatus of claim 1, wherein the resonator is configured
in a disk configuration.
13. The apparatus of claim 12, wherein the disk configuration
comprises the semiconductor resonating member configured as a disk,
the disk comprising the support means configured as at least one
support member for supporting the disk, the disk having a defined
thickness, the disk configuration comprising the electrodes
configured as actuation, sense and tuning electrodes, the
electrodes separated from the disk by a sub-micron gap.
14. The apparatus of claim 13, wherein the at least one support
member is located at a resonance node.
15. The apparatus of claim 1, wherein the resonator is configured
in a longitudinal block configuration.
16. The apparatus of claim 15, wherein the block configuration
comprises the semiconductor resonating member configured as a
longitudinal block, the longitudinal block comprising the support
means configured as at least one support member for supporting the
block, the block having a defined thickness, the block
configuration comprising the electrodes configured as actuation,
sense and tuning electrodes, the electrodes separated from the
block by a sub-micron gap.
17. The apparatus of claim 1, wherein a gap inherent to the
capacitive coupling is formed in a self-aligned manner using a
sacrificial layer in between the semiconductor resonating member
and each of the electrodes.
18. A communications device, comprising: a micro-electro-mechanical
system (MEMS) capacitive resonator, comprising: support means; a
semiconductor resonating member coupled to the support means; and
electrodes comprised of a different material than the semiconductor
resonating member, wherein the electrodes are capacitively coupled
to the semiconductor resonating member.
19. The device of claim 18, further comprising an antenna coupled
to the MEMS capacitive resonator.
20. The device of claim 18, wherein the communications device is a
portable transceiver.
21. A micro-electro-mechanical system (MEMS) capacitive resonator
configured in an in-plane, longitudinal block configuration,
comprising: a semiconductor resonating member configured as a
longitudinal block; and electrodes comprised of a different
material than the semiconductor resonating member, wherein the
electrodes are capacitively coupled to the semiconductor resonating
member, wherein the longitudinal block is disposed between two
clamped regions, the longitudinal block having a defined width and
height, the electrodes comprising a drive electrode and a sense
electrode, the drive electrode opposed by the sense electrode, the
drive electrode separated from the beam by a first sub-micron gap,
the sense electrode separated from the beam by a second sub-micron
gap.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a divisional of copending U.S. utility
application entitled, "CAPACITIVE RESONATORS AND METHODS OF
FABRICATION," having Ser. No. 10/632,176, filed Jul. 31, 2003,
which claims the benefit of U.S. Provisional Application No.
60/401,723, filed Aug. 7, 2002, and U.S. Provisional Application
No. 60/469,532, filed May 9, 2003, all the above of which are
entirely incorporated herein by reference.
[0002] This application is related to copending U.S. Patent
entitled "PIEZOELECTRIC ON SEMICONDUCTOR-ON-INSULATOR
MICROELECTROMECHANICAL RESONATORS AND METHODS OF FABRICATION,"
having U.S. Pat. No. 6,909,221 issued Jun. 21, 2005.
TECHNICAL FIELD
[0004] The present invention is generally related to MEMS
(micro-electro-mechanical systems) technology, and, more
particularly, is related to capacitive resonators and methods of
fabricating the same.
BACKGROUND OF THE INVENTION
[0005] Micro-electro-mechanical (MEMS) resonators are a potential
candidate to replace current off-chip frequency selective
mechanical components such as crystal, ceramic and SAW (Surface
Acoustic Wave) devices in wireless communication systems. High
quality factors, small size and compatibility with integrated
circuit (IC) integration are some of the advantages silicon MEMS
capacitive resonators provide over their bulk-component
counterparts. Extension of the frequency range of capacitive MEMS
resonators into the giga-Hertz (GHz) range requires process
technologies that can yield 10-100 nanometer capacitive gap
spacings disposed between a high quality factor (Q) resonating
structure and corresponding drive and sense electrodes. Quality
factor can generally be described as a measure of energy stored in
a system divided by the energy dissipated in the system. Quality
factor can be characterized in terms of frequency response of a
resonator, such as the ratio of the center frequency (f.sub.0) to
the 3-dB (decibel) bandwidth of the resonator device.
[0006] A number of different polysilicon and single crystalline
silicon resonators are known to those of ordinary skill in the art.
For example, polysilicon capacitive resonators with submicron gap
spacing having metal electrodes are known, but typically experience
thermal mismatch. Furthermore, the out-of-plane thickness of such
resonators is limited by the deposition process and cannot be
increased arbitrarily to improve the electromechanical coupling
coefficient. Single crystal silicon (SCS) is a more attractive
structural material for microresonators compared to polysilicon due
to its inherent high mechanical quality factor, stress-free nature,
and independence from various process parameters. However, SCS
resonators developed in the past had either complex non-capacitive
sense and drive mechanisms, large capacitive gaps, or low quality
factors. Such pitfalls may compromise design flexibility and limit
the high frequency applications of the microresonators.
[0007] Thus, a need exists in the industry to address the
aforementioned and/or other deficiencies and/or inadequacies.
SUMMARY OF THE INVENTION
[0008] Embodiments of the present invention provide MEMS capacitive
resonators and methods for fabricating the same.
[0009] Briefly described, one apparatus embodiment comprises a
micro-electro-mechanical system (MEMS) capacitive resonator, the
resonator comprising support means, a semiconductor resonating
member coupled to the support means, and electrodes comprised of a
different material than the semiconductor resonating member,
wherein the electrodes are capacitively coupled to the
semiconductor resonating member.
[0010] Other systems, methods, features, and advantages of the
present invention will be or become apparent to one with skill in
the art upon examination of the following drawings and detailed
description. It is intended that all such additional systems,
methods, features, and advantages be included within this
description, be within the scope of the present invention, and be
protected by the accompanying claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Many aspects of the invention can be better understood with
reference to the following drawings. The components in the drawings
are not necessarily to scale, emphasis instead being placed upon
clearly illustrating the principles of the present invention.
Moreover, in the drawings, like reference numerals designate
corresponding parts throughout the several views.
[0012] FIG. 1 is a schematic diagram that illustrates one exemplar
implementation for the embodiments of the invention.
[0013] FIG. 2A is a schematic diagram of a capacitive resonator
embodiment configured as an in-plane clamped-clamped beam
resonator.
[0014] FIG. 2B is a schematic diagram that provides a close-up view
of the interface comprising the single crystal silicon (SCS) beam,
the electrodes, and the gaps shown in FIG. 2A.
[0015] FIG. 3A is a schematic diagram of a second embodiment of a
capacitive resonator.
[0016] FIG. 3B is a schematic diagram of a third embodiment of a
capacitive resonator.
[0017] FIG. 3C is a schematic diagram of a fourth embodiment of a
capacitive resonator.
[0018] FIG. 4A is a flow diagram that illustrates an embodiment of
a silicon-only capacitive resonator fabrication (CRF) method.
[0019] FIGS. 4B-4D are schematic diagrams used in cooperation with
the flow diagram of FIG. 4A to illustrate the evolving structure as
the method steps are applied.
[0020] FIGS. 5A-5B are flow diagrams that illustrate an embodiment
of a semiconductor-on-insulator (SOI)-based CRF method.
[0021] FIGS. 5C-5F are schematic diagrams used in cooperation with
the flow diagram of FIGS. 5A-5B to show the evolving structure as
the method steps are implemented.
[0022] FIG. 6A is a graph that illustrates a plot of resonance
frequency versus polarization voltage for a capacitive resonator
beam embodiment.
[0023] FIG. 6B is a graph that illustrates a measure of tuning
performance.
[0024] FIG. 7 shows the measured resonance peak for a third
flexural mode for a clamped-clamped capacitive beam resonator
embodiment.
[0025] FIG. 8 shows a frequency response of a disk resonator
embodiment having four supports at its four resonance nodes.
[0026] FIG. 9 shows a frequency response of a disk resonator
embodiment having one support at its resonance node.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0027] Embodiments of capacitive resonators and methods for
fabricating the same are disclosed. In particular, the
implementation of high-Q (Quality Factor) semiconductor material
resonators with submicron gap spacing is enabled using what will be
referred to herein as capacitive resonator fabrication methods, or
CRF methods. The quality factor (Q) can generally be described as a
measure of energy stored in a system divided by the energy
dissipated in the system. Q can be characterized in terms of
frequency response of a resonator, such as the ratio of the center
frequency (f.sub.0) to the 3-dB (decibel) bandwidth of the
resonator device. The embodiments of the invention include
substantially all semiconductor materials for the resonating
element, such as germanium, silicon, among others. Further, the
embodiments of the invention include substantially all
semiconductor materials in a variety of crystal alignments or
configurations, including single crystal structures,
polycrystalline structures, amorphous structures, among others. The
CRF methods of the preferred embodiments are based, in part, on the
well-known HARPSS (high aspect ratio combined poly and single
crystal silicon) process.
[0028] One challenge to the implementation of on-chip bandpass
filters and frequency references for use in wireless communication
systems is the fabrication of micro-electromechanical resonators
having both high resonance frequency response characteristics
(e.g., ultra-high-frequency, or UHF, of 0.3-3 GHz) and a high Q
(10,000-100,000). Some semiconductor materials, such as single
crystal silicon (SCS), when used as the resonating structure of the
preferred embodiments is an excellent choice of material for the
resonating structure due in part to its inherently high mechanical
quality factor, superior mechanical stability (stress-free or
substantially stress-free), and/or compatibility with CMOS
(complementary metal oxide semiconductor) integrated circuit (IC)
fabrication processes. The preferred embodiments also include
ultra-thin capacitive gaps in the range of 1000 nanometers (nm) to
less than 90 nm. The ultra-thin capacitive gaps are desirable to
(a) electrostatically actuate ultra-stiff UHF micromechanical
resonators and (b) capacitively sense the extremely small
vibrations of such structures. MEMS (micro-electro-mechanical
systems) capacitive resonators can be as small as 20 microns in
diameter, with a capacitance measured in femtofarads. Since the
area of a MEMS capacitor is small, decreasing the gap results in an
increase in capacitance, providing for stronger electromechanical
coupling.
[0029] In one embodiment, the CRF methods provide for a
semiconductor material such as SCS as the resonating structure with
trench-refilled polysilicon electrodes, hence yielding an
all-silicon microresonator with excellent temperature stability.
These methods are referred to herein as silicon-only CRF methods.
For simplicity in discussion, silicon-only embodiments will be
described, with the understanding that other semiconductor
material, for example germanium, can be used for the resonating
structure.
[0030] In other embodiments, the CRF methods provide a SCS
resonating element that is derived from a
semiconductor-on-insulator (SO D) substrate. The use of a SOI
substrate provides electrical isolation between the body of
individual SCS resonators in an array implementation (e.g., for
filter synthesis). These methods are referred to herein as
SOI-based CRF methods.
[0031] Using a SOI substrate further enables nano-precision
fabrication of "ultra-stiff" semiconductor resonators with
height-to-width ratios of less than one (1) (e.g., disks) for high
frequency operation (e.g., very high frequency (VHF) and UHF). In
contrast, near perfect dimensional definition of such devices on
regular silicon substrates is difficult to implement if not
impossible due to a substrate-release undercut at the bottom, as
described below.
[0032] Also, the use of a SOI substrate eliminates an isotropic
semiconductor material (e.g., silicon)-etching step needed to
undercut the silicon-only resonators, which can limit the minimum
achievable gap size. By using SOI-based CRF methods, the capacitive
gaps can be reduced to their true or nearly true physical
limits.
[0033] The capacitive gap is defined by a sacrificial oxide layer,
which can be potentially reduced to the tens of nanometer range in
thickness using the silicon-only CRF method, and experimentally
found to be reduced to sub-one hundred nanometer capacitive gaps
using SOI-based CRF methods. Quality factors as high as 67,000, for
example, have been measured for clamped-clamped beam SCS
resonators.
[0034] In the description that follows, exemplar capacitive
resonator embodiments are described, followed by a silicon-only CRF
method and a SOI-based CRF method of the preferred embodiments.
Finally, a discussion of performance characteristics of such
devices is disclosed herein.
[0035] The preferred embodiments of the invention may, however, be
embodied in many different forms and should not be construed as
limited to the embodiments set forth herein; rather, these
embodiments are provided so that this disclosure will be thorough
and complete, and will fully convey the scope of the invention to
those having ordinary skill in the art. For example, although the
embodiments of the invention can be used with substantially any
semiconductor substrate material, the preferred embodiments of the
invention will be described using an SCS resonating element and a
polysilicon electrode material with the understanding that other
semiconductor materials in different crystal alignments or
structures for the resonating element are also included within the
scope of the invention.
[0036] FIG. 1 is a schematic diagram that illustrates one exemplar
implementation for the embodiments of the invention. Select
receiver components of a communication device 120 are shown, with
the understanding that transmitter components can also benefit from
the embodiments of the invention. The communication device 120 can
include a portable transceiver, such as a cellular phone, among
other devices. The communication device 120 includes an antenna
102, resonator devices 100a-100c configured as frequency selective
filters, low-noise amplifiers 106 and 114, mixers 108 and 116,
voltage-controlled oscillators 110 and 118, and a frequency
reference resonator device 100d. All components shown except for
resonator devices 100a-100d are known, and thus further explanation
is omitted for clarity. The use of resonators 100a-100d can result
in a reduction in the number of components in the communication
device 120. Resonators 100a-100d are very selective at high
frequencies, thus substantially obviating the need for
pre-amplifier selection and other frequency transformation and/or
amplification devices that operate to provide signal processing at
frequencies that current devices most efficiently operate under.
The resonator devices of the preferred embodiments possess high
quality factors at high frequencies, enabling frequency selection
with substantially fewer components.
[0037] FIG. 2A is a schematic diagram of a capacitive resonator
embodiment configured as an in-plane clamped-clamped beam
resonator. The clamped-clamped beam resonator 200 includes a SCS
beam 202 disposed between two clamped regions 204 and 206. The SCS
beam 202 has a defined width ("w") and height ("h"), and functions
as the resonating element for the clamped-clamped beam resonator
200. Drive electrode 208 and sense electrode 210 oppose one
another, separated from the SCS beam 202 by sub-micron gaps 212 and
214. The electrodes 208 and 210 are preferably comprised of
polysilicon. Thus, the clamped-clamped beam resonator 200 is
comprised primarily or entirely of silicon.
[0038] FIG. 2B is a schematic diagram that provides a close-up view
of the interface comprising the SCS beam 202, the electrodes 208
and 210, and the gaps 212 and 214 (the latter obscured from
view).
[0039] Describing the operation of the clamped-clamped beam
resonator 200, and with continued reference to FIGS. 2A and 2B, an
electrical signal from a particular device (not shown) applied to
the drive electrode 208 creates an electrostatic force on the SCS
beam 202 and the rest of the clamped-clamped beam resonator 200.
When the frequency of the drive signal is equal to or approximately
equal to the resonant frequency of the SCS beam 202, the vibrations
of the SCS beam 202 are amplified by the quality factor of the
clamped-clamped beam resonator 200. The mechanical vibrations are
converted back into electrical signals through the change in the
spacing of the sub-micron gap 214. That is, a parallel-plate
capacitor is formed between the sense electrode 210 and the SCS
beam 202 (as well as the SCS beam 202 and the drive electrode
208).
[0040] FIG. 3A is a schematic diagram of a second capacitive
resonator embodiment.
[0041] The disk resonator 300a includes a SCS disk 302a supported
from the side at one resonance node by a support member 304. The
disk resonator 300a also includes drive and sense electrodes 306
and 308, which also are preferably comprised of polysilicon. Note
that support from the side of the disk provides for an "elliptical"
operation (also referred to as the wine glass mode), as opposed to
a "breathing" mode operation. In other words, in a breathing mode,
the entire disk would expand and contract substantially uniformly.
By supporting from the side, the periphery of the disk is prevented
from moving uniformly. However, with an elliptical mode of
operation, multiple modes of operation are possible. For example,
as the number of "nodes" in the resonance mode shape increases,
there is an increase in frequency.
[0042] Further, by providing side support, the position of contact
support is defined by the same lithographic step that is used to
define the disk periphery. In contrast, if the disk was supported
at the center, the chances for misalignment (and thus decrease in
quality factor due to non-symmetrical cancellation of forces) are
greater than side-supported configurations.
[0043] FIG. 3B provides a schematic diagram of a third embodiment
of a capacitive resonator. The resonator disk 300b includes SCS
disk 302b, the drive and sense electrodes 306 and 308, and is shown
supported by four support members 304a-304d. Preferably, the
support members 304a-304d are located at the resonance nodes of the
resonator disk 300b. The additional support members 304a-304d, as
compared to the single support member 304 of the resonator disk
300a of FIG. 3A, provides for increased support stiffness. However,
additional support members may decrease the quality factor due in
part to an increase in support loss. Note that the preferred
embodiments of the invention are not limited to side-supported
embodiments.
[0044] FIG. 3C is a schematic diagram of a fourth embodiment of a
capacitive resonator. The resonator disk 300c includes a SCS disk
302c, the drive and sense electrodes 306 and 308, and two support
members 304b and 304d. The SCS disk 302c has a greater thickness
than the other two disk resonator embodiments. Thicknesses of
approximately 10-30 microns, or greater, are achievable. The
increased thickness enables a smaller equivalent resistance for the
resonator through a greater electromechanical coupling as evident
by equation 1.
[0045] The equivalent electrical output resistance, R.sub.io, of a
capacitive micromechanical resonator is expressed by: R io = KM
.times. d 4 Q .times. .times. o 2 .times. L 2 .times. h 2 .times. V
p 2 .varies. d 4 Q h ( Eq . .times. 1 ) ##EQU1## where K and M are
the effective stiffness and mass of the resonator, d is the
capacitive gap size, Q is the resonator's quality factor, V.sub.p
is the direct current (DC) polarization voltage and L and h are the
electrodes' length and height, respectively. From this equation, it
is evident that an ultra-thin capacitive gap, a high Q, and/or a
large electrode area can be used to reduce the equivalent output
resistance of MEMS capacitive resonators to reasonable values.
Achieving a smaller output resistance can facilitate the insertion
of MEMS capacitive resonators in various high frequency
systems.
[0046] The high-Q, SCS capacitive resonators of the resonator disk
embodiments provide the necessary features to obtain reduced output
resistance. First, the capacitive gaps of these resonators are
determined in a self-aligned manner by the thickness of the
deposited sacrificial oxide layer and can be reduced toward their
smallest physical limits (tens of nanometers and less) independent
from lithography. In other words, sub-100 nm gaps can be defined
without using electron beam lithography, thus obviating the need
for time-consuming processes due to the self-aligning nature of the
methods. Second, the thickness of the resonators can be increased
to a few tens of microns while keeping the capacitive gaps in the
nanometer scale, resulting in a low equivalent motional
resistance.
[0047] The CRF methods of the preferred embodiments will be
described using the resonator beam embodiment shown in FIG. 2A,
with the understanding that similar steps are involved when
fabricating the resonator disk embodiments, or even block-style
embodiments. FIG. 4A is a flow diagram that illustrates a CRF
method for fabricating silicon-only resonators of the preferred
embodiments (i.e., the silicon-only CRF methods). The silicon-only
CRF methods are used to fabricate beam or block style resonators.
FIGS. 4B-4D are used in cooperation with the flow diagram of FIG.
4A to illustrate some of the evolving structure as method steps are
applied. Any process descriptions or blocks in flow charts should
be understood as representing steps in the process. Note that the
silicon-only CRF method described below is based on one
implementation, and that alternate implementations are included
within the scope of the preferred embodiments of the invention such
that steps can be omitted, added to, and/or executed out of order
from that shown or discussed, as would be understood by those
reasonably skilled in the art of the present invention.
[0048] Referring to FIGS. 4A and 4B, step 401 includes providing an
oxide layer 409 to the substrate. The oxide layer 409 can provide
extra isolation and reduce the parasitic capacitance to the
substrate. Steps 402 and 404 include depositing and patterning
nitride 411 for isolation of pads. The nitride layer 411 serves as
an insulating layer, as well as an area to which the polysilicon
can be secured. Step 406 includes etching trenches 403a and 403b.
The SCS resonating beam is defined by two adjacent high
aspect-ratio trenches 403a and 403b that can be approximately 2 to
5 .mu.m wide and up to approximately 100 .mu.m deep. The trenches
403a and 403b are preferably etched in a reactive ion etching
process, such as an inductively-coupled plasma (ICP) deep reactive
ion etching (DRIE) system using the well-known Bosch process. The
height of the trenches 403a and 403b determines the height of the
resonator.
[0049] Step 408 includes providing an oxide to the entire
structure. Preferably, the oxide layer 405 is uniform throughout
the structure (and then when removed, provides for a uniform gap
spacing). For example, a thin conformal layer of sacrificial LPCVD
(low-pressure chemical vapor deposition) high-temperature oxide is
deposited. The oxide layer 405 can also be thermally grown.
[0050] Referring to FIGS. 4A and 4C, step 410 includes filling
trenches with polysilicon 407. The trenches 403a and 403b (FIG. 4B)
are preferably filled with doped LPCVD polysilicon 407 to form
vertical electrodes. The lateral gap spacing is defined by the
thickness of the deposited oxide 405 (from step 408), and thus can
be scaled down to the tens of nanometer range. Preferably, the
trenches 403a and 403b have a high-aspect ratio (e.g., a ratio
greater than 1), since low-aspect ratio trenches (e.g., 100 microns
wide and 20 microns deep) can present obstacles to filling of
trenches via the deposit of thin films (e.g., 4-5 microns) of
polysilicon. However, the scope of the preferred embodiments is not
limited to etching high-aspect ratio trenches.
[0051] Step 412 includes providing polysilicon 413 to the patterned
pads to define the pads, and then metallizing the pads (step 414)
with a metal material 415. The polysilicon 413 maintains an
electrical connection, as well as serving as a mechanical
"anchor."
[0052] Referring to FIGS. 4A and 4D, step 416 includes releasing
the resonator element (or resonating structure) 429. This step
essentially includes two processes. The resonator element 429 is
released from the silicon substrate using a dry silicon etch in
SF.sub.6 plasma, for example, consisting of an anisotropic followed
by an isotropic etch to undercut the structures.
[0053] Finally, the sacrificial oxide is removed (step 418), for
example, using a HF:H.sub.2O (1:1) solution. By removing the oxide,
a small gap is created between the electrodes and the vibrating
resonator. Thus, the gap is created using a self-aligned
process.
[0054] In the above process, the trenches 403a and 403b (FIG. 4B)
define the boundary of the resonating structure 429 and the
polysilicon electrodes. At the end of the process, all the
polysilicon inside the trenches 403a and 403b are preferably
removed, except for the electrode area. Methods for separating the
polysilicon in the electrode area from the areas that only define
the boundary of the resonator include opening up regions to remove
voids or otherwise remove material (e.g., via etching) not
needed.
[0055] FIGS. 5A-5F are used to illustrate the SOI-based CRF method
of the preferred embodiments. The SOI-based CRF methods can be used
to fabricate the beam, block, or disk structures. The use of SOI as
a substrate results in a scalable structure (e.g., scalable in
thickness). For example, thicknesses for SOI embodiments can range
from approximately 3 microns to as much as 18 microns or thicker.
Further, the ability to use SOI substrates enables greater quality
control than deposited methodologies. Also, using SOI substrates
enables low-aspect ratio structures with sharply defined boundaries
(and smooth surfaces, since etch of bottom surfaces is avoided).
FIGS. 5A and 5B are flow diagrams that illustrate the steps of the
SOI-based CRF method, and FIGS. 5C-5F are schematic diagrams that
are used to show the evolving structure as the steps are
implemented. For the sake of clarity and consistency, the SOI-based
method is described below using the capacitive resonator beam
embodiment.
[0056] Referring to FIGS. 5A and 5C, step 502 includes growing an
oxide layer (e.g. a 1 .mu.m thick oxide layer, not shown) on the
SOI substrate. After patterning (e.g., in plasma) (step 504), this
oxide layer serves as an insulating layer to provide isolation
between the substrate and the input and output wire-bonding pads,
and as a mask for a subsequent silicon trench etching step which
defines the resonator structure.
[0057] Steps 506 and 508 include depositing and patterning nitride
for isolation of pads. For example, a thin layer of LPCVD nitride
(approximately 3000 .ANG.A) is then deposited and patterned on the
pads to protect the pad oxide. The nitride layer serves as an
insulation layer for the polysilicon to be anchored or secured to.
Step 510 includes etching trenches 503a and 503b. As described for
the silicon-only CRF method of FIG. 4, the trenches are preferably
high-aspect ratio trenches, although not limited to high-aspect
ratio embodiments. The SCS resonating elements are defined by
etching trenches 503a and 503b in the device layer 505 all or
substantially all the way down to the buried oxide layer 507 of the
SOI substrate, for example via reactive ion etching.
[0058] Referring to FIGS. 5A and 5D, steps 512 and 514 include
growing and removing a thin oxide. The thin oxide is generally
performed at high temperature (e.g., 900 C). These steps enable the
reduction of the roughness of the resonator sidewalls and the
removal of the surface damage caused by plasma. For example, a thin
thermal oxide (approximately 1000-2000 .ANG.) is grown and
subsequently removed in BHF (buffered hydro-flouric acid). Step 516
includes providing a sacrificial oxide. For example, a thin
conformal layer of LPCVD high-temperature oxide is preferably
deposited (approximately less than 100 nm). Step 518 includes
removing the sacrificial oxide. For example, the sacrificial oxide
can be removed from the surface by a short anisotropic plasma
etching, so that the sacrificial oxide remains only on the
resonator sidewalls. The lateral gap spacing is defined by the
thickness of the deposited oxide layer, and thus can be scaled down
to tens of nanometer range.
[0059] Step 520 includes providing polysilicon 509 to the surfaces.
For example, trenches are filled with doped LPCVD polysilicon 509
to form vertical electrodes. The polysilicon 509 fills the trenches
primarily from the sidewalls until the gap between sidewalls is
essentially closed. Step 522 includes patterning the deposited
polysilicon 509. For example, the deposited polysilicon
(approximately 3 .mu.m thick) is patterned on the surface to form
the wirebonding pads for the drive and sense electrodes.
[0060] Referring to FIGS. 5A and 5E, step 526 includes metallizing
the pads. For example, a thin layer of gold can be deposited on the
pads. Step 528 includes etching release openings (not shown). For
example, release openings can be etched anisotropically into the
silicon all the way down to the oxide layer to facilitate the
undercut of the structures in HF. In other words, the oxide between
the resonator body and the electrodes provides for freedom of
movement. At the same time the polysilicon inside the trenches is
patterned (step 530).
[0061] The use of the SOI substrate eliminates, substantially or
completely, the need for isotropic silicon etching to undercut the
structures. In the silicon-only CRF methods of FIG. 4, since the
sacrificial oxide layer was used to protect polysilicon electrodes
during the undercut of the SCS structures, there can be a limit on
the minimum thickness of the sacrificial layer (due to finite
selectivity of silicon etchant to oxide). There is no such
limitation in this fabrication process.
[0062] Referring to FIGS. 5B and 5F, step 532 includes releasing
the resonator structure 513. For example, the resonator 513 is
released from a handle silicon layer (e.g., layer below the oxide
layer of the SOI substrate) and their electrodes by dipping the
devices in an HF:H.sub.2O solution.
[0063] The CRF methods of the preferred embodiments are an enabling
technology that provides for a range of performance characteristics
for capacitive resonators. The description that follows will focus
on performance characteristics for the silicon-only capacitive
resonators, in particular capacitive beam resonators fabricated
using the silicon-only CRF methods.
[0064] Prototypes of the fabricated SCS beam resonators were tested
under vacuum in a two-port configuration using a network analyzer.
A low-noise JFET source-follower with a gain stage was used to
interface with the resonators. The sensing interface circuit was
built on a printed circuit board (PCB) using surface mount
components and the MEMS resonator chip was mounted on the board and
wire-bonded. The PCB was placed in a custom vacuum system, which
kept the pressure less than approximately 1 mTorr.
[0065] Table 1 below provides a summary of the measured quality
factor values for the capacitive beam resonators fabricated using
the silicon-only CRF methods of the preferred embodiments. The
resonators had fundamental frequencies ranging from approximately
41.5 kHz to 530 kHz, with quality factors ranging from
approximately 17,000 to 67,000. TABLE-US-00001 TABLE 1 W (.mu.m) L
(.mu.m) F.sub.0-1.sup.st (kHz) Q (1.sup.st Mode) 6.5 1100 41.5
67000 7.5 1100 47.8 61900 7.5 900 74.8 53600 7.5 700 125.5 39400
5.5 510 164.5 60400 6.5 510 198.0 35000 7.5 510 217.0 27000 5.5 300
489.3 21500 6.5 300 528.0 17000
[0066] FIG. 6A is a graph that illustrates a plot of resonance
frequency versus polarization voltage for a particular capacitive
beam embodiment. In other words, FIG. 6A shows the measured
frequency tuning characteristics (curve 608) for a 300 .mu.m long,
6.5 .mu.m wide resonator by changing the direct current (DC)
polarization voltage (Vp). Axis 602 provides for polarization
voltage in volts. Axis 604 provides for frequency response in units
of kHz. As noted, the resonance frequency changed from
approximately 505 kHz to approximately 450 kHz by changing the
polarization voltage by more than 40V (the calculated pull-in
voltage was 56V), providing a large electrostatic tuning range
(approximately 10%).
[0067] FIG. 6B is a graph that illustrates a measure of tuning
performance. In particular, axis 602 provides for polarization
voltage in volts, and axis 604 provides for frequency in MHz. When
tuning capacitive resonators, a changing polarization voltage is
applied to parallel plate actuators (e.g., sense and drive
electrodes), resulting in a change in equivalent electrical
stiffness. As shown in FIG. 6B, the tuning slope can be as high as
1000 s of ppm/V as the gap size is reduced. In other words, the
tuning characteristics improve (e.g., increase) as the gap is
reduced.
[0068] To achieve higher operating frequencies, a few of the tested
clamped-clamped beam resonators were actuated in their third
flexural mode and the quality factors were measured. FIGS. 7-9
provide plots of the frequency response of resonators of the
preferred embodiments. One testing method includes applying an
alternating current (AC) input voltage to an input of the
resonator. Then, the output voltage and input voltage is monitored,
and the ratio of output voltage to input voltage is plotted (e.g.,
in units of dB in the vertical axis). After sweeping the frequency
over a specified range of frequencies (e.g., the horizontal axis of
the following plots), the response of the resonator is manifested
as a peak value at the resonant frequency of the tested resonator.
The quality factor is measured as the ratio of the peak resonant
frequency to the -3 dB bandwidth of the peak. The response of the
resonators of the preferred embodiments include at least two modes:
flexural and bulk modes. Flexural modes are usually referred to as
the bending modes of high-aspect ratio beam resonators. The bulk
modes are those bending modes common to low-aspect ratio disk and
block resonators. FIG. 7 shows the measured resonance peak for the
third flexural mode for a clamped-clamped SCS capacitive beam
resonator at 1 MHz. Axis 702 provides for frequency in MHz, and
axis 704 provides for the transmission gain (in dB), from which the
quality factor is derived. A quality factor of 10,700 was measured
at 1.03 MHz for the third resonance mode of a 510 .mu.m long, 5.5
.mu.m wide SCS beam resonator (the 1.sup.st mode is at 165 kHz).
The anti-resonance peak 706 is due to the parasitic feedthrough
capacitance. Table 2 below provides a summary of the Q measurement
results for the 3.sup.rd mode of capacitive beam resonators with
other dimensions. TABLE-US-00002 TABLE 2 W (.mu.m) L (.mu.m)
F.sub.0-1.sup.st (kHz) F.sub.0-3.sup.rd (MHz) Q (3.sup.rd Mode) 7.5
900 74.8 0.44 10400 7.5 700 125.5 0.74 8000 6.5 510 198.0 1.21
8300
[0069] Thus, using the all-silicon CRF methods of the preferred
embodiments, uniform capacitive gaps of 0.7 .mu.m are achievable
and have been demonstrated. Quality factors (Q) as high as 67,000
for the 1.sup.st mode at 40 kHz, and 11,000 for the 3.sup.rd mode
at 1 MHz have been measured for clamped-clamped SCS beam
resonators.
[0070] As indicated above, the CRF methods of the preferred
embodiments can be used to create ultra-stiff SCS resonators that
can be thin or thick, with sub-100 nm capacitive gaps. The
following description will focus on performance characteristics of
capacitive beam resonators fabricated using the SOI-based CRF
methods.
[0071] A number of single crystal silicon clamped-clamped beam and
side-supported disk resonators with different number of support
beams, various dimensions and various thicknesses were fabricated
and tested under vacuum in a two-port configuration, similar to the
test set-up described in association with the silicon-only test
set-up. FIG. 8 shows the frequency response and quality factor for
one disk embodiment. Axis 802 provides for the frequency in MHz,
and axis 804 provides for the transmission gain (in dB). The
particular disk embodiment represented by FIG. 8 was a 50 .mu.m in
diameter, 3 .mu.m thick disk resonator, with four supports at its
four resonance nodes (0.7 cm wide and 2.7 .mu.m long), showing a Q
of approximately 6,400 at its first flexural resonance mode with a
frequency of 87.7 MHz.
[0072] FIG. 9 illustrates the frequency response and quality factor
for another disk embodiment. Axis 902 and 904 provide for frequency
(MHz) and transmission gain (dB), respectively. The disk embodiment
represented in FIG. 9 was a 30 .mu.m in diameter, 3 .mu.m thick
disk resonator, supported by a 1.7 .mu.m wide, 2.7 .mu.m long
support at only one resonance node. A quality factor of
approximately 39,300 has been measured in vacuum for the first
flexural mode of this resonator at the frequency of approximately
148 MHz.
[0073] To reduce the support loss of the side supported disks, the
supports are placed at the resonance nodes (45 degrees away from
the center of the electrodes). By comparing the measured Q values
of the two disk resonators with different number of support beams,
it is apparent that mechanical support is the major source of loss
in this type of resonator. The support loss of the side supported
disk resonators can be minimized by reducing the number of supports
and optimizing the dimensions of the supporting elements. Thus, the
quality factor is limited by the support loss which is related to
mechanical design. The CRF methods of the preferred embodiments can
create very high Q resonators.
[0074] Unlike lower frequency beam resonators, the Q of ultra-stiff
high frequency resonators (i.e. disks) is much less susceptible to
the pressure of the surrounding environment. For example, the 30
.mu.m disk resonator was also operated in atmospheric pressure and
demonstrated a quality factor of 8,200 (not shown).
[0075] A number of SCS clamped-clamped beam resonators with
frequencies in the HF band were also fabricated using the SOI-based
CRF methods of the preferred embodiments. Beam resonators were
operated in their first and higher flexural modes in order to
achieve higher resonance frequencies without reducing the
aspect-ratio and introducing excessive support loss. A quality
factor of 1,800 was measured at the resonance frequency of 9.8 MHz
for a 50 .mu.m long, 3.5 cm wide clamped-clamped beam resonator.
The same resonator was operated in its third resonance mode at 45
MHz and showed a Q of 900. Another clamped-clamped beam resonator
embodiment, having dimensions 50 .mu.m long, 2 .mu.m wide operating
in its third flexural mode, showed a Q of 3,900 at the resonance
frequency of 37 MHz.
[0076] High frequency (HF and VHF) single crystal silicon
capacitive microresonators with polysilicon electrodes and 90 nm
inter-electrode gap spacing have been implemented on SOI substrates
using the SOI-based CRF methods. Much higher quality factors were
achieved using ultra-stiff disk resonators in the VHF band
comparing to the beam resonators.
[0077] It should be emphasized that the above-described embodiments
of the present invention, particularly, any "preferred"
embodiments, are merely possible examples of implementations,
merely set forth for a clear understanding of the principles of the
invention. Many variations and modifications may be made to the
above-described embodiment(s) of the invention without departing
substantially from the spirit and principles of the invention. All
such modifications and variations are intended to be included
herein within the scope of this disclosure and the present
invention and protected by the following claims.
* * * * *