U.S. patent application number 11/398713 was filed with the patent office on 2006-10-12 for vertical group iii-nitride light emitting device and method for manufacturing the same.
This patent application is currently assigned to SAMSUNG ELECTRO-MECHANICS CO.,LTD.. Invention is credited to Hyung Ky Back, Dong Woo Kim, Yong Chun Kim, Moon Heon Kong, Jae Hoon Lee.
Application Number | 20060225644 11/398713 |
Document ID | / |
Family ID | 37081940 |
Filed Date | 2006-10-12 |
United States Patent
Application |
20060225644 |
Kind Code |
A1 |
Lee; Jae Hoon ; et
al. |
October 12, 2006 |
Vertical group III-nitride light emitting device and method for
manufacturing the same
Abstract
A vertical group III-nitride light emitting device and a
manufacturing method thereof are provided. The light emitting
device comprises: a conductive substrate; a p-type clad layer
stacked on the conductive substrate; an active layer stacked on the
p-type clad layer; an n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN layer
stacked on the active layer; an undoped GaN layer stacked on the
n-doped layer; and an n-electrode formed on the undoped GaN layer.
The undoped GaN layer has a rough pattern formed on a top surface
thereof.
Inventors: |
Lee; Jae Hoon; (Suwon,
KR) ; Kim; Yong Chun; (Suwon, KR) ; Back;
Hyung Ky; (Suwon, KR) ; Kong; Moon Heon;
(Suwon, KR) ; Kim; Dong Woo; (Chungjoo,
KR) |
Correspondence
Address: |
MCDERMOTT WILL & EMERY LLP
600 13TH STREET, N.W.
WASHINGTON
DC
20005-3096
US
|
Assignee: |
SAMSUNG ELECTRO-MECHANICS
CO.,LTD.
|
Family ID: |
37081940 |
Appl. No.: |
11/398713 |
Filed: |
April 6, 2006 |
Current U.S.
Class: |
117/89 ;
257/E33.074 |
Current CPC
Class: |
H01L 33/22 20130101;
H01L 33/32 20130101; H01L 33/0093 20200501 |
Class at
Publication: |
117/089 |
International
Class: |
C30B 23/00 20060101
C30B023/00; C30B 25/00 20060101 C30B025/00; C30B 28/12 20060101
C30B028/12; C30B 28/14 20060101 C30B028/14 |
Foreign Application Data
Date |
Code |
Application Number |
Apr 7, 2005 |
KR |
10-2005-0029044 |
Claims
1. A vertical group III-nitride light emitting device comprising: a
conductive substrate; a p-type clad layer stacked on the conductive
substrate; an active layer stacked on the p-type clad layer; an
n-doped layer stacked on the active layer, the n-doped layer having
a composition expressed by Al.sub.xGa.sub.yIn.sub.1-x-yN, where
0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1 and 0.ltoreq.x+y.ltoreq.1;
an undoped GaN layer stacked on the n-doped layer; and an
n-electrode formed on the undoped GaN layer, wherein the undoped
GaN layer has a rough pattern formed on a top surface thereof.
2. The vertical group III-nitride light emitting device according
to claim 1, wherein the undoped GaN layer does not have a rough
pattern on an area where the n-electrode is formed.
3. The vertical group III-nitride light emitting device according
to claim 1, further comprising a reflective layer formed between
the conductive substrate and the p-type clad layer.
4. The vertical group III-nitride light emitting device according
to claim 3, wherein the reflective layer comprises one selected
from a group consisting of a CuInO.sub.2/Ag layer, a CuInO.sub.2/Al
layer and an Ni/Ag/Pt layer.
5. The vertical group III-nitride light emitting device according
to claim 1, further comprising a transparent electrode layer formed
on the undoped GaN layer.
6. The vertical group III-nitride light emitting device according
to claim 1, further comprising a conductive adhesive layer formed
between the conductive substrate and the p-type clad layer.
7. The vertical group III-nitride light emitting device according
to claim 6, wherein the conductive adhesive layer comprises one
selected from a group consisting of Au, Au--Sn, Sn, In, Au--Ag and
Pb--Sn.
8. The vertical group III-nitride light emitting device according
to claim 6, further comprising a reflective layer formed between
the conductive adhesive layer and the p-type clad layer.
9. The vertical group III-nitride light emitting device according
to claim 1, wherein the conductive substrate comprises a metal
substrate or a silicon substrate.
10. The vertical group III-nitride light emitting device according
to claim 9, wherein the metal substrate comprises one selected from
a group consisting of W, Cu, Ni, Ti and alloys of at least two
thereof.
11. The vertical group III-nitride light emitting device according
to claim 1, wherein the rough pattern comprises convexes or
concaves which are spaced from each other in the range of 20 nm to
100 .mu.m, and each have a width and a height of 20 nm to 100
.mu.m, respectively.
12. The vertical group III-nitride light emitting device according
to claim 1, wherein the rough pattern comprises convexes or
concaves which are spaced from each other in the range of 200 nm to
3 .mu.m, and each have a width and a height of 200 nm to 3 .mu.m,
respectively.
13. The vertical group III-nitride light emitting device according
to claim 1, wherein the rough pattern comprises a photonic
crystal.
14. The vertical group III-nitride light emitting device according
to claim 1, wherein the rough pattern has one sectional shape
selected from a group consisting of hemisphere, rectangle and
serration.
15. A method for manufacturing a vertical group III-nitride light
emitting device comprising steps of: (i) preparing a basic
substrate having a rough pattern formed on a top surface thereof;
(ii) forming an n-type clad layer, an active layer and a p-type
clad layer sequentially on the basic substrate, the clad layers and
the active layer having compositions expressed by
Al.sub.xGa.sub.yIn.sub.1-x-yN, where 0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1, and 0.ltoreq.x+y.ltoreq.1; (iii) forming a
conductive substrate on the p-type clad layer; (iv) removing the
basic substrate so as to expose a rough pattern formed on a bottom
surface of the n-type clad layer; and (v) forming an n-electrode on
a partial area of the exposed bottom surface of the n-type clad
layer.
16. The method according to claim 15, wherein the basic substrate
comprises one selected from a group consisting of sapphire, SiC,
GaN and AIN.
17. The method according to claim 15, wherein in the step (i), the
rough pattern is not formed on a top surface area of the basic
substrate corresponding to the n-electrode.
18. The method according to claim 15, wherein the step (ii)
comprises: forming an undoped GaN layer on the basic substrate; and
forming an n-doped layer on the undoped GaN layer, the n-doped
layer having a composition expressed by
Al.sub.xGa.sub.yIn.sub.1-x-yN, where 0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1 and 0.ltoreq.x+y.ltoreq.1.
19. The method according to claim 15, wherein the step (iii)
comprises bonding the conductive substrate to the p-clad layer via
a conductive adhesive layer.
20. The method according to claim 15, wherein the step (iii)
comprises forming the conductive substrate on the p-type clad layer
via plating, deposition or sputtering.
21. The method according to claim 15, further comprising forming a
reflective layer on the p-type clad layer between the step (ii) and
the step (iii).
22. The method according to claim 21, wherein the reflective layer
comprises one selected from a group consisting of a CuInO.sub.2/Ag
layer, a CuInO.sub.2/Al layer and an Ni/Ag/Pt layer.
23. The method according to claim 15, further comprising forming a
transparent electrode layer on the n-type clad layer after the step
(iv).
24. The method according to claim 15, wherein the rough pattern
formed on the basic substrate comprises convexes or concaves which
are spaced from each other in the range of 20 nm to 100 .mu.m, and
each have a width and a height of 20 nm to 100 .mu.m,
respectively.
25. The method according to claim 15, wherein the rough pattern
formed on the basic substrate comprises convexes or concaves which
are spaced from each other in the range of 200 nm to 3 .mu.m, and
each have a width and a height of 200 nm to 3 .mu.m,
respectively.
26. The method according to claim 15, wherein the step (i) is
conducted such that the rough pattern has a sectional shape of
hemisphere, rectangle or serration.
Description
RELATED APPLICATION
[0001] This application claims the benefit of Korean Patent
Application No. 2005-29044 filed on Apr. 7, 2005 in the Korean
Intellectual Property Office, the disclosure of which is
incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a group III-nitride light
emitting device and a manufacturing method thereof. More
particularly, the present invention relates to a vertical group
III-nitride light emitting device improved in light extraction
efficiency, and a manufacturing method thereof.
[0004] 2. Description of the Related Art
[0005] Since development of a light emitting diode (LED) including
a group III-nitride semiconductor, it has been utilized as a light
source in a variety of areas such as a liquid crystal display (LCD)
backlight, a mobile phone keypad, a illumination lighting source
and the like. Regarding development of the LED for wide-ranging
purposes, light-emitting efficiency and heat releasing properties
thereof have emerged as a significant factor. Light-emitting
efficiency of the LED is determined by light generation efficiency,
external extraction efficiency and amplification efficiency by
fluorescent material. Most of all, the biggest problem concerns low
external extraction efficiency, that is, light generated is
externally extracted at a low efficiency. The greatest hurdle
against light extraction out of the LED is extinction of light
resulting from total internal reflection. That is, big refractivity
differences at an interface of the LED allows only about 20% of
light generated to exit outside the interface of the LED. The light
totally reflected at the interface travels inside the LED and is
reduced to heat. This increases a heat release rate of the LED, and
decreases external extraction efficiency of the LED, thus
shortening lifetime thereof.
[0006] To overcome this problem, suggestions have been made
regarding methods for improving external extraction efficiency. For
example, a surface pattern or a surface texture is formed on the
LED to enable a photon arriving at its surface to scatter randomly.
Alternatively, the light emitting device is shaped as a truncated
inverted pyramid. Furthermore, in another recent method, to form a
photonic crystal, the LED surface is patterned such that a photon
of a specified wavelength is transmitted or reflected selectively.
Also, a thick sapphire substrate can be removed from the LED
structure after attaching a metal substrate to the LED structure.
For now, the vertical GaN-based LED obtained thereby exhibits the
highest extraction efficiency. "Watt-Class High-Output-Power 365 nm
Ultraviolet Light-Emitting Diodes" by Daisuke Morita et al.
published in Japanese Journal of Applied Physics (Vol. 43, No. 9A,
2004, pp. 5945-5950) discloses a vertical GaN-based LED having a
rough pattern on an n-AlGaN contact layer and a manufacturing
method thereof.
[0007] FIG. 1 is a side sectional view illustrating an example of a
conventional vertical group III-nitride light emitting device.
Referring to FIG. 1, the conventional group III-nitride
light-emitting device 10 includes a conductive adhesive layer 12, a
metal reflective layer 13, a p-doped AlGaN contact layer 14, a
p-doped AlGaN clad layer 15, an active layer 16 and an n-doped
AlGaN contact layer 17 sequentially stacked on a conductive
substrate 11. Also, an n-electrode 18 is formed on the n-doped
AlGaN contact layer 17.
[0008] As shown in FIG. 1, a rough pattern 21 is formed on the
n-doped AlGaN contact layer 17 exposed to an outside. A photon
which starts from inside the light emitting device 10 and arrives
at the rough pattern 21 is scattered in the rough pattern 21, thus
more highly likely to exit to the outside. Eventually, despite big
refractivity differences between AlGaN material and external
environments such as air and epoxy resin, external extraction
efficiency can be improved.
[0009] However, in the conventional vertical group III-nitride
light emitting device 10, to enable sufficient extraction of light
through the rough pattern 21, a contact area of the n-electrode 18
becomes a relatively small. Accordingly, current concentrates in a
lower part of the n-electrode 18, disadvantageously increasing
operating voltage V.sub.f of the light emitting device 10.
[0010] Further, to manufacture the conventional vertical group
III-nitride light emitting device 10 having the rough pattern 21
requires following processes to be conducted sequentially: growing
GaN-based semiconductor 17, 16, 15, 14 on a sapphire substrate (not
illustrated), adhering the conductive substrate 11, removing the
sapphire substrate and forming the rough pattern 21. In addition,
to form the rough pattern 21 requires a photolithography process
including wet or dry etching such as inductivity coupled
plasma-reactive ion etching (ICP-RIE) on the n-doped AlGaN contact
layer 17. However, with the sapphire substrate removed, it is very
difficult to perform the photolithography on a top surface of a
thin-filmed GaN-based structure having a thickness of 10 .mu.m or
less, even though the conductive substrate 11 is used as a
supporting substrate. Accordingly, this leads to significant
decrease in yield.
SUMMARY OF THE INVENTION
[0011] The present invention has been made to solve the foregoing
problems of the prior art and it is therefore an object of the
present invention to provide a group III-nitride light emitting
device considerably improved in light extraction efficiency and
operating voltage properties.
[0012] It is another object of the invention to provide a method
for manufacturing a vertical group III-nitride light emitting
device having high extraction efficiency of light in an easy and
simple fashion at a greater yield.
[0013] According to an aspect of the invention for realizing the
object, there is provided a vertical group III-nitride light
emitting device comprising: a conductive substrate; a p-type clad
layer stacked on the conductive substrate; an active layer stacked
on the p-type clad layer; an n-doped layer stacked on the active
layer, the n-doped layer having a composition expressed by
Al.sub.xGa.sub.yIn.sub.1-x-yN, where 0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1 and 0.ltoreq.x+y.ltoreq.1; an undoped GaN layer
stacked on the n-doped layer; and an n-electrode formed on the
undoped GaN layer, wherein the undoped GaN layer has a rough
pattern formed on a top surface thereof. Preferably, the undoped
GaN layer does not have a rough pattern on an area where the
n-electrode is formed.
[0014] According to one embodiment of the invention, the vertical
group III-nitride light emitting device may further comprise a
reflective layer formed between the conductive substrate and the
p-type clad layer. Preferably, the reflective layer comprises one
selected from a group consisting of a CuInO.sub.2/Ag layer, a
CuInO.sub.2/Al layer and an Ni/Ag/Pt layer. Also, the vertical
group III-nitride light emitting device may further comprise a
transparent electrode layer, such as an indium tin oxide (ITO)
layer, formed on the undoped GaN layer.
[0015] According to another embodiment of the invention, the
vertical group III-nitride light emitting device may further
comprise a conductive adhesive layer formed between the conductive
substrate and the p-type clad layer. The conductive adhesive layer
may comprise one selected from a group consisting of Au, Au--Sn,
Sn, In, Au--Ag and Pb--Sn. Moreover, the vertical group III-nitride
light emitting device may further comprise a reflective layer
between the conductive adhesive layer and the p-type clad layer,
which may be selected from a group consisting of a CuInO.sub.2/Ag
layer, a CuInO.sub.2/Al layer and an Ni/Ag/Pt layer.
[0016] According to further another embodiment of the invention,
the conductive substrate may comprise a metal substrate or a
silicon substrate. The metal substrate comprises one selected from
a group consisting of W, Cu, Ni, Ti and alloys of at least two
thereof.
[0017] According to a preferred embodiment of the invention, the
rough pattern comprises convexes or concaves which are spaced from
each other in the range of 20 nm to 100 .mu.m, and each have a
width and a height of 20 nm to 100 .mu.m, respectively. More
preferably, the rough pattern has convexes or concaves which are
spaced from each other in the range of 200 nm to 3 .mu.m, and each
have a width and a height of 200 nm to 3 .mu.m, respectively. The
rough pattern may comprise a photonic crystal.
[0018] According to various embodiments of the invention, the rough
pattern may have a relieved or engraved section. The rough pattern
may have a sectional shape of hemisphere, rectangle or
serration.
[0019] According to an aspect of the invention for realizing the
object, there is provided a method for manufacturing a vertical
group III-nitride light emitting device comprising steps of:
[0020] (i) preparing a basic substrate having a rough pattern
formed on a top surface thereof;
[0021] (ii) forming an n-type clad layer, an active layer and a
p-type clad layer sequentially on the basic substrate, the clad
layers and the active layer having compositions expressed by
Al.sub.xGa.sub.yIn.sub.1-x-yN, where 0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1, and 0.ltoreq.x+y.ltoreq.1;
[0022] (iii) forming a conductive substrate on the p-type clad
layer;
[0023] (iv) removing the basic substrate so as to expose a rough
pattern formed on a bottom surface of the n-type clad layer;
and
[0024] (v) forming an n-electrode on a partial area of the exposed
bottom surface of the n-type clad layer.
[0025] According to one embodiment of the invention, the basic
substrate may comprise one selected from a group consisting of a
sapphire substrate, a SiC substrate, a GaN substrate and an AIN
substrate. Also, the conductive substrate may comprise a metal
substrate or a silicon substrate. The metal substrate may comprise
one selected from a group consisting of W, Cu, Ni, Ti and alloys of
at least two thereof.
[0026] According to a preferred embodiment of the invention, in the
step (i), the rough pattern is not formed on a top surface area of
the basic substrate corresponding to the n-electrode. Thereby, the
n-type clad layer does not have a rough pattern on an area where
the n-electrode is formed.
[0027] According to another preferred embodiment of the invention,
the step (ii) comprise:
[0028] forming an undoped GaN layer on the basic substrate; and
[0029] forming an n-doped layer on the undoped GaN layer, the
n-doped layer having a composition expressed by
Al.sub.xGa.sub.yIn.sub.1-x-yN, where 0.ltoreq.x.ltoreq.1,
0.ltoreq.y.ltoreq.1 and 0.ltoreq.x+y.ltoreq.1. In this case, the
undoped GaN layer has a rough pattern formed on a top surface
thereof.
[0030] According to one embodiment of the invention, the step (iii)
may comprise bonding the conductive substrate to the p-clad layer
via a conductive adhesive layer. According to another embodiment of
the invention, the step (iii) may comprise forming the conductive
type substrate on the p-type clad layer via plating, deposition or
sputtering.
[0031] According to a preferred embodiment of the invention, a
reflective layer may be formed on the p-type clad layer between the
step (ii) and the step (iii). Preferably, the reflective layer
comprises one selected from a group consisting of a CuInO.sub.2/Ag
layer, a CuInO.sub.2/Al layer and an Ni/Ag/Pt layer. Also, a
transparent electrode layer, such as an ITO layer, may be formed on
the n-type clad layer after the step (iv).
[0032] According to further another preferred embodiment, the rough
pattern formed on the basic substrate comprises convexes or
concaves which are spaced from each other in the range of 20 nm to
100 .mu.m, and each have a width and a height of 20 nm to 100
.mu.m, respectively. More preferably, the rough pattern formed on
the basic substrate has convexes or concaves which are spaced from
each other in the range of 200 nm to 3 .mu.m, and each have a width
and a height of 200 nm to 3 .mu.m, respectively. The rough pattern
formed on the n-type clad layer may comprise a photonic
crystal.
[0033] According to various embodiments, the step (i) is conducted
such that the rough pattern has a sectional shape of hemisphere,
rectangle or serration.
[0034] As used herein, the term `group III-nitirde` is defined as a
binary, ternary or quaternary compound semiconductor having a
composition expressed by Al.sub.xGa.sub.yIn.sub.1-x-yN, where
0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, and
0.ltoreq.x+y.ltoreq.1. Also, `a group III-nitride light emitting
device` means that an n-type clad layer, active layer and p-type
clad layer constituting the light emitting structure are made of
the group III-nitride.
BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The above and other objects, features and other advantages
of the present invention will be more clearly understood from the
following detailed description taken in conjunction with the
accompanying drawings, in which:
[0036] FIG. 1 is a side sectional view illustrating an example of a
conventional vertical group III-nitride light emitting device;
[0037] FIG. 2 is a side sectional view illustrating a group
III-nitride light emitting device according to one embodiment of
the invention;
[0038] FIG. 3 is a side sectional view illustrating a group
III-nitride light emitting device according to another embodiment
of the invention;
[0039] FIGS. 4 to 10 are sectional views for explaining a method
for manufacturing a vertical group III-nitride light emitting
device according to one embodiment of the invention;
[0040] FIG. 11 is a top view illustrating a rough pattern formed on
a top surface of the substrate of FIG. 5;
[0041] FIG. 12 is a SEM picture illustrating a rough pattern formed
on a top surface of the vertical group III-nitride light emitting
device according to the embodiment of the invention;
[0042] FIG. 13 is a magnification of the rough pattern of FIG.
12;
[0043] FIGS. 14 to 16 are sectional views for explaining a method
for manufacturing a vertical group III-nitride light emitting
device according to another embodiment of the invention; and
[0044] FIG. 17 is a sectional view illustrating various types of
rough patterns formed on a top of a basic substrate according to
the invention.
DETAILIGHT EMITTING DEVICE DESCRIPTION OF THE PREFERRED
EMBODIMENT
[0045] The present invention now will be described more fully
hereinafter with reference to the accompanying drawings, in which
preferred embodiments of the invention are shown. This invention,
however, may be embodied in many different forms and should not be
construed as limited to the embodiments set forth herein. Rather,
these embodiments are provided so that this disclosure will be
thorough and complete, and will fully convey the scope of the
invention to those skilled in the art. In the drawings, the shapes
and dimensions may be exaggerated for clarity, and the same
reference signals are used to designate the same or similar
components throughout.
[0046] FIG. 2 is a side sectional view illustrating a vertical
group III-nitride light emitting device according to one embodiment
of the invention. Referring to FIG. 2, the light emitting device
100 includes a reflective layer 103, a p-type clad layer 105, an
active layer 107, an n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN
(0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.x+y.ltoreq.1)
layer 109, and an undoped GaN layer 111 sequentially stacked on a
conductive substrate 101. The n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN
layer 109 and undoped GaN layer 111 constitute an n-type clad layer
110. The p-type and n-type clad layers 105, 110 and the active
layer 107 are made of group III-nitride having compositions of
Al.sub.mGa.sub.nIn.sub.1-m-nN, where 0.ltoreq.m.ltoreq.1,
0.ltoreq.n.ltoreq.1 and 0.ltoreq.m+n.ltoreq.1. The active layer 107
may have a multiple quantum well structure. An n-electrode 123 is
formed on a top surface of the undoped GaN layer 111. The
n-electrode 123 is positioned in an upper part of the light
emitting device 100, and a lower part of the light emitting device
100, that is, the conductive substrate 101 is employed as a
p-electrode. This constitutes a vertical light emitting device
having electrodes at opposed sides.
[0047] The conductive substrate 101 is made of one selected from a
group consisting of silicon (Si), tungsten (W), copper (Cu), nickel
(Ni), Titan (Ti) and alloys of at least two thereof. This
conductive substrate 101 is adhered under the p-type clad layer 105
by a bonding process using a conductive adhesive layer stated
later. Alternatively, the conductive substrate 101 is provided
under the p-clad layer 105 via plating, deposition or sputtering
conducted on an exposed surface of the p-type clad layer 105.
[0048] As shown in FIG. 2, the undoped GaN layer 11 has a rough
pattern 121 formed on a top surface thereof except the area where
the n-electrode 123 is formed. This rough pattern 121 allows easy
extraction of a photon generated inside the light emitting device
100. That is, light reaching the top surface of the the layer 111
is scattered by the rough pattern 121, thereby easily extracted out
of the light emitting device 100. Particularly, the area where the
n-electrode 123 is formed is free of the rough pattern 121, thus
preventing increase in contact resistance between the undoped GaN
layer 111 and the n-electrode 123.
[0049] As described later, to form the rough pattern 121, a rough
pattern formed on other basic substrate (e.g. a sapphire substrate)
is transferred to the undoped GaN layer 111. Therefore, the rough
pattern 121 can be regularly formed at precise dimensions. To
ensure a sufficient scattering effect, preferably, the rough
pattern 121 includes convexes or concaves which are spaced from
each other in the range of 20 nm to 100 .mu.m, and each have a
width and a height of 20 nm to 100 .mu.m, respectively. More
preferably, the convexes or concaves are spaced from each other in
the range of 200 nm to 3 .mu.m, and each have a width and a height
of 200 nm to 3 .mu.m, respectively. To form a photon crystal, the
convexes or concaves of the rough pattern 121 are spaced from each
other at 3 .mu.m or less and each are sized 3 .mu.m or less. This
photon crystal can refract light by a law of refraction, not a law
of reflection. Thus, this significantly enhances external
extraction efficiency of light. The rough pattern 121 has a section
formed by relief or intaglio and has various sectional shapes such
as hemisphere, rectangle and serration.
[0050] The reflective layer 103 enables light to be reflected
upward in a light exiting direction, thereby boosting external
extraction of the light. Preferably, the reflective layer 103 is
selected from a group consisting of a CuInO.sub.2/Ag layer, a
CuInO.sub.2/Al layer and an Ni/Ag/Pt layer. Although not
illustrated in FIG. 2, a transparent electrode layer made of ITO
may be formed on the rough-patterned undoped GaN layer 111. The
transparent electrode layer allows the light to exit at a uniform
intensity.
[0051] According to the embodiment of the invention, a vertical
group III-nitride light emitting device 100 includes an undoped GaN
layer 111 between an n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN layer
109 and an n-electrode 123. The undoped GaN layer 111 is positioned
under the n-electrode 123 to prevent a current concentration
generated directly under the n-electrode 123. That is, the undoped
GaN layer 111 functions to spread current so that current generated
by voltage applied from the n-electrode 123 is spread sideward
extensively. This reduces operating voltage V.sub.f of the light
emitting device 100 and enhances electrostatic discharge
properties, thereby lengthening lifetime of the light emitting
device 100.
[0052] Also, according to the embodiment of the invention, an
n-type clad layer 110 has a rough pattern 121 formed on a top
surface thereof to improve external extraction efficiency of the
light. Especially, the rough pattern 121 can include convexes or
concaves which are spaced from each other at 3 .mu.m or less, and
each have a width and a height of 3 .mu.m or less. Such a rough
pattern gives a photonic crystal to the surface of the device 100.
The photonic crystal considerably boosts external extraction
efficiency of the light.
[0053] FIG. 3 is a side sectional view illustrating a group
III-nitride light emitting device 200 according to another
embodiment of the invention. The light emitting device 200 of FIG.
3 includes a conductive substrate 201 adhered by a conductive
adhesive layer 202. Referring to FIG. 3, a conductive adhesive
layer 202, a reflective layer 103, a p-type clad layer 105, an
active layer 107, an n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN layer
109, and an undoped GaN layer 111 are sequentially stacked on a
conductive substrate 201. An n-electrode 123 is formed on the
undoped GaN layer 111. The undoped GaN layer 111 has a rough
pattern 121 formed on the top surface thereof. The conductive
adhesive layer 202 is selected from a group consisting of Au,
Au--Sn, Sn, In, Au--Ag and Pb--Sn. The conductive adhesive layer
202 adheres the conductive substrate 201 such as a silicon
substrate to an Al.sub.xGa.sub.yIn.sub.1-x-yN-based light emitting
structure. Constituents other than the conductive adhesive layer
202 are identical to those in the embodiment stated above and thus
will not be explained in further detail.
[0054] A method for manufacturing a light emitting device according
to the invention will be described hereinafter. FIGS. 4 to 10 are
sectional views for explaining the method for manufacturing the
light emitting device according to one embodiment of the
invention.
[0055] First, referring to FIG. 4, a substrate 151 (hereinafter, "a
basic substrate") is prepared to grow a group III-nitride
semiconductor layer. The basic substrate 151, for example, may be a
sapphire substrate. Alternatively, the basic substrate 151 may be a
SiC, GaN or AlN substrate.
[0056] Thereafter, as shown in FIG. 5, a rough pattern 153 having
hemispherical relieves 150 is formed on the basic substrate 151. To
form the rough pattern 153, for example, a top surface of the basic
substrate 151 is selectively etched via a reflowed photoresist
pattern. Unlike a conventional technique, the rough pattern 153 is
formed on "the substrate 151" such as a sapphire substrate. This
allows easy formation of the rough pattern 153, and enables the
rough pattern 153 to be formed at precise dimensions and at regular
intervals.
[0057] FIG. 11 is a top view illustrating a rough pattern 153
formed on a top surface of the basic substrate 151 of FIG. 5, which
is a side sectional view cut along the line XX' of FIG. 11. As
shown in FIGS. 5 and 11, the rough pattern 153 is not formed on a
partial area A of a top surface of the basic substrate 151. The
area A with no rough pattern formed thereon corresponds to an area
where an n-electrode will be formed later. As stated later, since
the area A is free of the rough pattern 153, increase in contact
resistance of the n-electrode is prevented.
[0058] The rough pattern 153 includes convexes or concaves which
are spaced from each other in the range of 20 nm to 100 .mu.m, and
each have a width and a height of 20 nm to 100 .mu.m. Preferably,
the convexes or concaves are spaced from each other in the range of
200 nm to 3 .mu.m, and each have a width and a height of 200 nm to
3 .mu.m. For example, the rough pattern 153 having the convexes or
concaves spaced from each other at 3 .mu.m or less is formed on the
basic substrate 151 so that a photonic crystal may be formed on the
top surface of the n-clad layer to be formed later.
[0059] According to the embodiment of the invention, the rough
pattern 153 has a hemispherical sectional shape but may be shaped
differently. As illustrated in FIGS. 17 (a) to (e), on a top
surface, the basic substrate 151 may have the rough pattern 153 in
a variety of shapes such as a rough pattern 153a with hemispherical
relieves 150a, a rough pattern 153b with hemispherical intaglios
150b, a rough pattern 153c with rectangular intaglios 150c, a rough
pattern 153d with serrated relieves 150d and a rough pattern 153e
with serrated intaglios 150e.
[0060] Then, referring to FIG. 6, an undoped GaN layer 111, an
n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN layer 109, an active layer
107, a p-type clad layer 105 are sequentially grown on the basic
substrate 151 having the rough surface pattern 153. As a result, a
light emitting structure is formed, including the clad layers 110,
105 and the active layer 107. The undoped GaN layer 111 is grown on
a top surface of the basic substrate 151 having the rough pattern
153 so that the rough pattern 153 is transferred to a surface of
the undoped GaN layer 111 contacting the basic substrate 151.
Consequently, a rough pattern (see the reference numeral 121 of
FIG. 9) is formed on an underside of the undoped GaN layer 111. The
rough pattern 121 formed on the undoped GaN layer 111 has convexes
or concaves spaced from each other at a distance substantially
identical to that of the concaves or convexes of the rough pattern
153 formed on the basic substrate 151. Also, the convexes or
concaves of the rough pattern 121 formed on the undoped GaN layer
111 each have a width and a height substantially identical to those
of the concaves or convexes of the rough pattern 153 formed on the
basic substrate 151. As explained above with reference to FIGS. 5
and 11, the rough pattern 153 of the basic substrate 151 is not
formed on the area corresponding to an n-electrode (the area A of
FIGS. 5 and 11). Accordingly, the rough pattern 121 of the undoped
GaN layer 111 is not formed on this area either.
[0061] In a manufacturing method according to the embodiment of the
invention, an undoped GaN layer 111 and an n-doped
Al.sub.xGa.sub.yIn.sub.1-x-yN layer 109 constitute an n-type clad
layer 110. However, only the n-doped Al.sub.xGa.sub.yIn.sub.1-x-yN
layer 109 may constitute the n-type clad layer without the undoped
GaN layer 111. In such a case, the rough pattern 153 of the basic
substrate may be transferred to an underside of the n-doped
Al.sub.xGa.sub.yIn.sub.1-x-yN layer 109.
[0062] Then, as shown in FIG. 7, a reflective layer 103 made of
e.g. a CuInO.sub.2/Ag layer, a CuInO.sub.2/Al layer or an Ni/Ag/Pt
layer is formed on a p-type clad layer 105. The reflective layer
reflects light toward a light exiting surface, thereby enhancing
light extraction efficiency. Then, as shown in FIG. 8, a conductive
substrate 101 selected from a group consisting of W, Cu, Ni and
alloys of at least two thereof is formed on the reflective layer
103. The metal conductive substrate 101, for example, can be
provided via plating, deposition or sputtering. In an alternative
embodiment, the conductive substrate 101 may be formed on the
p-type clad layer 105 without the reflective layer.
[0063] Next, referring to FIG. 9, the basic substrate 151 is
removed from a light emitting structure. The basic substrate 151,
for example, can be removed by a laser lift-off process using a
laser beam. Accordingly, as shown in FIG. 9, the rough pattern
formed on the bottom surface of the undoped GaN layer 111 is
exposed.
[0064] Then, as shown in FIG. 10, an n-electrode 123 is formed on a
partial area of the exposed surface of the undoped GaN layer 111.
Therefore, the light emitting device 100 according to the
embodiment of the invention is acquired. It should be noted that
the partial area where the n-electrode is formed is free of the
rough pattern 121. If the n-electrode 123 is formed on the
rough-patterned surface, contact resistance of the n-electrode is
increased. Therefore, it is desirable to form the n-electrode 123
on an area without the rough pattern 121 in order to prevent
increase in contact resistance. Before forming the n-electrode 123,
a transparent electrode (not illustrated) made of ITO may be formed
on the exposed surface of the undoped GaN layer 111.
[0065] FIG. 12 is a SEM picture illustrating the rough pattern 121
formed on a top surface of the undoped GaN layer 111. FIG. 13 is a
SEM picture illustrating a magnified rough pattern of FIG. 12. As
shown in FIGS. 12 and 13, the rough pattern 121 formed on the
undoped GaN layer 111 has a clearly defined shape and a regular
interval. It is relatively easy to form the rough pattern 153 with
precise dimensions on the basic substrate 151 such as a sapphire
substrate, thereby leading to easy formation of the rough pattern
121 with precise dimensions on the undoped GaN layer 111. This
consequently boosts yield.
[0066] FIGS. 14 to 16 are sectional views for explaining a method
for manufacturing a group III-nitride light emitting device
according to another embodiment of the invention. In this
embodiment, a conductive substrate is bonded to a p-type clad layer
via a conductive adhesive layer. This embodiment also goes through
processes explained above with reference to FIGS. 4 to 7.
[0067] Then, as shown in FIG. 14, conductive adhesive layers 202a
and 202b are formed on an exposed surface of the reflective layer
103 and on a corresponding area of the conductive substrate 201. A
metal substrate or a silicon substrate may be used as the
conductive substrate 201. As the adhesive layer 202a, 202b, for
example, gold (Au) is used. Alternatively, Au--Sn, Sn, In, Au--Ag
or Pb--Sn may be adopted for the adhesive layer. Then, the
conductive substrate 201 is adhered to the reflective layer 103 via
the conductive adhesive layers 202a and 202b. This enables bonding
between the conductive substrate 201 and the light emitting
structure. In this embodiment, the conductive adhesive layer is
formed both on the conductive substrate 201 and the light emitting
structure. However, the conductive adhesive layer may be formed on
either the conductive substrate 201 or the light emitting
structure. The reflective layer 103 may not be provided.
[0068] Then, as shown in FIG. 15, the basic substrate 151 is
removed, thereby exposing the rough pattern formed on the undoped
GaN layer 111. Then, as shown in FIG. 16, an n-electrode 123 is
formed on an undoped GaN layer 111 to complete the light emitting
device 200. According to this embodiment, the conductive substrate
201 prepared in advance is adhered to the light emitting structure
via the conductive adhesive layer 202. This obviates a need for
plating, deposition or sputtering required to form the conductive
substrate 201. Also, a silicon substrate may used as the conductive
substrate 201.
[0069] As set forth above, according to the invention, an undoped
GaN layer having a rough pattern formed thereon is positioned under
an n-electrode to produce a group III-nitride light emitting device
improved in light extraction efficiency and operating voltage.
Also, according to a manufacturing method of the invention, a rough
pattern formed on a basic substrate is transferred to an n-type
clad layer, thereby ensuring easy manufacture of a vertical group
III-nitride light emitting device having high extraction efficiency
at a higher yield.
[0070] While the present invention has been shown and described in
connection with the preferred embodiments, it will be apparent to
those skilled in the art that modifications and variations can be
made without departing from the spirit and scope of the invention
as defined by the appended claims.
* * * * *