U.S. patent application number 11/431538 was filed with the patent office on 2006-09-14 for dc/ac inverter.
This patent application is currently assigned to Beyond Innovation Technology Co.,Ltd.. Invention is credited to Shih-chung Huang, Chien-pang Hung, Chih-shun Lee, Li-Min Lee, Chung-che Yu.
Application Number | 20060203525 11/431538 |
Document ID | / |
Family ID | 36180554 |
Filed Date | 2006-09-14 |
United States Patent
Application |
20060203525 |
Kind Code |
A1 |
Yu; Chung-che ; et
al. |
September 14, 2006 |
DC/AC inverter
Abstract
A DC/AC inverter for transforming a DC power source to an AC
power, which drives a load. The DC/AC inverter comprises a
full-bridge switch circuitry, a resonant tank, a frequency
generator and a driver circuit. The full-bridge switch circuitry is
electrically connected to the DC power source to convert the DC
voltage to a pulse signal. The full-bridge switch circuitry
comprises a first power switch, a second power switch, a third
power switch, and a fourth power switch. The resonant tank is
electrically connected between the full-bridge switch circuitry and
a load for boosting and filtering the pulse signal to generate an
AC power supplied to the load. The frequency generator generates a
pulse signal at one of at least two predetermined operating
frequencies based on an operation state of the DC/AC inverter. The
driver circuit is coupled to the frequency generator and provides
four driving signals based on the pulse signal of the frequency
generator for turning on and off the first power switch, the second
power switch, the third power switch, and the fourth power switch
respectively. The four driving signals have the same frequency,
wherein the duty cycle of two of the four driving signals is
smaller than 50% and the duty cycle of the other two of the four
driving signals is larger than 50%.
Inventors: |
Yu; Chung-che; (Taipei,
TW) ; Lee; Li-Min; (Taipei, TW) ; Huang;
Shih-chung; (Taipei, TW) ; Hung; Chien-pang;
(Taipei, TW) ; Lee; Chih-shun; (Taipei,
TW) |
Correspondence
Address: |
John Chen
Room 303, 3F., Sec. 1
Changan E. Road
Taipei
10441
TW
|
Assignee: |
Beyond Innovation Technology
Co.,Ltd.
|
Family ID: |
36180554 |
Appl. No.: |
11/431538 |
Filed: |
May 11, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10968857 |
Oct 18, 2004 |
|
|
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11431538 |
May 11, 2006 |
|
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Current U.S.
Class: |
363/97 |
Current CPC
Class: |
H02M 7/53871 20130101;
Y02B 20/00 20130101; Y02B 20/186 20130101; Y02B 70/1441 20130101;
Y02B 70/10 20130101; H05B 41/2825 20130101; H05B 41/2828
20130101 |
Class at
Publication: |
363/097 |
International
Class: |
H02M 3/24 20060101
H02M003/24 |
Claims
1. A DC/AC inverter for transforming a DC power source to an AC
power source, which drives a load, said DC/AC inverter comprising:
a full-bridge switch circuitry electrically connected to said DC
power source for being operative to convert said DC voltage to a
pulse signal, said full-bridge switch circuitry comprising a first
power switch, a second power switch, a third power switch, and a
fourth power switch; a resonant tank electrically connected between
said full-bridge switch circuitry and said load for being operative
to boost and filter said pulse signal to generate an AC power
supplied to said load; a frequency generator for being operative to
generate a pulse signal at one of at least two predetermined
operating frequencies based on an operation state of said DC/AC
inverter; and a driver circuit coupling to said frequency generator
and providing four driving signals based on said pulse signal of
said frequency generator for turning on and off said first power
switch, said second power switch, said third power switch, and said
fourth power switch respectively, wherein said four driving signals
have the same frequency, the duty cycle of two of said four driving
signals is smaller than 50% and the duty cycle of the other two of
said four driving signals is larger than 50%.
2. The DC/AC inverter, as recited in claim 1, further comprising a
protection circuit electrically connected to said driver circuit in
which said protection circuit comprises at least two timers for
being operative to selectively alter said driving signals depending
on a conduction state of said load and an output of said
timers.
3. The DC/AC inverter, as recited in claim 2, further comprising a
pulse width modulator electrically connected to said driver circuit
for providing a pulse width modulation signal to said driver
circuit to generate said four driving signals.
4. The DC/AC inverter, as recited in claim 3, wherein said
frequency generator is electrically connected to said pulse width
modulator and said driver circuit and provides a triangular wave
signal and a pulse signal, both of which have the same frequency,
to said pulse width modulator and said driver circuit respectively
such that said pulse width modulator generates said pulse width
modulation signal depending on said triangular wave signal.
5. The DC/AC inverter, as recited in claim 3, wherein said pulse
width modulator comprises: an error amplifier; a resistor
electrically connected an inverting input of said error amplifier;
a capacitor having one end electrically connected to said resistor
and said inverting input of said error amplifier to form an
inverting integrator; a comparator having a non-inverting input
electrically connected to an output terminal of said error
amplifier and the other end of said capacitor; a switch; and a
current controlled source electrically connected to said inverting
input of said error amplifier through said switch.
6. The DC/AC inverter, as recited in claim 3, further comprising a
dimming control circuit electrically connected to said pulse width
modulator for providing a dimming pulse signal to control whether
said pulse width modulator provides said pulse width modulation
signal.
7. The DC/AC inverter, as recited in claim 6, wherein said dimming
control circuit comprises: a dimming frequency generator being
operative of providing a triangular wave signal; and a comparator
having a non-inverting input electrically connected to said dimming
frequency generator for receiving said triangular wave signal and
an inverting input electrically connected a dimming control voltage
such that said comparator compares said dimming control voltage
with said triangular wave signal to generate said dimming pulse
signal.
8. The DC/AC inverter, as recited in claim 1, further comprising a
timer and a pulse width modulator in which said pulse width
modulator is coupled to said timer and said driver circuit for
providing a pulse width modulation signal to said driver circuit to
generate said driving signals, said timer comprises: a current
source; a capacitor electrically connected to said current source
for being charged by said current source; and a comparator
electrically connected to said capacitor and a reference voltage,
wherein said timer delivers a reset signal to reset said pulse
width modulator when a voltage of said capacitor is lower than said
reference voltage and said pulse width modulator starts to work
when said voltage of said capacitor is high than said reference
voltage.
9. The DC/AC inverter, as recited in claim 1, further comprising a
current detecting circuit electrically connected to said load for
being operative to providing a signal indicative of a conduction
state of said load and another signal indicative of a current
passing through said load.
10. The DC/AC inverter, as recited in claim 9, further comprising a
voltage detecting circuit electrically connected to said load for
providing a signal indicative of a terminal voltage of said
load.
11. The DC/AC inverter, as recited in claim 10, further comprising
a protection circuit being capable of receiving said signal
indicative of said conduction state of said load and said signal
indicative of said terminal voltage of said load, in which said
protection circuit comprises a control circuit having a timing
control function, in which said protection circuit generates an
indicative signal to said control circuit when said voltage or said
current of said load is within a predetermined state and delivers a
altering signal to said driver circuit wherein said driver circuit
outputs a signal to alter an output of said driver circuit while
said indicative signal remains for a predetermined period.
12. The DC/AC inverter, as recited in claim 11, wherein said driver
circuit receives said altering signal to control said full-bridge
switch circuitry not to provide the power of said DC voltage to
said resonant tank.
13. The DC/AC inverter, as recited in claim 11, wherein said
protection circuit further comprises a comparator which receives
said signal indicative of said conduction state of said load to
provide a control signal to said frequency generator such that said
frequency generator determines said pulse signal operated at one of
said predetermined operating frequencies depending on said control
signal.
14. A controller comprises: a frequency generator for being
operative to generate a pulse signal at one of least two
predetermined operating frequencies depending on a control signal
of said controller; a pulse width modulator coupled to said
frequency generator for providing a pulse width modulation signal
based on said pulse signal; a driver circuit coupled to said pulse
width modulator for providing at least one driving signals based on
said pulse width modulation signal; a protection circuit
electrically connected to said driver circuit comprising a timing
circuit, wherein said protection circuit receives at least one
external signals and a result of said timers to selectively alter
said driving signals.
15. The controller, as recited in claim 14, wherein said timing
circuit has at least two timers to provide a reset signal and a
time out signal in which said reset signal enables any circuit
receiving said reset signal to reset said circuit and said time out
signal enables any circuit receiving said time out signal to start
said circuit.
16. The controller, as recited in claim 14, wherein said driver
circuit provides four driving signals having the same frequency in
which the duty cycle of two of said four driving signals is smaller
than 50% and the duty cycle of the other two of said four driving
signals is larger than 50%.
17. A timer applied to a power supply circuit comprising a driver
circuit, a protection circuit, and a detection circuit, said timer
comprises: a voltage generator generating a voltage varying with
time; and at least two comparators, each of said two comparators
electrically connected to a reference voltage and said voltage
varying with time respectively to generate a comparative signal to
at least one circuits of said power supply circuit, wherein a first
comparative signal of said comparative signal is a reset signal
such that any circuit receiving said reset signal is enabled to be
reset.
18. The timer, as recited in claim 17, wherein said power supply
circuit further comprises a pulse width modulation circuit, a power
switch circuitry, and a resonant tank in which said pulse width
modulation circuit provides a pulse width modulation signal to said
driver circuit to control said power switch circuitry and said
power switch circuitry is electrically connected to said resonant
tank.
19. The timer, as recited in claim 18, wherein said at least one
circuits receiving said reset signal is one of said protection
circuit, said pulse width modulation circuit, and a combination
thereof.
20. The timer, as recited in claim 17, wherein a second comparative
signal of said comparative signal is a time out signal such that
any circuit receiving said time out signal is enabled to be
started.
21. The timer, as recited in claim 20, wherein said protection
circuit receives said time out signal.
22. The timer, as recited in claim 17, wherein said voltage
generator comprises a capacitor and a current source in which a
voltage across said capacitor is charged by said current source
such that said voltage across said capacitor is varying with
time.
23. The timer, as recited in claim 22, further comprises a switch
in parallel with said capacitor such that said switch is turned on
to discharges of said capacitor when a power source supplying power
to said power supply circuit is lower than a predetermined
value.
24. A protection circuit applied to a power supply circuit
comprising a timer, a driver circuit, and a detection circuit,
comprises: a logic control circuit being started after receiving a
time out signal generated by said timer; and at least one
comparators, each of said comparators coupling to at least one
circuits of said power supply circuit and a reference voltage for
comparing a electrical signal of said at least one circuits with
said reference voltage to generate a comparative signal to said
logic control circuit, wherein said logic control circuit outputs a
stopping output signal to said driver circuit to control a power
switch circuitry stopping an output of a power source when said
comparative signal is an indicative signal of a predetermined
state.
25. The protection circuit, as recited in claim 24, wherein said
power supply circuit further comprises a resonant tank, a pulse
width modulation circuit, a power switch circuitry, and a frequency
generator in which said frequency generator generates a pulse
signal to said pulse width modulator, said pulse width modulator
provides a pulse width signal to said driver circuit to control
said power switch circuitry, and said power switch circuitry is
electrically connected to said resonant tank.
26. The protection circuit, as recited in claim 25, wherein said
frequency generator alters an operating frequency of said pulse
signal after receiving said indicative signal to indicate a
predetermined state.
27. The protection circuit, as recited in claim 24, wherein said
logic control circuit receives at lease one pulse signals generated
by a frequency generator such that said logic control circuit
delivers out said stopping output signal when said comparative
signal is said indicative signal to indicate a predetermined state
for a duration counted with operating frequency of said pulse
signal for a predetermined period.
28. The protection circuit, as recited in claim 24, wherein said
timer further generates a rest signal such that said protection
circuit receives said rest signal to be reset.
29. A frequency generator applied to a power supply circuit,
comprises: a micro control unit being capable of generating at
least one sets of a plurality of first pulse signals having the
same frequency but different phases according to a frequency
control signal and generating at least one adjustable pulse signals
according to a pulse width modulation signal; a direct digital
synthesizer being capable of receiving said first pulse signals to
generate corresponding signals; and a switch electrically coupled
to said micro control unit for controlling an output of said at
least one adjustable pulse signals.
30. The frequency generator as recited in claim 29, wherein said
micro control unit further receives an external timing signal to
generate said first pulse signals at a frequency that is a multiple
of a frequency of said external timing signal.
31. The frequency generator as recited in claim 30, wherein said
signals generated by said direct digital synthesizer are one of
triangular waves, ramp waves, and sawtooth waves.
32. The frequency generator as recited in claim 30, wherein said
signals generated by said direct digital synthesizer are provided
to corresponding power supplies or pulse width modulators.
33. The frequency generator as recited in claim 29, wherein said
first pulse signals are provided to corresponding power supplies or
driver circuits.
34. The frequency generator as recited in claim 29, wherein said
control signal is outputted from an output terminal of an OR gate,
wherein an AND gate receives plural state signals and said OR gate
receives an output signal of said AND gate and a time out
signal.
35. The frequency generator as recited in claim 29, wherein said
micro control unit further generates at least one set of second
pulse signals having the same operating frequency with a operating
frequency of said adjustable pulse signals to be a frequency
reference for a circuit which is electrically connected to said
frequency generator.
36. A DC/AC inverter for transforming a DC power source to a AC
power source, which drives a load, said DC/AC inverter, comprising:
a half-bridge switch circuitry electrically connected to said DC
power source for being operative to convert said DC voltage to a
pulse signal; a resonant tank electrically connected between said
half-bridge switch circuitry and said load for transforming said
pulse signal to said AC power supplied to said load; a controller
comprising a protection circuit having at least two timers and
generating a pulse signal having at one of least two predetermined
operating frequencies based on an operation state of said DC/AC
inverter, and altering pulse wide of said pulse signal based on
said timers, and a driver circuit coupling to said controller for
being operative to providing two driving signals for turning on and
off said half-bridge switch circuitry in which the duty cycles of
said two driving signals are varied based on said pulse signal
provided by said controller.
37. The DC/AC inverter as recited in claim 36, wherein two driving
signals have the same duty cycle but 180.degree. phase shift.
38. The DC/AC inverter as recited in claim 36, wherein a power
switch of said half-bridge switch circuitry which is electrically
connected to said DC power source is a PMOS power switch and
another power switch of said half-bridge switch circuitry is a NMOS
power switch.
39. The DC/AC inverter as recited in claim 38, further comprising a
protection circuit electrically connected to said driver circuit in
which said protection circuit comprises at least two timers for
being operative to alter said driving signals depending on a
conduction state of said load and an output of said timers.
40. The DC/AC inverter as recited in claim 39, further comprising a
pulse width modulator electrically connected to said driver circuit
for providing a pulse width modulation signal and said driver
circuit generating said driving signals according to said pulse
width modulation signal.
41. The DC/AC inverter as recited in claim 40, wherein said
frequency generator electrically connected to said pulse width
modulator and said driver circuit for providing a triangular wave
signal and a pulse signal to said pulse width modulator and said
driver circuit respectively such that said pulse width modulator
generates said pulse width modulation signal depending on said
triangular wave signal.
42. The DC/AC inverter, as recited in claim 40, wherein said pulse
width modulator comprises: an error amplifier; a resistor
electrically connected an inverting input of said error amplifier;
a capacitor having one end electrically connected to said resistor
and said inverting input of said error amplifier to form an
inverting integrator; a comparator having a non-inverting input
electrically connected to an output terminal of said error
amplifier and the other end of said capacitor; a switch; and a
current controlled source electrically connected to said inverting
input of said error amplifier through said switch.
43. The DC/AC inverter, as recited in claim 40, further comprising
a dimming control circuit electrically connected to said frequency
generator for providing a dimming pulse signal to control whether
said pulse width modulator provides said pulse width modulation
signal.
44. The DC/AC inverter, as recited in claim 43, wherein said
dimming control circuit comprises: a dimming frequency generator
being operative of providing a triangular wave signal; and a
comparator having a non-inverting input electrically connected to
said dimming frequency generator for receiving said triangular wave
signal and an inverting input electrically connected a dimming
control voltage such that said comparator compares said dimming
control voltage with said triangular wave signal to generate said
dimming pulse signal.
45. The DC/AC inverter, as recited in claim 44, further comprising
a timer and a pulse width modulator in which said pulse width
modulator is coupled to said timer and said driver circuit for
providing a pulse width modulation signal to said driver circuit to
generate said driving signals, said timer comprises: a current
source; a capacitor electrically connected to said current source
for being charged by said current source; and a comparator
electrically connected to said capacitor and a first reference
voltage, wherein said timer delivers a reset signal to reset said
pulse width modulator when a voltage of said capacitor is lower
than said first reference voltage and said pulse width modulator
starts to work when said voltage of said capacitor is high than
said first reference voltage.
46. The DC/AC inverter, as recited in claim 36, further comprising
a current detecting circuit electrically connected to said load for
being operative to providing a signal indicative of a conduction
state of said load and another signal indicative of a current
passing through said load.
47. The DC/AC inverter, as recited in claim 46, further comprising
a voltage detecting circuit electrically connected to said load for
providing a signal indicative of a terminal voltage of said
load.
48. The DC/AC inverter, as recited in claim 47, further comprising
a protection circuit being capable of receiving said signal
indicative of said conduction state of said load and said signal
indicative of said terminal voltage of said load, in which said
protection circuit comprises a control circuit having a timing
control function, in which said protection circuit generates an
indicative signal to said control circuit when said voltage or said
current of said load is within a predetermined state and delivers a
altering signal to said driver circuit wherein said driver circuit
outputs a signal to alter an output of said driver circuit when
said indicative signal remains for a predetermined period.
49. The DC/AC inverter, as recited in claim 48, wherein said driver
circuit receives said altering signal to control said half-bridge
switch circuitry not to provide the power of said DC voltage to
said resonant tank.
50. The DC/AC inverter, as recited in claim 48, wherein said
protection ircuit further comprises a comparator which receives
said signal indicative of said conduction state of said load to
provide a control signal to said frequency generator such that said
frequency generator determines said pulse signal operated at which
one of said predetermined operating frequencies depending on said
control signal.
Description
CROSS REFLERENCE TO RELATED APPLICATIONS
[0001] The present application is a continuation-in-part
application of U.S. Ser. No. 10/968,857, filed Oct. 18, 2004.
BACKGROUND OF THE PRESENT INVENTION
[0002] 1. Field of Invention
[0003] The present invention relates to a DC/AC inverter for
driving a cold cathode fluorescent lamp (CCFL) used as a backlight
of a liquid crystal display (LCD), and more particularly to a DC/AC
inverter for controlling a plurality of power switches to drive a
plurality of fluorescent lamps.
[0004] 2. Description of Related Arts
[0005] As liquid crystal displays (LCDs) are thinner than
conventional cathode ray tube (CRT) monitors, they are being used
in more and more homes and public display. However, since LCD is
operated by its optical rotation and optical characteristic to
display image and text information, hence not illuminable, it
requires an additional backlight source. An example of backlight
source for LCD is a fluorescent lamp.
[0006] A typical DC/AC inverter utilizes a full-bridge inverter
circuit, along with a resonant tank and a step-up transformer. A DC
power input can be filtered and converted to a high AC voltage by
the resonant tank and the step-up transformer, so as to drive the
fluorescent lamp.
[0007] In order to stabilize the light emitted by the fluorescent
lamp, and prevent a change in light intensity while there is a
change in the power input voltage, most inverters are incorporated
with negative feedback circuits for stabilizing the current in the
fluorescent lamp. As the life-span of the fluorescent lamp is
affected by the symmetry of the waveform of the current, it is most
popular to use a full-bridge inverter to drive a fluorescent
lamp.
[0008] Referring to FIG. 1A of the drawings, a conventional
full-bridge inverter is illustrated. As shown in FIG. 1A, a
full-bridge inverter 100 comprises a DC power source 101, a
resonant tank 102, a fluorescent lamp 103, four NMOS power switches
104A, 104B, 104C and 104D. The resonant tank 102 comprises an
inductor 105 and a resonant capacitor 106. The four NMOS power
switches 104A, 104B, 104C and 104D are respectively driven by four
driving signals V.sub.G1, V.sub.G2, V.sub.G3, and V.sub.G4 to
control the conduction period and the non-conduction period of four
power switches 104A, 104B, 104C and 104D. The DC power source 101
is electrically connected to the power switches 104A, and 104D of
the full-bridge switch circuitry 104. The NMOS power switches 104B,
and 104C of the full-bridge switch circuitry 104 are grounded. An
output terminal A of the power switches 104A, 104B and an output
terminal B of the power switches 104C, 104D are electrically
connected to two input terminals of the resonant tank 102
respectively. An output terminal C of the resonant tank 102 is
electrically connected to one end of the fluorescent lamp 103.
[0009] Conventional full-bridge inverter 100 is operated based on
the a high frequency alternative conduction between the four power
switches 104A, 104B, 104C and 104D, such that the DC voltage
V.sub.DC output by the DC power source 101 is transformed to
outputted as a high-frequency AC square wave, which is provided for
being inputted to the resonant tank 102. The resonant tank 102
utilizes the filter characteristic of the inductor 105 and the
capacitor 106 to transform the high-frequency AC square wave to a
high frequency AC sine wave, which is supplied to the fluorescent
lamp 103.
[0010] As mentioned before, the four NMOS power switches 104A,
104B, 104C and 104D are respectively driven by four driving signals
V.sub.G1, V.sub.G2, V.sub.G3, and V.sub.G4 to control the
conduction period and the non-conduction period of four NMOS power
switches 104A, 104B, 104C and 104D. The four driving signals
V.sub.G1, V.sub.G2, V.sub.G3, and V.sub.G4 are square waves, which
have the same fixed frequency, the same duty cycle, but different
phases. Generally speaking, the duty cycle of the four driving
signals V.sub.G1, V.sub.G2, V.sub.G3, and V.sub.G4 is a little
smaller than 50%. Conventional fixed-frequency phase-shift control
technique shifts different phases of the four driving signals
V.sub.G1, VG.sub.2, V.sub.G3, and V.sub.G4 to generate different
power output. Referring to FIGS. 1B and 1C of the drawings, FIGS.
1B and 1C illustrate representative waveforms present in the
circuit of FIG. 1A. The driving signals V.sub.G1, V.sub.G2 must
keep 180.degree. phase shift in order to avoid simultaneous
conduction of the power switches 104A, 104B. Also, the driving
signals V.sub.G3, V.sub.G4 must keep 180.degree. phase shift in
order to avoid simultaneous conduction of the power switches 104C,
104D. The phase shift between the driving signals V.sub.G1,
V.sub.G3 as shown in FIG. 1B is smaller than the phase shift
between the driving signals V.sub.G1, V.sub.G3 as shown in FIG. 1C,
such that the output V.sub.AB of the full-bridge switch circuitry
104 as shown in FIG. 1B has a greater duty cycle to generate more
power output.
[0011] This conventional type of full-bridge inverter can stably
control the current of a fluorescent lamp. But on liquid-crystal
display application, the DC voltage supplied by the system only
reaches to teen volts. However, The full-bridge inverter as shown
in FIG. 1A needs a voltage of several hundred volts to start
operating.
[0012] As shown in FIG. 1A, the full-bridge inverter 100 utilizes
NMOSFETs as four power switches to convert the DC voltage V.sub.DC
to a high-frequency AC square wave, therefore, the driving signals
V.sub.G1 and V.sub.G4 respectively with respect to the voltage at
the output terminal A and the voltage at the output terminal B have
to be appropriately increased in order to turn on the power switch
104A or the power switch 104D. As a result, an additional step-up
circuit is required to boost the driving signals V.sub.G1 or
V.sub.G4, however, circuit design is difficult and complicated.
[0013] Therefore, the present invention is to provide a DC/AC
driver apparatus for driving cold cathode fluorescent lamps.
SUMMARY OF THE PRESENT INVENTION
[0014] A main object of the present invention is to provide a DC/AC
inverter for driving a backlight fluorescent lamp of a LCD,
especially for a plurality of DC/AC inverters designed for driving
a plurality of fluorescent lamps, wherein the DC/AC inverter
utilizes a set of driving signals to alternatively turn on and off
NMOS power switches and PMOS power switches for lowering DC voltage
ripple and in turn lowering noise caused by system ripples.
[0015] Another object of the present invention is to provide a
DC/AC inverter for driving a backlight fluorescent lamp of a LCD,
especially for a plurality of DC/AC inverters designed for driving
a plurality of fluorescent lamps, wherein the DC/AC inverter
utilizes less power switches and a set of driving signals to
alternatively turn on and off NMOS power switches and PMOS power
switches for lowering DC voltage ripple is produced, which in turn
lowers noise caused by system ripples caused by switching of power
switches.
[0016] Another object of the present invention is to provide a
DC/AC inverter for driving a backlight fluorescent lamp of a LCD,
which utilizes driving signals to directly drive power switches
without step-up circuits. Therefore, the DC/AC inverter has
advantages of easy circuit design and lower manufacturing cost.
[0017] Another object of the present invention is to provide a
plurality of DC/AC inverters for driving a plurality of fluorescent
lamps such that the DC/AC inverters can utilize a frequency
generator to generate a plurality of driving signals having the
same frequency but different phases, which are applied to a
plurality of fluorescent lamps, such that the fluorescent lamps can
be driven by the plurality of signals having the same frequency but
different phases.
[0018] Another object of the present invention is to provide two
sets of DC/AC inverters such that the DC/AC inverters can provide
two sets of driving signals, which are applied to drive half-bridge
power switch circuit and have the symmetric waveform of the duty
cycle, such that two sets of the power switches would not be
conducted simultaneously for lowering DC voltage ripple.
[0019] Accordingly, in order to accomplish the above objects, the
present invention provides a DC/AC inverter for transforming a DC
power source to a AC power source, which drives a load, the DC/AC
inverter comprising:
[0020] a full-bridge switch circuitry electrically connected to
said DC power source being operative to convert said DC voltage to
a pulse signal, said full-bridge switch circuitry comprising a
first power switch, a second power switch, a third power switch,
and a fourth power switch;
[0021] a resonant tank electrically connected between said
full-bridge switch circuitry and said load for being operative to
boost and filter said pulse signal to generate an AC power supplied
to said load;
[0022] a frequency generator for being operative to generate a
pulse signal having at least two predetermined operating
frequencies, wherein said frequency generator outputs said pulse
signal having one of said predetermined operating frequencies based
on an operation state of said DC/AC inverter; and
[0023] a driver circuit coupling to said frequency generator and
providing four driving signals based on said pulse signal of said
frequency generator for turning on and off said first power switch,
said second power switch, said third power switch, and said fourth
power switch respectively, wherein said four driving signals have
the same frequency, the duty cycle of two of said four driving
signals is smaller than 50% and the duty cycle of the other two of
said four driving signals is larger than 50%.
[0024] These and other objectives, features, and advantages of the
present invention will become apparent from the following detailed
description, the accompanying drawings, and the appended
claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0025] FIG. 1A illustrates a conventional full-bridge inverter.
[0026] FIGS. 1B and 1C illustrate representative waveforms present
in the circuit of FIG. 1A.
[0027] FIG. 2 illustrates the circuitry of the DC/AC inverter
according to the preferred embodiment of the present invention.
[0028] FIG. 3 illustrates representative waveforms present in the
circuit of FIG. 2.
[0029] FIG. 4 illustrates a circuitry of the driver circuit
according to the above-preferred embodiment of the present
invention.
[0030] FIG. 5 illustrates the timing diagram for the driver circuit
according to the above-preferred embodiment of the present
invention.
[0031] FIG. 6 illustrates a circuitry of a frequency generator used
to be provided for driving N number of DC/AC inverters according to
another preferred embodiment of the present invention.
[0032] FIG. 7 illustrates the circuitry of the DC/AC inverter
according to another preferred embodiment of the present
invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0033] Referring to FIG. 2 of the drawings, a circuitry of a DC/AC
inverter according to the preferred embodiment of the present
invention is illustrated. As shown in the drawing, an inverter
controller 200 comprises a DC power source 201, a set of MOS power
switch 202, a resonant tank 203, a fluorescent lamp 204, a current
detecting circuit 205, a voltage detecting circuit 206, a pulse
width modulator 207, a frequency generator 208, a driver circuit
209, a protection circuit 210, a timer 211 and a dimming control
circuit 212. The DC power source 201 is coupled to the power switch
202. An output of the set of power switch 202 is coupled to an
input of the resonant tank 203. An output of the resonant tank 203
is coupled to one end of the fluorescent lamp 204. In this
invention, the resonant tank 203 could be any type of the
transformer such as Meg-transformer and Piezo-transformer but could
not be limited to any type of the transformer. The resonant tank
203 further comprises a step-up transformer 221 and resonant
capacitors 222, 223, and 224. In this preferred embodiment, the
resonant tank 203 having a low Q factor can be used so as to
provide easy designing of the circuitry.
[0034] Under such a circuitry design, the signals for driving the
step-up transformer 221 and the fluorescent lamp 204 are neither
pure square waves nor pure sine waves. The signals for driving the
step-up transformer 221 and the fluorescent lamp 204 are quasi sine
waves or quasi-square waves. FIG. 3 of the drawings illustrates the
voltage waveforms at different positions under the power transfer
route design according to the preferred embodiment.
[0035] In FIG. 3 of the drawings, S51 is the output signal of the
power switches 202A, 202B of the set of power switch 202, S52 is
the input signal of the step-up transformer 221, and S16 is the
fluorescent lamp driving signal output by the step-up transformer
221.
[0036] The current detecting circuit 205 and the voltage detecting
circuit 206 are coupled to the ends of the fluorescent lamp 204
respectively. The current detecting circuit 205 is also
electrically connected to the pulse width modulator 207, wherein
the pulse width modulator 207 is also electrically connected to the
frequency generator 208 and the driver circuit 209. The driver
circuit 209 is coupled to the set of power switch 202, forming a
control loop connection.
[0037] The set of power switch 202 comprises four power switches
202A, 202B, 202C, and 202D. The power switches 202A and 202C could
be PMOS power switches. The power switches 202B and 202D could be
NMOS power switches. Nevertheless, the four power switches 202A,
202B, 202C, and 202D are not limited to MOS power switches. The
four power switches 202A, 202B, 202C, and 202D also could be any
type transistor switch such as NPN-type BJT or PNP-type BJT.
[0038] The frequency generator 208 generates a triangular wave
signal S1 and a pulse signal S2, wherein both signals have the same
frequency. However, the present invention is not limited to the use
of triangular wave signals, where all ramp signals and sawtooth
wave signals are applicable.
[0039] The current detecting circuit 205 is in series to the
fluorescent lamp 204 to provide a signal S3 for indicating the
conduction state of the fluorescent lamp 204 and to utilize a
signal S4 to show the current value of the current flowing through
the fluorescent lamp 204. The voltage detecting circuit 206
utilizes the resonant capacitors 223, and 224 of the resonant tank
203 to obtain a signal S5 for indicating a terminal voltage of the
fluorescent lamp 204.
[0040] The pulse width modulator 207 comprises an inverting
integrator and a comparator 264, wherein the inverting integrator
comprises an error amplifier 261, a resistor 262, and a capacitor
263. The pulse width modulator 207 also comprises a current
controlled source 265, which is electrically connected to an
inverting input of the error amplifier 261 through a switch
266.
[0041] The protection circuit 210 comprises a logic control circuit
272, wherein the protection circuit 210 receives the signal S3, the
signal S5 and an output signal S6 of the error amplifier 261 in the
pulse width modulator 207.
[0042] The timer 211 comprises two comparators 281 and 282, and a
current source 283. The dimming control circuit 212 comprises a
dimming frequency generator 291 for generating a dimming triangular
signal S7. The dimming triangular signal S7 is transmitted to a
non-inverting input of a comparator 293, and a dimming control
voltage S8 is transmitted to an inverting input of the comparator
293. After comparison, a dimming pulse signal S9 is generated. The
dimming control circuit 212 further comprises an OR gate 296. The
outputting timing of a dimming voltage S20 to the pulse width
modulator 207 is controlled through the switch 235 controlled by
dimming pulse signal S9 and the switch 236.
[0043] The driver circuit 209 receives an output signal S15 of the
pulse width modulator 207, the pulse signal S2 of the frequency
generator 208, and an output signal S18 of the protection circuit
210 to generate four driving signals POUT1, POUT2, NOUT1, and NOUT2
so as to control the power switches 202A, 202B, 202C, and 202D
respectively.
[0044] According to the preferred embodiment of the present
invention, the timer 211 functions in a manner that a capacitor 284
is being charged by the current source 283, such that a capacitor
voltage S12 of the capacitor 284 increases as time increases.
Before the capacitor voltage S12 reaches a first reference voltage
Vref1, a reset signal S11 is sent out. Furthermore, when the
capacitor voltage S12 reaches a second reference voltage Vref2, a
time out signal S10 will be sent out. The reset signal S11 could be
utilized as a reset signal to reset any analog circuitry and
digital circuitry of the system such as the pulse width modulator
207 and the logic control circuit 272 at a proper time.
[0045] The current source 283 is controlled by a power control
signal S13, such that when the voltage 201 of the system is lower
than a third reference voltage Vref3, the current source 283 will
be cut off and the capacitor voltage of the capacitor 284 is
grounded through a transistor 285 which is controlled by the power
control signal S13. Through such design, when the system starts up
the DC power source 201 from a zero voltage, the capacitor 284 of
the timer 211 is always charged from zero voltage.
[0046] According to the preferred embodiment of the present
invention, the frequency generator 208 is also controlled by a
signal S14, indicating whether or not the fluorescent lamp is
conducted. When the fluorescent lamp is conducted, an operating
frequency is sent out. And when the fluorescent lamp is not
conducted, a start-up frequency is sent out. An advantage of such
design is that the system can be operated around the resonance
frequency, whether or not the fluorescent lamp is conducted, such
that the system is operated efficiently even though the resonance
frequency of the resonant tank 203 is different due to the
conduction state of the fluorescent lamp.
[0047] The signal S14 is determined by the signal S3 provided by
the current detecting circuit 205, and a comparator 274 of the
protection circuit 210, such that when the signal S3 exceeds a
fourth reference voltage Vref4, the fluorescent lamp 204 is
considered as being conducted.
[0048] Under normal circumstances, the detailed operation
procedures according to the preferred embodiment of the present
invention are as follows:
[0049] After starting up the system, the timer 211 starts to charge
the capacitor 284. Before the capacitor voltage reaches the first
reference voltage Vref1, the timer 211 sends out the reset signal
S11 that passes through an OR gate 267 to turn on a switch 266.
Therefore, the current source 265 is connected to the inverting
input of the error amplifier 261, forcing an inverting input
voltage of the error amplifier 261 to be higher than a fifth
reference voltage Vref5, which in turn forces the output of the
error amplifier 261 to be zero. As a result, the duty cycle of a
pulse width modulation signal S15 outputted by the pulse width
modulator 207 becomes zero. Once the duty cycle of a pulse width
modulation signal S15 becomes zero and the pulse width modulation
signal S15 is delivered to the driver circuit 209, the duty cycle
of the driving signals NOUT1 and NOUT2 become zero such that the
corresponding power switches are turned off. When the driver
circuit 209 is under normal operation, the duty cycle of two of the
four power switches 202A, 202B, 202C, and 202D is smaller than 50%
and the duty cycle of the other two of the power switches 202A,
202B, 202C, and 202D is greater than 50%. Under such design as
shown in FIG. 4, the duty cycle of the power switches 202A and 202C
is greater than 50% and the duty cycle of the power switches 202B
and 202D is smaller than 50% such that the system ripple could be
reduced and the duty cycles of the four driving signals are varied
based on the conduction state of the load.
[0050] When the capacitor 284 continues to be charged and the
capacitor voltage is greater than the first reference voltage
Vref1, the power switch 266 will be turned off. Therefore, the
pulse width modulator 207 is initialized, and because of the
fluorescent lamp 204 is not conducted, the non-inverting input
voltage of the error amplifier 261 will become lower than the fifth
reference voltage Vref5. The output signal S6 outputted by the
error amplifier 261 will increase under the negative feedback
theory. Hence, after comparing the output signal S6 with the
triangular wave signal SI, the comparator 264 of the pulse width
modulator 207 outputs the pulse width modulation signal S15. The
driver circuit 209 receives the pulse width modulation signal S15
and the pulse signal S2 so as to generate the driving signals
POUT1, POUT2, NOUT1, and NOUT2 to drive the power switches 202A,
202C, 202B, and 202D respectively.
[0051] Before the fluorescent lamp 204 being struck to conduct, a
voltage of the fluorescent lamp driving signal S16 will increase
due to the duty cycle of the pulse width modulation signal S15
being increased. Once the protection circuit 210 senses the signal
S5 exceeding a sixth reference voltage Vref6, the protection
circuit 210 sends out an over-voltage signal S17. The over-voltage
signal S17 turns on the switch 266 of the current source 265 via
the OR gate 267, so as to increase the voltage of the inverting
input of the error amplifier 261 and reduce the output signal S6 of
the error amplifier 261. Hence, the duty cycle of the pulse width
modulation signal S15 is decreased to decrease the amount of
electrical power input to the fluorescent lamp.
[0052] If the signal S5 is less than the sixth reference voltage
Vref6 due to the amount of electrical power inputted to the
fluorescent lamp being decreased, the switch 266 will be turned off
again to increase the output signal S6 of the error amplifier 261.
Accordingly, the fluorescent lamp driving signal S16 is stably
adjusted under such a negative feedback control.
[0053] As soon as the fluorescent lamp is struck to conduct by a
sufficient fluorescent lamp driving signal S1 6 for an enough time,
according to the characteristic of the fluorescent lamp, the
fluorescent lamp driving signal S16 will drop to less than half the
original voltage of the fluorescent lamp driving signal S16, such
that the voltage detecting circuit 206 loses its function due to a
non-detection of a higher voltage.
[0054] At the same time, the current detecting circuit 205 sends
out the signal S3 to the protection circuit 210 and the signal S4
to the pulse width modulator 207. When the signal S3 is higher than
the fourth reference voltage, the signal S14 alters the output
frequency of the frequency generator 208. The signal S4 could
stabilize the current flowing through the fluorescent lamp on a
pre-determined value through the negative feedback control.
[0055] The protection circuit 210 according to this embodiment can
function to prevent from damage caused by disconnection of
fluorescent lamp, the damage of fluorescent lamp, the power leakage
of the transformer, etc. The operation of the protection circuit
210 is described in detail as follows:
[0056] When the fluorescent lamp is not connected, the signal S5
will be continuously sent out to the logic control circuit 272 for
indicating that the terminal voltage of the fluorescent lamp
exceeds the sixth reference voltage Vref6. The logic control
circuit 272 will take no action until the time out signal S10 is
inputted. Once the time out signal S10 is sent to the logic control
circuit 272, and in the condition of the terminal voltage of the
fluorescent lamp exceeds the sixth reference voltage Vref6, a
digital timer in the logic control circuit 272 starts to count time
with the pulse signal S2 produced by the frequency generator 208.
If the terminal voltage of the fluorescent lamp still exceeds the
sixth reference voltage Vref6 over a predetermined period of time,
a terminating signal S18 will be outputted by the logic control
circuit 272 to the driver circuit 209, so as to cut off the
conduction of the NMOS power switches 202B and 202D.
[0057] If the fluorescent lamp is damaged during operation, a
current detecting circuit 205 will transmit the signal S3 for
indicating the non-conduction state of the fluorescent lamp 204.
Then the comparator 274 of the protection circuit 210 sends out the
signal S14, indicating that the fluorescent lamp is not conducted,
to the logic control circuit 272. Similarly, the logic control
circuit 272 will not take any action until the receiving the time
out signal S10. When the logic control circuit 272 receives the
time up signal S10, the logic control circuit 272, under the
condition of the signal S14 indicating that the fluorescent lamp is
not conducted, counts time with pulse signal S21 produced by the
low frequency dimming control circuit 212 by a digital timer
thereof.
[0058] If the fluorescent lamp still is not conducted over a
predetermined period of time, the logic control circuit 272 will
output the terminating signal S18 to the driver circuit 209, so as
to cut off the conduction of the power switches 202B and 202D.
[0059] Also, when the step-up transformer 221 encounters serious
damages, such as an overloading condition due to power leakage, the
entire system will be overloaded. Under such conditions, the error
amplifier 261 will continue to increase the outputting level of the
output signal S6 for providing a sufficient power to stabilize the
current of the fluorescent lamp. And if the maximum power provided
by-the system could not cover the power leakage, the output signal
S6 of the error amplifier 261 will definitely exceed the peak value
of the triangular wave signal S1. The protection circuit 210
compares the output signal S6 of the error amplifier 261 with a
reference voltage Vref7 whose value is slightly higher than the
peak value of the triangular wave signal S1, to obtain an
overloading signal S19, indicating whether or not the system is
overloaded.
[0060] Similarly, when the overloading signal S19 indicates that
the system is overloaded and the protection circuit 210 is started
by the time up signal S10 of the timer 211, the logic control
circuit 272 will count time with the pulse signal S2 produced by
the frequency generator 208. When the counted time also exceeds the
predetermined period of time, the logic control circuit 272 then
outputs the terminating signal S18 to the driver circuit 209,
cutting off the conduction of the power switches 202B and 202D.
[0061] According to the preferred embodiment of the present
invention, the inverter further has the dimming control circuit 212
provided for controlling the power to the fluorescent lamp. The
dimming control circuit 212 controls the timing to deliver power to
the fluorescent lamp with a frequency signal S7 that is lower than
the operation frequency of the fluorescent lamp, so as to adjust
the brightness of the fluorescent lamp. And, in order to avoid
generating flicker due to low frequency, the dimming frequency is
normally above 200 Hz.
[0062] The dimming control circuit 212 is controlled by two
signals, the first one being the signal S14 indicating whether or
not the fluorescent lamp is struck and the second one being the
time out signal S10 of the timer 211. Only when the signal S14
indicates that the fluorescent lamp is struck or the time out
signal S10 of the timer 211 is received, a switch 236 will be
turned on so as to output the dimming control signal.
[0063] A dimming control voltage S20 of the dimming control circuit
212 is higher than the reference voltage Vref5. When the dimming
control voltage S20 passes through the dimming control switches
235, 236 and a resistor 234 to the pulse width modulator 207, the
output signal S6 of the error amplifier 261 of the pulse width
modulator 207 is decreased to stop delivering power to the
fluorescent lamp. When the dimming control switch 235 is turned off
by the dimming pulse signal S9, the dimming voltage S20 could not
be sent to the pulse width modulator 207, and so the power will be
restart delivering to the fluorescent lamp again.
[0064] Brightness adjusting effect can be achieved by a low
frequency to control the ratio between the stopping and the
restarting of providing electrical power of each cycle. In order to
ensure that the fluorescent lamp has sufficient and continuous
electrical power so as to be struck in a predefined period of time,
the dimming control circuit 212 starts to operate after the
fluorescent lamp 204 is struck to conduct.
[0065] In order to provide a symmetric alternating current to drive
the fluorescent lamp 204, according to the preferred embodiment of
the present invention, the circuit design of the driver circuit 209
is shown in FIG. 4. Referring to FIG. 4 of the drawings, the input
signal of the input terminal PWM is corresponding to the pulse
width modulation signal S15 as shown in FIG. 2. A clock pulse is
corresponding to the pulse signal S2 as shown in FIG. 2. The input
signal of the input terminal PS (protection signal) is
corresponding to the output signal S18 of the protection circuit
210. The detailed operation according to the preferred embodiment
of the present invention is shown in FIG. 5. FIG. 5 is the timing
diagram for the driver circuit 209 according to the invention. When
the pulse width of the pulse width modulation signal S15 is
changed, the pulse widths of the driving signals POUT1, POUT2,
NOUT1 and NOUT2 are altered. As a result, the simultaneously
conducted periods of the power switches 202B and 202C controlled by
the driving signal NOUT1 and POUT2 are changed. Similarly, the
simultaneously conducted periods of the power switches 202D and
202A controlled by the driving signal NOUT2 and POUT1 are changed.
The dashed portion of FIG. 5 shows the change in operation periods
of the driving signals POUT1, NOUT1 and POUT2, NOUT2. Under normal
operation, while the two NMOS power switches 202B and 202D are
turned off, the two PMOS power switches 202A and 202C are
simultaneously turned on.
[0066] Under conventional fixed-frequency phase-shift control,
operations of the PMOS power switches simultaneously being
conducted and NMOS power switches simultaneously being conducted
exist at the same period and the conductions of PMOS and NMOS power
switches are asymmetric conduction. On the contrary, both NMOS
power switches and PMOS power switches are applied to this DC/AC
inverter in this invention and the power is stopped to provide to
the fluorescent lamp. Under this design, the two PMOS power
switches are turned on. Such design could avoid a floating in the
set of power switch 202 regardless of under normal operation and
protection operation (i.e.: the terminating signal S18 is sent out
to the driver circuit 209).
[0067] On the other hand, when the power is stopped to provide to
the fluorescent lamp, the present invention could be modified to
that the NMOS power switches 202B and 202D are turned on the two
PMOS power switches 202A and 202C are turned off. Such design also
has the same function of avoiding floating.
[0068] The present invention employs a frequency generator that
generates different phase signals at the same frequency as a
frequency source to drive the fluorescent lamps for more than two
fluorescent lamps.
[0069] Referring to FIG. 6 of the drawings, a frequency generator
used to be provided for driving N number of DC/AC inverters
according to this alternative embodiment of the present invention
is illustrated. The frequency generator 601 is utilized to replace
the function of the frequency generator 208 and the dimming control
circuit 212 so as to drive a plurality of fluorescent lamps. The
input of the frequency generator 601 can be an external clock pulse
602, which can be any one frequency relative to the control signal
of the LCD controller of the LCD display. The other input of the
frequency generator 601 is a frequency control signal 603.
[0070] As shown in FIG. 6, the frequency control signal 603
utilizes an AND gate 604 and an OR gate 605 to control the changing
of the operating frequency of the fluorescent lamps, according to
the conduction confirmation signals 606, 607, 608 . . . N
(referring to the fourth signal S14 as shown in FIG. 2), confirming
whether or not all the N number of fluorescent lamps are conducted,
or upon the outputting of a timer signal 609 (referring to the time
out signal S10 as shown in FIG. 2) by the timer.
[0071] Each of the triangular wave signals 610 (referring to the
triangular wave signal S1 as shown in FIG. 2) output by the
frequency generator 601 to each of the pulse width modulator has
the same frequency but different phase.
[0072] Each of the pulse signals 611 (referring to the pulse signal
S2 as shown in FIG. 2) output to each of the driver circuits, such
as full-bridge driver circuit, half-bridge driver circuit,
push-pull driver circuit, Royer driver circuit and any switching
type, has the same frequency as and in phase with the triangular
wave signals 610, respectively.
[0073] Such the frequency generator 601 can be achieved by a
conventional micro control unit (MCU) 621 and a direct digital
synthesizer (DDS) 622.
[0074] The micro control unit (MCU) 621 could provide a pulse
signal 636 (referring to the pulse signal S21 as shown in FIG. 2)
or a plurality of pulse signals having the same frequency but
different phases. The pulse signal 636 could be utilized to be a
synchronized signal for the inner circuitry of the micro control
unit (MCU) 621 and the frequency generator 601 in order to
implement the external brightness control. After another dimming
control input 631 (referring to the dimming control voltage S8 as
shown in FIG. 2) is input into the micro control unit (MCU) 621 of
the frequency generator 601, the micro control unit 621 produces a
dimming control signal 632 having the same frequency with the pulse
signal 636. The frequency control signal 603 controls the
conduction state of the switch 633, so as to control the outputting
time of the dimming control signal 632 to each of the DC/AC
inverters. A plurality of fluorescent lamps could utilize the
common dimming control signal 632 (or a plurality of dimming
control signals having the same frequency but different phases) to
make each of the fluorescent lamps have the same dimming frequency.
The dimming control signal 632 controlled by the switch 633 is
delivered to each pulse width modulator through each diode 637 and
each resistor 638. The diode 637 is utilized to avoid the feedback
interference caused by other pulse width modulators. The diode 637
could be neglected.
[0075] In addition, the micro control unit (MCU) 621 also provides
N sets of pulse signals 611 having the same frequency but different
phases to the direct digital synthesizer (DDS) 622 and external
circuits. The direct digital synthesizer (DDS) 622 receives the N
sets of pulse signals 611 to generate N sets of the triangular wave
signals 610 having the same frequency and the corresponding phase
with pulse signal 611 to external circuits. The above-mentioned
pulse signals 611 and triangular wave signals 610 could be
generated according to the external clock pulse 602. For example,
the external clock pulse 602 could be one frequency of display, the
frequency of the pulse signals 611 and the triangular wave signals
610 could be the multiple frequency of the external clock pulse 602
such that the interference from optical beam frequencies could be
avoided to display on the display so as to improve the quality of
the display.
[0076] Of course, it is not necessary that each pulse signal 611
has the different phase, and so do the triangular wave signals 610.
However, it just needs that the pulse signals 611 and triangular
wave signals 610 could be divided into at least two sets of driving
signals to reduce a voltage ripple of the system caused by
alternative conduction of power switches. As a result, the
frequency generator generates a plurality of driving signals having
the same frequency but different phases for lowering the voltage
ripple caused by switching of power switches. Furthermore, the
operating frequency is synchronized with the display so as to
reduce the visual noise caused by the interference of the beat
frequency.
[0077] In this present invention, the frequency generator
generating the signals with the same frequency but different phases
could not be limited to apply to a full-bridge DC/AC converter
which has four power switches. Under at least two sets of
fluorescent lamps conditions, such technique also could apply to a
half-bridge power supply circuit or another power supply circuit
having the same operating frequency such that the voltage ripple
and the visual noise could be reduced. Additionally, the timer and
the protection circuit in this present invention could also be
applied to any kind of power supply circuit but not limited to
DC/AC converter. Furthermore, in this invention the fluorescent
lamps are used for an example but any kind of discharge lamps or
loads could be applied with the technique disclosed by the
invention.
[0078] Referring to FIG. 7 of the drawings, a circuitry of a DC/AC
inverter according to another preferred embodiment of the present
invention is illustrated, wherein the DC/AC inverter is a
half-bridge DC/AC inverter. As shown in the drawing, an inverter
controller 700 comprises a DC power source 201, a half-bridge
switch circuitry 702, a resonant tank 203, a fluorescent lamp 204,
a current detecting circuit 205, a voltage detecting circuit 206, a
pulse width modulator 207, a frequency generator 208, a driver
circuit 709, a protection circuit 210, a timer 211 and a dimming
control circuit 212. The half-bridge switch circuitry 702 is
electrically connected to the DC power source 201. An output
terminal of the half-bridge switch circuitry 702 is electrically
connected to an input terminal of the resonant tank 203. An output
terminal of the resonant tank 203 is electrically connected to one
end of the fluorescent lamp 204. The resonant tank 203 further
comprises a step-up transformer 221 and resonant capacitors 222,
223, and 224. The series connection of the half-bridge switch
circuitry 702, the resonant tank 203 and the fluorescent lamp 204
is a typical example of a power transfer connection.
[0079] The operation principle of the preferred embodiment of the
present invention as shown in FIG. 7 is similar to that as shown in
FIG. 2. Therefore, some of the elements or components in FIG. 7 use
the same label in FIG. 2. The following description is for the
purposes of illustrating the functional and structural principles
in FIG. 7 that is not mentioned in FIG. 2.
[0080] In this embodiment, the half-bridge switch circuitry 702
comprises two power switches 702A and 702B. The power switch 702A
which is a PMOS power switch is electrically connected to a power
line. The power switch 702B which is a NMOS power switch is
electrically connected to the ground. Nevertheless, the two power
switches 702A and 702B are not limited to MOS power switches. The
two power switches 702A and 702B also could be any type transistor
switch such as NPN-type BJT or PNP-type BJT.
[0081] In order to provide an AC current with good symmetry to
drive the fluorescent lamp 204, in this embodiment, when the system
operates steadily, two power switches 702A and 702B of the
half-bridge switch circuitry 702 are alternately conducted with the
same duty cycle but shifted by 180 degrees. In other words, the
driver circuit 709 outputs two sets of driving signals with the
same duty cycle but shifted by 180 degrees.
[0082] One skilled in the art will understand that the embodiment
of the present invention as shown in the drawings and described
above is exemplary only and not intended to be limiting.
[0083] It will thus be seen that the objects of the present
invention have been fully and effectively accomplished. It
embodiments have been shown and described for the purposes of
illustrating the functional and structural principles of the
present invention and is subject to change without departure from
such principles. Therefore, this invention includes all
modifications encompassed within the spirit and scope of the
following claims.
* * * * *