U.S. patent application number 11/416989 was filed with the patent office on 2006-09-14 for integrated circuit substrate material.
Invention is credited to Arthur Fong, Marvin Glenn Wong.
Application Number | 20060202309 11/416989 |
Document ID | / |
Family ID | 34103580 |
Filed Date | 2006-09-14 |
United States Patent
Application |
20060202309 |
Kind Code |
A1 |
Wong; Marvin Glenn ; et
al. |
September 14, 2006 |
Integrated circuit substrate material
Abstract
A semiconductor substrate material is disclosed for producing a
semiconductor substrate. In an embodiment, the semiconductor
substrate material may include a multitude of hollow microspheres.
Each one of the multitude of hollow microspheres may have an inner
layer and an outer layer. The inner layer may include a first
material, the outer layer may include a second material, and the
first material and the second material may differ from one another.
The first material of the inner layer of each of the multitude of
hollow microspheres may have a first melting point, the second
material of the outer layer of the multitude of hollow microspheres
may have a second melting point, and the first melting point may be
higher than the second melting point.
Inventors: |
Wong; Marvin Glenn;
(Woodland Park, CO) ; Fong; Arthur; (Colorado
Springs, CO) |
Correspondence
Address: |
AGILENT TECHNOLOGIES, INC.;Legal Department, DL429
Intellectual Property Administration
P. O. Box 7599
Loveland
CO
80537-0599
US
|
Family ID: |
34103580 |
Appl. No.: |
11/416989 |
Filed: |
May 2, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10629271 |
Jul 29, 2003 |
|
|
|
11416989 |
May 2, 2006 |
|
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Current U.S.
Class: |
257/618 ;
257/701; 257/E21.04; 257/E29.079 |
Current CPC
Class: |
H01L 29/26 20130101;
C03C 11/002 20130101; C03C 14/00 20130101; C03C 11/00 20130101;
H01L 21/04 20130101; Y10T 428/2996 20150115 |
Class at
Publication: |
257/618 ;
257/701 |
International
Class: |
H01L 29/06 20060101
H01L029/06 |
Claims
1. A semiconductor substrate material for producing a semiconductor
substrate, the semiconductor substrate material comprising: a
multitude of hollow microspheres, each one of the multitude of
hollow microspheres having an inner layer and an outer layer, the
inner layer comprising a first material, the outer layer comprising
a second material, and the first material and the second material
differing from one another, wherein the first material of the inner
layer of each of the multitude of hollow microspheres has a first
melting point, wherein the second material of the outer layer of
the multitude of hollow microspheres has a second melting point,
and wherein the first melting point is higher than the second
melting point.
2. The semiconductor substrate material in accordance with claim 1,
wherein the multitude of hollow microspheres comprises a multitude
of gas filled glass microspheres, and wherein the second material
of the outer layer comprises a glass material, the inner layer of
each of the gas filled glass microspheres has the first melting
point, the outer layer of the glass material has the second melting
point, and the first melting point is higher than the second
melting point.
3. The semiconductor substrate material in accordance with claim 2,
wherein at least one of the multitude of gas filled glass
microspheres is sintered together with another one of the multitude
of gas filled glass microspheres.
4. The semiconductor substrate material in accordance with claim 2,
wherein a hardened matrix contains the gas filled glass
microspheres.
5. The semiconductor substrate material in accordance with claim 2,
further comprising a glaze is disposed on a top surface of the
semiconductor substrate.
6. The semiconductor substrate material in accordance with claim 5,
wherein the glass material of the outer layer of at least one of
the multitude of gas filled glass microspheres is sintered together
with the glass material of the outer layer of another one of the
multitude of gas filled glass microspheres.
7. The semiconductor substrate material in accordance with claim 2,
wherein the hardened matrix containing the multitude of hollow
microspheres comprises glass particles, a binder material, and a
viscosity modifier.
8. The semiconductor substrate material in accordance with claim 7,
wherein the binder material comprises at least one chosen from the
group consisting of ethyl cellulose, an acrylic, a polyvinyl
alcohol, an organic polymer, and a borophosphate glass.
9. The semiconductor substrate material in accordance with claim 7,
wherein the at least one viscosity modifier comprises at least one
chosen from the group consisting of a surfactant, an organic
thickener, a magnesium silicates thickening agent, and a filler
material.
10. The semiconductor substrate material in accordance with claim
2, wherein the semiconductor substrate forms a semiconductor
wafer.
11. The semiconductor substrate material in accordance with claim
2, wherein the semiconductor substrate forms an integrated circuit
die.
12. The semiconductor substrate material in accordance with claim
1, wherein the outer layer of at least one of the multitude of
hollow microspheres is sintered together with the outer layer of
another one of the multitude of hollow microspheres.
13. The semiconductor substrate material in accordance with claim
1, wherein a hardened matrix contains the multitude of
microspheres.
14. The semiconductor substrate material in accordance with claim
1, further comprising a glaze is disposed on a top surface of the
semiconductor substrate.
15. The semiconductor substrate material in accordance with claim
15, wherein the outer layer of at least one of the multitude of
hollow microspheres is sintered together with the outer layer of
another one of the multitude of hollow microspheres.
16. The semiconductor substrate material in accordance with claim
1, wherein the hardened matrix containing the multitude of hollow
microspheres comprises glass particles, a binder material, and a
viscosity modifier.
17. The semiconductor substrate material in accordance with claim
16, wherein the binder material comprises at least one chosen from
the group consisting of ethyl cellulose, an acrylic, a polyvinyl
alcohol, an organic polymer, and a borophosphate glass.
18. The semiconductor substrate material in accordance with claim
16, wherein the at least one viscosity modifier comprises at least
one chosen from the group consisting of a surfactant, an organic
thickener, a magnesium silicates thickening agent, and a filler
material.
19. The semiconductor substrate material in accordance with claim
1, wherein the semiconductor substrate forms a semiconductor
wafer.
20. The semiconductor substrate material in accordance with claim
1, wherein the semiconductor substrate forms an integrated circuit
die.
Description
REFERENCE TO PENDING PRIOR PATENT APPLICATION
[0001] This patent application is a continuation-in-part of pending
prior U.S. patent application Ser. No. 10/629,271, filed Jul. 29,
2003 by Marvin Glenn Wong et al. for INTEGRATED CIRCUIT SUBSTRATE
MATERIAL AND METHOD.
[0002] The above-identified patent application is hereby
incorporated herein by reference.
BACKGROUND
[0003] Electronic components, such as integrated circuits are
becoming more and more common in various devices. Under certain
circumstances, it is important for the integrated circuit substrate
to have various qualities or attributes. Often certain qualities
are balanced against other qualities. It is sometimes important for
the substrate to have low thermal conductivity, low mass, low cost,
low dielectric constant, high strength, etc. Depending upon the
application, some of these qualities may be less important than
others and the design team makes trade-offs to maximize the desired
qualities with the minimum weaknesses and costs.
[0004] Accordingly, there exists a need in the industry for
materials that can be used for integrated circuit substrates that
meet the different electrical and physical requirements of current
electronics.
SUMMARY OF THE INVENTION
[0005] In one embodiment, there is disclosed a semiconductor
substrate material for producing a semiconductor substrate, the
semiconductor substrate material comprising a multitude of hollow
microspheres, each one of the multitude of hollow microspheres
having an inner layer and an outer layer, the inner layer
comprising a first material, the outer layer comprising a second
material, and the first material and the second material differing
from one another, wherein the first material of the inner layer of
each of the multitude of hollow microspheres has a first melting
point, wherein the second material of the outer layer of the
multitude of hollow microspheres has a second melting point, and
wherein the first melting point is higher than the second melting
point.
[0006] Other embodiments are also disclosed.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] A more complete appreciation of this invention, and many of
the attendant advantages thereof, will be readily apparent as the
same becomes better understood by reference to the following
detailed description when considered in conjunction with the
accompanying drawings in which like reference symbols indicate the
same or similar components, wherein:
[0008] FIG. 1 illustrates a cross-sectional of a hollow microsphere
in accordance with an embodiment of the present invention;
[0009] FIG. 2 illustrates a cross-sectional of a slurry of hollow
microspheres in accordance with an embodiment of the present
invention;
[0010] FIG. 3 illustrates a cross-sectional of a hardened matrix of
hollow microspheres in accordance with an embodiment of the present
invention;
[0011] FIG. 4 illustrates a flow chart for manufacturing a
substrate in accordance with the embodiment of FIG. 3 of the
present invention;
[0012] FIG. 5 illustrates a cross-sectional of a fired matrix of
hollow microspheres in accordance with an embodiment of the present
invention;
[0013] FIG. 6 illustrates a flow chart for manufacturing a
substrate in accordance with the embodiment of FIG. 5 of the
present invention;
[0014] FIG. 7 illustrates a cross-sectional view of a glass-coated,
hollow microsphere in accordance with another embodiment of the
present invention;
[0015] FIG. 8 illustrates a cross-sectional view of a slurry of
glass-coated, hollow microspheres in accordance with another
embodiment of the present invention;
[0016] FIG. 9 illustrates a cross-sectional view of a dried matrix
of glass-coated, hollow microspheres in accordance with another
embodiment of the present invention;
[0017] FIG. 10 illustrates a flow chart for manufacturing a
substrate in accordance with the embodiment of FIG. 9 of the
present invention;
[0018] FIG. 11 illustrates a cross-sectional view of a fired matrix
of glass-coated, hollow microspheres in accordance with another
embodiment of the present invention;
[0019] FIG. 12 illustrates a cross-sectional view of a glazed
surface of a fired matrix of glass-coated, hollow microspheres in
accordance with another embodiment of the present invention;
and
[0020] FIG. 13 illustrates a flow chart for manufacturing a
substrate in accordance with the embodiments of FIGS. 5, 11 or 12
of the present invention.
DETAILED DESCRIPTION OF AN EMBODIMENT
[0021] As shown in the drawings for purposes of illustration, the
present invention relates to techniques for manufacturing a
integrated circuit substrate using ceramic, glass or glass-coated
ceramic, hollow microspheres to create a substrate is low thermal
conductivity, low dielectric constant, low electrical conductivity,
light weight and high strength.
[0022] Turning now to the drawings, FIG. 1 illustrates a
cross-section of a hollow microsphere 10. The hollow microsphere 10
may be made of ceramic or glass 20 and may have a hollow, gas
filled interior, such as any glass or ceramic microsphere
manufactured by 3M under the trade name microsphere, Zeeospheres,
Scotchlite glass bubbles, or other known glass or ceramic, hollow
microsphere of silica-alumina ceramic, alkali alumina silicate,
soda-lime-borosilicate, or other similar substance. The
microspheres may be of 1.0-225 micron in size, with a
200-1040.degree. C. melting temperature and externally coated with
binding materials to allow microsphere matrix wafer formation.
[0023] FIG. 2 shows microspheres 10 in a slurry matrix 40 composed
of an appropriate vehicle for the desired substrate applications.
For example, slurry matrix 40 may be composed of glass particles;
binders, such as ethyl celluose, acrylics, polyvinyl alcohols,
organic polymers; solvents, such as water, acetone, polyglycols;
viscosity modifiers, such as surfactants, organic thickeners or
other fillers as required to accomplish the desired substrate
characteristics for thermal conductivity, dielectric constant,
mass, strength, cost of materials and manufacture, etc.
[0024] FIG. 3 shows microspheres 10 in a dried or cured slurry
matrix 50. As is readily apparent in FIG. 3, the microspheres 10
have a random arrangement in the dried or cured slurry matrix 50.
FIG. 4 is a flow chart of a possible method to manufacture a
substrate according to FIGS. 1-3, in which microspheres 10 are
combined 12 with an appropriate matrix 40, dried or cured 14 until
the slurry matrix 40 hardens, and formed 16 into semiconductor
wafers or integrated circuit die 50. The slurry matrix 40 may be
dried or cured by heat, x-ray, high-energy radiation, electron
beam, microwave or by any other known drying or curing method. The
slurry matrix may be formed into wafers or die either before or
after the slurry matrix 40 is dried or cured. The slurry matrix 40
may be formed into wafers or die by means of die cutting, stamping,
powder pressing, lamination, etc. It should be noted that the
matrix of microspheres may be formed into wafers of integrated
circuit substrates prior to the drying step, in which case the
forming would be by means of doctor blade casting, mold casting,
etc.
[0025] FIG. 5 shows fired slurry matrix 60 with hollow microspheres
10. As shown in FIG. 6, this method would include combining 22 the
microspheres 10 with the matrix 60, firing 24 the slurry matrix and
forming 26 wafers or integrated circuit substrates of the matrix 60
containing microspheres 10. This process may more particularly
comprise ball milling or spraying to mix the microsphere matrix raw
materials 22, firing the microsphere matrix to sinter materials and
laser cutting, saw cutting, grinding, etc. to form the final wafer
form.
[0026] FIG. 7 show a cross-sectional view of a glass coated
microsphere 100 according to another embodiment of the present
invention. The microsphere 100 may include a high temperature glass
or ceramic hollow microsphere 120 that is coated with a low
temperature glass 130. The inner microsphere 120 may be any hollow,
gas filled interior, such as any glass or ceramic microsphere
manufactured by 3M under the trade name microsphere, Zeeospheres,
Scotchlite glass bubbles, or other known glass or ceramic, hollow
microsphere of silica-alumina ceramic, alkali alumina silicate,
soda-lime-borosilicate or other similar substance. The outer low
temperature glass coating 130 may be made by spray coating, slurry
coating, vapor deposition, etc. The composition of the inner
microsphere 120 and the other glass coating 130 may be selected
such that the outer glass coating 130 has a lower melting
temperature than the inner microsphere 120. By way of example only,
the glass-coated microspheres may be made of a microsphere of
approximately 10-250 microns in size with 500-1040.degree. C.
melting temperature and have an outer layer of glass of 1.0-10.0
microns in thickness with a 200-330.degree. C. melting
temperature.
[0027] FIG. 8 shows a cross-sectional view of glass-coated
microspheres 100 in a slurry matrix 140 composed of an appropriate
vehicle for the desired substrate applications. For example, slurry
matrix 140 may be composed of glass particles; binders, such as
borophosphate glass and polyvinyl alcohol binder; solvents, such as
water; viscosity modifiers, such as liquid surfactants or magnesium
silicates thickening agents or other fillers as required to
accomplish the desired substrate characteristics for thermal
conductivity, dielectric constant, mass, strength, cost of
materials and manufacture, etc.
[0028] FIG. 9 shows a cross-sectional view of glass-coated
microspheres 100 in a dried or cured slurry matrix 150. As is
readily apparent in FIG. 9, the glass-coated microspheres 100 have
a random arrangement in the dried or cured slurry matrix 150. FIG.
10 is a flow chart of a possible method to manufacture a substrate
according to FIGS. 7-9, in which glass-coated microspheres 100 are
combined 112 with an appropriate matrix 140, dried or cured 114
until the slurry matrix 140 hardens, and formed 1 16 into
semiconductor wafers or integrated circuit die 150. The slurry
matrix 140 may be dried or cured by heat, x-ray, high-energy
radiation, microwave, ultraviolet, radiation or by any other known
drying or curing method. The slurry matrix 140 may be formed into
wafers, integrated circuit substrates or die either before or after
the slurry matrix 140 is dried or cured. The slurry matrix 140 may
be formed into wafers or die by means of die cutting, stamping,
cutting, etc. It should be noted that the matrix of glass-coated
microspheres may be formed into wafers or integrated circuit
substrates prior to the drying step, in which case the forming
would be by means of knife coating (tape casting), mold casting,
calendaring, etc.
[0029] FIG. 11 shows cross-sectional view of fired glass-coated
microspheres 100. As shown in FIGS. 11-13, this method would
include firing 212 the glass-coated microspheres 100 and forming
214 wafers or integrated circuit substrates of the glass-coated
microspheres 100. The firing or sintering step 212 should be at a
temperature such that the outer glass-coating 130 of the
glass-coated microspheres melts and the microspheres 100 become
sintered or glued together 155. The firing or sintering temperature
should not be high enough to melt the inner glass or ceramic
microspheres 120.
[0030] Thus, the outer glass coating material 130 should be
selected from any of several materials such as, borophosphate
glass, borosilicate glass, etc., such that it has a relatively low
melting point. And the inner microsphere 120 should be selected
from any known microsphere with a higher melting point than the
outer glass coating material, such that when the outer glass
coating is sintered, the inner microsphere does not melt, but the
outer glass coatings of the microspheres essentially binds, sinters
or glues the microspheres together. This process may optionally
include glazing 216 of a top surface 160 of the wafer or integrated
circuit substrate in order to smooth the surface of the substrate
of sintered glass-coated microspheres 100. The glazing process may
include screen printing thick film glass 160, spin coating glass,
vapor deposition, etc.
[0031] The present invention may create a semiconductor substrate
having applications where there are requirements for high strength
of ceramic; lightweight substrate; low dielectric-constant
substrate, (such as in high frequency circuit applications, a need
for less capacitive coupling, low loss of signal propagation or
microwave applications); or applications requiring low thermal
conductivity.
[0032] Although this preferred embodiment of the present invention
has been disclosed for illustrative purposes, those skilled in the
art will appreciate that various modifications, additions and
substitutions are possible, without departing from the scope of the
invention, resulting in equivalent embodiments that remain within
the scope of the appended claims.
* * * * *