U.S. patent application number 11/407524 was filed with the patent office on 2006-08-24 for system and method for processing a wafer including stop-on-alumina processing.
This patent application is currently assigned to TEGAL CORPORATION. Invention is credited to Robert Ditizio.
Application Number | 20060186496 11/407524 |
Document ID | / |
Family ID | 35996768 |
Filed Date | 2006-08-24 |
United States Patent
Application |
20060186496 |
Kind Code |
A1 |
Ditizio; Robert |
August 24, 2006 |
System and method for processing a wafer including stop-on-alumina
processing
Abstract
Magnetic tunnel junction (MTJ) devices can be fabricated by a
stop-on-alumina process whereby the tunnel junction layer serves as
the stop layer during plasma overetching of the upper magnetic
layer. The resulting side walls of the MTJ device are non-vertical
in the vicinity of the tunnel junction layer which serves to
electrically isolate the upper magnetic layer from the lower
magnetic layer. The gas employed during plasma overetching excludes
halogen containing species which results in highly selective
etching of the magnetic layer vis-a-vis the alumina tunnel barrier
layer. The introduction of oxygen in the gas may enhance the
reproducibility of the overetch process. Finally, plasma treatment
with He and H.sub.2 followed by rinsing and baking subsequent to
removal of the photoresist mask during the fabrication process
enhances yield.
Inventors: |
Ditizio; Robert; (Petaluma,
CA) |
Correspondence
Address: |
FLIESLER MEYER, LLP
FOUR EMBARCADERO CENTER
SUITE 400
SAN FRANCISCO
CA
94111
US
|
Assignee: |
TEGAL CORPORATION
Petaluma
CA
94955
|
Family ID: |
35996768 |
Appl. No.: |
11/407524 |
Filed: |
April 20, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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10937660 |
Sep 9, 2004 |
|
|
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11407524 |
Apr 20, 2006 |
|
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Current U.S.
Class: |
257/421 ;
257/E43.004; 257/E43.006 |
Current CPC
Class: |
H01L 43/08 20130101;
H01L 43/12 20130101 |
Class at
Publication: |
257/421 |
International
Class: |
H01L 43/00 20060101
H01L043/00 |
Claims
1. A magnetic tunnel junction device comprising: (a) a first or
lower magnetic member; (b) a second or upper magnetic member; and
(c) an insulating tunnel barrier layer that comprises a dielectric
material located between the first magnetic member and the second
magnetic member wherein at least one side portion of the second
magnetic member and of the insulating tunnel barrier layer define a
non-vertical profile which protrudes from the at least one side
portion.
2. The magnetic tunnel junction device of claim 1 wherein the
dielectric material comprises Al.sub.2O.sub.3.
3. The magnetic tunnel junction device of claim 1 wherein the first
magnetic member is a fixed ferromagnetic layer having a magnetic
moment that is fixed in a preferred direction in the presence of an
applied magnetic field in a specified range and the second magnetic
member is a free ferromagnetic layer whose magnetic moment is free
to rotate in the presence of an applied magnetic field in the
specified range
4. The magnetic tunnel junction device of claim 3 wherein the fixed
and free ferromagnetic layers are formed from a material that is
selected from the group consisting of NiFe, CoFe, CoFeB, NiFeCr,
CoNiFe and mixtures thereof.
5. The magnetic tunnel junction device of claim 1 further
comprising: (d) a support substrate; (e) a first conductive
non-magnetic contact layer that is formed on the support substrate;
and (f) a second conductive non-magnetic contact layer that is
formed on an upper surface of the second magnetic member.
6. The magnetic tunnel junction device of claim 5 wherein the first
and second conductive non-magnetic contact layers are formed from
material that is selected from the group consisting of Ta, Ti and
mixtures thereof.
7. The magnetic tunnel junction device of claim 1 wherein the
insulating tunnel barrier layer defines a width that is greater
than that of the second magnetic member.
8. The magnetic tunnel junction device of claim 1 wherein the
second magnetic member has a width W.sub.2, the first magnetic
member has a width W.sub.1, the insulating tunnel barrier layer
which has a width W.sub.3, wherein
W.sub.1.gtoreq.W.sub.3>W.sub.2.
9. The magnetic tunnel junction device of claim 1 wherein an outer
perimeter of the device includes at least part of the second
magnetic member and of the insulating tunnel baffler layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
10. The magnetic tunnel junction device of claim 1 wherein an outer
perimeter of the device includes at least part of the first
magnetic member and of the insulating tunnel barrier layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
11. A magnetic tunnel junction device comprising: (a) a first or
lower magnetic member; (b) a second or upper magnetic member; and
(c) an insulating tunnel barrier layer that comprises a dielectric
material located between the first magnetic member and the second
magnetic member wherein at least one side portion of the first
magnetic member and of the insulating tunnel barrier layer define a
non-vertical profile which protrudes from the at least one side
portion.
12. The magnetic tunnel junction device of claim 11 wherein the
insulating tunnel barrier layer defines a width that is greater
than that of the second magnetic member.
13. The magnetic tunnel junction device of claim 11 wherein the
second magnetic member has a width W.sub.2, the first magnetic
member has a width W.sub.1, the insulating tunnel barrier layer
which has a width W.sub.3, wherein
W.sub.1.gtoreq.W.sub.3>W.sub.2.
14. The magnetic tunnel junction device of claim 11 wherein an
outer perimeter of the device includes at least part of the second
magnetic member and of the insulating tunnel baffler layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
15. The magnetic tunnel junction device of claim 11 wherein an
outer perimeter of the device includes at least part of the first
magnetic member and of the insulating tunnel barrier layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
16. A magnetic tunnel junction device comprising: (a) a first or
lower magnetic member; (b) a second or upper magnetic member; and
(c) an insulating tunnel barrier layer that comprises a dielectric
material electrically separating the second magnetic member which
has an outer perimeter positioned on an upper surface of the
insulating tunnel barrier layer and the first magnetic member which
is underneath the insulating tunnel barrier layer.
17. The magnetic tunnel junction device of claim 16 wherein the
insulating tunnel barrier layer defines a width that is greater
than that of the second magnetic member.
18. The magnetic tunnel junction device of claim 16 wherein the
second magnetic member has a width W.sub.2, the first magnetic
member has a width W.sub.1, the insulating tunnel barrier layer
which has a width W.sub.3, wherein
W.sub.1.gtoreq.W.sub.3>W.sub.2.
19. The magnetic tunnel junction device of claim 16 wherein an
outer perimeter of the device includes at least part of the second
magnetic member and of the insulating tunnel baffler layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
20. The magnetic tunnel junction device of claim 16 wherein an
outer perimeter of the device includes at least part of the first
magnetic member and of the insulating tunnel barrier layer define a
non-vertical profile, and the second magnetic member has a width
that is less than that of the tunnel barrier layer.
Description
[0001] This application is a Divisional of U.S. patent application
Ser. No. 10/937,660 entitled SYSTEM AND METHOD FOR PROCESSING A
WAFER INCLUDING STOP-ON-ALUMINA PROCESSING, by Robert Ditizio,
filed Sep. 9, 2004 (Attorney Docket No: TEGL-01172US0), which
application is incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0002] Magnetic multilayer films are employed as a storage element
in memories, such as magnetic random access memories (MRAM) and the
like. The memory element for the MRAM technology is a patterned
structure (memory bit) of multilayer material. The magnetic
multilayer material is usually composed of a stack of different
materials, such as permalloy (NiFe), cobalt-iron, copper, tantalum,
etc. and may include some insulator like materials, such as
Al.sub.2O.sub.3. A typical stack may contain as many as ten
different or more overlying layers of these materials. To fabricate
a storage element, it is necessary to deposit the materials in
overlying blanket films, layer by layer, to form a patterned layer
of photoresist (resist), and to etch the films into appropriate
structures.
[0003] Ion beam milling or ion beam etching processes have been
employed to remove magnetoresistive materials. Ion beam milling is
a physical milling process. Areas that are not protected by the
mask are removed by bombardment with ions. The bombardment of ions
sputters or peels away the unprotected material. Ion beam milling
operates with relatively low selectivity, and the portions of the
stack that are near to the edges of the mask or the boundaries of
an MRAM cell body can be easily damaged.
[0004] Chemical etching techniques have also been employed to
selectively remove portions of deposited sheets. Examples of
chemical etching techniques include dry etching techniques and wet
etching techniques. After completion of the reactive etch of the
multilayer material, the remaining portions of the stack are
typically exposed to a post-etch passivation plasma.
[0005] One of the drawbacks of current etching techniques is that
the vertical profiles of MRAM structure are susceptible to
electrical shorting across the thin tunnel junction. As illustrated
in FIG. 12 the MRAM structure 300 has straight vertical walls
(vertical relative to the plane of the surface being etched). The
vertical walls adjacent the thin alumina insulator layer separating
the upper magnet and the lower magnetic is inadequate to prevent
electrical shorting.
SUMMARY OF THE INVENTION
[0006] Embodiments of the present invention are directed to, among
other things, fabrication of magnetic tunnel junction (MTJ) devices
whereby the alumina tunnel barrier layer serves as the stop layer
during plasma overetching of the upper magnetic layer. The
resulting MTJ devices, typically have non-vertical side walls,
exhibit superior electrical isolation by the tunnel barrier layer
of the upper and lower magnetic layers.
[0007] In another embodiment, the gases employed during plasma
overetching preferably excludes halogen containing species which
result in highly selective etching of the upper magnetic layer
vis-a-vis the alumina tunnel barrier layer. The introduction of
oxygen in the gas enhances the reproducibility of the process.
[0008] Finally, another embodiment is directed to corrosion plasma
treatment with He and H.sub.2 gas prior to or during the stripping
of the photoresist mask. Optionally, rinsing with water and He and
H.sub.2 dehydration baking can be employed following the stripping
step.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] FIG. 1 illustrates the process sequence for fabricating a
magnetic tunnel junction (MTJ) device for an MRAM;
[0010] FIG. 2 illustrates an enlarged cross-sectional view of a
free standing MRAM stack comprising multilayer films deposited on a
supporting substrate prior to etching;
[0011] FIG. 3 illustrates the cross-section of an MRAM structure
following the main etch step showing the non-vertical profile
thereof;
[0012] FIG. 4 illustrates the cross-section of an MRAM structure
following the overetch step showing the non-vertical profile
thereof;
[0013] FIGS. 5A to 5G illustrate a two-mask stop-on-alumina
process;
[0014] FIG. 6 is a graph comparing NiFe, CoFe, and alumina etch
rates vs. the power level on a lower electrode power during plasma
etching in an overetch process in argon gas;
[0015] FIG. 7 is a graph of optical emission etch pitch density
traces vs. time from an NiFe overetch process using two different
power levels on patterned MRAM structures;
[0016] FIGS. 8A and 8B are TEM photographs of a MTJ device taken
following the stop-on-alumina etching process;
[0017] FIG. 9 is a SEM photograph of an MRAM stack wafer after a
reactive plasma main etching step, overetch, and photoresist
strip;
[0018] FIGS. 10A and 10B are SEM photographs for two wafers that
were etched under identical conditions except the wafer of FIG. 9A
was exposed to a wet rinse after etching;
[0019] FIG. 11 is a TEM photograph of an MTJ device; and
[0020] FIG. 12 illustrates a prior art MRAM structure with vertical
profiles.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0021] The present invention is based, in part, on the development
of full stack, single mask and dual mask etching techniques for
fabricating magnetic tunnel junction (MTJ) devices that are
employed in magnetic random access memory (MRAM) devices. As
further described herein, a critical aspect of the invention is
that MTJ devices prepared by the inventive process afford superior
electrical isolation of the top and bottom magnets as compared to
prior MTJ devices.
[0022] An MTJ is comprised of multiple layers of ferromagnetic
material separated by a thin insulating tunnel barrier layer, e.g.,
Al.sub.2O.sub.3. The insulating layer is sufficiently thin that
quantum-mechanical tunneling of the charge carriers occurs between
the ferromagnetic electrodes. The tunneling process is electron
spin dependent, which means that the tunneling current across the
junction depends on the spin-dependent electronic properties of the
ferromagnetic materials and is a function of the relative
orientation of the magnetic moments (magnetization directions) of
the two ferromagnetic layers. The two ferromagnetic layers are
designed to have different responses to magnetic fields so that the
relative orientation of their moments can be varied with an
external magnetic field. The MTJ is usable as a memory cell in a
nonvolatile MRAM array.
[0023] The embodiments of the invention will be illustrated by
fabricating an MTJ device from the free standing multilayer MRAM
structure or stack shown in FIG. 2, however, it is understood that
the specific layers, e.g., materials and their arrangements, that
form the multilayer structure can vary. MTJ and MRAM structures are
known in the art and are described, for example, in U.S. Pat. Nos.
6,673,675 to Yates, et al., entitled "Methods of Fabricating an
MRAM Device Using Chemical Mechanical Polishing," 6,677,165 to Lu,
et al., entitled "Magnetoresistive Random Access Memory (MRAM) Cell
Patterning," 6,653,704 to Gurney, et al., entitled "Magnetic Memory
with Tunnel Junction Memory Cells and Phase Transition Material for
Controlling Current to the Cells," 6,024,885 to Pendharkar, et al.,
entitled "Process for Patterning Magnetic Films," and 5,650,958 to
Gallagher, et al., entitled "Magnetic Tunnel Junctions with
Controlled Magnetic Response," and U.S. Patent Application
Publication No. 2003/003757 to Nallan, et al, entitled "Method for
Etching Tungsten or Tungsten Nitride in Semiconductor Structures,"
all of which are incorporated herein by reference.
[0024] FIG. 1 illustrates the main steps in the stop-on-alumina
process for fabricating one or more MTJ devices from the multilayer
MRAM structure 120 shown in FIG. 2. The individual layers of the
multilayer MRAM structure 120 can be prepared by conventional
techniques for fabricating integrated circuits and related
electronics. Applicable processes for forming metallic layers
include chemical vapor deposition (CVD) techniques, including low
pressure chemical vapor deposition (LPCVD), and physical vapor
deposition (PVD), such as sputtering. Sputtering and oxidation can
be used to form alumina in the dielectric layer. Suitable
techniques and devices are described, for example, in U.S. Pat.
Nos. 5,672,239 to DeOrnellas entitled "Integrated Semiconductor
Wafer Processing System," 4,464,223 to Gorin entitled "Plasma
Reactor Apparatus and Method," 4,209,357 to Gorin et al. entitled
"Plasma Reactor Apparatus" and 4,357,195 to Gorin entitled
"Apparatus and Method of Controlling a Plasma Reaction," and U.S.
Patent Application 2002/0139665 to DeOmellas et al. entitled
"Plasma Etch Reactor and Method," which are all incorporated by
reference.
[0025] As shown in FIG. 2, the multilayer MRAM structure 120
includes a substrate 102 onto which are deposited a number of
layers of different materials. As is apparent, the relative
thickness of the layers in FIG. 2 have been exaggerated for
illustrative purposes. The term "substrate" may include any
semiconductor-based structure that has an exposed semiconductor
surface. Structures include, for example, silicon, silicon-on
insulator (SOI), silicon-on sapphire (SOS), aluminum titanium
carbide (AlTiC) doped and undoped semiconductors, epitaxial layers
of silicon supported by a base semiconductor foundation, and other
semiconductor structures. The semiconductor need not be
silicon-based. The semiconductor could be silicon-germanium,
germanium, or gallium arsenide.
[0026] Layer 104 comprises the bottom or fixed ferromagnetic (or
magnetic) layer that is fabricated from suitable ferromagnetic
materials such as, for example, CoFe, NiFe, CoFeB, NiFeCr, CoNiFe,
and mixtures thereof. The bottom ferromagnetic layer is "fixed" in
that its magnetization orientation is in the plane of the layer but
is fixed so as to not be able to rotate in the presence of an
applied magnetic field in the desired range of interest for the MTJ
device. The fixed ferromagnetic layer is typically 25 .ANG. to 100
.ANG. thick. The ferromagnetic layer is fixed by interfacial
exchange coupling with an underlying antiferromagnetic layer.
Suitable antiferromagnetic materials include, for example, MnFe,
NiMn, PtMn, IrMn, and mixtures thereof. The underlying
antiferromagnetic layer is typically 25 .ANG. to 100 .ANG. thick.
Though not shown in FIG. 2, the multilayer MRAM structure will
typically include a bottom contact layer that is situated between
the substrate 100 and bottom magnetic layer 104. Suitable bottom
contact layer materials include, for example, Ta, Ti, and mixtures
thereof. Finally, a thin adhesion promotion layer such as a TiN
layer that is between 25 .ANG. to 100 .ANG. thick is preferably
employed between the substrate and the contact layer.
[0027] The tunnel barrier layer 106 comprises alumina and can be
formed by reactive sputtering. The alumina layer is typically 5
.ANG. to 20 .ANG. thick.
[0028] The "free" ferromagnetic (or magnetic) layer 108 comprises
material whose magnetization is able to be rotated in the plane of
the layer relative to the fixed magnetization of the fixed
ferromagnetic layer 104. Suitable ferromagnetic materials such as,
for example, CoFe, NiFe, CoFeB, NiFeCr, CoNiFe and mixtures thereof
can be employed. The free ferromagnetic layer is typically 20 .ANG.
to 50 .ANG. thick. In a preferred embodiment, layer 108 comprises a
NiFe (permalloy) and CoFe bilayer, with the CoFe being deposited
directly on the alumina. In the case of a NiFe/CoFe bilayer, the
NiFe typically ranges from 15 .ANG. to 50 .ANG. in thickness and
the CoFe typically ranges from 10 .ANG. to 40 .ANG. in
thickness.
[0029] The multilayer MRAM structure 120 typically includes a
capping or top contact layer over the free ferromagnetic layer 108.
The top contact layer is typically 200 .ANG. to 2000 .ANG. thick.
Although only a single layer of material can be employed, in a
preferred embodiment, the top contact layer comprises a Ta/Ti
bilayer 110, 112. The Ta layer 110 typically ranges from 50 .ANG.
to 100 .ANG. in thickness and the Ti layer 112 typically ranges
from 300 .ANG. to 1500 .ANG. in thickness. As further described
herein, in this preferred embodiment, the Ti layer will also serve
as a hard mask in an overetch step.
[0030] The anti-reflection coating (ARC) 114 is commonly deposited
in semiconductor fabrication prior to the deposition of the
photoresist (PR) mask 116. The ARC layer is typically 300 .ANG. to
800 .ANG. thick. ARC coatings absorb radiation to form an optically
opaque film to enhance the contrast of the imaging resist. ARC
coatings effectively reduce reflection of the incident radiation
back into the overlying PR mask layer 116. This prevents
overexposure of the photoresist material.
[0031] Anti-reflection coatings are classified largely into two
groups by their working principles. One group uses as an
anti-reflective film, a so-called photoabsorptive film, with a
strong capability to absorb exposure light, and the second group
uses light interference to prevent reflection. Photoabsorptive
organic films absorb light before being reflected by the substrate
surface, so that the light reflected from the substrate (or
underlying material) and returned to the resist is mitigated.
[0032] Examples of anti-reflective films of the second group
include Si and TiN. The anti-reflective film is typically deposited
over a metal to such a thickness that the reflected light from the
resist/anti-reflective film interface and the reflected light from
the anti-reflective film/substrate interface are in opposite phase
with each other in order to reduce the reflection.
[0033] Although either positive or negative photoresist can be
employed to fabricate the PR mask layer 116, positive photoresist
is preferred over negative photoresist because the former generally
has better resolution capabilities and pattern transfer
characteristics. In positive photoresist, the exposed portions are
susceptible to removal by the developer while the unexposed
portions are not. After the photoresist layer is applied, a mask
having openings therein is then positioned over the photoresist
layer and a light source is located over the mask so that light
shines through the openings onto selected areas of the photoresist
layer.
[0034] After selective exposure, the photoresist coated substrate
is treated with a developer solution to dissolve and remove either
the radiation-exposed or the unexposed areas of the photoresist
(depending upon whether a positive or a negative photoresist is
utilized) resulting in a patterned or developed photoresist,
exposing the underlying layer Ti previously deposited. The
patterned photoresist mask layer 116 is then used as a mask to etch
layers below the photoresist layer so that portions of the
underlying layer not protected by the hardened resist layer may now
be etched away.
[0035] Embodiments of the stop-on-alumina process of the present
invention as illustrated in the flow diagram of FIG. 1 include an
initial main etch step 10 whereby Ti layer 112, Ta layer 110, and
portions of the NiFe (permalloy) and CoFe bilayer, that comprise
the free ferromagnetic layer 106, are successively removed in the
MRAM structure 120 of FIG. 2. These layers are preferably removed
by plasma reactive etching using a variety of etch chemistries.
Generally, the chemistry includes two or more of the following
species: halogen gases, halogen containing gases, noble gases, and
diatomic gases; the last two gases serving as inert carrier gases.
A critical feature of the process is stopping the main etch before
reaching the CoFe/alumina interface. Preferably, when etching the
upper free magnetic film consisting of the NiFe and CoFe bilayer,
the chemistry employed comprises a mixture of from about 10% to 50%
Cl.sub.2 by volume and from about 10% to 30% BCl.sub.3, with the
reminder primarily being an inert carrier gas. (All percentages for
gases are on a volumetric basis unless otherwise specified.) It has
been demonstrated that this mixture provides a substantially
residue-free etching of the magnetic films. Controlling the etch
rate with minimal residue formation is critical for stopping close
to CoFe/alumina interface.
[0036] It has also been demonstrated when plasma etching magnetic
layers comprising transition metals such as NiFe with etchant gases
containing Cl.sub.2 and/or Ar that regulating the amount of oxygen
in the plasma chamber can influence the etch selectivity with
respect to the underlying alumina. That is, a higher NiFe/alumina
selectivity can be achieved by controlling the flow of oxygen into
the plasma chamber. One embodiment of the plasma overetch process
entails reducing the background oxygen to levels that do not affect
the etching process while concurrently re-introducing oxygen in a
measurable and controllable manner into the plasma chamber. Sources
of the background oxygen that may enter the plasma chamber include,
for example: (1) atmospheric oxygen; (2) outgassing from materials
in the chamber; (3) other processing modules in the process system;
and (4) source window sputtering that occurs during plasma
etching.
[0037] When "uncontrolled" background oxygen in the chamber is
reduced, the selectivity between NiFe and alumina can be optimized
by re-introducing a very small amount (e.g., .about.0.08 sccm) of
oxygen into the chamber. One technique to re-introduce the oxygen
employs two separate carrier gas sources that are connected to the
chamber. The first source supplies an Ar/O.sub.2 gas mixture
comprising 99.9% Ar and 0.1% O.sub.2 to the plasma chamber while a
second source supplies a gas containing 100% Ar in parallel to the
chamber. When re-introducing oxygen into the plasma chamber, it is
preferred that the base pressure of the chamber be reduced to
.about.0.001 mT. Additionally, the source power should be low
(100-200 W) to minimize window sputtering.
[0038] Following the main etch step 10 as shown in FIG. 1, the
patterned photoresist mask 116 is removed in step 12 by
conventional means. It has been found that exposure of
CoFe-containing stack structures to high temperature (>about
150-175.degree. C.) after a halogen containing etch process results
in gross residue formation. In addition, exposure of the MRAM
structure 120 of FIG. 2 to a dry strip process has been found to
result in what appears to be severe degradation of the pristine
alumina surface particularly when oxygen is used. Similar results
have been observed for nitrogen stripping. Therefore, is it
preferred that wet photoresist stripping or He/H.sub.2 be employed
and that neither high temperature nor dry stripping with O.sub.2 be
employed in the MRAM stack stop-on-alumina processes of embodiments
of the present invention.
[0039] FIG. 3 illustrates the etch profile of the MRAM structure
that is expected following removal of the pattern photoresist mask
116. FIG. 3 only shows two cells 220, however, it is understood
that the MRAM structure can comprise a plurality of cells that
eventually form part of the MRAM device. The side wall of each cell
is essentially vertical beginning from the top edge to the upper
magnetic layer, e.g., NiFe layer, at which conjuncture the profile
slants and defines a non-vertical sloped surface 230. In the case
of a full stack etch, the surface 230 protrudes outwardly and
terminates at the surface 240 which would typically correspond to
the bottom contact layer.
[0040] Next, the MRAM structure 120 is preferably subjected to a
corrosion treatment step 14 which is a passivation scheme to
prevent corrosion of the structure 120 during subsequent
processing. A preferred corrosion treatment comprises of plasma
treatment in an environment containing a mixture of He and H.sub.2.
Preferably the mixture comprises at least 96% He and 4% or less of
H.sub.2 The process preferably occurs at an elevated temperature
between 100.degree. to 285.degree. C. and preferably of about
150.degree. C.
[0041] An optional water rinse step 16 whereby the device is rinsed
with for preferably at least one to two minutes to remove
contaminants follows. Preferably, de-ionized water at about room
temperature (about 30.degree. C.) is used.
[0042] After being rinsed, the device is baked in step 18 at an
elevated temperature of between 100.degree. to 285.degree. C., and
preferably at about 150.degree. C., for between one to two minutes
to remove excess moisture and He and H.sub.2.
[0043] Finally, the structure 120 undergoes an overetch etching
step 20 whereby the remaining portions of the exposed free
ferromagnetic layer 108, e.g., NiFe and CoFe bilayer, are removed
whereby the alumina of the tunnel barrier layer 106 serves as the
stop layer. FIG. 4 shows the etched profile of the MRAM structure
120 that is expected following the overetch step 20. With the
selective removal of additional NiFe/CoFe, the stepwise profile
defines an isolation region 236 which is the exposed horizontal
surface of the alumina that separates the free ferromagnetic layer
234 and the lower fixed ferromagnetic layer 238. The profile
remains essentially vertical until the isolation region 236. In
this configuration of the MTJ device, the free ferromagnetic layer
has a width W.sub.1, which is about the same as that of the
insulating tunnel barrier (alumina) layer. The fixed ferrogmagnetic
layer has a width W.sub.2, such that W.sub.2>W.sub.1. In
addition, the width of the bottom magnetic layer (not shown) is
longer than that of the tunnel barrier layer. In another embodiment
of the MTJ device, the free ferromagnetic layer has a width
W.sub.3, the fixed ferromagnetic layer has a width W.sub.4, and the
insulating tunnel barrier (alumina) layer has a width W.sub.5, such
that W.sub.5>W.sub.4.gtoreq.W.sub.3 and preferably
W.sub.4>W.sub.3.
[0044] With the removal of the patterned photoresist mask 116, the
Ti contact layer 114 serves as a hard mask for the overetch process
which preferably comprises a plasma etch reaction in an atmosphere
containing a small amount of oxygen as described above. In a
preferred embodiment, a gas comprising a mixture of greater than
about 99% argon and a small amount of oxygen is employed.
[0045] FIGS. 3 and 4 illustrate the single-mask, full stack
stop-on-alumina process. In another embodiment of the invention,
FIGS. 5A through 5G illustrate the sequence of steps of a two-mask,
full stack stop-on-alumina process.
[0046] FIG. 5A shows the multi-layer MRAM structure 50 which
includes a substrate 52 onto which is deposited a number of layers
of different materials: (1) bottom or fixed ferromagnetic layer 54,
(2) tunnel barrier layer 56, (3) free ferromagnetic layer 58, (4)
cap or contact layer 60 and (5) photoresist layer 62. A patterned
photoresist (PR) mask 68 is formed by selective exposure to
radiation and then treated with a developer solution. The MRAM
structure 50 may include an ARC; for illustrative purposes the ARC
is considered part of the top contact layer 60 rather than a
separate layer. Layers 54, 56, and 58 are said to comprise the
"full stack" of the structure although additional layers, such as
layer 60, can be included depending on the process design flow of a
particular device.
[0047] FIG. 5B shows the structure after the top contact layer 60
of FIG. 5a has been partially removed using the PR mask 68 thereby
forming contact layer 66. Part of free ferromagnetic layer 64 is
exposed.
[0048] FIG. 5C shows the structure after the main etch of the
stop-on-alumina process whereby exposed portions of free
ferromagnetic layer 64 have been removed to form free ferromagnetic
layer 70. Portions of tunnel barrier layer 56 are exposed.
Thereafter, the PR mask 68 is removed as shown in FIG. 5D.
[0049] Subsequently, a layer of hard mask is deposited over the
structure as shown in FIG. 5E. This hard mask preferably comprises
materials such as, for example, Ta, Ti, TiN, TiAlN, and SiO.sub.2.
A patterned photoresist layer (not shown) is then formed over hard
mask 72.
[0050] FIG. 5F shows the structure after portions of the hard mask
has been etched and the patterned PR mask has been removed. It is
apparent that the remaining hard mask 74 covers the top contact
layer 66 and upper magnetic layer 70. The hard mask 74 is then used
to etch the exposed tunnel barrier layer 56 and the lower
ferromagnetic layer 54 to leave the structure as shown in FIG. 5G
in which the outer perimeters of the tunnel barrier layer 86 and
that of the lower ferromagnetic layer 76 are substantially flush
with the outer perimeter of hard mask 72.
[0051] The overetching process exhibits high selectivity. It is
expected that the free ferromagnetic layer will be etched at a rate
of at least 7 faster than the rate at which the dielectric
material, e.g., Al.sub.2O.sub.3, is etched.
[0052] As illustrated in FIGS. 3 and 4, the overetch step is used
to achieve the electrical isolation between the top and bottom
magnets 234, 238 in the MRAM device. This aspect is accomplished by
selectively etching the NiFe/CoFe bilayer of the free ferromagnetic
layer 108 using the alumina as the stop layer. Precise control of
the NiFe/CoFe etch rate is possible because there are significant
differences in sputter thresholds between the NiFe and CoFe and
that of alumina. Experiments that confirmed these phenomena were
conducted using a 6550 Spectra.RTM. etch reactor from Tegal Corp.
(Petaluma, Calif.).
[0053] Specifically, NiFe and CoFe sputter rates were measured with
monolayer test wafers and alumina etch rates were measured with
alumina/NiFe test structures. The test structure consisted of a
substrate that had a NiFe layer deposited thereon and a very thin
layer of alumina (.about.15 .ANG.) over the NiFe. The measured
alumina etch rates were representative of the thin film properties
that would be found in a tunnel-type magnetoresistive (TMR)
stack.
[0054] As is apparent from the graph in FIG. 6, a significant
difference was observed between the onset of sputtering for the
alloys in comparison to that of the alumina. It was further
observed in etch rate tests, which were performed on alumina/NiFe
test structures at bias power levels greater than 10W and less than
25W, that the alumina did not etch. These observations indicate
that under specific etch conditions, significant amounts of NiFe
and CoFe can be etched from a TMR stack while only a small amount
of alumina is etched at the same time.
[0055] A method for detecting the endpoint of NiFe/CoFe etching was
also developed for monitoring the etching process of a TMR stack.
Stack wafers comprising NiFe and CoFe layered formed on an
underlying layer of alumina were prepared. After the layers above
the NiFe had been removed with a reactive chemistry, the stack
wafers were subject to overetch using an Ar-only chemistry at two
different power levels. Optical emission endpoint detection (EPD)
traces from two typical stack wafers are shown in FIG. 7. As is
apparent, the elemental constituents of NiFe and CoFe are fairly
good emitters in an argon plasma.
[0056] The EPD traces indicate that some structure is visible from
the individual layers in the stack over the duration of the argon
etch process. The first peak 120 in the endpoint trace of FIG. 7
shows the clearing of the magnetic layer above the alumina. The
long flat region in the top graph corresponds to the slow removal
of the alumina. This region is considerably shorter in the higher
power trace shown at the bottom of FIG. 7. The second set of peaks
130 after the long flat region at the top of FIG. 7 corresponds to
the etching removal of the magnetic layers below the alumina. This
second set of peaks 140 is also observed in the higher power case
at the bottom of FIG. 7.
[0057] In practice, the progress of the etching reaction can be
monitored by an optical detector such as a fairly broadband
photocell detector or photomultiplier tube with an optical filter.
The detector could also be a mass spectrometer or the like. The
photocell, when coupled with an amplifier, provides a voltage
output which is proportional to the intensity of the optical
emission of the plasma. Detectors are described, for example, in
U.S. Pat. No. 4,357,195 to Gorin which is incorporated herein by
reference.
[0058] FIGS. 8A and 8B are two transmission electron microscopy
(TEM) photographs that were taken from a MRAM stack wafer that was
etched to the point indicated by the dot 150 in the endpoint trace,
i.e., flat area between the two peaks 120, 130, shown at the top of
FIG. 7. The fixed ferromagnetic layer 104, alumina layer 106, free
ferromagnetic layer 108, Ta layer 110, Ti layer 112, and ARC layer
114 that are deposited on SiO.sub.2 substrate 102 are evident in
each TEM. FIG. 8A shows an open area between arrays and FIG. 8B
shows a dense area between features.
[0059] FIG. 9 is a scanning electron microscope (SEM) photograph
obtained from an MRAM wafer, which had both NiFe and CoFe deposited
above the alumina, that was exposed to the combined main etch and
overetch. This image shows that the complete top electrode etch to
be relatively veil-free. Veils are residues that form on the walls
of features during processing and can consist of organic or
inorganic components. The process is effective across an entire 6
inch wafer and shows no signs of alumina punch-through anywhere on
the wafer.
[0060] FIGS. 10A and 10B are SEMs photographs of two MRAM wafers
both of which were etched under identical conditions with halogen
based chemistry except that the wafer of FIG. 10B was exposed to a
water rinse after etching. As is apparent from FIG. 10A, the
exposed magnetic material in the field area for the wafer became
severely corroded as a result of air exposure for several hours
whereas the rinsed wafer of FIG. 10B did not corrode noticeably.
The rinse was effective in eliminating the halogens and passivating
the surface.
[0061] FIG. 11 is a TEM of a MTJ device that was fabricated with
the inventive technique. As is apparent, the alumina layer provides
excellent electrical isolation of the top and bottom magnets.
[0062] The foregoing description of the preferred embodiment of the
invention has been presented for the purposes of illustration and
description. It is not intended to be exhaustive or to limit the
invention to the precise form disclosed. Many modifications and
variations are possible in light of the above teaching. It is
intended that the scope of the invention be limited not by this
detailed description, but rather by the claims appended hereto.
* * * * *