U.S. patent application number 11/131387 was filed with the patent office on 2006-04-13 for method of fabricating an electronic device.
This patent application is currently assigned to Industrial Technology Research Institute. Invention is credited to Jia-Chong Ho, Tarng-Shiang Hu, Liang-Ying Huang, Cheng-Chung Lee.
Application Number | 20060079038 11/131387 |
Document ID | / |
Family ID | 36145882 |
Filed Date | 2006-04-13 |
United States Patent
Application |
20060079038 |
Kind Code |
A1 |
Hu; Tarng-Shiang ; et
al. |
April 13, 2006 |
Method of fabricating an electronic device
Abstract
A method of fabricating an electronic device includes the
following steps: a) providing a substrate; b) forming a first strip
on the substrate; c) coating an insulation layer on the first strip
and the substrate while completely overlaying the first strip and
the substrate with the same; d) forming a second strip on the
insulation layer; e) forming conductive polymer on the insulation
layer while completely overlaying the second strip with the same;
f) etching the conductive polymer via plasma etching for completely
removing the conductive polymer on the second strip; and g) forming
a semiconductor layer on the second strip and the conductive
polymer.
Inventors: |
Hu; Tarng-Shiang; (Hsinchu
City, TW) ; Ho; Jia-Chong; (YingKe Town, TW) ;
Huang; Liang-Ying; (Hsinchu, TW) ; Lee;
Cheng-Chung; (TaiChung, TW) |
Correspondence
Address: |
BRUCE H. TROXELL
SUITE 1404
5205 LEESBURG PIKE
FALLS CHURCH
VA
22041
US
|
Assignee: |
Industrial Technology Research
Institute
|
Family ID: |
36145882 |
Appl. No.: |
11/131387 |
Filed: |
May 18, 2005 |
Current U.S.
Class: |
438/158 ;
438/149; 438/151 |
Current CPC
Class: |
H01L 27/285 20130101;
H01L 51/0021 20130101 |
Class at
Publication: |
438/158 ;
438/149; 438/151 |
International
Class: |
H01L 21/84 20060101
H01L021/84 |
Foreign Application Data
Date |
Code |
Application Number |
Sep 30, 2004 |
TW |
93129519 |
Claims
1. A method of fabricating an electronic device, comprising the
steps of: a) providing a substrate; b) forming a first strip on the
substrate; c) coating an insulation layer on the first strip and
the substrate while completely overlaying the first strip and the
substrate with the same; d) forming a second strip on the
insulation layer; e) forming a layer of conductive polymer on the
insulation layer while completely overlaying the second strip with
the same; f) etching the conductive polymer via plasma etching for
completely removing the conductive polymer on the second strip; and
g) forming a semiconductor layer on the second strip and the
conductive polymer.
2. The method as recited in claim 1, wherein the substrate is
selected from the group consisting of silicon wafer substrate,
glass substrate, quartz substrate, plastic substrate and flexible
substrate.
3. The method as recited in claim 1, wherein the insulation layer
is made of a material selected from the group consisting of
inorganic material, polymer and high dielectric materials.
4. The method as recited in claim 3, wherein the high dielectric
material is substantially selected from the group consisting of
materials of dielectric constant larger than 3.
5. The method as recited in claim 1, wherein the process for
forming the second strip is a process selected from the group
consisting of nano-imprint lithography, photolithography of forward
exposure and photolithography of backward exposure.
6. The method as recited in claim 1, wherein the process for
forming the semiconductor layer is a process selected from the
group consisting of thermal evaporation, screen printing, ink-jet
printing and contact printing.
7. The method as recited in claim 1, wherein the first strip is
made of a material selected from the group consisting of metal,
conductive polymer and organic-inorganic hybrid electric conductive
material.
8. The method in claim 1, wherein the conductive polymer is
substantially an organic-inorganic hybrid electric conductive
material.
Description
1. FIELD OF THE INVENTION
[0001] The present invention relates to a method of fabricating an
electronic device, and more particularly, to a method of
fabricating a thin film transistor (TFT) by dry etching.
2. BACKGROUND OF THE INVENTION
[0002] Nowadays, TFT-LCDs (liquid crystal display) are commonly
being applied to various electronic apparatus of information
technology, such as monitors for personal computers, displays for
notebook computers. That is, a TFT-LCD module consisting of a
TFT-LCD panel, driving-circuit unit, backlight system, and assembly
unit is commonly used to display characters and graphic images when
connected a host system, wherein the TFT-LCD panel consists of a
TFT-array substrate and a color-filter substrate. Moreover, The
TFT-array substrate contains the TFTs, storage capacitors, pixel
electrodes, and interconnect wiring, and the color filter contains
the black matrix and resin film containing three
primary-color--red, green, and blue--dyes or pigments. In this
regard, the operation of the TFT-LCD is based on the use of the
TFTs to actuate the pixel electrodes.
[0003] Therefore, the thin film transistor (TFT) plays an important
role while fabricating a liquid crystal display (LCD). A
conventional thin film transistor, especially a bottom-contact
organic thin film transistor, has pixel electrodes fabricated by
the photolithography process, which is capable of defining channel
length easily, but have to go through a plurality of steps of
exposing, developing, etching, and photoresist removing, etc.
Hence, it is desired to reduce the steps of fabricating the thin
film transistor for the LCD.
[0004] For example, a method of fabricating a thin film transistor
is disclosed in R.O.C. Patent No. 518682 with reference to FIG. 1A
to FIG. 1C. As seen in FIG. 1A to FIG. 1C, the method of
fabricating the thin film transistor comprises the following steps:
[0005] a) providing a substrate 10 while forming a gate electrode
12 thereon; [0006] b) coating a first dielectric layer 14 on the
substrate 10 and the gate electrode 12 completely, and then coating
a backfill dielectric layer 16 on the first dielectric layer 14;
[0007] c) etching the backfill dielectric layer 16 via plasma
etching till the backfill dielectric layer 16 on the gate electrode
12 is completely removed, and consequently, forming a pair of
patterning backfill dielectric layers 16a, 16b; [0008] d) forming a
patterning third dielectric layer 20 on an exposure portion of the
first dielectric layer 14 and the pair of patterning backfill
dielectric layers 16a, 16b, and further forming a patterning active
semiconductor layer 22 aligning with the patterning third
dielectric layer 20; and [0009] e) forming a pair of patterning
ohmic contact layers 24a, 24b contacting each other respectively on
the two end points of the patterning active semiconductor layer 22,
and further forming a pair of patterning conducting layers 26a, 26b
on the patterning ohmic contact layers 24a, 24b while respectively
aligning with the same, wherein the patterning conducting layers
26a, 26b are employed as electrodes (drain/source).
[0010] Though a reliable thin film transistor structure may be
fabricated through the above method, steps (exposing, developing,
etching and photoresist removing) of the photolithography process
are still complicated. Furthermore, when the insulation layer is
made of an organic material, it is inconvenient to fabricate the
patterning organic electrodes and it tends to be restricted by the
material. When the electrodes are fabricated via printing, it is
inconvenient to align.
SUMMARY OF THE INVENTION
[0011] It is the primary object of the present invention to provide
a method of fabricating an electronic device, which is adapted for
fabricating a thin film transistor via insulation layer patterning
and dry etching (i.e. plasma etching) thereby simplifying process
and realizing self-alignment.
[0012] To achieve the abovementioned object, a method of
fabricating an electronic device in accordance with the present
invention comprises the steps of: [0013] (a) providing a substrate;
[0014] (b) forming a first strip on the substrate; [0015] (c)
coating an insulation layer on the first strip and the substrate
for completely overlaying the first strip and the substrate with
the same; [0016] (d) forming a second strip on the insulation
layer; [0017] (e) forming a layer of conductive polymer on the
insulation layer for completely overlaying the second strip with
the same; [0018] (f) etching the layer of conductive polymer via
plasma etching enabling the conductive polymer covering the second
strip to be removed completely; and [0019] (g) forming
semiconductor layer on the second strip and the conductive
polymer.
[0020] Wherein, in step (d), the second strip is formed via
nano-imprint lithography, forward exposure or backward exposure of
photolithography.
[0021] The following descriptions of drawings and preferred
embodiment could be taken in conjunction with the accompanying
auxiliary drawings to specifically explain the present invention
and facilitate examiner to examine the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0022] FIG. 1A to FIG. 1C are schematic illustrations respectively
showing successive steps of a conventional method of fabricating a
thin film transistor.
[0023] FIG. 2 to FIG. 7 are schematic illustrations respectively
showing successive steps of a method of fabricating an electronic
device according to the present invention.
[0024] FIG. 8A is a schematic diagram showing an insulation layer
is patterned via nano-imprint lithography according to the present
invention.
[0025] FIG. 8B is a schematic diagram showing an insulation layer
is patterned via a photolithography process of forward exposure
according to the present invention.
[0026] FIG. 8C is schematic diagram showing an insulation layer is
patterned via a photolithography process of forward exposure
according to another embodiment of the present invention.
[0027] FIG. 8D is a schematic diagram showing an insulation layer
is patterned via a photolithography process of backward exposure
according to the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
[0028] Please refer to FIGS. 2-7, which are schematic illustrations
respectively showing successive steps of a method of fabricating an
electronic device according to the present invention. Wherein, FIG.
2 illustrates the fabrication of a gate electrode, FIG. 3
illustrates the coating of an insulation layer, FIG. 4 illustrates
the patterning of the insulation layer, FIG. 5 illustrates the
forming of an electrode, FIG. 6 illustrates the etching process,
and FIG. 7 illustrates the fabrication of an active layer.
[0029] Referring to FIG. 2, a substrate 31 is provided for forming
a first strip 32 thereon, wherein the first strip 32 is employed as
a gate electrode and is fabricated via a conventional semiconductor
process, such as photolithography, shadow mask forming, ink-jet
printing, screen printing, and contact printing, and so on.
[0030] Referring to FIG. 3, an insulation layer 33 is coated on the
first strip 32 and the substrate 31 while completely overlaying the
first strip 32 and the substrate 31 with the same, wherein
conventional coating processes, such as spin coating and spin-slide
coating, etc., may be used for the coating the insulation layer
33.
[0031] Further, referring to FIG. 4, a second strip 331 is formed
on the insulation layer 33, wherein the strip 331 is fabricated via
nano-imprint lithography (as seen in FIG. 8A), photography process
of forward exposure (as seen in FIG. 8B) or photography process of
backward exposure (as seen in FIG. 8C). Of cause, the
abovementioned process is given herein as an example but not limit
the scope of the present invention.
[0032] Referring to FIG. 5, an conductive polymer 34 is coated on
the insulation layer 33 while completely overlaying the second
strip 331 with the same, wherein wherein conventional coating
processes, such as spin coating and spin-slide coating, etc., may
be used for the coating the conductive polymer 34.
[0033] Further referring to FIG. 6, a plasma 44 is used for etching
the conductive polymer 34 until the conductive polymer 34 on the
second strip 331 is completely removed enabling the conductive
polymer 34a, 34b remaining at opposite sides of the second strip
331 to be employed as electrodes (source/drain). The second strip
331 may be fabricated with a relatively large thickness during the
previous step of forming the second strip 331 for preventing the
conductive polymer to be over-etched by the plasma 44. Therefore,
when over etching, the thick second strip 331 can still ensure the
electrical characteristics of a resulting device are not affected,
that the resulting device is substantially a thin film transistor
1.
[0034] Finally referring to FIG. 7, a semiconductor layer 35 is
formed on the second strip 331 and the conductive polymer 34a, 34b,
wherein the semiconductor layer 35 is formed by a process selected
from the group consisting of thermal evaporation, screen printing,
ink-jet printing and contact printing.
[0035] FIG. 8A is a schematic diagram showing an insulation layer
is patterned via nano-imprint lithography according to the present
invention. As seen in FIG. 8A, the second strip 331 is formed by
imprinting the insulation layer 33 with a mold 40.
[0036] FIG. 8B is a schematic diagram showing an insulation layer
is patterned via a photolithography process of forward exposure
according to the present invention. As seen in FIG. 8B, the second
strip 331 is formed on the insulation layer 33 after a positive
photoresist pattern 41 is exposed by a light source 411.
[0037] FIG. 8C is schematic diagram showing an insulation layer is
patterned via a photolithography process of forward exposure
according to another embodiment of the present invention. As seen
in FIG. 8C, the second strip 331 is formed on the insulation layer
33 after a negative photoresist pattern 42 is exposed by a light
source 421.
[0038] FIG. 8D is a schematic diagram showing an insulation layer
is patterned via a photolithography process of backward exposure
according to the present invention, which is adopted while the
substrate 31 is made of a transparent material. As seen in FIG. 8D,
since the substrate 31 is made of a transparent material and the
first strip 32 is not transparent, the first strip 32 can act as a
positive photoresist whereby the second strip 331 is formed on the
insulation layer 33 after backward irradiation of a light source
431.
[0039] In the present invention, the substrate can be a silicon
wafer substrate, a glass substrate, a quartz substrate, a plastic
substrate or a flexible substrate. The first strip may be made of
metal, conductive polymer or organic-inorganic hybrid electric
conductive material. The insulation layer may be made of inorganic
material, polymer or other high dielectric material (i.e. K>3).
The conductive polymer may be an organic-inorganic hybrid electric
conductive material. The semiconductor layer material may be made
of an organic semiconductor material. Of cause, the above-mentioned
material is given herein as an example but not limit the
application scope of the present invention. The method of
fabricating an electronic device of the present invention can
employ any conventional (organic) thin film transistor material as
long as the material is applicable to the electronic device.
[0040] While the preferred embodiment of the invention has been set
forth for the purpose of disclosure, modifications of the disclosed
embodiment of the invention as well as other embodiments thereof
may occur to those skilled in the art. Accordingly, the appended
claims are intended to cover all embodiments which do not depart
from the spirit and scope of the invention.
* * * * *