U.S. patent application number 11/112287 was filed with the patent office on 2005-08-25 for polymer film metalization.
Invention is credited to Andideh, Ebrahim, Diana, Daniel C..
Application Number | 20050183960 11/112287 |
Document ID | / |
Family ID | 32681357 |
Filed Date | 2005-08-25 |
United States Patent
Application |
20050183960 |
Kind Code |
A1 |
Andideh, Ebrahim ; et
al. |
August 25, 2005 |
Polymer film metalization
Abstract
Embodiments in accordance with the present invention eliminate
the need for a subtractive metal patterning process to pattern the
electrode above a ferroelectric polymer. Instead, a selective
electroless deposition process is used. A conductive polymer is
used as a seed layer for the electroless plating of the metal
electrode. A cost saving is provided by eliminating the chemical
costs associated with conventional resist removal processing. The
methods also potentially eliminate the requirement for aggressive
and environmentally unsafe chemical-based photoresist removal
processes.
Inventors: |
Andideh, Ebrahim; (Portland,
OR) ; Diana, Daniel C.; (Portland, OR) |
Correspondence
Address: |
SCHWABE, WILLIAMSON & WYATT
PACWEST CENTER, SUITES 1600-1900
1211 S.W. FIFTH AVE.
PORTLAND
OR
97204
US
|
Family ID: |
32681357 |
Appl. No.: |
11/112287 |
Filed: |
April 21, 2005 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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11112287 |
Apr 21, 2005 |
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10337960 |
Jan 6, 2003 |
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6890813 |
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Current U.S.
Class: |
205/123 ;
205/157; 257/E21.174; 257/E21.208; 257/E21.582 |
Current CPC
Class: |
H01L 21/76838 20130101;
H01L 21/288 20130101; H01L 29/40111 20190801 |
Class at
Publication: |
205/123 ;
205/157 |
International
Class: |
C25D 005/02; C25D
007/12 |
Claims
1. (canceled)
2. A method, comprising: forming a conductive polymer layer on a
ferroelectric polymer layer; patterning the conductive polymer; and
depositing a conductive layer on the patterned conductive polymer
layer.
3. The method of claim 2, wherein said forming comprises forming
the conductive polymer layer on the ferroelectric polymer layer
using a spin deposition and cure process.
4. The method of claim 2, wherein said patterning comprises using
photoresist spin deposition to form a layer of photoresist on the
conductive polymer layer, and exposing predetermined areas of the
photoresist to a curing process.
5. The method of claim 2, wherein said patterning comprises using
lithography and plasma etch processes to pattern the conductive
polymer.
6. The method of claim 2, wherein said depositing comprises using
an electroless plating process to deposit the conductive layer on
the patterned conductive polymer layer.
7. The method of claim 6, wherein said using an electroless plating
process includes optimizing the deposition process to minimize
conductive layer deposition on the sidewalls of the conductive
polymer.
8. A method for making a semiconductor substrate comprising:
providing a substrate including a ferroelectric polymer layer;
forming a conductive polymer layer on the ferroelectric polymer
layer; patterning the conductive polymer layer; and depositing a
conductive layer on the patterned conductive polymer layer.
9. The method of claim 8, wherein said forming comprises forming a
conductive polymer layer on the ferroelectric polymer layer using a
spin deposition and cure process.
10. The method of claim 8, wherein said patterning comprises using
photoresist spin deposition to form a layer of photoresist on the
conductive polymer layer, and exposing predetermined areas of the
photoresist to a curing process.
11. The method of claim 8, wherein said patterning comprises using
lithography and plasma etch processes to pattern the conductive
polymer.
12. The method of claim 8, wherein said depositing comprises using
an electroless plating process to deposit the conductive layer on
the patterned conductive polymer layer.
13. The method of claim 12, wherein said using an electroless
plating process includes optimizing the deposition process to
minimize conductive layer deposition on the sidewalls of the
conductive polymer.
14. A method for making a semiconductor substrate comprising:
providing a substrate including a patterned conductive polymer
layer on top of the substrate; and depositing a conductive layer on
top of the patterned conductive polymer layer.
15. The method of claim 14, wherein said providing comprises
providing a substrate including a ferroelectric polymer layer
underneath the patterned conductive polymer layer.
16. The method of claim 14, wherein said providing comprises of
forming a conductive polymer layer on the substrate and patterning
the conductive polymer layer using lithography and etch
processes.
17. The method of claim 14, wherein said depositing comprises using
an electroless plating process to deposit the conductive layer on
top of the patterned conductive polymer layer.
18. The method of claim 17, wherein said using an electroless
plating process includes optimizing the deposition process to
minimize conductive layer deposition on the sidewalls of the
conductive polymer.
Description
RELATED APPLICATION
[0001] This application is a continuation of U.S. application Ser.
No. 10/337,960 filed Jan. 6, 2003 titled "POLYMER FILM
METALIZATION."
FIELD OF THE INVENTION
[0002] The present invention relates to semiconductor processing,
and, more particularly, to lithographic techniques for metal
patterning on a ferroelectric polymer layer.
BACKGROUND OF INVENTION
[0003] Semiconductor manufacture utilizes well known processes
wherein multiple layers of various material, including
semiconductor, insulator, and conductor layers, are selectively
deposited and selectively removed using various deposition and
material removing processes. One of those processes is used to
create conductive traces to interconnect devices on the substrate.
A plurality of electrically conductive traces is formed by
photolithographic techniques.
[0004] One exemplary photolithographic technique involves forming a
conformal layer of electrically conductive material over the
dielectric layer and applying a photoresist layer over the
electrically conductive material layer. The photoresist layer is
photoactive, such that when exposed to light (usually ultraviolet
light), the photoresist becomes insoluble (negative photoresist) in
specific solvents. Light is projected through a template that
shields specific areas of the photoresist while exposing other
areas, thereby translating the pattern of the template onto the
photoresist. After exposure, an appropriate solvent removes the
desired portions of the photoresist. The remaining photoresist
becomes a mask that remains on the electrically conductive material
layer. The mask is used to expose areas of the electrically
conductive material layer to be etched away while protecting the
electrically conductive material that ultimately forms the
electrically conductive traces.
[0005] A similar process is currently being used to provide
conductive traces on a layer of ferroelectric polymer overlying a
first conductive layer. FIG. 1 is a side view of a substrate 1
having undergone the process of adding conductive layer 20 to a
conductive polymer layer 18, which itself is on the ferroelectric
polymer layer 16. The substrate 1 comprises a basic lay-up of
silicon 10, silicon dioxide 12, a first conductive layer 14, and a
ferroelectric polymer layer 16. The substrate 1 has undergone
application of a conductive polymer layer 18 and a conductive layer
20, upon which is a photoresist 22, wherein lithographic
patterning, photoresist development, and plasma etching of the
unwanted portions of the conductive layer 20 and conductive polymer
layer 18. Plasma etching is a desirable means for removal of the
conductive layer 20 and conductive polymer layer 18 as it permits
high resolution features.
[0006] FIG. 2 is a side view of the substrate 1 after removal of
the photoresist 22. Removal of the photoresist 22 from the desired
portions of the conductive layer 20 is done using a chemical
removal process. Photoresist 22 exposed to plasma etching becomes
hardened and difficult to remove. Strong chemicals are used in a
process of dissolving away the photoresist 22 to expose the
conductive layer 20. During the removal process, the chemicals also
attack the desired conductive layer 20. This process leads to a
high product defect rate. Further, the process is costly, and
exposes the environment to a hazardous material that must be
handled and disposed of properly.
[0007] Improved methods are needed to remove photoresist material
that has been exposed to a plasma etching process. The methods must
have a low defect rate, not harm the underlying desired material
layers, be reasonably economical, and not present a hazard to
personnel and the environment.
BRIEF DESCRIPTION OF DRAWINGS
[0008] FIG. 1 is a side view of a substrate having undergone a
conventional process of adding conductive traces to a substrate
with a ferroelectric polymer layer and a conductive polymer
layer;
[0009] FIG. 2 is a side view of the substrate undergoing
conventional chemical removal of the photoresist material;
[0010] FIG. 3 is a side view of a substrate comprising a
ferroelectric polymer layer, in accordance with an embodiment of
the present invention;
[0011] FIG. 4 is a side view of the substrate of FIG. 3 with a
conductive polymer layer covering the ferroelectric polymer
layer;
[0012] FIG. 5 is a side view of the substrate of FIG. 4 with
photoresist material covering selected portions of the conductive
polymer layer;
[0013] FIG. 6 is a side view of the substrate of FIG. 5 after
having undergone a plasma etching process to remove exposed
conductive polymer layer followed by photoresist removal from the
now patterned conductive polymer layer;
[0014] FIG. 7 is a side view of the substrate of FIG. 6 after
having undergone an electroless plating process to deposit a second
conductive layer on top of the patterned conductive polymer
layer;
[0015] FIG. 8 is a top view of a substrate prior to undergoing a
process of adding conductive traces to the substrate with a layer
of ferroelectric polymer, in accordance with an embodiment of the
present invention;
[0016] FIG. 9 is a top view of the substrate of FIG. 8 having
undergone the process as provided in FIGS. 3-7; and
[0017] FIG. 10 is a flow diagram of the method of adding conductive
traces to a substrate having a layer of ferroelectric polymer, in
accordance with embodiments of the present invention.
DESCRIPTION
[0018] In the following detailed description, reference is made to
the accompanying drawings which form a part hereof wherein like
numerals designate like parts throughout, and in which is shown by
way of illustration specific embodiments in which the invention may
be practiced. It is to be understood that other embodiments may be
utilized and structural or logical changes may be made without
departing from the scope of the present invention. Therefore, the
following detailed description is not to be taken in a limiting
sense, and the scope of the present invention is defined by the
appended claims and their equivalents.
[0019] Embodiments in accordance with the present invention provide
methods for removing resist material from conductive materials on a
ferroelectric polymer layer. The methods do not incorporate a
subtractive metal patterning process, eliminating the use of
chemicals that can damage the underlying conductive layers.
[0020] FIG. 3 is a side view of a substrate 2 prior to undergoing
the process of adding a conductive layer 20 on a conductive polymer
layer 18 to a ferroelectric polymer layer 16, in accordance with an
embodiment of the present invention. The substrate 2 comprises a
ferroelectric polymer layer 16 covering a first conductive layer
14. The conductive layer 14 refers to the materials used in the
art, also known as a metallization layer. Aluminum is the
predominant conductive material used for the conductive layer to
form interconnections between semiconductor devices. Other metals
can be used as well as non-metal conductive materials.
[0021] FIG. 4 is a side view of the substrate 2 of FIG. 3 with a
conductive polymer layer 18 covering the ferroelectric polymer
layer 16. The conductive polymer layer 18 is deposited onto the
substrate 2 using a spin deposition and cure process.
[0022] FIG. 5 is a side view of the substrate 2 of FIG. 4 provided
with photoresist 22 covering selected portions of the conductive
polymer layer 18. A photoresist mask is formed in a process
including photoresist spin deposition, lithographic patterning and
resist developing, followed by removal of the undeveloped
photoresist.
[0023] FIG. 6 is a side view of the substrate 2 of FIG. 5 after
having undergone a plasma etching process to remove the exposed
conductive polymer layer 18 followed by photoresist 22 removal from
the now patterned conductive polymer layer 18.
[0024] FIG. 7 is a side view of the substrate 2 of FIG. 6 after
having undergone an electroless plating process to deposit a
conductive layer 20 on top of the patterned conductive polymer
layer 18. The conductive polymer layer 18 is used as a seed layer
to enable the plating operation. The plating process is optimized
to minimize plating on the vertical sidewalls of the conductive
polymer layer 18.
[0025] It is readily apparent that the conductive layer 20 is not
exposed to resist removal chemicals, preventing the possibility of
damage to the conductive layer 20 due to chemical reactivity.
[0026] FIG. 8 is a top view of a substrate 4 prior to undergoing a
process of adding a conductive layer to form conductive traces to
the substrate 4 with a ferroelectric polymer layer, in accordance
with an embodiment of the present invention. Metal layers 32 are
formed on silicon oxide layers 24. The metal and silicon oxide
layers 32, 24 were patterned using conventional lithography and
etch processes.
[0027] FIG. 9 is a top view of the substrate 4 of FIG. 8 having
undergone the process as provided in FIGS. 3-7. A conductive
polymer layer and a ferroelectric polymer layer (not shown)
separate the first conductor 32 and second conductor layer 20 at
the intersection of each.
[0028] FIG. 10 is a flow diagram of the method in accordance with
embodiments of the present invention. The method comprises: forming
a conductive polymer layer on top of a ferroelectric polymer layer
50; using conventional lithography and etch processes to pattern
the conductive polymer layer 52; removing the patterning
photoresist using etch and clean processes 54; and depositing a
metal layer on the conductive polymer layer using an electroless
plating process, the electroless plating process optimized to
minimize metal deposition on the side walls of the conductive
polymer and the areas where a metal layer is not desired 56.
[0029] Embodiments in accordance with the present invention
eliminate the need for a subtractive metal patterning process to
pattern a conductive layer above a ferroelectric polymer. Instead,
a selective electroless deposition process is used. A conductive
polymer is used as a seed layer for the electroless plating of the
metal layer. A cost saving is provided by eliminating the chemical
costs associated with conventional resist removal processing. The
methods also potentially eliminate the requirement for aggressive
and environmentally unsafe chemical-based photoresist removal
processes.
[0030] Although specific embodiments have been illustrated and
described herein for purposes of description of the preferred
embodiment, it will be appreciated by those of ordinary skill in
the art that a wide variety of alternate and/or equivalent
implementations calculated to achieve the same purposes may be
substituted for the specific embodiment shown and described without
departing from the scope of the present invention. Those with skill
in the art will readily appreciate that the present invention may
be implemented in a very wide variety of embodiments. This
application is intended to cover any adaptations or variations of
the embodiments discussed herein. Therefore, it is manifestly
intended that this invention be limited only by the claims and the
equivalents thereof.
* * * * *