U.S. patent application number 11/108638 was filed with the patent office on 2005-08-18 for multi-layer substrate module and wireless terminal device.
This patent application is currently assigned to MITSUBISHI DENKI KABUSHIKI KAISHA. Invention is credited to Isota, Youji, Itoh, Kenji, Katsura, Takatoshi, Maeda, Kenichi, Nagano, Hiroaki, Ono, Masayoshi, Shimozawa, Mitsuhiro, Suematsu, Noriharu, Takagi, Tadashi.
Application Number | 20050179136 11/108638 |
Document ID | / |
Family ID | 11736200 |
Filed Date | 2005-08-18 |
United States Patent
Application |
20050179136 |
Kind Code |
A1 |
Katsura, Takatoshi ; et
al. |
August 18, 2005 |
Multi-layer substrate module and wireless terminal device
Abstract
In a multi-layer substrate module receiving from an external
earth node (20) supply of a reference potential (Vss) for
grounding, a plurality of ground lines (170-1, 170-2, 170-3) are
provided respectively corresponding to a plurality of internal
circuits (210, 220, 230). Moreover, a common node (Ncmn) for
coupling the ground lines (170-1, 170-2, 170-3) is provided in an
insulating layer (105C) of the multi-layer substrate module. The
common node (Ncmn) is electrically coupled to the earth node 20
through a ground pin terminal 204 shared by the plurality of
internal circuits (210, 220, 230). Preferably, the common node
(Ncmn) is provided in the lowest insulating layer of the
multi-layer substrate module. Thus, parasitic inductance of the
portion through which an earth current flows, that is, the portion
common to the plurality of internal circuits (210, 220, 230), can
be suppressed with a small number of ground pin terminals.
Accordingly, the inflow phenomenon of the earth current between the
plurality of internal circuits (210, 220, 230) is prevented,
enabling stable operation.
Inventors: |
Katsura, Takatoshi; (Hyogo,
JP) ; Itoh, Kenji; (Hyogo, JP) ; Nagano,
Hiroaki; (Hyogo, JP) ; Isota, Youji; (Hyogo,
JP) ; Shimozawa, Mitsuhiro; (Hyogo, JP) ;
Takagi, Tadashi; (Hyogo, JP) ; Suematsu,
Noriharu; (Hyogo, JP) ; Ono, Masayoshi;
(Hyogo, JP) ; Maeda, Kenichi; (Hyogo, JP) |
Correspondence
Address: |
OBLON, SPIVAK, MCCLELLAND, MAIER & NEUSTADT, P.C.
1940 DUKE STREET
ALEXANDRIA
VA
22314
US
|
Assignee: |
MITSUBISHI DENKI KABUSHIKI
KAISHA
Tokyo
JP
|
Family ID: |
11736200 |
Appl. No.: |
11/108638 |
Filed: |
April 19, 2005 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11108638 |
Apr 19, 2005 |
|
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|
10048500 |
Feb 14, 2002 |
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6906411 |
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10048500 |
Feb 14, 2002 |
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PCT/JP00/04305 |
Jun 29, 2000 |
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Current U.S.
Class: |
257/758 ;
257/E23.079 |
Current CPC
Class: |
H01L 2924/00 20130101;
H01L 23/645 20130101; H03H 3/00 20130101; H05K 2201/09972 20130101;
H03H 7/01 20130101; H01L 2924/0002 20130101; H05K 1/0237 20130101;
H05K 1/0216 20130101; H05K 1/141 20130101; H05K 9/0039 20130101;
H01L 23/552 20130101; H05K 2201/0715 20130101; H01L 23/5383
20130101; H05K 1/0298 20130101; H01L 2924/0002 20130101; H01L 23/50
20130101; H05K 2201/09254 20130101; H01L 2924/3011 20130101; H01L
2924/15312 20130101 |
Class at
Publication: |
257/758 |
International
Class: |
H01L 023/48 |
Claims
1-19. (canceled)
20. A multi-layer substrate module receiving supply of a reference
potential from an external potential node, comprising: a plurality
of insulating layers laminated to each other; at least one
reference potential transmission node electrically coupled to said
external potential node; a plurality of internal circuits each
including at least one circuit element formed either in one of said
insulating layers or on a surface of said multi-layer substrate
module; and a plurality of reference potential lines provided
respectively corresponding to said plurality of internal circuits,
for transmitting said reference potential, wherein said multi-layer
substrate module is mounted on a main board, said multi-layer
substrate module further comprising: a plurality of signal
transmission nodes each for receiving and outputting an electric
signal to and from said main board; and a metal coating film formed
so as to cover an outer surface of said multi-layer substrate
module, and electrically coupled to said external potential node,
wherein each of said reference potential lines is electrically
coupled to said metal coating film, and said metal coating film is
formed without contacting said plurality of signal transmission
nodes.
21. The thin film magnetic memory device according to claim 20,
wherein each of said reference potential lines is extended in a
horizontal direction by using a single layer of said insulating
layers.
Description
TECHNICAL FIELD
[0001] The present invention relates to a multi-layer substrate
module, and more particularly, relates to a multi-layer substrate
module on which electronic circuits operating in a high frequency
range are formed, and a wireless terminal device including circuits
mounted on such a multi-layer substrate module.
BACKGROUND ART
[0002] In recent years, electronic equipments are increasingly
reduced in size and weight. According to this trend, reduction in
size, weight and thickness as well as compounding are increasingly
realized for the circuit substrates for use in such electronic
equipments. In particular, high-frequency wireless communication
devices including mobile phones utilize a multi-layer substrate
using ceramics, based on, e.g., the excellent dielectric
characteristics of the ceramics and the multi-layer technology.
Recently, such a multi-layer substrate is increasingly reduced in
size and thickness.
[0003] An electronic circuit group forming the electronic
equipments such as the aforementioned wireless communication
devices is used as a multi-layer substrate module formed on a
multi-layer substrate. In such a multi-layer substrate module, not
only an integrated circuit group is mounted on the top surface of
the substrate, but also circuit elements are actively formed in a
layer within the substrate, thereby forming an electronic circuit
group using these circuit elements. Therefore, this is particularly
advantageous for reduction in size and weight.
[0004] FIG. 18 is a cross-sectional view of a multi-layer substrate
module illustrating a common arrangement example of electronic
circuits in such a multi-layer substrate module.
[0005] Referring to FIG. 18, the multi-layer substrate module 100
is mounted on a main board 10, and receives supply of a reference
potential Vss for grounding from an earth node 20 provided on the
main board 10. The multi-layer substrate module 100 is a lamination
of a plurality of insulating layers 105 formed from ceramics or the
like.
[0006] The multi-layer substrate module 100 includes electronic
circuits 210, 220, 230 therein. Hereinafter, the electronic
circuits formed in the multi-layer substrate module 100 are
sometimes simply referred to as internal circuits. Circuit elements
forming the internal circuits are arranged in the insulating layers
105 or on the top surface of the multi-layer substrate module. In
general, passive elements such as coils and resistors are formed
within the insulating layers, and semiconductor elements such as
transistors and diodes are mounted on the surface of the
multi-layer substrate module as integrated circuits.
[0007] FIG. 18 exemplarily shows the case where the multi-layer
substrate module is formed from three internal circuits 210, 220,
230. The internal circuit 210 includes circuit elements 211 and 212
formed in the insulating layers 105. Similarly, the internal
circuit 220 includes a circuit element 221 that is an integrated
circuit mounted on the multi-layer substrate module, and circuit
elements 222, 223 formed in the insulating layers 105. The internal
circuit 230 includes circuit elements 231, 232 and 233 formed in
the insulating layers 105.
[0008] Although not specifically shown in the figure, the
multi-layer substrate module 100 includes, as appropriate, pattern
wirings for connecting these circuit elements. Transmission of
electric signals between the multi-layer substrate module 100 and
the main board 10 is conducted through signal transmission nodes
202 provided as, e.g., pin terminals. At least one of the signal
transmission nodes is connected to the earth node 20 on the main
board 10 in order to ground the multi-layer substrate module 100.
Hereinafter, these signal transmission nodes are sometimes simply
referred to as pin terminals 202, and the signal transmission node
connected to the earth node is sometimes referred to as ground pin
terminal 204 in order to distinguish it from the pin terminals
202.
[0009] A main ground line 150 connected to the ground pin terminal
204 is formed within the multi-layer substrate module 100 so as to
extend through the insulating layers 105 in the vertical direction.
Sub ground lines 215, 225, 235 are provided between the respective
internal circuits and the main ground line 150. The main ground
line 150 and the sub ground lines 215, 225, 235 electrically couple
the respective internal circuits to the earth node 20 provided on
the main board on which the multi-layer substrate module 100 is
mounted, so that the internal circuits can receive supply of the
reference potential Vss for grounding. Hereinafter, the main ground
line and the sub ground lines are sometimes collectively referred
to as a ground line group.
[0010] However, if the internal circuits provided in the
multi-layer substrate module are circuits utilizing a high
frequency, their operation stability may be degraded due to
parasitic inductance of the ground line group.
[0011] FIG. 19 is a conceptual diagram illustrating the problems
that occur in the internal circuits due to the parasitic inductance
of the ground line group. FIG. 19 exemplarily shows the problems
that occur between the internal circuits 210 and 220.
[0012] Referring to FIG. 19, the internal circuit 210 is
electrically coupled to the earth node 20 through the sub ground
line 215 and the main ground line 150. Similarly, the internal
circuit 220 is connected to the earth node 20 through the sub
ground line 225 and the main ground line 150. Provided that
parasitic inductance of the main ground line 150 is Lgrd, impedance
due to the parasitic inductance Lgrd, Z=.omega..multidot.Lgrd
(where .omega.=2.multidot..pi..multidot.f; f is a frequency of a
current), increases with increase in frequency.
[0013] Accordingly, in high-frequency operation, an earth current
Igrd that is supposed to flow from the internal circuit 210 into
the earth node 20 may possibly flow into another internal circuit
220 (Igrd') through the sub ground line 225, rather than flowing
through the main ground line 150 having high impedance.
[0014] Such an earth current Igrd flowing into another internal
circuit as inflow current Igrd' may possibly destabilize the
operation of that internal circuit 220. Hereinafter, such a
phenomenon as shown in FIG. 19 is sometimes referred to as an
inflow phenomenon of the earth current.
[0015] In particular, such a problem greatly affects an internal
circuit provided in the upper layer portion of the multi-layer
substrate module that is subjected to increased parasitic
inductance of the main ground line 150.
[0016] An integrated circuit mounted on a multi-layer substrate
module such as a semiconductor chip has also suffered from the same
problem.
[0017] FIG. 20 is a cross-sectional view showing a common
arrangement example of a plurality of electronic circuits formed on
a multi-layer substrate module.
[0018] Referring to FIG. 20, internal circuits 230 and 240 are
integrated circuits including, e.g., semiconductor elements. In
such an integrated circuit, a metal coating film for grounding is
formed on its back surface, so that the integrated circuit is often
grounded by the metal coating film.
[0019] For example, in the example of FIG. 22, the internal
circuits 230 and 240, that is, integrated circuits, are
respectively grounded by metal coating films 235 and 245.
[0020] In the case where the internal circuits 230 and 240 are
integrally formed as a single chip on the multi-layer substrate
module, the metal coating films 235 and 245 integrally serve as a
single ground electrode. Accordingly, forming a sub ground line 255
between the integrated metal coating film 235, 245 and the main
ground line 150 provided within the multi-layer substrate module
100 enables grounding of the internal circuits provided on the
multi-layer substrate module.
[0021] However, the internal circuits 230 and 240 arranged as such
may also be subjected to the inflow phenomenon of the earth current
described in connection with FIG. 19 during high-frequency
operation. This phenomenon is increased particularly for the
internal circuits arranged on the multi-layer substrate module, due
to the longer path length of the main ground line 150 and thus
higher parasitic inductance Lgrd.
[0022] On the other hand, such a problem may also occur in a single
internal circuit formed in the multi-layer substrate module. For
example, a CDMA (Code Division Multiple Access)-based mobile phone
uses a frequency band of about 1 to 2 GHz. However, components of
such a mobile phone like a low noise amplifier (hereinafter, also
referred to as a high-frequency amplifier circuit) and an
orthogonal mixer may suffer from these problems.
[0023] FIG. 21 is a circuit diagram showing the structure of a
common high-frequency amplifier circuit.
[0024] Referring to FIG. 21, the high-frequency amplifier circuit
300 includes a transistor 310 serving as an amplifying element, and
resistive elements R1 to R4, capacitors C1 to C5 and an inductor L
that are arranged around the transistor 310. These peripheral
elements form a bias resistance, a coupling capacitance or the like
for the transistor 310. A field effect transistor is exemplarily
used as the transistor 310.
[0025] The high-frequency amplifier circuit 300 is driven by a
driving potential Vdd, and amplifies a voltage signal applied to
its input node IN for output to its output node OUT. Since the
high-frequency amplifier circuit 300 is a commonly used circuit,
detailed description of the operation thereof is omitted.
[0026] FIG. 22 is a conceptual diagram illustrating the problems
that occur in the high-frequency amplifier circuit 300 due to the
parasitic inductance of the ground lines.
[0027] Referring to FIG. 22, the peripheral elements (resistive
elements, capacitors, and inductor) in FIG. 21 are shown as blocks
321 to 326. In the transistor 310, a current path is formed between
the drain 312 and the source 313 according to an input to the gate
311. The potential level in response to the source-drain current
appears at the output node OUT, whereby signal amplification is
conducted.
[0028] In this case, the gate 311, drain 312 and source 313 of the
transistor 310 are respectively connected to the main ground line
150 through the blocks 322, 324 and 325 as the peripheral elements
so as to be grounded. In this case, as shown in FIG. 19, impedance
due to the parasitic inductance Lgrd of the main ground line 150 is
increased during high-frequency operation. Therefore, a drain
current that is supposed to flow into the earth node 20 partially
flows as an input to the gate 311 of the transistor 310. This
phenomenon destabilizes the amplifying function of the transistor
310, whereby the high-frequency amplifier circuit 300 may possibly
be rendered in an unstable state that is generally called
"oscillation phenomenon".
[0029] FIG. 23 is a block diagram showing arrangement of the
orthogonal mixer.
[0030] Referring to FIG. 23, a 90.degree. distributor 402
distributes a high-frequency signal RF (frequency frf) as a
high-frequency signal RFI for I channel and a high-frequency signal
RFQ for Q channel that have a phase difference of 90.degree. from
each other. A 0.degree. distributor 404 distributes a local
oscillation signal LO (frequency flo) as signals that are in phase
with each other.
[0031] The orthogonal mixer 400 includes a first mixer 410a for I
channel and a second mixer 410b for Q channel. The orthogonal mixer
400 receives the high-frequency signal RFI for I channel and the
high-frequency signal RFQ for Q channel, which have a phase
difference of 90.degree. from each other, and the local oscillation
signal LO to produce base band signals BBI and BBQ. The
high-frequency signal RF corresponds to, e.g., a receiving wave in
the mobile phones. The frequency flo of the local oscillation
signal LO is half the frequency frf of the high-frequency signal
RF.
[0032] The first mixer 410a produces the base band signal BBI
(frequency .vertline.frf-flo.vertline.) based on the high-frequency
signal RFI for I channel and the local oscillation signal LO.
Similarly, the second mixer 410b receives the high-frequency signal
RFQ for Q channel and the local oscillation signal LO to produce
the base band signal BBQ (frequency
.vertline.frf-flo.vertline.).
[0033] FIG. 24 is a waveform chart illustrating an ideal output
signal of the orthogonal mixer.
[0034] Referring to FIG. 24, in an ideal state, the first mixer
410a and the second mixer 410b operate in a symmetric manner to
produce the base band signals BBI and BBQ having the same amplitude
and also having a phase difference of 90.degree. from each
other.
[0035] FIG. 25 is a conceptual diagram illustrating the problems
that occur in the orthogonal mixer 400 due to the parasitic
inductance of the ground lines.
[0036] It is now assumed that the orthogonal mixer 400 is formed
within the multi-layer substrate module. In this case, when the
first mixer 410a and the second mixer 410b are connected to the
main ground line 150, the adverse effect resulting from the inflow
of the earth current as described before is not caused by another
internal circuit, but occurs between the first mixer 410a and the
second mixer 410b in the orthogonal mixer circuit.
[0037] More specifically, as shown in FIG. 27, the earth current
Igrd that is supposed to flow from, e.g., the first mixer 410a to
the earth node 20 flows into the second mixer 410b through a
current path shown by a dashed line due to the parasitic inductance
Lgrd of the main ground line 150. This may possibly degrade
orthogonality of both mixers. Due to the adverse effect of the
inflow current Igrd', an amplitude variation .DELTA.A and a phase
variation .DELTA..phi. are produced between the base band signals
BBI and BBQ, as shown in FIG. 26, resulting degraded orthogonal
accuracy of the orthogonal mixer.
DISCLOSURE OF THE INVENTION
[0038] It is an object of the present invention to provide a
multi-layer substrate module having ground-line arrangement for a
plurality of electronic circuits mounted thereon, which is capable
of preventing operation from being destabilized during
high-frequency operation.
[0039] It is another object of the present invention to provide a
wireless terminal device including an orthogonal mixer mounted on a
multi-layer substrate module, and capable of ensuring sufficient
orthogonal accuracy even during high-frequency operation.
[0040] According to the present invention, a multi-layer substrate
module receiving supply of a reference potential from an external
potential node includes a plurality of insulating layers laminated
each other, at least one reference potential transmission node, a
plurality of internal circuits and a plurality of reference
potential lines. The reference potential transmission node is
electrically coupled to the external potential node. The plurality
of internal circuits each includes at least one circuit element
formed either in the corresponding insulating layer or on a surface
of the multi-layer substrate module. The plurality of reference
potential lines are provided respectively corresponding to the
plurality of internal circuits, for transmitting the reference
potential.
[0041] Preferably, the reference potential transmission nodes are
provided respectively corresponding to the plurality of internal
circuits, and one of the plurality of reference potential lines has
smaller parasitic inductance than that of each of the remainder of
the plurality of first lines.
[0042] Preferably, the reference potential transmission node is
provided as a node common to the plurality of internal circuits.
The multi-layer substrate module further includes a common wiring
node provided in one of the plurality of insulating layers and
electrically coupled to the reference potential transmission node,
and each of the reference potential lines is electrically coupled
to the common wiring node in the insulating layer in which the
common wiring node is provided.
[0043] Preferably, the multi-layer substrate module is mounted on a
main board. The multi-layer substrate module further includes a
plurality of signal transmission nodes for receiving and outputting
an electric signal to and from the main board, and a metal coating
film formed so as to cover an outer surface of the multi-layer
substrate module, and electrically coupled to the external
potential node. Each of the reference potential lines is
electrically coupled to the metal coating film, and the metal
coating film is formed without contacting the plurality of signal
transmission nodes.
[0044] Preferably, one of the plurality of internal circuits is a
first integrated circuit that is mounted on a top surface of the
multi-layer substrate module, another one of the plurality of
internal circuits is a second integrated circuit that is mounted on
the top surface of the multi-layer substrate module, the first and
second integrated circuits are mounted on the same chip having a
common metal electrode, and reference potential lines corresponding
to the first and second integrated circuits are directly provided
between the first and second integrated circuits and the external
potential node, respectively.
[0045] In such a multi-layer substrate module, an earth current can
be reliably guided to the earth node even during high frequency
operation, whereby operation of the internal circuits can be
prevented from being destabilized.
[0046] According to another aspect of the present invention, a
wireless terminal device for selectively receiving a desired
channel out of a plurality of channels includes an antenna, a local
oscillator, a phase shifter, a first mixer circuit, a second mixer
circuit, and a base band circuit. The antenna receives a high
frequency signal including the plurality of channels. The local
oscillator oscillates a local oscillation signal. The phase shifter
produces first and second high frequency signals having a phase
difference of 90.degree. from each other in response to the
high-frequency signal from the antenna. The first mixer circuit
mixes the first high frequency signal from the phase shifter with
the local oscillation signal from the local oscillator to produce a
first base band signal. The second mixer circuit mixes the second
high frequency signal from the phase shifter with the local
oscillation signal from the local oscillator to produce a second
base band signal. The base band circuit demodulates the first and
second base band signals. The first and second mixer circuits are
mounted on a multi-layer substrate module that receives supply of a
reference potential from an external potential node. The
multi-layer substrate includes a plurality of insulating layers
laminated each other, at least one reference potential transmission
node electrically coupled to the external potential node, and first
and second reference potential lines provided respectively
corresponding to the first and second mixer circuits, for
transmitting the reference potential.
[0047] Preferably, the wireless terminal device further includes an
amplifier circuit provided between the antenna and the phase
shifter, for amplifying the high frequency signal from the antenna.
The amplifier circuit is mounted on the multi-layer substrate
module, and the amplifier circuit includes a transistor for signal
amplification. The transistor includes a control node receiving the
high frequency signal as an input, a first conductive node
receiving supply of a driving potential and producing an output
signal to the phase shift circuit, and a second conductive node
forming a current path between the second conductive node and the
first conductive node according to the input to the control node.
The multi-layer substrate module further includes a first sub
reference potential line provided between the first control node
and the external potential node, and a second sub reference
potential line provided between the second conductive node and the
external potential node independently of the first sub reference
potential line.
[0048] In such a wireless terminal device, an orthogonal mixer is
mounted on a multi-layer substrate module that is advantageous in
terms of reduced size, and orthogonal accuracy of the orthogonal
mixer can be ensured even during high frequency operation.
BRIEF DESCRIPTION OF THE DRAWINGS
[0049] FIG. 1 is a schematic diagram showing the external
appearance of a multi-layer substrate module according to a first
embodiment of the present invention.
[0050] FIG. 2 is a cross-sectional view of the multi-layer
substrate module taken along the line X-X' in FIG. 1.
[0051] FIG. 3 is a cross-sectional view of a multi-layer substrate
module according to a second embodiment of the present
invention.
[0052] FIG. 4 is a schematic diagram showing the external
appearance of a multi-layer substrate module according to a third
embodiment of the present invention.
[0053] FIG. 5 is a cross-sectional view of the multi-layer
substrate module taken along the line Y-Y in FIG. 4.
[0054] FIG. 6 is a block diagram showing the overall structure of a
mobile phone including a multi-layer substrate module according to
a fourth embodiment of the present invention.
[0055] FIG. 7 is a block diagram specifically showing the structure
of a receiving circuit in FIG. 6.
[0056] FIG. 8 is a circuit diagram showing the structure of an
orthogonal mixer in FIG. 7.
[0057] FIG. 9 is a cross-sectional view showing an arrangement
example of ground lines in the multi-layer substrate module
according to the fourth embodiment of the present invention.
[0058] FIG. 10 is a cross-sectional view showing another
arrangement example of ground lines in the multi-layer substrate
module according to the fourth embodiment of the present
invention.
[0059] FIG. 11 is a cross-sectional view showing a vertical
arrangement example of an orthogonal mixer formed in the
multi-layer substrate module according to the fourth embodiment of
the present invention.
[0060] FIG. 12 is a top view showing a horizontal arrangement
example of the orthogonal mixer formed in the multi-layer substrate
module according to the fourth embodiment of the present
invention.
[0061] FIG. 13 is a cross-sectional view showing another vertical
arrangement example of the orthogonal mixer formed in the
multi-layer substrate module according to the fourth embodiment of
the present invention.
[0062] FIG. 14 is a circuit diagram of a low noise amplifier in
FIG. 7.
[0063] FIG. 15 is a conceptual diagram illustrating integration of
two integrated circuits into a single chip.
[0064] FIG. 16 is a cross-sectional view showing an arrangement
example of ground lines for a one-chip low noise amplifier formed
on the multi-layer substrate according to the fourth embodiment of
the present invention.
[0065] FIG. 17 is a circuit diagram of the one-chip low noise
amplifier formed on the multi-layer substrate module according to
the fourth embodiment of the present invention.
[0066] FIG. 18 is a cross-sectional view of a multi-layer substrate
module illustrating a common arrangement example of electronic
circuits in such a multi-layer substrate module.
[0067] FIG. 19 is a conceptual diagram illustrating the problems
that occur in the internal circuits due to parasitic inductance of
the ground lines.
[0068] FIG. 20 is a cross-sectional view showing a common
arrangement example of a plurality of internal circuits formed on
the multi-layer substrate module.
[0069] FIG. 21 is a circuit diagram showing an example of the
structure of a common high-frequency amplifier circuit.
[0070] FIG. 22 is a conceptual diagram illustrating the problems
that occur in the high-frequency amplifier circuit of FIG. 21 due
to the parasitic inductance of the ground lines.
[0071] FIG. 23 is a block diagram showing arrangement of the
orthogonal mixer.
[0072] FIG. 24 is a waveform chart illustrating an ideal output
signal of the orthogonal mixer.
[0073] FIG. 25 is a conceptual diagram illustrating the problems
that occur in the orthogonal mixer of FIG. 23 due to the parasitic
inductance of the ground lines.
[0074] FIG. 26 is a waveform chart illustrating the problems shown
in FIG. 25.
BEST MODE FOR CARRYING OUT THE INVENTION
[0075] Hereinafter, a multi-layer substrate module according to
embodiments of the present invention will be described in detail in
conjunction with the accompanying drawings. Note that the same or
corresponding portions are denoted with the same reference numerals
and characters throughout the figures, and description thereof will
not be repeated.
First Embodiment
[0076] Referring to FIG. 1, a multi-layer module 110 according to
the first embodiment of the present invention is mounted on a main
board 10. Although not specifically shown in the figure, a
plurality of wiring patterns are formed on the main board 10, and
electrically coupling the wiring patterns to signal transmission
nodes 202 provided as, e.g., pin terminals allows for transmission
of electric signals between the main board 10 and the internal
circuits formed within the multi-layer substrate module 110.
[0077] Referring to FIG. 2, the multi-layer substrate module 110
receives supply of a reference voltage Vss by connecting to an
earth node 20 provided on the main board 10. Hereinafter, such
supply of the reference potential Vss is sometimes simply referred
to as "grounding". For example, the wiring pattern of the earth
node 20 is formed on the back surface of the main board 10, and
used also for grounding the multi-layer substrate module 110.
[0078] At least one of the signal transmission nodes is
electrically coupled to the earth node 20 in order to ground the
multi-layer substrate module 110. Hereinafter, these signal
transmission nodes are sometimes simply referred to as pin
terminals 202, and the signal transmission node coupled to the
earth node 20 is sometimes referred to as ground pin terminal 204
in order to distinguish it from the pin terminals 202.
[0079] The multi-layer substrate module 110 further includes a
plurality of ground lines 160-1, 160-2 and 160-3 respectively
corresponding to a plurality of internal circuits 210, 220 and 230.
Since a circuit element group forming each internal circuit is the
same as that described in connection with FIG. 18, description
thereof will not be repeated. Although three internal circuits are
herein provided in the multi-layer substrate module, this is by way
of example only, and the structure of the present invention is
applicable to the case where any plurality of internal circuits are
provided.
[0080] The ground lines 160-1, 160-2, 160-3 are respectively
connected to a plurality of independent ground pin terminals 204-1,
204-2, 204-3. The ground pin terminals 204-1, 204-2, 204-3 are
electrically coupled to the earth node 20.
[0081] Each ground line is formed in a via hole extending through
insulating layers 105.
[0082] The ground line 160-1 is provided in a via hole 165-1 formed
between the ground pin terminal 204-1 and the internal circuit 210.
Similarly, the ground line 160-3 is provided in a via hole 165-3
formed between the ground pin terminal 204-1 and the internal
circuit 230.
[0083] The ground line 160-2 is formed from a plurality of ground
lines 162-2a, 162-2b and 162-2c connected in parallel with each
other. The plurality of ground lines 162-2a, 162-2b and 162-2c are
respectively provided in a plurality of via holes 165-2a, 165-2b
and 165-2c formed in parallel between the ground pin terminal 204-2
and the internal circuit 220.
[0084] Thus, providing a ground line for each internal circuit in
the multi-layer substrate module can prevent the circuit operation
from being destabilized by the inflow phenomenon of the earth
current between the internal circuits.
[0085] Moreover, by forming the via hole 160-1 having a larger
cross-sectional area than that of the other via holes so as to
increase the cross-sectional area of the ground line 160-1, a
parasitic inductance value of the ground line 160-1 can be
suppressed. A parasitic inductance value of the ground line 160-2
can also be suppressed since the ground line 160-2 is formed from a
plurality of ground lines connected in parallel.
[0086] Thus, by increasing as required the cross-sectional area of
a via hole in which a ground line is formed, and
parallel-connecting the wirings formed in a plurality of via holes,
parasitic inductance of the ground line corresponding to an
internal circuit for which grounding is to be particularly
reinforced can be suppressed. This prevents the inflow phenomenon
of the earth current from occurring between the internal circuits
during high-frequency operation in a more reliable manner, enabling
stable operation of the internal circuits.
Second Embodiment
[0087] Referring to FIG. 3, a multi-layer substrate module 120
according to the second embodiment of the present invention
includes a plurality of internal circuits 210, 220, 230 as in the
case of the multi-layer substrate module 110 according to the first
embodiment of the present invention. Since the structure and the
number of internal circuits are the same as those described in the
first embodiment, description thereof will not be repeated.
[0088] In the first embodiment of the present invention, ground pin
terminals are respectively provided for a plurality of internal
circuits. Accordingly, the ground pin terminals corresponding to
the number of internal circuits are required, resulting in an
increased number of pins. Therefore, in the multi-layer substrate
module 120, a common node Ncmn for integrating the ground lines
provided for the respective internal circuits is formed in the
insulating layer 105C, so that only the common node is coupled to
the ground pin terminal 204.
[0089] A plurality of ground lines 170-1, 170-2, 170-3 respectively
corresponding to the plurality of internal circuits 210, 220 and
230 are coupled to each other in the insulating layer 105C having
the common node Ncmn. The common node Ncmn is electrically coupled
to the earth node 20 through the ground pin terminal 204 shared by
the plurality of internal circuits.
[0090] In particular, by providing the common node Ncmn in a lower
insulating layer in the multi-layer substrate module 120,
preferably in the lowest insulating layer, parasitic inductance
between the common node Ncmn and the earth node 20, that is,
parasitic inductance of the portion through which the earth current
flows, the portion common to the plurality of internal circuits
210, 220, 230, can be suppressed with a small number of ground pin
terminals.
[0091] Such a structure enables the inflow phenomenon of the earth
current between the internal circuits to be suppressed with a small
number of ground pin terminals, allowing stable operation of the
internal circuits.
Third Embodiment
[0092] Referring to FIG. 4, a multi-layer substrate module 130
according to the third embodiment of the present invention is
different from the multi-layer substrate module 110 of the first
embodiment shown in FIG. 1 in that the multi-layer substrate module
130 includes a metal coating film 270 formed on its outer surface
(side surface) so as to be connected to the earth node 20. The
metal coating film 270 is electrically coupled to the earth node
20, and serves as a ground electrode. The metal coating film 270 is
not formed in the regions around the pin terminals 202 other than
the earth terminal 204 so that the pin terminals 202 do not contact
the metal coating film 270.
[0093] Referring to FIG. 5, the multi-layer substrate module 130
according to the third embodiment of the present invention includes
a plurality of internal circuits 210, 220, 230 as in the case of
the multi-layer substrate module 110 according to the first
embodiment of the present invention. Since the structure and the
number of internal circuits are the same as those described in the
first embodiment, description thereof will not be repeated.
[0094] Ground lines 180-1, 180-2 and 180-3 respectively
corresponding to the internal circuits 210, 220 and 230 are
electrically coupled to the metal coating film 270 serving as a
ground electrode. This enables the internal circuits to be
respectively grounded through ground lines extending in the
horizontal direction rather than through the via holes extending
through the insulating layers in the vertical direction. Therefore,
parasitic inductance of each ground line can be suppressed.
[0095] Moreover, since the pin terminals 202 do not contact the
metal coating film 270 for grounding, grounding of the internal
circuits can be reinforced while ensuring the pin terminals for
inputting/outputting an electric signal.
Fourth Embodiment
[0096] In the fourth embodiment, how a low noise amplifier and an
orthogonal mixer provided in a mobile phone, one of the wireless
terminal devices for which accurate high-frequency operation is
particularly required, is mounted in a multi-layer substrate module
will be described.
[0097] Referring to FIG. 6, a mobile phone 500 including a
multi-layer substrate module according to the fourth embodiment of
the present invention includes an antenna 510, a transmitting
circuit 512, a receiving circuit 514, and a transmission/reception
branching filter 516.
[0098] This mobile phone is based on the CDMA, and conducting
transmission and reception simultaneously via a single antenna 510.
Accordingly, a transmission frequency is set to a different value
from a reception frequency. The transmission frequency is herein
set to a value lower than the reception frequency. Therefore, the
transmission/reception branching filter 516 is formed from a band
pass filter for passing only a transmitting wave TX therethrough
and a band pass filter for passing only a receiving wave RX
therethrough, so that the transmitting wave TX hardly reaches the
receiving circuit 514.
[0099] Referring to FIG. 7, the receiving circuit 514 includes a
low noise amplifier (LNA) 518, a band pass filter (BPF) 520, a
90.degree. distributor 402, a local oscillator 524, an in-phase
(0.degree.) distributor 404, an orthogonal mixer 400, low pass
filters 532, 534, and a base band circuit 536.
[0100] The low noise amplifier 518 amplifies the receiving wave RX
(hereinafter, sometimes referred to as high frequency signal RF)
passing through the transmission/reception branching filter 516 at
a high SN (Signal to Noise) ratio. The band pass filter 520 removes
an unwanted signal and increases only a required high frequency
signal RF. The 90.degree. distributor 402 produces a high frequency
signal RFI for I channel and a high frequency signal RFQ for Q
channel that have a phase difference of 90.degree. from each other,
based on the high frequency signal RF passing through the band pass
filter 520.
[0101] The local oscillator 524 oscillates a local oscillation
signal LO. The frequency flo of the local oscillation signal LO is
half the frequency frf of the high frequency signal RF. The
0.degree. distributor 404 distributes the local oscillation signal
LO from the local oscillator 524 to a first mixer 410a and a second
mixer 410b of the orthogonal mixer 400. The local oscillation
signals LO applied to the first mixer 410a and the second mixer
410b are in phase with each other.
[0102] The first mixer 410a for I channel mixes the high frequency
signal RFI from the 90.degree. distributor 402 with the local
oscillation signal LO from the 0.degree. distributor 404 to produce
I-channel base band signals BBI and /BBI. The first mixer 410a is
of a differential type (balanced type), so that the base band
signal /BBI has a phase difference of 180.degree. from the base
band signal BBI.
[0103] Similarly, the second mixer 410b for Q channel mixes the
high frequency signal RFQ from the 90.degree. distributor 402 with
the local oscillation signal LO from the 0.degree. distributor 404
to produce Q-channel base band signals BBQ and /BBQ. The second
mixer is also of a differential type (balanced type), so that the
base band signal /BBQ has a phase difference of 180.degree. from
the base band signal BBQ. Thus, the first mixer 410a and the second
mixer 410b can together form the orthogonal mixer 400.
[0104] The base band circuit 540 receives the I-channel base band
signals BBI, /BBI and the Q-channel base band signals BBQ, /BBQ
passing through the low pass filters 532, 534 for demodulation into
a low-frequency (audio) signal.
[0105] Referring to FIG. 8, the first mixer 410a includes a high
pass filter 552a for passing the high frequency signal RFI
therethrough, a low pass filter 554a for passing the local
oscillation signal LO therethrough, a diode pair 556a for mixing
the high frequency signal RFI with the local oscillation signal LO,
and a capacitor 558a connected between the diode pair 556a and the
earth node 20. The first mixer 410a further includes inductors
560a, 562a and a resistive element 564a, which form a low pass
filter for passing therethrough the I-channel base band signals
BBI, /BBI output to both ends of the diode pair 556a.
[0106] The first mixer 410a is grounded to the earth node 20
through a ground line 570a. Parasitic inductance of the ground line
570a is herein denoted with Lgda.
[0107] The second mixer 410b has the same structure as that of the
first mixer 410a, and includes a high pass filter 552b, a low pass
filter 554b, a diode pair 556b, a capacitor 558b, inductors 560b,
562b, and a resistive element 564b. A ground line 570b is provided
for the second mixer 410b, so that the second mixer 410b is
electrically coupled to the earth node 20 for grounding. Parasitic
inductance of the ground line 570b is denoted with Lgdb.
[0108] In order to ensure orthogonal accuracy between the first
mixer 410a and the second mixer 410b, each mixer thus has the same
circuit structure.
[0109] Note that FIG. 8 shows the structure of an even harmonic
mixer by way of example only. The phenomena caused by the parasitic
inductance as described above occur also in a common mixer.
Accordingly, the structure of the present invention is applicable
not only to the even harmonic mixer but also to a common mixer.
[0110] Referring to FIG. 9, the first mixer 410a and the second
mixer 410b are formed in a multi-layer substrate module 140
according to the embodiment of the present invention. The
constituent elements 552a to 564a and 552b to 564b of the first
mixer 410a and the second mixer 410b as described in connection
with FIG. 8 are each formed on the top surface of the multi-layer
substrate module 140 or within the insulating layers 105.
[0111] The ground lines 570a and 570b are separated from each
other, and the ground lines 570a and 570b are electrically coupled
to independent ground pin terminals 204a and 204b, respectively. By
separating the ground lines respectively corresponding to the first
mixer 510a and the second mixer 410a from each other, the inflow
phenomenon of the earth current between the mixers and thus
degradation in orthogonal accuracy can be prevented.
[0112] Referring to FIG. 10, the first mixer 410a and the second
mixer 410b may be grounded through a common node Ncmn according to
the structure of the second embodiment. In this case, like FIG. 3,
the common node Ncmn for coupling the ground lines 570a and 570b is
provided in any one of the plurality of insulating layers, i.e.,
105C. The common node Ncmn is connected to the earth node 20
through a ground pin terminal 204.
[0113] Thus, the portion of the ground line that is shared by the
first mixer 410a and the second mixer 410b is limited to the
portion from the common node Ncmn to the earth node 20, enabling
sufficient suppression of the parasitic inductance of this portion.
Moreover, providing the common connection mode Ncmn in the lowest
insulating layer enables suppression of the parasitic inductance.
This can prevent degradation in orthogonal accuracy due to the
inflow of the earth current.
[0114] Referring to FIG. 11, symmetrically arranging the first
mixer 410a and the second mixer 410b in the multi-layer substrate
module 140 enables further improved orthogonal accuracy between the
mixers. In other words, as described in connection with FIG. 8, the
first mixer 410a and the second mixer 410b have the same circuit
structure. Therefore, the circuit elements of the first mixer 410a
correspond to the circuit elements of the second mixer 410b.
[0115] Accordingly, symmetrically arranging the respective
corresponding circuit elements within the multi-layer substrate
module 140 enables further improved orthogonal accuracy between the
first mixer 410a and the second mixer 410b. More specifically, as
shown in FIG. 11, the corresponding components of the respective
mixers are formed in the same insulating layer 105. FIG. 11
exemplarily shows the arrangement of some of the circuit elements
of the mixer.
[0116] As shown in FIG. 11, the ground lines 570a and 570b are also
provided in contact holes 575a and 575b extending through the same
insulating layers. Moreover, provided that the ground lines 570a
and 570b have the same shape and cross-sectional area, the
parasitic inductances Lgda and Lgdb have the same value, enabling
improved orthogonal accuracy of the first mixer 410a and the second
mixer 410b.
[0117] As shown in FIG. 12, symmetrically arranging the respective
components also in the horizontal direction with respect to the
symmetric axis Z-Z' enables further improved orthogonal accuracy of
the first mixer 410a and the second mixer 410b.
[0118] As shown in FIG. 13, such symmetric arrangement of the
constituent elements of the first mixer and the second mixer as
well as the ground lines is also applicable to the case where
grounding is realized with the common node Ncmn as shown in FIG.
10. In this case as well, the via holes 575a and 575b having the
same shape is formed so as to extend between the first mixer 410a
and the second mixer 410b and the insulating layer 105C in which
the common node Ncmn is formed, and the ground lines 570a and 570b
having the same shape and cross-sectional area are provided within
the respective via holes. Thus, the parasitic inductances Lgda and
Lgdb of the ground lines of the respective mixers have the same
value, allowing for improvement in orthogonal accuracy.
[0119] Hereinafter, how the low-noise amplifier 518 is mounted on
the multi-layer substrate module will be described.
[0120] Referring to FIG. 14, the circuit structure of, e.g., the
high frequency amplifier described in connection with FIG. 21 may
be applied to the low noise amplifier 518. The low noise amplifier
518 includes a field effect transistor 310, and blocks 321 to 326
representing a peripheral circuit element group. A high frequency
signal RF, i.e., a receiving wave, is applied to the input node IN,
and an amplified signal output from the output node OUT is
transmitted to the band pass filter 520. Note that, although FIG.
14 shows the structure using the field effect transistor, a bipolar
transistor may be used instead of the field effect transistor. In
this case, the base, collector and emitter of the bipolar
transistor need only be connected instead of the gate, source and
drain of the field effect transistor.
[0121] The low noise amplifier 518 is grounded by independent
ground lines 585g and 585s. The ground line 585s corresponds to the
source 313 of the field effect transistor 310. On the other hand,
the ground line 585g corresponds to the gate 311 and drain 312 of
the field effect transistor 310.
[0122] The ground lines 585s and 585g can be electrically coupled
to a plurality of independent ground pin terminals, respectively,
according to the structure of the ground lines 570a, 570b in FIG.
9. With such a structure, the wiring for grounding the gate 311 and
the wiring for grounding the source 311 can be separated from each
other in the field effect transistor 310. Accordingly, a
source-drain current flowing through the channel of the field
effect transistor 310 for signal amplification will not flow into
the gate 311, whereby oscillation of the overall operation of the
low noise amplifier 518 can be prevented.
[0123] Alternatively, a common node Ncmn formed in the lowest
insulating layer of the multi-layer substrate module may integrate
the ground lines 585g and 585d so that the ground lines are
connected to the earth node 20 through a common ground pin
terminal, according to the structure of the ground lines 570a, 570b
in FIG. 10. In this case as well, the parasitic inductance value of
the portion shared by the wiring for grounding the gate 311 and the
wiring for grounding the source 312 can be suppressed, enabling
stabilized operation of the low noise amplifier 518.
[0124] Hereinafter, arrangement of the low noise amplifier in which
a plurality of transistors are connected in series with each other
for signal amplification will be described.
[0125] In this case, for example, two integrated circuits 518a and
518b having the same structure as that of the low noise amplifier
518 in FIG. 14 may be integrated into a single chip in order to
form an integrated circuit (low noise amplifier) 590.
[0126] As shown in FIG. 15, the integrated circuit 590 is formed
from the integrated circuits 518a and 518b connected to each other.
Metal ground electrodes 595a and 595b respectively provided on the
back surfaces of the integrated circuits are connected together
into a common metal electrode 595. In the case where the low noise
amplifier 590 formed from such a one-chip integrated circuit is
mounted on the top surface of the multi-layer substrate module 140
according to the method of FIG. 20, a ground line is shared by the
field effect transistors in the respective amplifier modules.
Therefore, the oscillation phenomenon due to the inflow of the
earth current is more likely to occur during high-frequency
operation.
[0127] Referring to FIG. 16, the one-chip low noise amplifier 590
is mounted on the top surface of the multi-layer substrate module
140. However, the transistor elements in the integrated circuits
518a and 518b are not connected to back metals 595a, 595b,
respectively, and ground lines are provided directly between the
integrated circuits and corresponding ground pin terminals.
[0128] A ground line 585-a is provided for the integrated circuit
518a. As described in connection with FIG. 14, the ground line
585-a includes a ground line 585g-a corresponding to the gate 311
of the transistor in the low noise amplifier and a ground line
585s-a corresponding to the source 313 thereof. Similarly, a ground
line 585-b is provided for the integrated circuit 518b. The ground
line 585-b includes ground lines 585g-b and 585s-. These ground
lines are connected to the earth node 20 through independent ground
pin terminals 204-1 to 201-4, respectively.
[0129] Referring to FIG. 17, this structure can prevent the
oscillation phenomenon caused by the earth current flowing into the
gate 311a of a field effect transistor 310a in the integrated
circuit 518. Similarly, the earth current is prevented from flowing
from another portion into the gate 311b of the field effect
transistor 310b in the integrated circuit 518b, whereby the
oscillation phenomenon can be prevented.
[0130] Note that, according to the structure as shown in FIG. 13,
the ground lines for the integrated circuits 518a and 518b may be
electrically coupled to the earth node 20 by a common ground pin
terminal through a common node Ncmn provided in the lowest layer of
the multi-layer substrate module. In this case as well, parasitic
inductance of the portion shared by the ground lines is suppressed,
whereby the oscillation phenomenon can be prevented.
[0131] Although the structure of FIG. 17 also includes the field
effect transistors as amplifying elements, current-driven bipolar
transistors may alternatively be used.
[0132] Note that FIGS. 15 to 17 illustrate the structure
integrating two integrated circuits (low noise amplifier circuits).
However, even when three or more integrated circuits are
integrated, independent ground lines need only be provided for the
respective integrated circuits, as sown in FIG. 16.
[0133] It should be understood that the embodiments disclosed
herein are by way of illustration and example only in all respects
and are not to be taken by way of limitation. The scope of the
present invention is defined by the appended claims rather than the
foregoing description, and it is intended by the appended claims to
cover all modifications that fall within the sense and scope that
are equivalent to the appended claims.
INDUSTRIAL APPLICABILITY
[0134] The multi-layer substrate module of the present invention is
applicable to mounting of the internal circuits of a high frequency
portable wireless device such as mobile phone.
* * * * *