U.S. patent application number 11/058805 was filed with the patent office on 2005-06-30 for method and apparatus for signal transmission and reception.
This patent application is currently assigned to Broadband Physics, Inc.. Invention is credited to Miller, William J..
Application Number | 20050141603 11/058805 |
Document ID | / |
Family ID | 26709811 |
Filed Date | 2005-06-30 |
United States Patent
Application |
20050141603 |
Kind Code |
A1 |
Miller, William J. |
June 30, 2005 |
Method and apparatus for signal transmission and reception
Abstract
A method and modem for communicating serial input data over a
transmission link. Serial input data is partitioned into parallel
data elements prior to rotation by an invertible linear mapping.
Resulting frames of parallel signal elements sequentially modulate
a carrier, which is then transmitted over the link. After receipt
of the modulated carrier from the link, the signal is demodulated
and assembled into frames of parallel signal elements which are
de-rotated by an inverse linear mapping. Thresholding the result of
the inverse mapping recovers the parallel data elements, which are
then re-assembled into serial output data. The linear mapping
employs: 1) commuting rotation matrices for convolutionally
rotating data vectors into signal vectors and vice-versa; 2) filter
bank polyphase rotation matrices; or 3) computationally efficient
multi-rate wavelet filter banks. Transmitter pre-emphasis places
most of the information in lower baseband frequencies;
complimentary de-emphasis occurs in the receiver. Logarithmic
amplification of the baseband signal prior to carrier modulation
improves modulation gain and transmit channel noise attenuation.
Coefficients of the rotation matrix of the receiver are adaptively
equalized to correct for transmission path distortion. FM
double-side band is employed in systems requiring minimized cost
and complexity. FM single-side band is employed in systems in which
bandwidth reduction is desirable. AM is also employable.
Inventors: |
Miller, William J.;
(Sunnyvale, CA) |
Correspondence
Address: |
WEINGARTEN, SCHURGIN, GAGNEBIN & LEBOVICI LLP
Ten Post Office Square
Boston
MA
02109
US
|
Assignee: |
Broadband Physics, Inc.
|
Family ID: |
26709811 |
Appl. No.: |
11/058805 |
Filed: |
February 16, 2005 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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11058805 |
Feb 16, 2005 |
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10744345 |
Dec 23, 2003 |
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10744345 |
Dec 23, 2003 |
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10379870 |
Mar 5, 2003 |
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10379870 |
Mar 5, 2003 |
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09894168 |
Jun 27, 2001 |
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6532256 |
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09894168 |
Jun 27, 2001 |
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09450085 |
Nov 29, 1999 |
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6263017 |
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09450085 |
Nov 29, 1999 |
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08634179 |
Apr 18, 1996 |
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5995539 |
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08634179 |
Apr 18, 1996 |
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08342259 |
Nov 18, 1994 |
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08342259 |
Nov 18, 1994 |
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08033518 |
Mar 17, 1993 |
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5367516 |
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Current U.S.
Class: |
375/222 |
Current CPC
Class: |
H04L 25/03343 20130101;
H04L 69/40 20130101; H04K 1/02 20130101 |
Class at
Publication: |
375/222 |
International
Class: |
H04B 001/38 |
Claims
1. A system for transmitting a first data stream over a
transmission medium in conjunction with a second signal,
comprising: a first coder for receiving the first data stream on a
plurality of channels thereof, for coding the first data stream,
and for providing parallel, coded output data samples; a first
synthesizer, in communication with the first coder, for assembling
the parallel, coded output data samples into sequences of data
frames each comprising a plurality of data coordinates, for
converting each frame of data coordinates into orthogonal frames of
signal coordinates using an invertible transformation, and for
sequentially providing the signal coordinates as a first signal
representation of the first data stream; and a summing circuit, in
communication with the first synthesizer, for combining the first
signal representation of the first data stream with the second
signal and for coupling the resulting combination signal to the
transmission medium.
Description
RELATED APPLICATIONS
[0001] This application is a continuation-in-part of application
Ser. No. 08/342,259, filed Nov. 18, 1994 (Attorney Docket MILL-001
AX), which is a continuation of U.S. Pat. No. 5,367,516, filed Mar.
17, 1993, issued Nov. 22, 1994 (Attorney Docket MILL-001XX).
FIELD OF THE INVENTION
[0002] This invention relates to signal transmitting and receiving
systems and more particularly to modems employing polyphase
filtering techniques.
BACKGROUND OF THE INVENTION
[0003] As is known in the art, a modulator-demodulator (modem) is
an electronic device that modulates transmitted signals and
demodulates received signals. The modem generally provides an
interface between digital devices and an analog communications
system to thus make possible analog transmission of digital
information between two terminals or stations. Such transmissions
may be over a transmission link such as a telephone line, cellular
communication link, satellite link, and cable TV, each of which
being generally band-limited. That is, the information may be
transmitted across the transmission link only over a predetermined
range of frequencies having a maximum bit error rate.
[0004] As is also known, a modem is used to provide wireless
transmission between transmitting and receiving stations. Such
wireless communication can be employed in a variety of
applications: VHF, IS-54 (cellular), IS-95 (cellular), SPADE
(satellite), GSM (cellular), HDTV, and SAT-TV, each using one of
the following linear modulation techniques: QAM; QPSK; Pi/4 DPSK;
GMSK. As with the transmission line application, the bandwidth of
each is limited within an acceptable bit error rate.
[0005] While most modems are capable of providing compensation for
Guassian noise, impulse noise is not well managed. Most modems also
require higher powered amplification means since, in all cases,
amplitude distortion is unacceptable. In broadcast environments, it
is well understood that FM transmission provides superior impulse
noise handling. Also in FM transmission schemes, the transmitted
signal may be amplified with almost 100% efficiency since the
information carrying portion of the signal is identified by the
zero-crossings of the signal. Thus, amplitude distortion is
ignored.
[0006] Despite these apparent advantages, only a few isolated
examples exist of nonlinear frequency modulation used within
modems. Frequency shift keying, providing a 300 bits per second
data rate, essentially utilized two frequencies, each for
representing a separate data bit. The next major development in
modems was the use of phase modulation, beginning with two phase
modulation, then four, then eight. A combination of amplitude and
phase modulation was later developed, also referred to as
quadrature amplitude modulation or QAM.
[0007] A subsequent development was Guassian minimum shift keying,
or GMSK. At first glance, such coding resembles four phase
modulation, though in order to avoid amplitude modulation, a
special low pass filter referred to as a Guassian filter was
applied to the data going into the phase modulator. Since some have
regarded the Guassian filter as akin to an integrator, an argument
could be made that such a modulation scheme results in frequency
modulation, since GMSK can be demodulated with an FM discriminator.
Yet, GMSK applies linear functions of the data to in-phase and
quadrature carriers to produce a linear modulation; whereas, true
FM is mathematically equivalent to the application of trigonometric
functions of the filtered signal to an in-phase and quadrature
carrier. FM is a non-linear modulation, which was perceived as
inefficient for data transmission since the transmitted frequency
spectrum is not a simple translation of the baseband spectrum as in
AM modems. A further perceived problem with FM for a modem is that
it only accepts real signals into its voltage controlled
oscillator. That is, in the equivalent in-phase and quadrature
carrier method for FM, both paths send the same data resulting in a
double sideband spectrum of a single carrier, which was regarded as
redundant and therefore inefficient compared to the double-sideband
spectra of the dual in-phase and quadrature carriers of QAM modems.
Also, single-sideband (SSB) transmission was considered undesirable
for modems because there is no simple way to efficiently demodulate
an AM-SSB signal without a carrier reference. FM was dismissed as
an analog technique totally unrelated to data transfer except with
regard to FSK.
[0008] In an ordinary modem, binary data is normally passed through
a baseband raised-cosine filter which limits the bandwidth of the
baseband signal so that when one multiplies the baseband signal by
a carrier, control over the passband signal bandwidth is provided
without intersymbol interference. The output of an ordinary modem
includes signals having discrete phases such that data included
therein can be identified by discerning the phase of each bit. For
instance, whenever a signal has a +90.degree. phase shift it is
interpreted as 0 and when the phase shift is -90.degree. it
represents 1, etc. Thus, in an ordinary modem employing a carrier,
the phase and/or amplitude of the carrier signal are determined by
the current symbol being transmitted. The carrier assumes only
selected values of phase and amplitude for most of the duration of
each symbol and graphical plots of all the selected phase-amplitude
pairs are called the constellation points of the modem. ordinary
modems require that there be distinct points in the constellation
for each possible value of the transmitted symbol. Furthermore, bit
errors occur in the receiver if the points are mis-assigned due to
intersymbol interference or due to noise on the link.
[0009] In many applications the computational requirements of the
modem introduce a delay which is detrimental to the operation of
the system. For example, digital voice transmission and multiple
access networks are sensitive to delay in the modem. Furthermore,
the rate at which a modem may transmit and receive data per unit of
bandwidth is called the modem bandwidth efficiency. In the
discipline of Digital Information Theory this efficiency is known
to be maximized when the transmitted signal has the maximum entropy
or randomness. The maximum entropy transmission is band-limited
Guassian noise, and among other properties Guassian noise will not
dwell at a distinct phase-amplitude pair as in a constellation.
Thus it is desirable to provide a modem having a passband carrier
which minimizes the internal processing time and also maximizes the
bandwidth efficiency without sacrificing bit error rate.
SUMMARY OF THE INVENTION
[0010] In accordance with the present invention, a method of
communicating a sequential series of symbols over a transmission
link comprises the steps of multi-rate polyphase filtering the
symbols, using the filtered output to modulate a carrier,
transmitting the modulated carrier across the transmission link,
receiving the modulated signal, applying the inverse of the
transmitter polyphase filter to the received signal, and
thresholding and re-assembling the output of the inverse filter to
recover the transmitted symbols.
[0011] Data is transmitted from a first modem to a second modem
across a wireless transmission link by forming input data frames
from the input data, multiplying the input frames by a rotation
matrix, frequency modulating and transmitting the rotation matrix
output, receiving and frequency demodulating the transmitted data,
multiplying the demodulated signal by a second rotation matrix, and
re-assembling the de-rotated data to recover the original data.
[0012] The presently disclosed modem for communicating symbols
across a transmission link includes a transmit portion and a
receive portion, wherein the transmit portion comprises a
partitioning element for dividing the input into parallel data
channels, a baseband transmit rotation section for polyphase
transforming the channeled data into parallel signal channels, a
re-arrangement of the parallel signal channels into sequential
serial samples, a carrier modulator for providing a modulated
signal, and a transmitter for transmitting the modulated signal.
The receive portion comprises a receiver for receiving the
transmitted, modulated signal, a demodulator for demodulating the
received signal into parallel signal channels, a receive rotation
section for polyphase transforming the demodulated, received signal
into parallel data channels, and an assembling element for
combining the parallel data channels into a serial data signal.
[0013] The polyphase filtration of these methods and this modem
enables FM modulation of the transmitted symbols since only a real
component of the original symbols is generated. FM, whether
achieved using frequency modulation or phase modulation of the
input signal, provides enhanced immunity to non-Guassian noise,
provides high bandwidth efficiency, utilizes non-coherent IF and
thus requires no carrier recovery, is of lower cost than
conventional modems in part due to the absence of A/D converters,
provides low co-interference due to the FM capture effect, and is
compatible with analog signals, owing to the use of commuting
operators. More power efficient, but potentially less linear
amplifiers such as Class B and Class C can be employed since zero
crossings are used to determine data content; carrier recovery is
not required. Prior art modems employing modulation schemes such as
QAM cannot employ such non-linear amplification. Further, satellite
modems employing the presently disclosed method and modem save on
TWT backoff power and thus are more energy efficient since
intermodulation is not a problem, while personal computers achieve
higher data rates without sacrificing bit error rate.
[0014] The polyphase filtration of the foregoing embodiments is
implemented in a first embodiment by a wavelet filter (e.g.
Quadrature Mirror Filter) pair. The partitioning element partitions
the serial data among plural, parallel data channels prior to
linear-phase FIR vector filtration, the filter coefficients being
square matrices, whereby the input data are transformed into
parallel signal channels. The transformation is by way of a
convolutional rotation of the input data vector. Each coordinate of
the output signal is confined to a frequency sub-band which
slightly overlaps its neighbor. Pre-emphasis in the transmit
portion, prior to the rotation in a first embodiment, places most
of the information in the lower baseband frequencies. This is due
to the noise probability density function of an FM discriminator
that is proportional to the square of the frequency. De-emphasis in
the receiver results in an addition to the overall gain equation.
This equation, in one embodiment, includes contributions by the FM
transmitter gain, the de-emphasis gain, and a noise reduction gain.
The pulse amplitude levels representing the partitioned data bits
within each sub-band need not necessarily correspond to an integer
number of bits, as long as all of the levels in all the subbands
correspond to an integer value.
[0015] The receiver portion provides the de-rotation filter for
performing a reverse transformation to recover the original data.
In a first embodiment, the reverse transformation commutes with the
modulation transformation. In a further embodiment, the
coefficients of the de-rotation filter in the receiver are
adaptively selected for equalization to correct for transmission
path distortion, since the analyzer is a fractional-rate FIR
filter. Thus, a near-perfect reconstruction filter is employed. A
threshold operator takes the nearest integer coordinate values as
the most likely symbol.
[0016] In a further embodiment of the present invention, the
commuting rotation and de-rotation filters are derived from the
elementary matrices which describe a geometric rotation of a
vector. Their function is to transform an input data vector within
a data coordinate system into a signal vector within a signal
coordinate system such that the sequentially serialized coordinates
of the signal vector would form the digital samples of a
bandlimited analog signal. Yet another approach to the matrices is
mathematical transformation by way of discrete wavelet
transformations.
[0017] In each of the transmitter portion and receiver portion, the
rotation operator is ideally a computationally efficient multi-rate
wavelet filter bank. Logarithmic amplification of the baseband
signal prior to introduction into the FM transmitter modulator
results in an improvement in the modulation gain out of the
receiver. Further, as a by-product of the logarithmic amplification
prior to the transmitter and de-amplification after the receiver,
noise introduced in the transmit channel is attenuated.
[0018] FM double-side band is employed in systems requiring minimal
cost and complexity. FM single-side band is easily implemented in
systems in which the bandwidth reduction is desired. AM modulation
of a carrier is also implemented in a further embodiment.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The foregoing features of this invention as well as the
invention itself may be more fully understood from the following
detailed description of the drawings in which:
[0020] FIG. 1 is a diagrammatical representation of a signal
decomposition-recomposition system;
[0021] FIG. 1A is a diagrammatical representation of a cascade
analyzer;
[0022] FIG. 1B is a diagrammatical representation of a cascade
synthesizer;
[0023] FIG. 1C is a diagrammatical representation of a tree
analyzer;
[0024] FIG. 1D is a diagrammatical representation of a tree
synthesizer;
[0025] FIG. 2 is a block diagram of a signal encryptor;
[0026] FIG. 3 is a block diagram of a transmitting and receiving
system for the transmission and reception of secure signals;
[0027] FIG. 4 is a block diagram of a signal encrypting
transmitting and receiving system;
[0028] FIG. 5 is a block diagram of a modem;
[0029] FIG. 6 is a block diagram of a coded modem;
[0030] FIG. 7 is a block diagram of a coded tree modem;
[0031] FIG. 8 is a block diagram of a system for receiving and
transmitting compressed signals;
[0032] FIG. 9 is a block diagram of a signal compression system for
transmitting and receiving signals over a digital link;
[0033] FIG. 10 is a block diagram of a modem;
[0034] FIG. 11 is a block diagram of an FM modem according to the
present invention;
[0035] FIG. 12 is a flow diagram of a method for transmitting data
using a double-side band variant of the FM modem of FIG. 11;
[0036] FIG. 13 is a flow diagram of a method for transmitting data
using a single-side band variant of the FM modem of FIG. 11;
[0037] FIG. 14 is a flow diagram of sub-steps invoked by the method
of FIGS. 12 and 13;
[0038] FIG. 15 is a flow diagram of a method for receiving data
using the FM modem of FIG. 11; and
[0039] FIG. 16 is a flow diagram of sub-steps invoked by the method
of FIG. 15.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0040] Referring now to FIG. 1 a signal decomposition-recomposition
system 10 includes an analyzer 12 having an input port 14a and a
pair of output ports 16a, 16b. Each of the output ports 16a, 16b
are coupled to a corresponding pair of input ports 18a, 18b of a
synthesizer 20.
[0041] An analog input signal X fed to the analyzer input port 14a
is decomposed into a pair of signals W' and V' each of which is fed
to a corresponding one of the output ports 16a, 16b. Similarly, a
pair of input signals W', V' fed to the synthesizer input ports
18a, 18b are reconstructed in to an output signal Y at a
synthesizer output port 22a. The decomposition and reconstruction
processes performed by the analyzer 12 and the synthesizer 20 as
well as the signals V' and W' will be described further
hereinbelow. Suffice it here to say that the input signal X is
decomposed into the signals V' and W' such that the signals V' and
W' may later be combined to exactly reconstruct the input signal
X.
[0042] It should be noted that the sub-analyzer and sub-synthesizer
building blocks operate digitally, however, for clarity in the
description, the signal conditioning circuits required to convert
between analog signals and digital signals in the system have been
omitted. Such signal conditioning circuits will be described in
conjunction with FIG. 4 below. Briefly, however, and as will be
described in conjunction with FIG. 4, when an input signal to a
system building block, e.g. a sub-analyzer or sub-synthesizer,
corresponds to an analog signal, the signal should first be fed
through a filter having filter characteristics selected to provide
Nyquist filtering. The appropriately filtered signal may then be
sampled by an analog-to-digital converter (ADC). Similarly, if the
output from a system building block is to be an analog signal, the
signal should be fed to a digital-to-analog converter (DAC) and fed
to a second filter likewise selected having filter characteristics
selected to provide Nyquist filtering.
[0043] The sub-synthesizer 20 performs the inverse operation of the
sub-analyzer 12, and vice versa. That is, if the signals W' and V'
from a sub-analyzer are applied as input signals to the
sub-synthesizer input ports 18a, 18b, the output signal Y will be
identical to the sequence of input samples, X, except for a
predetermined time delay. In a preferred embodiment, the time delay
corresponds to one sample time.
[0044] Likewise, applying the signals V', W' to the respective
synthesizer input ports 18a, 18b and then applying the resultant
output signal Y to the analyzer input port 14a should provide at
the respective analyzer output ports 16a, 16b the original input
signals V' and W'.
[0045] As described above, the analyzer 12 and synthesizer 20
provide signal decomposition and reconstruction functions. As will
be described below, the sub-analyzer and sub-synthesizer may be
used as building blocks and may be coupled to provide more complex
circuits which may themselves be coupled to provide a variety of
signal transmitting and receiving systems. Furthermore, the
analyzer 12 and synthesizer 20 as well as other system building
blocks to be described hereinbelow may be efficiently implemented
in hardware, software or by a combination of hardware and
software.
[0046] The analyzers and synthesizers to be described herein
operate on an ordered sequence of numbers, which may be, but are
not limited to, samples from an analog to digital converter (ADC).
For example, samples may be expressed as X(0), X(1), X(2), and X(3)
where X(0) is the most recent sample. Each of the binary numbers
X(0) through X(3) has a particular value within a predetermined
range of values. An 8-bit ADC, for example, may provide a range of
decimal values between -128 to +127.
[0047] The sequence of samples X(0) through X(3) may be considered
as the coordinates of a vector [X] in a 4-dimensional space. A
linear transformation may be made from the coordinate system of X
to another coordinate system in the same 4-dimensional space. Thus,
the vector X may be transformed to a vector Y by a "rotation"
matrix C. In matrix notation this may be expressed as:
[Y]=[C]*[X]
[0048] Using axes of the new coordinate system that are mutually
orthogonal, the vector Y has components which correspond to the
projections of X onto the new transformation axes. Such projections
are provided by forming a vector dot product.
[0049] In a 4 dimension case for example, a set of Walsh codes,
Code 1-Code 4, may be provided as:
[0050] Code 1=+1+1+1+1
[0051] Code 2=+1-1+1-1
[0052] Code 3=+1+1-1-1
[0053] Code 4=+1-1-1+1
[0054] The Walsh codes Code 1-Code 4 above represent an orthogonal
coordinate axis in the 4-dimensions of this time ordered space.
Codes 1-4 have a length corresponding to the square root of 4,
(i.e. the dot product of code 1 with itself equals 4) and thus are
not unit vectors.
[0055] The rotation matrix C may be expressed as: 1 [ C ] = C 1 = +
1 + 1 + 1 + 1 C 2 = + 1 - 1 + 1 - 1 C 3 = + 1 + 1 - 1 - 1 C 4 = + 1
- 1 - 1 + 1
[0056] That is, the rows C.sub.1-C.sub.4 of the rotation matrix C
correspond to the components of the Walsh code vectors such that
matrix multiplication between the rotation matrix C and the vector
X is equivalent to the dot product of a particular one of the
vectors C.sub.1-C.sub.4 with the vector X. The components of the
row vector X may be expressed as:
[X]=[X(0), X(1), X(2), X(3)]
[0057] A new state vector Y may be expressed as:
[Y]=[[C.sub.1]*[X], [C.sub.2]*[X], [C.sub.3]*[X],
[C.sub.4]*[X]]
[0058] where * symbolizes a dot product operation between [X], and
the Walsh vectors [C.sub.1] through [C.sub.4]. The new state vector
[Y] completely describes the original state defined by [X] and may
be computed on every group of 4 samples X(0)-X(3).
[0059] The linear rotation operation is exactly invertible, and
thus:
[X]=[C{circumflex over ( )}][Y]
[0060] where [C{circumflex over ( )}] is the inverse of [C]. The
matrix C{circumflex over ( )} may be found from the relation:
[C{circumflex over ( )}]=1/L[C]
[0061] where L corresponds to the dimension of a row or column
vector of the matrix C{circumflex over ( )}.
[0062] In a two dimensional case, Walsh vectors may be expressed as
C.sub.1=[+1,+1] and C.sub.2=[+1,-1]. Thus, analyzers may be defined
having 2 outputs using the 2-dimensional vector above.
[0063] Walsh vectors of any dimension may be generated by the two
dimensional vectors C.sub.1, C.sub.2. That is, substitution of a
set of Walsh codes into a 2-dimensional generator matrix provides a
new Walsh code having twice the dimension. Using this procedure an
N-dimensional transformation needed to provide an analyzer, may be
provided. Thus, because of the way that Walsh vectors are
constructed from their two dimensional Walsh generators, higher
dimension analyzers and synthesizers may be constructed from the
2-dimensional case.
[0064] With this matrix transformation method, matrix equations for
providing a modem or a signal encryptor may be generated. The
fundamental operation in the requisite computations is addition and
subtraction of terms.
[0065] It should be noted that in the case of a cascade analyzer or
synthesizer provided using the matrix method with a matrix having N
dimensions, the lowest frequency channel is operated on by the
matrix vector C.sub.1 and each subsequent channel i is operated on
by a corresponding matrix vector C.sub.i until the highest
frequency channel is operated on by the matrix vector C.sub.N.
Thus, in the case of a 4 dimension matrix the lowest frequency
channel is operated on by the matrix vector C.sub.1 and the highest
frequency channel is operated on by the matrix vector C.sub.4. The
case of a tree analyzer or synthesizer provided by the matrix
method will be described in conjunction with FIGS. 1C and 1D
below.
[0066] In another preferred method the equations which describe the
sub-analyzer output signals V' and W' may be provided as:
V'=SHIFT*X(n-1)-BN*W' Equation 1
W'=2*X(n-1)-X(n)-X(n-2) Equation 2
[0067] In which:
[0068] V' corresponds to a scaling or filtering function of the
sampled input signal X;
[0069] W' corresponds to a residual or derivative of the sampled
input signal X;
[0070] X(n) corresponds to the most recent input sample;
[0071] X(n-1) and X(n-2) correspond to the two previous input
samples;
[0072] SHIFT corresponds to a variable set equal to a positive
power of 2 (such as 32, or 64, or . . . ); and
[0073] BN corresponds to a positive integer having a value between
O and SHIFT and is preferred to have a relatively small value.
[0074] As will be explained further below the scaling function V'
and the residual W' defined by Equations 1 and 2 may be evaluated
on alternate input samples of the input signal X, such that the
value of the residual W' corresponds to twice the difference
between the "center" sample, X(n-1), and the midpoint of a line
connecting the two nearest neighbors of X(n-1) here, the two
nearest neighbors being represented as X(n) and X(n-2). When
Equations 1 and 2 are evaluated on alternate input samples, only
the odd numbered (or alternatively only the even numbered) "center
points" are selected for the calculation. Thus, the output rate of
the sub-analyzer corresponds to one-half the input rate of the
input signal X.
[0075] The residual W' may also be interpreted as a deceleration
about the center point. Thus it is possible to define the residual
W' as an acceleration and substitute -W' for W' in the Equations 1
and 2 above to provide an alternate and essentially equivalent
expression for the residual W'.
[0076] Other implementations using more nearest neighbor points and
which define the residual W' as a higher order or first order
derivative of the function evaluated about the center point, may
also be used.
[0077] The interpretation of the residual W'(N) described above
indicates that the residual W'(N) responds only to changes in the
slope around alternate samples. Thus one characteristic of the
residual W' in the present invention is that the residual W' is
provided having a value of zero when the slope about the center
point is constant.
[0078] The conventionally defined residual W(n) is related to the
effective residual W'(n) as defined in the present invention by
W(n)=B*W'(n)
[0079] As a consequence of the definition for the residual W'(n) in
the present invention, signal compression based on linear or
non-linear quantization of the residual W'(n) (rather than the
residual W(n) as defined in the conventional approach) may result
in improved performance over compression schemes based upon
conventional definitions of the residual W(N) such as:
W(N)=X(n-1)-V(N)
[0080] The sub-synthesizer operation may be described by equations
3 and 4 below:
Y(n-1)=Y'(n-1)/SHIFT Equation 3
Y(n)=Y'(n)/SHIFT Equation 4
[0081] in which:
[0082] SHIFT corresponds to a power of 2 and
[0083] Y'(n-1)=V'+BN*W';
[0084] Y'(n)=2*Y'(1)-Y'(-)-SHIFT*W'; and
[0085] Y'(-) corresponds to a saved, previously calculated (i.e.
recursive), value of Y'(n).
[0086] By defining the variable SHIFT, as above and taking
advantage of the fact that multiplication and division by a power
of two is equivalent to a right or left shift on a binary computer,
practical implementations of these equations may be provided with
relatively little and simple hardware and are therefore
preferred.
[0087] Thus in the approach of the present invention, the residual
W' has been defined to provide a particular characteristic and the
sequence V' is selected to provide the remainder of the
sequence.
[0088] Referring now to FIG. 1A, a so-called "cascade analyzer" 24
includes a plurality of here N sub-analyzers. The cascade analyzer
24 may be provided by feeding the signal V'.sub.1 from an output
port of a first sub-analyzer 24a into the input port of a second
sub-analyzer 24b and feeding a signal V'.sub.2 from the output port
of the second sub-analyzer into the input port of a third analyzer
(not shown) and so on. The process continuing until a sub-analyzer
24N provides a signal V'.sub.N having a predetermined sample
rate.
[0089] For example, in a communication system it may be desirable
to couple a plurality of say N sub-analyzers as described above
where N is selected such that a signal V'.sub.N is selected such
that the signal V'.sub.N is provided having a sample rate which is
below twice the lower frequency cutoff of the communications link.
Since each sub-analyzer halves the sample rate to its input, the
various output signals, W'.sub.1, W'.sub.2 . . . W'.sub.N of the
cascade analyzer are provided at differing rates.
[0090] Referring now to FIG. 1B a so-called "cascade synthesizer"
26 may be provided from a plurality of sub-synthesizer 26a-26N
which may be of the type described above in conjunction with FIG.
1. The cascade synthesizer operates to provide the inverse
operation of the cascade analyzer.
[0091] Referring now to FIG. 1C a so-called "tree analyzer" 28 may
be provided by appropriately coupling a plurality of sub-analyzers
29a-29g each of which may be of the type described above in
conjunction with FIG. 1. Thus, in addition to a cascade emanating
from the scale function V'(N), it is also possible to have residual
cascades emanating from one or more residual sequences W'(N). That
is, the residual sequences W'(N) may themselves be considered as
inputs for a multi-resolution analysis. It is therefore, in that
case, possible to provide both the scaling function sequence V' and
the residual sequence W' having equal same sample rates. Here, the
sample rate corresponding to one-eighth the original sample
rate.
[0092] The tree analyzer 28 may be provided by analyzing each of
the residual sequence outputs W' until all such sequences are
brought down to one rate, which is normally below the Nyquist rate
of the lower cutoff frequency of a transmission link with which the
analyzer cooperates. The three level analyzer tree 28 is here
provided having all of its output 29a-29h at 1/8 the sample rate,
r, of the analog input signal, X. Each output sample may include
many more bits per sample than the input sample, however, the
numbers represented by those output samples will usually be small
in magnitude and easily re-quantized by a quantizer (not
shown).
[0093] Referring now to FIG. 1D a so-called "tree synthesizer" 30
may be provided from a plurality of sub-synthesizers 31a-31g, each
of which may be of the type described above in conjunction with
FIG. 1. The tree synthesizer 30 provides the inverse operation of
the tree analyzer 28 (FIG. 1C).
[0094] It should be noted that in each of the applications to be
described herein below in conjunction with FIGS. 2-8, the term
analyzer as used throughout FIGS. 2-8 may be used to indicate a
sub-analyzer, a cascade analyzer, or a tree analyzer element and
likewise, the term synthesizer referred to in FIGS. 2-8 may be used
to indicate a sub-synthesizer, a cascade synthesizer or a tree
synthesizer element, each of which have been described above in
conjunction with FIGS. 1-1D. Each of the analyzer and synthesizer
elements may be provided according to the matrix transformation
technique or alternatively each of the analyzer and synthesizer
elements may be provided according to the three point equations of
the forms of Equations 1 and 2 above, or alternatively still, each
of the analyzer and synthesizer elements may be provided according
to equations of the form:
W'=X(n)-X(n-2)
V'=X(n-1)
[0095] In the case where analyzers and synthesizers are provided as
tree type analyzers and synthesizers the matrix vectors C.sub.i
where i=1, 3, 5, etc. . . . operate on the channels in the bottom
portions of the tree analyzer or synthesizer while the matrix
vectors C.sub.i i=2, 4, 6, etc . . . operate on channels in the top
half of the tree analyzer or synthesizer. Thus, if the analyzer 28
having channels 29a-29h were provided by an 8 dimensional matrix
having vectors C.sub.1 through C.sub.8 then channels 29h through
29e would be operated on, respectively, by matrix vectors C.sub.1,
C.sub.3, C.sub.5, and C.sub.7 and channels 29d through 29a would be
operated on, respectively, by matrix vectors C.sub.2, C.sub.4,
C.sub.6, and C.sub.8.
[0096] Referring now to FIG. 2 a signal encryptor 32 includes an
analyzer 33 having signal encryption circuit 34, which may be
provided for example as a random number generator, coupled thereto.
The analyzer 33 is provided by coupling a plurality, here five,
sub-analyzers as shown. Each of the sub-analyzers may be of the
type and thus operate in a similar manner as the sub-analyzer
described above in conjunction with FIG. 1. Each of a plurality of
analyzer output ports 33a-33f are coupled to a corresponding one of
a like plurality of input ports 36a-36f of a synthesizer 36.
Likewise, the synthesizer 36 is provided by coupling a plurality,
here five, sub-synthesizers as shown. Each of the sub-synthesizers
may be of the type and thus operate in a similar manner as the
sub-synthesizer described above in conjunction with FIG. 1.
[0097] It should be noted that here five sub-analyzers and
sub-synthesizers are coupled as shown, however, those of ordinary
skill in the art will now appreciate that any number of
sub-analyzers and sub-synthesizers may be used. It should also be
noted, and as described above, that although cascade analyzers and
synthesizers are here shown, tree-type analyzers and synthesizers
may also be used. An input signal X may be decomposed, therefore
into any number N of signals. In general, and as mentioned above in
conjunction with FIG. 1, the decomposition procedure performed by
the analyzer and thus the number of coupled sub-analyzers may be
preferred to cease when the Nyquist frequency of the Nth signal
V.sub.N is below the known lower cutoff frequency of the input
signal X.
[0098] In general operational overview of the signal encryption
circuit 32, the input signal X, which may be for example a voice
signal, is fed to the analyzer input port 33a' and decomposed by
the analyzer 33 in the Manner described above in conjunction with
FIG. 1. Here, the input signal X is decomposed into signals
V.sub.1, V.sub.2, V.sub.3, V.sub.4, V.sub.5, and W.sub.1, W.sub.2,
W.sub.3, W.sub.4 and W.sub.5 as shown. To encrypt, the random
number generator 34, which may be provided for example as a digital
random number generator, feeds an encryption signal to each of the
signal paths of the residuals, W'.sub.1-W'.sub.5. The value of each
of the residuals, W'.sub.1-W'.sub.5 are thus modified to correspond
to signals E.sub.1-E.sub.5.
[0099] As shown here one method for encrypting the residuals
W'.sub.1-W'.sub.5 is to provide a logical exclusive or (XOR)
operation between the sign of the residuals W'.sub.1-W'.sub.5 and a
logical variable having a value corresponding to a logical one (as
shown). Alternatively, another method of encryption may be provided
by adding several individual secret binary bit streams to one or
all of the residuals W'. The residual signals W' are generally
provided having a relatively low power level and thus the residual
signals W'.sub.1-W'.sub.5 may appear simply as noise signals (i.e.
"buried" in noise) by either or both of the above mentioned
encryption techniques. Other methods of encrypting well known to
those of ordinary skill in the art may also be used including
permutation of channels and substitution of symbols. It should also
be noted that alternatively each of the signals V.sub.1'-V.sub.5'
may be encrypted or a combination of the signals W.sub.K' and
V.sub.K' may be encrypted.
[0100] It should also be noted that the signal encryptor 32 may be
modified to include digital cipher feedback, which is common in the
encryption art. To provide digital cipher feedback in the present
invention, each of the 5 XOR outputs from the analyzer should be
fed back to the inputs of 5 separate secret random number
generators (not shown) in the manner of the data encryption
standard (DES) for encryption.
[0101] It should also be noted that any means well known to those
of ordinary skill in the art for providing random digital numbers
including but not limited to the DES, with or without cipher
feedback may be used. Furthermore, other methods of deriving and
using the random numbers to modify the value of the residuals W'
including but not limited to additive noise techniques and the like
which do not use the XOR function may also be used.
[0102] The encrypted signals E.sub.1-E.sub.5 are subsequently
coupled to corresponding ones of the analyzer output ports 33a-33f
and then fed to the synthesizer input ports 36a-36e along with an
unmodified signal V5 fed to input port 36f. The synthesizer 36
employs Equations 3 and 4 to reconstruct the signals
E.sub.1-E.sub.5 fed thereto to provide a reconstructed output
signal Y which may be transmitted on a communication channel (not
shown) for example.
[0103] A receiver (not shown) receives the transmitted signal and
analyzes the signal to recover the signals V5 and E.sub.1-E.sub.5.
The receiver subsequently decrypts the signals E.sub.1-E.sub.5 to
recover the signals W.sub.1-W.sub.5 and re-synthesizes to get the
original signal X.
[0104] The synthesizer 36 reconstructs the signals E.sub.1-E.sub.5
such that the resultant reconstructed signal X' provided at the
synthesizer output port should not occupy more than the Nyquist
bandwidth. Thus it is possible to have the sampling frequency of
the highest frequency encrypted stage correspond to twice the upper
cutoff frequency of the transmission channel.
[0105] The reconstructed encrypted signal X' provided at the
synthesizer output port will of course have a different
(noise-like) power spectrum and a different average total power due
to the additive noise introduced. The input signal power may be
diminished to restrict the total channel power. Means for
restricting the total channel power may include means for
transmitting the power factor to the receiver by using the
amplitude of pilot tones which may be used to synchronize the
decryptor and an ADC. These pilot tones may be used to derive the
ADC clock by a phase locked loop for example and may be provided as
explicit narrow band tones or, alternately the pilot tones may be
provided as a secret coded sequence added to the residual W' to
hide the true value of the residual. The receiver would correlate
the appropriate residual in order to establish time
synchronization. Specific coded sequences (such as the GOLD codes
and JPL ranging codes) having suitable correlation properties
required for acquiring synchronization by this method are known in
the art of spread spectrum communications.
[0106] Furthermore the encryptor recovers the signal out of the
receiver substantially exactly like the original input signal
except for the presence of noise from the channel and noise-like
fluctuations due to imprecise timing synchronization of the ADC
converters in the transmitter and receiver ends.
[0107] The signal encryptor may also include a means for line
equalization (not shown). Such means are well known to those of
ordinary skill in the art of modem design. Variations in line loss
with frequency (tilt) and phase shift may be compensated by
adaptive filtering and often includes a precursor burst of known
energy to set the filter parameters and a means for periodically
modifying the equalizer coefficients based on a measure of the
quality of the received signal.
[0108] It should also be noted that if in the signal encryptor 32
the value of the input signal X is set to zero, then the signal
encryptor output signal X' would correspond to random noise
generated by the encrypting random number generator. Thus in this
case the signal encryptor 32 acts as a broadband random number
generator. Thus, the signal encryptor may be used as a generator to
provide a signal on the line which may be used in the line
equalization process.
[0109] Furthermore the analyzer may be used to measure the channel
response of each channel. If the synthesizer, thus provides a test
signal on each channel the analyzer may measure the response on
each channel to determine the loss on each channel. Thus the
analyzer and synthesizer may be used to provide a method of line
equalization.
[0110] As will be described below in conjunction with FIG. 4, this
concept may be further refined to only using a synthesizer at the
sending end and only an analyzer at the receiving end.
[0111] The delay in a tree may correspond to
Delay=2.sup.L-1
[0112] where L is the number of levels in the tree. Thus the tree
process in a five level tree introduces a relatively short delay of
only 31 samples. Likewise, for a cascade system, it is believed
that the delay in each signal path is provided by the above
equation where L now corresponds to the number of stages in a
particular path of the cascade. Since human hearing is sensitive to
echoes from a hybrid coupler found in most transmission media, this
short delay is a desirable feature.
[0113] Referring now to FIG. 3, a transmitting and receiving system
40 for the transmission and reception of secure signals includes a
transmitting portion 40a and a receiving portion 40b. The
transmitting portion 40a includes a signal conditioning circuit 41
including an input filter 42 having appropriately selected filter
characteristics preferably selected to provide Nyquist filtering to
an analog signal fed thereto. The filter 42 couples the analog
signal to an analog-to digital converter (ADC) 43 which converts
the received analog signal into a digital signal representative of
the analog signal.
[0114] The analog signal fed to the ADC 43 input port may be fed
through an amplifier or other preconditioning circuits (not shown)
and then fed to the ADC 43. Preferably signal preconditioning
circuits such as low noise amplifiers and buffer amplifiers are
relatively wide-band amplifiers and are further characterized as
having relatively low levels of phase dispersion over the bandwidth
of the amplifier. That is, the amplifiers impart to the amplified
output signal a substantially equal phase shift to the amplified
output signals therefrom at least over the bandwidth of the
transmitted signal. Further, the sampling rate of the ADC 43 is
preferably greater than twice the Nyquist sampling frequency (i.e.
greater than twice the frequency of the highest frequency component
signal in the input spectrum).
[0115] The ADC 43 converts the signals provided from the filter 42
in accordance with the predetermined sampling rate to provide a
stream of digital words. At the output of the ADC 43 such stream of
digital words are fed to a signal encryption circuit 44.
[0116] The signal encryption circuit 44 includes an analyzer 46
which appropriately decomposes the signal fed thereto into a
plurality of signals, an encryptor circuit 48 which encrypts the
decomposed signals and a synthesizer 50 which combines the signals
fed thereto into a reconstructed encrypted signal. The signal
encryption circuit 44 may be of the type and operate in a manner
similar to the signal encryption circuit 32 described above in
conjunction with FIG. 2.
[0117] The encryptor circuit 44 may encrypt the signal by adding a
secret number to the residue, W' with the value of the secret
number known only to the sender and receiver. Such an addition may
typically be done modula 2. That is, by providing a logical
exclusive-or (XOR) function bit by bit to the residual signal. Such
addition may also be accomplished by simply adding modulo the
actual word size of the data.
[0118] The encryptor 48 may be provided as a secret number
generator which may be of a type that provides a different secret
number based on the number of times it is requested to do so, or it
may be of the type that the output depends only on its input. The
latter type may often be self-synchronizing. The former type may
suffer loss of sync between the encryptor and the decryptor if the
receiver, for any reason, loses bit or word synchronization with
the transmitter.
[0119] The encryptor 48 may provide permutation operations among
the several channels or alternatively the encryptor 48 may provide
substitution operations or alternatively still the signal encryptor
may provide the logical or operation described above in conjunction
with FIG. 2.
[0120] The signal encryption circuit 44 feeds the reconstructed
encrypted signal to an input port of an output signal conditioning
circuit 51 which includes a digital-to analog-converter (DAC) 52
which may be provided as a logarithmic ADC for example, which
converts the encrypted bit stream fed thereto to an analog signal
representative of the encrypted bit stream. The analog signal is
subsequently fed to an output filter 54 having appropriately
selected filter characteristics as described above. The filter 54
couples the signal fed thereto to a first end of a transmission
channel 56, which may be provided for example as a telephone line.
A second end of the transmission channel 56 is coupled to the
receiving portion 40b of the transmitting and receiving system
40.
[0121] In general overview, the receiving portion 40b receives a
secure signal fed thereto and decrypts the signal to provide a
clear text signal at an output port. The receiving portion 40b of
the transmitting and receiving system 40 receives the encrypted
signal through an input signal conditioning circuit 57 at an input
port of an input filter 58 having appropriately selected filter
characteristics. The input filter 58 couples the signal to an ADC
60 which converts the analog signal to provide a stream of digital
words in the same manner as described above. The filter 58 may be
provided having a low pass filter frequency cutoff characteristic
corresponding to one-half the sampling frequency of the ADC 60. The
ADC 60 feeds the stream of digital words to a decryption circuit 61
which includes an analyzer 62 which decomposes the signal fed
thereto into a plurality of signals and a decryptor circuit 64.
[0122] If the encryptor circuit 48 in the transmitting portion 40a
of the system used a secret number to encrypt the signal, the
decryptor circuit 64 subtracts the secret number, to recover the
original data.
[0123] The decryptor-synthesizer combination 64, 66 performs the
inverse operation of the encryptor-analyzer 48, 46 at the
transmitter and feeds the decrypted and appropriately recomposed
signal to a digital to analog converter (DAC) 68. The DAC 68
provides an analog signal corresponding to the bit stream fed
thereto and feeds the analog signal to a receiver output filter
having appropriately selected filter characteristics as described
above.
[0124] If the analyzer and synthesizer are provided as the cascade
type or the tree type, then as mentioned above, the number of
levels may typically be determined by the lower limit of the input
signal bandwidth. Thus a practical requirement for most
applications may be to dispose a pre-filter (not shown) having a
high-pass or band pass filter characteristic prior to the signal
conditioning circuit 41.
[0125] In any case, whether such a filter is or is not provided,
the system of sender and receiver may not recover a signal having a
bandwidth which exceeds the bandwidth of the communications link
56. In applications where the communication link 56 is provided by
electromagnetic or sonic energy, the bandwidth of the link
generally has practical limits, for example a single television
(TV) channel.
[0126] Referring now to FIG. 4 a signal encryption system 72
receives an analog signal at an input port and filters and converts
the analog signal to a first stream of bits via a filter 74 and an
ADC 76 in the same manner as described above in conjunction with
FIG. 4. Here, the bit stream is fed from the ADC 76 to a signal
encryptor 78. Here the signal encryptor 78 receives the signals
directly on separate signal channels. A random number generator 80
is coupled to the signal encryptor 78 and feeds a stream of random
bits to the signal encryptor 78. The random stream of bits modifies
the first bit stream to thus provide an encrypted signal. The
signal encryptor 78 combines the signals to thus provide a
reconstructed encrypted signal at an output port.
[0127] The encrypted signal is subsequently fed from the signal
encryptor 78 to an input port of a DAC 82 which converts the
encrypted bit stream to an analog signal. The analog signal is
coupled through a filter 84 which provides an appropriately
filtered signal to a first input port of a signal combining circuit
86.
[0128] A timing circuit 87 includes a timing signal generator 88
for providing a timing signal. The timing circuit 87 may provide to
a receiver 92 either an analog or a digital timing signal and thus
an optional ADC 90 is here shown coupled between the timing signal
generator 88 and the summing circuit 86. If the DAC 90 is included
in the timing circuit 90 then the timing signal is fed through
optional signal path 91' to the digital input port of the DAC 8d.
If the ADC 90 is omitted then the timing signal is fed through
signal path 91 to the summing circuit 86 as shown.
[0129] It should be noted and those of ordinary skill in the art
will recognize that implicit in the recovery of information at the
receiving end of an analog communications link using the analyzer
and synthesizer building blocks operating according to the above
equations is the need to synchronize the ADC in the transmitting
portion of the system and the DAC at the receiving portion of the
system such that the transmit and receive portions of the system
agree on the exact time of sampling. Large inaccuracies in
synchronization will result in gibberish out of the receiver. Small
statistical jitter in the timing synchronization will have the same
effect as noise on the link.
[0130] Timing and synchronization schemes are known to those of
ordinary skill in the art. In one method for example, an oscillator
locked to (i.e. derived from) the sampling rate of the sending
portion may be sent over the link. The received oscillator signal
may be used to derive (via phase locked loop techniques for
example) the receiver's clock signals for sampling. As mentioned in
the secure transmitting and receiving system 40 (FIG. 3) the timing
information may be applied to the encryptor and decryptor
respectively.
[0131] In those systems employing cascade-type or tree-type
analyzers and synthesizers (FIGS. 1A-1D) two timing signals may be
required because the inherent delay in the sending portion of the
system effectively defines "words" rather than just signal bits
that should be synchronized. Such word synchronization may be
achieved by providing a second sender oscillator which may be
locked to the first oscillator (alternatively, the first oscillator
may be locked to second oscillator thus requiring only a word
synchronization) and operating at a rate depending upon both the
number of levels in the cascade and on the type of system being
provided i.e. a signal encryptor, a signal compressor, or a modem.
Such oscillator signals may occupy the same bandwidth as the system
information, since they may be subtracted out by the known
techniques for removing a signal of known frequency and constant
amplitude. In practice these two oscillators should preferably
provide signals having a particular frequency and a particular
amplitude. In practice these two oscillators should preferably be
locked to signals having frequencies corresponding to those
frequencies which define the extreme upper and lower band edges of
the frequency bandwidth of the system information (and the system
information while still maintaining the requirement that will not
exceed the band limits of the link.
[0132] One method for removing an interfering signal (namely, the
received oscillator signal) from the accompanying system
information signal is to form a feedback loop that subtracts out an
amount of the known (as received) frequency until the resulting
difference no longer contains any narrow band correlation to the
known (received) oscillator. The operation of a phase locked loop
includes multiplication of an input signal with a local oscillator
(which, in turn, is locked to the received timing signal) and then
integrating the result with a low-pass filter.
[0133] Another method for timing synchronization between the
sending and receiving portions of the system will be described
below in conjunction with FIG. 7.
[0134] Referring now to FIG. 5 a system for transmitting digital
data over an analog medium 94 includes a modulator-demodulator
(modem) 95 here only a modulator portion of the modem 95 being
shown. The modem 95 includes a data assembly unit 96 for forming
digital data into frames or bytes having a predetermined length
appropriately selected for data transmission. The data assembly
unit feeds the data to the input ports of a synthesizer 98 which
forms the data into a bit stream in accordance with the technique
of the sub-synthesizer 2b described above in conjunction with FIG.
1. That is, here digital data to be transmitted is applied to the
residual inputs W'.sub.1 . . . W'.sub.N of the synthesizer. This
data may be encrypted by a random number generator (not shown)
which provides an encrypting sequence which may or may not be a
secret sequence.
[0135] The synthesizer 98 feeds the bit stream into an input port
of a DAC 100, which may be provided having a nonlinear response
characteristic, which generates an analog signal corresponding to
the bit stream fed thereto. In accordance with the Nyquist sampling
theorem procedure, the digitized samples out of the sender should
be converted via the DAC 100 to an analog signal representation of
the digital signal fed thereto. The analog signal is subsequently
filtered for anti-aliasing with a filter 102 having a low pass
filter characteristic and preferably having a relatively steep
filter skirt and a cutoff frequency corresponding to one-half the
sampling rate frequency. The filtered signal is coupled to a first
input port of a summing circuit 104. A timing circuit 106 feeds a
timing signal into a second input port of the summing circuit. The
summing circuit thus superimposes the two analog signals fed
thereto. Alternatively, a timing signal may be transmitted via the
input to the synthesizer 98.
[0136] The superimposed analog signal is transmitted over an analog
transmission link 107 (e.g. a telephone line) to a receiver 108
where the timing signal may be used to provide timing data for the
receiver such that the bit stream may be recovered from the analog
signal. It is believed that a modem constructed in accordance with
the present invention may operate at or near the maximum data rate
theoretically possible for a transmission link based on signal to
noise ratio of the link and Shannon's Law.
[0137] At the receiver 108, substantially all noise in the
frequency range above one-half the receiver sampling rate frequency
should be filtered with a filter having a low-pass filter
characteristic and having a cutoff frequency above one-half the
receiver sampling rate frequency. If the transmission link 107 is
provided as a transmission line over which signals having a
frequency between 400 Hz and 3200 Hz may be transmitted then the
input signal may appropriately be sampled at a sampling rate
typically of about 6400 bps.
[0138] A single tone having a frequency typically of about 3200 Hz
may be provided by the timing circuit and added to the transmitted
signal and phase-locked at the receiver as one means of
synchronizing a receiver ADC clock. Since the tone may be provided
having a known amplitude and frequency, it may be subtracted rather
than filtered out at the receiver and thus there is no resultant
loss of data.
[0139] Likewise a signal tone having a frequency typically of about
400 Hz may be used to provide a word synchronization for
formulating the word comprising the input to all the cascade
levels. Signals in the frequency range below 400 Hz may be used for
signalling for line turnaround in a semi-full duplex modem, for
sending reverse channel data and network information. Bits per
cascade level may be increased until the maximum power per unit of
data which may be transmitted and Shannon's limit are reached.
[0140] Furthermore error correcting codes such as M of N codes (M
redundant bits out of N) and scrambling signals may be applied to
the input data words as is known to those of ordinary skill in the
modem art.
[0141] Referring now to FIG. 6, a coded modem 110 using direct
sequence coding, in which each data word modulates all the bits in
a sequence of code bits, more than one signal may share the link
simultaneously. A shared signal S.sub.2 may be provided for
example, as a voice signal, television (TV) signal or facsimile
(FAX) signal or alternatively the shared signal S.sub.2 may be
provided from additional modems of the same type operating with
orthogonal code sequences.
[0142] The coded modem 110 includes a coder 112 for providing the
coding operation. The coded signal is fed to a synthesizer 114
which provides a relatively broadband signal having a noise-like
frequency spectrum to an input port of a summing circuit 116. A
sharing signal may be fed to a second input port of the summing
circuit. The summing circuit couples the signals fed thereto to a
first end of a transmission line 117.
[0143] At the demodulator portion, a signal tap 118 couples a
portion of the signal transmitted over the transmission line 117 to
an optional signal processor 124. The signal processor 124 feeds a
processed signal to a receiver 125.
[0144] The codes of the coder 112 are selected to have good auto-
and cross-correlation properties, and thus the modem data may be
recovered even when the modem operates at low power relative to the
shared signal.
[0145] To a sharing device, the receiver 125 which may be provided
as a TV receiver for example, the modem signal may appear to be a
small random background noise. However if the shared signal is
coupled to the TV receiver 125 through the signal processor 124
containing the code sequences, C, then most or substantially all of
the modem "interference" in the TV receiver 124 may be removed by
known techniques for cancelling correlated noise.
[0146] The modem 110 includes the coder 112 for providing a coding
operation C, and a decoder 122 for providing a correlation
operation, C{circumflex over ( )}. In a correlation operation, data
is recovered by digitally integrating the product of the received
sequence with the stored code, C. A signal sharing the link will
typically tend to integrate to near zero since the shared
transmission is uncorrelated to the chosen code, C. The optional
interference cancellation operation for the sharing signal is
performed by the signal processor, 124.
[0147] A method for timing synchronization between the sending
portion and receiving portion of the system 110, is now described,
however before describing the method it should be noted that
although the method may be more clearly explained within the
context of the coded modem, the method may also be applied, with
minor variations, to other systems including the signal encryption
systems described above in conjunction with FIGS. 2-4 above and
signal compression systems to be described in conjunction with FIG.
9 below.
[0148] At least one of the signals, W'.sub.k, is forced to be a
sequence having known correlation properties. In a cascade
synthesizer, since "word" synchronization is required, the chosen
signal W'.sub.k may preferably correspond to the signal having
lowest inband sample rate. It should be noted however, that in a
direct sequence coded modem all the W'.sub.ks are so coded.
[0149] There are many examples of suitable code sequences such as
JPL, GOLD codes and Walsh codes. For illustration and not by way of
limitation, the Walsh codes (also known as Hadamard codes) are
described. The kernel for a Walsh code is provided as: 2 + 1 + 1 +
1 - 1
[0150] Higher order codes are found by substitution of a level into
the kernel as shown 3 + 1 + 1 + 1 + 1 + 1 - 1 + 1 - 1 + 1 + 1 - 1 -
1 + 1 - 1 - 1 + 1
[0151] which may be compactly expressed as: 4 + 1 + 1 + 1 + 1 =
code1 + 1 - 1 + 1 - 1 = code2 + 1 + 1 - 1 - 1 = code3 + 1 - 1 - 1 +
1 = code4
[0152] Many other codes, (such as the GOLD codes) are known that
have "good" correlation properties. By correlation is meant
multiplication and integration which in a two valued binary case
(+1,-1) reduces to just the vector dot product of the sequences. A
dot product between two identical codes provides a predetermined
output (i.e. (Code 1) DOT (Code 1)=4) However, a dot product
between 2 unlike codes would provide an output of zero (i.e. (code
1) DOT (codes 2,3,4,)=0) Similarly, this relationship also holds
true for each of the other 3 codes. Thus, these are orthogonal
codes.
[0153] Non-orthogonal codes having a large auto-correlation and a
small cross-correlation may also be suitable, and some of such
codes are known to be particularly good for fast acquisition of
synchronization in a sliding correlator. An example of a sliding
correlator may be made with code 3. If word sync is unknown (assume
for this discussion that bit sync is known) then one of four
possibilities may occur in the receiver's correlator: they are 5 +
1 + 1 - 1 - 1 assumedtimingofthereceiverswordclock + 1 - 1 - 1 + 1
receivedpatternpossibility1 - 1 - 1 + 1 + 1 possibility2 - 1 + 1 +
1 - 1 possibility3 + 1 + 1 - 1 - 1 possibility4
[0154] Correlation, that is the dot product of the receiver's code
with each of the 4 possible patterns reveals that the correlator
will compute a dot product of 0, -4, 0, and +4 for each of the 4
possibilities, respectively. However, only the correct word
synchronization (i.e. namely possibility 4) will have large
positive (i.e. +4) correlation. By sliding the receiver's assumed
clock, bit by bit relative to the incoming signal, and performing
the correlation, the receiver may thus find word synchronization,
hence the name "sliding correlation". Thus, it should also be noted
that the maximum correlation will occur when both the word and bit
synchronization are correct.
[0155] To accomplish the foregoing method of synchronization, the
residual, W', of the lowest frequency stage in the sender's cascade
may be arranged to have code 3 define its value (or at least the
sign of W' would follow code 3). The preceding discussion
illustrates some of the many ways receiver synchronization may be
achieved. In some system applications such as encryption, the
timing from the receiver may also drive other building blocks, such
as a decryptor. In full duplex operation, a clock in the receiver
may also be used for transmission from that end such that there is
only one master clocking the system.
[0156] Assuming that bit and word synchronization have been
established in the modem 110, then an incoming data bit may be
expressed as corresponding to either +1 or -1. If that data bit
multiplies one of the codes, code 2 for example, then the resulting
4 bit sequence is either code 2 or code 2 with the sign of each bit
reversed. If that sequence is applied to one of the W' inputs of a
cascade or tree synthesizer as a sequence of bits, then the
receiver's analyzer will recover that W' and may correlate with
code 2 to get either a large positive or a large negative number
which will determine the receiver output as a +1 or a -1
respectively. Here for ease of explanation, an example using a
single bit has been described. In practical systems of course, such
operations would typically be performed on digital words having a
plurality of bits.
[0157] The application of the coded data bits to the W' inputs of a
cascade synthesizer is somewhat complicated by the fact that each
stage in the cascade operates at a different sampling rate. Such an
operation may be more easily accomplished in a tree synthesizer
since input data may be assembled into words and applied all at
once at the frequency of the lowest synthesizer stage. For a tree
synthesizer, the transmitter's power would also be distributed more
evenly across the link bandwidth--a preferred and efficient case.
Spreading the transmitter's energy evenly across the link bandwidth
is a prescription for possibly achieving operation at the maximum
limit of the link.
[0158] Several coded modems of the type described in FIG. 6 may
operate simultaneously over the same link, within the constraint of
total link power. Each modem should use a different orthogonal
code. For example, a code 3 modem would not interfere with a code 2
modem. It should be noted that the number of modems that may share
a link using the 4 bit Walsh codes described above is more than
four since each modem may have a different and unique combination
of codes on each of its independent residual inputs, provided
certain groups of modems don't operate at exactly the same time. It
should also be noted that these multiple modems may simply be
provided as different orthogonally coded data bits.
[0159] A two wire full duplex modem may be provided by using a
companion set of almost orthogonal codes. The Walsh codes
identified as code 1 through code 4 above, and their bit-wise
complement, are only one half of the 16 possible combinations of
4-bits. As shown below the remaining combinations also form another
set of mutually orthogonal vectors, below numbered as c5 through
c8. This second set of 4 vectors is not orthogonal to the first
set. It can be described as "nearly orthogonal" because the dot
product of any member of set 1 with any member of set 2 is always
half the length of the vector; and of course the dot product of any
member with another of the same set is always 0 except that the
product with itself is always equal to the length.
1 MASTER (set 1) SLAVE (set 2) c1 = + + + + C5 = + - - - =
c1{circumflex over ( )} c2 = + - + - c6 = + + - + = c2{circumflex
over ( )} c3 = + + - - c7 = + - + + = c3{circumflex over ( )} c4 =
+ - - + c8 = + + + - = c4{circumflex over ( )}
[0160] The master group is orthogonal and the slave group is also
orthogonal, however the cross group correlation is -2 for the dual
and +2 for any other cross term. One end of a transmission link may
transmit signals using the master set of codes and a second end of
the transmission link may transmit using the slave set of
codes.
[0161] It should be noted that the same benefits may be realized by
using the matrix transformation approach to provide the synthesizer
114 and analyzer 120.
[0162] Thus to provide full duplex operation, the modems at each
end of a link can be assigned to use set 1 or set 2 as Master and
Slave. If the Master used only codes 1 and 2 and the Slave used
codes 3 and 4 then all echo signals would be totally cancelled by
the orthogonality but the data throughout for each modem would be
half of the rate possible by using the arrangement described above
based on the two sets of codes.
[0163] Furthermore, coded modems of the type described in
conjunction with FIG. 6 may coexist with other signals on the link
since the correlator will provide little or no output signal.
Longer code sequences may improve this effect at the expense of
lower data throughput. Certain codes, other than the Walsh codes,
may be better able to exploit this characteristic for multiple
access applications.
[0164] For a modem 126 as shown in FIG. 7, it is possible to use
direct sequence code division multiplexing to excite the sub-stages
of the synthesizer cascade. As described above, such a procedure
would permit clock recovery based on a sliding correlation. It also
allows data multiplying the code sequence (as is done in direct
sequence spread spectrum) to be recovered at a receive end using
correlation techniques.
[0165] One application for such a coded modem would be to take
advantage of the processing gain of the correlation receiver to
recover a low power signal from the modem buried in a large
"jamming" signal. Practical examples of jamming signals include
voice (hence data may be sent as `noise` under the voice),
television (hence high definition digital information may be sent
in the same channel as standard video to maintain compatibility),
code division multiplexing and two wire full duplex FDX. The
disclosed technique is an improvement on those methods because the
modem utilizes the bandwidth more efficiently than heretofore.
[0166] Furthermore, the modem described herein, being a modulator
(the synthesizer) and a demodulator (the analyzer) may also take
the form of a baseband RF or soundwave transmitter modulator and
receiver (or above baseband except for the limits of ADC's). Such a
receiver may have application in receiving digital High Definition
TV (HDTV).
[0167] Coded modems of the type described above in conjunction with
FIG. 6 and to be described in conjunction with FIG. 7 below may use
Walsh codes to pre-encode data which is applied to the w' and v'
inputs. Because the synthesizer itself uses Walsh codes, if
implemented by the rotation matrix, it should be pointed out that
these two coding schemes are independent. For example, the code
length for the data inputs need not be the same as the number of
synthesizer outputs. The number of outputs is equal to the length
of the synthesizer rotation operators. Thus by applying the matrix
method to the coded modem, the coded modem becomes in essence a
twice coded modem.
[0168] Referring now to FIG. 7, a coded tree modem 126 includes a
plurality of coder circuits 128a-128h coupled to corresponding ones
of a plurality of input ports 130a-130h of a tree-type synthesizer
130 operating in accordance with the principles described above in
conjunction with FIG. 1. The synthesizer output port is coupled
through a link 132 to an input port of a tree-type analyzer 134
also operating in accordance with the principles described above in
conjunction with FIG. 1. A plurality of decoder circuits 136a-136h
are coupled to the analyzer output ports 134a-134h to decode the
coded signals fed thereto.
[0169] In principal the coded tree modem 126 operates such that the
coder circuit performs a coding operation of multiplying a data
word times an orthogonal code C. The decoder performs a correlation
operation here denoted C{circumflex over ( )}. It should be noted
that the final V' input sequence on line 130h may be set to zero if
it is assumed to be below a frequency corresponding to the lower
frequency limit of the passband frequency of the link 132.
[0170] Referring now to FIG. 8, a system for transmitting and
receiving compressed signals 138 includes a transmit portion 138a
having an input signal conditioning circuit 139, which here
includes an input filter 140 and an ADC 142. The filter 140 and ADC
142 are selected to operate in accordance with the techniques
described above to provide an appropriate stream of digital words
to the first input port of an analyzer 144. A quantizer 146 is
coupled between the analyzer 144 and a synthesizer 148. In
operation, the signal compressor quantizer 146 maps the residual
W'(N) into a new number taking fewer bits to describe. Thus it is a
compression operation.
[0171] An output signal conditioning circuit 149 includes a DAC 150
coupled to the output port of the synthesizer 148. The DAC 150
receives a digital stream of words and provides an analog output
signal representative of the bit stream fed thereto. A filter 152
having appropriately selected filter characteristics couples the
analog signal from the DAC 150 to a first end of a transmission
line 154.
[0172] A second end of the transmission line 154 is coupled to a
receive portion 138b of the system 138. The receive portion b
includes an input signal conditioning circuit 156, which
appropriately filters and converts the analog signal fed thereto to
provide an appropriate stream of digital words to the first input
port of an analyzer 158. An inverse quantizer 160 (i.e requantizer)
is coupled between the analyzer 158 and a synthesizer 162.
[0173] In operation, the requantizer 160 remaps to the original bit
definition. The compression operation, of course, lowers the
information content of the signal and that lost information may not
be recovered. In many applications, however, the lost information
is redundant or the human observer is insensitive to the level of
detail contained in the information discarded by the quantizer and
thus little or no signal degradation may be detected.
[0174] An output signal conditioning circuit 163 receives a
reconstructed digital stream of words from the synthesizer 162 and
provides an appropriately filtered analog output signal
representative of the bit stream fed thereto to an the output port
of the receive portion 138b of the system.
[0175] In speech compression processes, bandwidth may generally be
reduced by limiting the number of bits devoted to the residual W'.
However, an alternative which may provide an increased reduction in
bandwidth may be accomplished by first replacing a signal V.sub.5
on the cascade channel corresponding to the lowest frequency band
with a zero, thus only transmitting the signal W's. Next, a signal
W'.sub.3 associated with a cascade channel corresponding to the
frequency band in the 700 Hz to 1400 Hz frequency range may be
eliminated or coarsely quantized. Furthermore, Huffman coding or
codebook vector quantization methods may be used on W'.sub.2.
[0176] By adjusting the sample rate, the frequency band from 700 Hz
to 1400 Hz may be isolated. Since human voice especially in the
English language, generally does not include a formant in this
range, the cascade channel corresponding to the frequency band from
700 Hz to 1400 Hz may be eliminated (i.e. by setting the residual
W'.sub.3 equal to zero) with little loss in intelligibility.
Similarly, as shown in the Table below, W'.sub.1 and W'.sub.5 may
also be set to zero.
2 TABLE SAMPLE RATE SIGNAL (samples/second) FILTER RANGE (Hz)
W'.sub.1 5600 W'.sub.1 = 0 >>2800 to 3200 W'.sub.2 2800
W'.sub.2 >>1400 to 2800 W'.sub.3 1400 W'.sub.3 = 0
>>700 to 1400 W'.sub.4 700 W'.sub.4 >>350 to 700
W'.sub.5 350 W'.sub.5 = 0 >>175 to 350 V.sub.5 175 V.sub.5 =
0
[0177] Thus, in this example W'.sub.1 through W'.sub.5 and V.sub.5
are sampled at the rates shown in the Table and it is possible to
transmit only the signals corresponding to the residuals W'.sub.2
and W'.sub.4, for example, which have sample rates of 700 and 2800
baud perhaps less than 2 bits for each residual W'.sub.21 W'.sub.4
after Huffman coding. Further reduction may also be possible since
W'.sub.2 may simply be considered as another sampled signal and
thus may also be subdivided by multi-resolution analysis to further
reduce the bandwidth.
[0178] By way of example, if 1.5 bits are used for the 700
sample/second residual and W'.sub.2 is decomposed into 1400
samples/second, 700 samples/second, 350 samples/second, 175
samples/second, and 65 samples/second at 1.5 bits each then the
total number of bits per second (bps) corresponds to 5085 bps to
which should be added overhead bits for frame synchronization. This
method is considerably less computationally complex than methods
such as Linear Prediction Coding 10 (LPC10) and dynamic Excitation
LPC and refinements thereto as are known to those or ordinary skill
in the art of voice compression.
[0179] Although not here shown, the receiver may be provided having
the same form with received signal applied to V.sub.0 and the clear
output taken from V'.sub.0.
[0180] In view of the above, those of ordinary skill in the art
will now recognize that combinations of the system described above
may be created to form, for example, an encrypted data compression
system for use on analog links. This may be particularly useful,
for example, in those applications such as transmission and
reception of high definition television signals in which the amount
of digital data to be transmitted exceeds the Shannon Law limit of
the link. Thus, in such applications the data may first be
compressed by any algorithmic means until the sample rate is
consistent with the Nyquist sampling theorem limit of the link and
the data may then be applied to one of the modem systems described
hereinabove in conjunction with FIGS. 5-7 for example.
[0181] Referring now to FIG. 9, a digital compression circuit 166
includes an analyzer 168 coupled to a quantizer 170. A digital
signal is fed to the analyzer input. The analyzer 168 decomposes
the signal and the quantizer 170 performs a compression operation
as described above in conjunction with FIG. 8. The quantizer 170
subsequently feeds a compressed digital signal to a first end of a
digital link 172. A second end of the digital link 172 is coupled
to an input port of a requantizer 174. The requantizer 174 receives
the signal fed thereto performs an inverse quantization process and
subsequently feeds a requantized signal to a synthesizer 176. For a
digital scheme it is only necessary to perform a logical operation,
such as an exclusive or operation, between the W signal and a
random number RN.
[0182] Referring now to FIG. 10, a telephone modem 178 includes a
synthesizer 180, capable of operation over the frequency band from
400 Hz to 3200 Hz. The synthesizer 180 feeds a signal to a DAC 182
having a sampling rate typically of about 6400 samples/second which
converts the bit stream fed thereto to an analog signal. The analog
signal is subsequently fed over an analog transmission link 184 to
an ADC 186 also having a sampling rate typically of about 6400
samples/second. The ADC 186 converts the analog signal fed thereto
to a digital bit stream. The digital bit stream is subsequently fed
to an analyzer 188.
[0183] The synthesizer 180 may be provided in accordance with the
matrix transformation methods described above in conjunction with
FIG. 1. It should be noted, however, that the synthesizer 180 may
alternatively be provided as a three level tree synthesizer in
accordance with Equations 3 and 4 also described above in
conjunction with FIG. 1.
[0184] In the matrix approach, the synthesizer 180 operates on the
data frames fed thereto with a rotation matrix. Here, an 8
dimensional rotation matrix would be applied to the data frames.
Similarly, the analyzer 188 would perform an inverse rotation
operation by applying an 8 dimensional matrix corresponding to the
inverse matrix of the matrix used by the synthesizer 180.
[0185] As mentioned above, the basic sampling rate of the DAC 182
and ADC 186 is 6400 samples/sec. The digital input and output
operate at a frame rate of 1/8 or 800 frames per second. Each frame
may be composed, for example, of 35 bits divided into 7 words of 5
bits (or more) each and applied to channels 180a-180h. The thruput
is 28,000 bps (35 bits times 800 frames/second). The usable rate is
determined by the S/N ratio on the link 184 and forward error
correction (FEC). Thus, the modem 178 may operate at a data
transfer rate at or below 28 kbps.
[0186] Furthermore, the modem 178 may utilize FEC and as is common
practice, the frequency range from 300 Hz to 400 Hz may be used for
frequency shift keying (FSK) diagnostic signalling.
[0187] Channel 180h corresponds to signaling below 400 hz and
cannot be used for data in this example. However, if a signal
having a constant amplitude and alternating sign is applied to
channel 180h then a 400 hz tone may be filtered from the line
signal by a receiver (not shown) to aid in synchronization. In
addition, the known preselected amplitude may be recovered from
channel 188h as data and used as a gain calibration signal in the
receiver and, may further be used to define block boundaries for
FEC block coding schemes.
[0188] Accurate timing synchronization and gain calibration are
important to the operation of the modem 178. As described above in
conjunction with FIGS. 6 and 7, coded modems may obtain
synchronization information without any tones appearing in the
transmitted signal. Thus, clandestine communications by encrypting
coded modems may be transmitted as low level, seemingly
uncorrelated, noise in the same narrow bandwidth as simultaneous,
non secret, communications.
[0189] The data in the channels 180a-180g may be scrambled, as is
common practice in modems, so that the output appears more
noise-like when transmitting the commonly encountered input string
of 35 zeros or ones. Without scrambling, an input string of zeros
will produce a modulated but strongly correlated output without a
DC component.
[0190] The data received by the analyzer 188 will be a multiple of
the actual data. The multiplication factor will correspond to the
dimension of the rotation matrix which in turn corresponds to the
number of channels in the synthesizer 180. The receiver should
quantize, that is, round the received channel output to the nearest
multiple then divide by the multiple to reduce the effects of noise
on the link 184.
[0191] A modem using baseband modulation techniques, in which no
carrier signal exists, may also be provided by using the matrix
rotation approach or by the equations provided in conjunction with
FIGS. 1-1D above. In either of these approaches, the modem must
demodulate and process groups of two or more samples to recover the
data. In a conventional baseband system, single samples are
processed to recover the data.
[0192] Thus, in a baseband system a modem operating according to
the matrix method described above should modulate and demodulate
groups of samples. For example, if the matrix vectors are of length
eight, then eight samples should be processed together as an
independent group by the demodulator. That is, the demodulator
multiplies the group of samples by the inverse matrix used in the
modulator. It should be noted that the grouping of samples is part
of the modulation and distinct, for example, from a block data
coding method for error correction, and both techniques may be
simultaneously used in a single modem.
[0193] In summary, a baseband modem technique uses an invertible
mapping. According to the foregoing disclosure, and the issued
parent patent, U.S. Pat. No. 5,367,516, the modulation and
demodulation mappings may be characterized as a filter bank
synthesizer and analyzer, or a rotation and counter-rotation
matrix, or a baseband mathematical transformation and its inverse
transformation. These characterizations may be distinct, or in some
instances they may describe the same operations in different
technology. The terminology and unification of the three
characterizations appear in publications cited in conjunction with
the filing of the instant patent application. For example, the
analyzer and synthesizer in FIG. 1 may be a two-channel Quadrature
Mirror Filter (QMF) pair as described by Vaidyanathan and Hoang.
The matrices may be commuting polyphase filter matrices of Viterli
and Gall or similarly of Vaidyanathan and his students. Inverse
polyphase matrices describe the QMF of FIG. 1 as well as filter
banks with more sub-bands, such as the polyphase banks that are
functionally equivalent to the structure in FIGS. 1C and 1D.
Finally, the structure of FIG. 1A, which is based on a two-channel
QMF, is mathematically equivalent to the Discrete Wavelet Transform
(DWT) as described by Rioul and Vitterli. Scaling functions and
residual functions are terms used to describe Wavelet
transformations.
[0194] The invertible mapping for the modem is similar to a
geometric rotation, although the mapping may or may not have a pure
delay due to the filter. A sequence of samples X(0) through X(3)
may be considered as the coordinates of a vector X in a
4-dimensional space. A linear transformation may be made from the
coordinate system of X to another coordinate system in the same
4-dimensional space. Thus the vector X may be transformed to a
vector Y by a "rotation" matrix, or by a filter bank, or by a
mathematical transformation such as the DWT.
[0195] The components of vector X can be equated to a frame of
successive samples into the transmitter's D/A converter. The
components of Y are assigned to those inputs to the filter bank
corresponding to the sub-bands that are within the transmission
bandwidth. In a modem based on the foregoing disclosure, and the
issued parent patent, U.S. Pat. No. 5,367,516, X and Y are two
different coordinate representations of the same vector. The modem
modulator can be considered as a linear "rotation" operator [M] and
the demodulator as an operator [D]. At the transmitter, it follows
that X=[M]Y. The vector Y is being sent so the received data [D]X=Y
if the modem is correctly conveying the data, a condition met by
the requirement that [D][M]=z[I], where [I] is the identity matrix
and z represents a pure, frequency independent delay, if any,
through the system. If there is additive noise at the receiver then
the linear demodulation operator must remove the noise term by a
non-linear threshold operation as is common in all modems.
[0196] In a general sense that includes both linear and non-linear
operators, all modems require that [D][M]=z[I] in order to recover
data correctly. However, in the baseband modem of the foregoing,
and in the issued parent patent, U.S. Pat. No. 5,367,516, the
geometric rotation analogy results because its linear operators
commute. That is [D][M]=[M][D], or at least they can very nearly
commute over the entire useful bandwidth of the channel. Geometric
rotations in 2-dimensions commute and rotations in any dimension
can be made to commute by making a series of 2-dimensional
rotations that commute with a reversed sequence of
counter-rotations, which is the essence of Vaidyanathan et al.'s
design procedure for multi-dimensional (multi-band) QMF banks of
the cited publications.
[0197] As described in the foregoing, and in the issued parent
patent, U.S. Pat. No. 5,367,516, any sampled analog signal can be
framed as a vector A and can be digitally encrypted without
bandwidth expansion and without digital compression since an
encryptor at the transmitter can transmit X=[M][e][D]A and the
receiving decryptor can compute A =[M][d][D]X, where digital
encryption [e] and decryption [d] satisfy [d][e]=[I] and assuming
[M] and [D] commute.
[0198] Passband modems modulate one or more carriers with one or
more separate baseband modem waveforms that represent data. The
carrier modulation and subsequent demodulation is most often a
linear operation in contemporary modems. Thus, at some carrier
frequency, a modem may add a sine and cosine carrier wherein each
carrier has been linearly amplitude modulated by baseband data
modulators, or filters. The resultant signal may have both phase
and/or amplitude variations as in a Quadrature Amplitude Modulation
(QAM) modem. The baseband modulation of the foregoing disclosure
can be applied in this same manner to make a linear modem for
passband.
[0199] Non-linear modulations into passband are also possible for
data modems and analog signal encryptors. Non-linear modems have
seldom been used except in Frequency Shift Keying (FSK) modems,
which are very inefficient. However, non-linear modems employing
the methods described herein may be more bandwidth efficient than
any linear modulation including QAM when operated, for example, in
the region of interest for wireless communications, assuming for
comparison that there is no Forward Error Correction (FEC) for
either the non-linear or linear designs. An exemplary non-linear FM
modem is described herein.
[0200] An FM DSB signal can be generated by the quadrature carrier
method wherein a sine and cosine carrier are amplitude modulated,
respectively, by the sine and cosine of the integral of the
baseband modem signal. Thus, a cosine function amplitude modulates
the cosine carrier, etc., so that the FM signal is indeed a
non-linear modulation and distinct from linear passband
modulations, which may or may not include baseband integrators. FM,
and nonlinear Phase Modulation (PM), can also be generated by a
voltage controlled oscillator (VCO) and by other techniques. The
viewpoint taken in the foregoing, and in the issued parent patent,
U.S. Pat. No. 5,367,516, that data and modulated signals can be
different coordinate representations of the same vector, provides
insight and specific techniques for the design of non-linear modems
using rotations by filter banks or wavelets.
[0201] In FIG. 11, an FM modem 200 according to the present
invention is illustrated in block diagram form. The modem is
comprised of a transmit portion 202 and a receive portion 204.
Input data into the transmit portion 202 is first divided into a
data vector representation by a partitioning element 206. After
non-linear pre-emphasis amplification 207 to provide equivalent
average power across the partitioned signal, the data vector is
rotated to a signal vector by a transmit rotation operator 208, as
disclosed in the foregoing. After non-linear compression 209 to
improve modulation gain (discussed subsequently), the signal vector
is FM modulated as illustrated in block 210 and provided to a
transmitter (not illustrated) by the transmitter interface 212 as
an output signal.
[0202] Typically, the output signal from the transmit portion 202
of one modem 200 will not be received by the receive portion 204 of
the same modem 200. However, it is possible that a transmission
path over which the output signal is transmitted and from which the
input signal is received includes a memory device for storing the
transmitted signal. In such case, it is possible that the same
modem will carry out both the transmit and receive functions.
[0203] For example, in alternative embodiments of the present
invention, the memory device is a magnetic disk or a non-volatile
solid-state memory device; modulated digital information to be
stored in analog form is later retrieved and demodulated by the
same modem. The memory device behaves as a modem transmission link
with an exceptionally long link delay, so the bit-error-rate
calculations and maximum system transfer rate into or out of the
memory can be determined as for any modem system. In particular,
the maximum error-free bit rate for recovery of the data is given
by Shannon's law, where the signal-to-noise ration depends on the
device physics as well as the noise figure of the electronics.
[0204] On the receive portion 204 side of the modem 200, an input
signal from an FM receiver (not shown) is received at a receiver
interface 214, and is forwarded to an FM demodulator 216. The
demodulated signal, after non-linear de-compression attenuation
217, is then counter-rotated by a receive rotation operator 218.
After complimentary de-emphasis amplification 219, the result is
assembled 220 into output data which is ideally the same as the
original input data. The de-compression attenuation 217 further
comprises an equalizer in an alternative embodiment.
[0205] Modems employing convolutional rotation, such as discussed
in the foregoing and in the parent patent, U.S. Pat. No. 5,367,516,
are optimal in the sense of potential bandwidth efficiency.
Encryption using this technique is optimal in the sense that the
signal encryptor can transform any band limited analog signal into
the digital domain, digitally encrypt it, and then transform the
signal back to the analog domain without changing the analog
bandwidth. This is in contrast to contemporary digital voice
encryptors which rely on digital voice compression algorithms to
achieve encryption without bandwidth expansion. Both of these
optimal properties are a consequence of the invertible baseband
transformation used in the modem disclosed in the foregoing and in
the parent patent, U.S. Pat. No. 5,367,516. A preferred embodiment
of this invertible baseband transformation is the Quadrature Mirror
Filter (QMF) bank, also known as the wavelet filter, which can
provide lossless reconstruction of signals over all of the filter's
passband. Since the transition region to the stopband at the band
edges can be designed to vanish as the filter delay increases, the
modulator satisfies Shannon's criterion for no entropy loss in the
mathematical limit.
[0206] The rotation operator in a first embodiment is a multi-rate
wavelet filter-bank. Such filters are designed in a manner similar
to sub-band coding schemes. Each analyzer input corresponds to one
of M overlapping sub-bands. Ports corresponding to out-of-band
regions of the signal spectrum are not used for data, though they
are used in a further embodiment to carry baseband synchronizing
bits without violating spectral constraints. Regardless of the
number of sub-bands, the polyphase rotation matrices commute
exactly over the entire band. There is a very small entropy loss at
the band edge (but not between sub-bands), as determined by the
independently chosen filter length.
[0207] For a time-frame corresponding to M samples, the input
binary information is partitioned into the integer coordinates of
an information vector. The output of the demodulation operator may
be viewed as a vector with non-integer coordinates. "Thresholding"
is a non-linear operation that removes noise by rounding the
received vector coordinates into integers.
[0208] It is normal modem practice when transmitting data to encode
the data as equally spaced signed odd-integer values. For example,
two bits are encoded as one of four levels, -3, -1, +1, +3. In this
case, thresholding rounds to the nearest odd-integer value. The
modem can also be used to transmit any bandlimited analog signal
which has been digitally processed by sub-rate filtering, including
but not limited to the digital processing step of digital
encryption as described in the foregoing and in the parent patent,
U.S. Pat. No. 5,367,516. When the modem is being used in this
manner, the input samples to the modem modulator may be considered
as signed integers spanning even and odd values including zero.
Receiver thresholding rounds to those values. To be consistent in
notation, integers are assumed to be input to the modulator, the
modulator sends integers to the D/A converter and the receiver
obtains integers from the A/D. The demodulator outputs integers
which are thresholded by appropriately rounding the quotient to
integers or odd-integers after dividing by the rotation matrix
normalization constant. As described in the foregoing and in the
parent patent, U.S. Pat. No. 5,367,516, this rotation gain is
computed from the rotation operators (the filter bank polyphase
matrix).
[0209] The transmitted data, including synchronizing information,
is represented by an M-dimensional vector. In one embodiment, the
modulo addition of a secret vector to the carrying vector in the
data representation results in a highly secure, digitally
encrypted, analog signal out of the D/A. Decryption
modulo-subtracts the secret vector to recover the carrying
vector.
[0210] Input information bits can be assigned to the
data-representation coordinates of a vector and multiplied at the
chip-rate by a pseudo-random sequence unique to each coordinate.
The chip-rate result is then input to the modem's inband data ports
where it undergoes up-sampling by a factor equal to the
dimensionality of the rotation. Modem transformation results in an
orthogonal summation of each up-sample-filtered subsequence into
overlapping sub-bands of the transmitter's spectrum. Alternatively,
a single spreading function is applied to the information, which is
then partitioned according to the desired modulation efficiency
into the components of a vector, which is then transformed by a
wavelet filter bank.
[0211] A cooperating receiver filters the input into sub-bands by
counter-rotating the signal vector back into data space
coordinates. However, the effect of the spreading function must be
removed prior to thresholding since the spread signal may have a
signal-to-noise ratio of less than 1. "De-spreading" is
accomplished by correlating the known spreading functions with the
unthresholded data-representation coordinates. Since any vector in
the transmitter's data-representation can be re-oriented by an
invertible secret transformation (i.e. digitally encrypted by
modulo addition of a secret vector) to anywhere in the in-band
signal space, a truly secure spread-spectrum can be made. The
receiver must decrypt the unthresholded data-representation prior
to de-spreading. The receiver counter-rotates, decrypts,
de-spreads, and thresholds, in that order. Geometrically, the
encrypted vector is always inside a radius R, the radius of the
N-dimensional signal space. Modulo-R vector subtraction preserves
the large non-integer noise vector added onto the encrypted
carrying vector so it may be subsequently correlated (de-spread)
and thresholded.
[0212] Thus, to reiterate, an N-dimensional space is defined by N
samples into a D/A converter. The data coordinate system is chosen
so that a subset, n of the N coordinates in the data
representation, define all the information points that are in-band.
For each of the n coordinates, B bits of data can be sent as one of
2.sup.B integer levels with an efficiency of 2*B bits/Hz per
coordinate (i.e. per sub-band). Since the sub-bands overlap
perfectly inside the passband and have typically -70 db stop-bands
outside, the overall bandwidth efficiency is nominally 2*B bits/Hz
if the filter transition region is negligible compared to the total
bandwidth used for data. The remaining N-n data coordinates are not
used for data, but can be used for synchronizing the modem.
[0213] A data vector with integer coordinates is therefore rotated
to signal coordinates by a first commuting operation. From a
geometric standpoint, this operation can be the application of a
polyphase matrix for mapping (or rotation) of a data vector into a
signal vector representation. Otherwise, the mapping can be
implemented via the use of a Finite Impulse Response (FIR) filter
bank or an Infinite Impulse Response (IIP) synthesizer.
Alternatively, the mapping can be a wavelet transformation, which
can be shown in several cases to be mathematically equivalent to
the filtering performed by a synthesizer. The first commuting
operator in the transmitter is complimented by a second commuting
operator in the receiver. Together, these operators result in an
identity matrix, enabling the complete recovery of input data.
Practical FIR lattice filter implementations of a Perfect
Reconstruction (PR) QMF bank can result in an identity matrix
multiplied by a scalar gain and a pure delay. The gain factor
arises because the matrices are typically in un-normalized integer
format, and the pure, frequency independent delay factor represents
the delay through the FIR filters. A Near Perfect Reconstruction
(NPR) filter bank is also known to those skilled in the art of QMF
design. The FIR lattice QMF is designed by employing the commuting
properties of geometric rotations. The FIR transversal filter form
is then obtained from the lattice form but in doing so, the PR
property is compromised and the filter bank provides NPR. However,
by using computer aided design techniques, the NPR filter can
usually be optimized to provide an NPR filter having better overall
properties for stopband attenuation, for example, than the PR
lattice filter used to initiate the iterative design. Therefore,
the mappings used to construct the baseband modem modulator and
demodulator of the foregoing disclosure and the parent patent
application, U.S. Pat. No. 5,367,516, commute in the sense that it
may be a perfect or a near-perfect reconstruction with a possible
delay and gain.
[0214] A two-dimensional QMF as in FIG. 1 is described in the
literature by polyphase matrices. For example, if the high and
low-pass filters are FIR, then each filter transfer function is
factorable into its even and odd powers of the z-transform
variable. So, if H(z) describes the high-pass filter and L(z)
describes the low-pass filter, then the filters of a QMF analyzer
are factorable into:
H(z)=He(z.sup.2)+z.sup.-1Ho(z.sup.2)
L(z)=Le(z.sup.2)+z.sup.-1Lo(z.sup.2)
[0215] This can be written in matrix form as: 6 [ H L ] = [ He Ho
Le Lo ] [ 1 z - 1 ]
[0216] The sample rate change in a QMF combines with the delay
column matrix on the right to become a serial/parallel conversion
for the analyzer, and the 2.times.2 matrix on the right, whose
elements are shown as row vectors, is the polyphase rotation
matrix. The sample rate change also converts the powers of z.sup.2
to powers of z, but since only the coefficients of powers of z in
the row vectors are relevant to calculations, the z variable is
often omitted. A similar definition is used for the QMF
synthesizer. The up-sampling at the input to the 2-band synthesizer
implies that only the odd coefficients contribute to the odd output
sample. Thus, the filtering can proceed at half the rate using
filters of half the length, which is what the polyphase notation
describes. Polyphase matrices for filters with more than two
sub-bands are defined in a similar manner in the cited publications
associated with the parent patent, U.S. Pat. No. 5,367,516.
[0217] The polyphase matrix may be further factored into a form
corresponding to an FIR transversal filter that operates on vectors
instead of scalars. That is, square matrices C.sub.j having scalar
elements each multiply the power j power of z. Thus, the modulation
operator [M] is described by:
M(Z)=C.sub.0+C.sub.1Z.sup.-1+C.sub.2Z.sup.-2+ . . .
+C.sub.LZ.sup.-L
[0218] In this form, the modem frames the data bits and converts
them to the coordinates of a vector. The vector is input to the
vector-filter to perform the rotation. There are L-1 previous data
vectors stored in the delay line of the transversal filter. The
vector filter maps the current and L-1 previous data vectors to new
vectors using the matrices C.sub.j and then finds, by vector
addition, the resultant baseband modem output vector. The receiver
counter-rotates to recover the data using the vector filter
corresponding to [D]. In one embodiment, a hardware ASIC uses a
single time-shared nine-tap filter with a ROM bank of coefficients
and a bank of shift registers to implement the modem rotations.
[0219] The vector-filter arrangement is of course mathematically
equivalent to the other forms of a rotation. However, the
transversal form suggests that a modem as described in the
foregoing discussion and in the parent patent, U.S. Pat. No.
5,367,516, can be equalized for distortions in the transmission
link by using the same methods as are applied to transversal
equalizers in the known modem art. Significantly, the equalizer
filter and the demodulation filter [D] can be one and the same.
[0220] Therefore, a further embodiment of the present invention
employs adaptive adjustment of the receiver polyphase matrix, also
referred to as a de-rotation matrix. If it is determined that some
form of frequency dependent distortion is being introduced into the
transmission path, the polyphase filter in the receive portion of
the present FM modem, or any modem using the methods of as
previously discussed and found in the parent patent, U.S. Pat. No.
5,367,516, can be adjusted to compensate for such distortion.
Another way of stating this is that some of the de-rotation
coefficients in the de-rotation matrix are adjusted to compensate
for the frequency-dependent distortion in the transmission path.
The adjustment would minimize a computed error function. This is
similar to the design procedure for optimizing NPR in the design of
the filter bank. In the modem, however, the NPR solution does not
accurately reconstruct the information because of amplitude and
delay distortions in the modem transmission link. The receiver
polyphase filter bank in an FIR implementation is equivalent to FIR
filters for each sub-band wherein the filter outputs are decimated
and thresholded to recover the data. This is the same form as a
fractionally spaced equalizer, which is known to those of ordinary
skill in the art of modem equalization. Therefore, the methods in
the modem art, such as, but not limited to, the Least Mean Squares
(LMS) algorithm, for adaptively adjusting the coefficients of an
equalizer in proportion to an error function can be applied to the
polyphase matrix coefficients of the demodulator to provide the
receiver with an adaptive de-rotation that corrects for link
distortions without a separate equalizer filter. Thus, a
fractionally sampled FIR filter is provided. The adjustment of the
receiver polyphase filter can be done at the initiation of a
communication and left at a certain setting, or can be adjusted
dynamically by monitoring the RMS spread of noise about the integer
or odd-integer threshold values out of the demodulator, as one
example.
[0221] Additive noise in a transmission link between a transmitter
and a receiver will add a noise vector to the transmitted signal so
that a counter-rotation performed in the receiver will yield a
recovered data vector with non-integer coordinates. In a first
simplified embodiment of the present invention, a threshold
operator takes the nearest integer coordinate values as the most
likely symbol. In a more sophisticated receiver embodiment,
thresholding is executed according to a Viterbi algorithm since the
rotations are convolutional with M-n extra degrees of freedom. This
enables "free" error correction without the use of parity bits.
[0222] In each transmitted frame of a modem according to the
foregoing disclosure and the parent patent, U.S. Pat. No.
5,367,516, each D/A sample depends on the scaling input and all
other residual inputs to the modulator. To avoid aliasing in the
conversion to and from analog by D/A and A/D, the highest frequency
sub-band is not used to transmit data in a preferred modem design.
Since the number of samples to/from the converter equals the total
number of sub-bands M, there is redundancy in the transmitted
signal. Other sub-bands may optionally be omitted to shape the
output spectrum, for example to avoid transmitting DC, further
increasing the redundancy to n out M samples. Sync signals
transmitted by the technique of alternating the sign of a fixed
amplitude into, for example, the highest frequency sub-bands carry
no information and do not increase the redundancy. If the receiver
has thresholded a sequence of frames prior to the current frame
without bit errors, it may use those results to aid in demodulating
the current frame. For example, the unthresholded demodulator
output may be midway between two allowed odd-integer threshold
values. To decide which soft decision value is most probable, the
receiver could use the prior data frames along with the two
possible current-frame soft decisions to generate in the receiver a
modulated signal to correlate with the actual received signal.
Then, the receiver may make a final decision about which integer
levels were most probably transmitted for the current frame based
upon the better correlation. This procedure, which may be
implemented through dynamic programming via the Viterbi Algorithm,
is possible because of the redundancy inherent in the convolutional
output of the modulator of the foregoing disclosure and the parent
patent, U.S. Pat. No. 5,367,516. It differs substantially from the
soft forward error correction (FEC) method known in the modem art
as Trellis Coded Modulation (TCM).
[0223] In TCM, as commonly practiced, redundancy is provided by
appending one or more suitably calculated parity bits to the data
before transmission. The coding gain from the Trellis Coding must
make up for the loss in energy per bit due to the transmission of
the extra parity. Furthermore, a TCM modem cannot be optimal
because of the Shannon capacity sacrificed to send the parity bit.
This does not rule out the use of TCM with the current invention.
Other methods of forward error correction such as the
multi-dimensional coding methods known in the modem art are also
applicable to the inherently multi-dimensional signal generated by
a coordinate rotation. Thus, a data modem based on rotations that
would normally use only odd-integer coordinates for the data vector
could instead select the coordinates of successive vectors from a
larger set of even and odd integers in a way that decreases the
probability of a bit error.
[0224] Implicit in both the modem and encryptor definitions given
above is the assumption that the data will rotate to an N-band
analog signal. The N samples of the D/A are within a precise time
frame. Placing a strict simultaneous requirement on the bandwidth
must be done with care according to known transformation techniques
since sine and cosine-based transformations are complicated by the
infinite extent of those waveforms. When the time is constrained
exactly, the frequency components extend to infinity and vice
versa.
[0225] Wavelet theory provides for transformations based on "mother
wavelets" which do not have infinite extent in time. Like Fourier
analysis, many basis functions are summed together to represent any
arbitrary signal. The mother wavelets are stretched and shifted in
time to form a set of residual basis functions and a related set of
scaling basis functions. Thus, a single mother wavelet generates a
transformation just as a prototype sinewave generates the Fourier
transformations. There are enumerable "mother" wavelets, each
generating a different transformation. The wavelet transformations
are entirely real (there are no imaginary components or carriers).
This halves the complexity of modulation and equalization. Since
only real components are involved, it is thus possible to frequency
modulate an input data stream without having to account for an
imaginary component.
[0226] An exemplary FM modem according to the present disclosure
employs an 8-dimensional polyphase filter as the baseband input to
an FM modulator. As illustrated in the following table, a
non-linear distribution of bits per band is employed.
3 PRE- DE- EMPHASIS EMPHASIS SCALE GAIN BAND BITS LEVELS FACTOR
FACTOR (db) i = B = (L) Hi = Gd = 0 4 +/-1, 3, 5, 7, 9, 11, 13,
.times.1 18.6 15 1 3 +/-2, 6, 10, 14 .times.2 16.2 2 2 +/-4, 12
.times.4 17.9 3 1 +/-9 .times.9 22.0 4 1 +/-9 .times.9 19.9 5 1
+/-9 .times.9 18.1 6 1 +/-9 .times.9 16.7 7 0 not used for data
(sync)
[0227] Thus, in the presently illustrated embodiment, there are a
total of 13 bits per input symbol. One design goal is that each
band is to have approximately the same power (here, RMS average=9
db). From the following equations, it is apparent that the noise
coming out of the FM receiver depends on the square of the sub-band
frequency. The power spectral density, or PSD, is given by Couch,
"Digital and Analog Communications Systems", 4th ed., MacMillan,
equation 7-125:
PSD=[(K/A).sup.2][N.sub.0][f.sup.2]
[0228] where K is the FM detector gain, A is the carrier amplitude
and N.sub.0 is double-sided noise power spectral density.
[0229] According to this frequency versus noise relationship, fewer
and fewer bits may be transmitted within each sub-band as the
sub-bands move away from DC since the noise increases as the square
of the frequency. Therefore, it is possible to send a larger number
of bits at the lowest frequencies since there is significantly less
noise coming out of the discriminator within the receiver then at
the higher sub-bands. In the above example, sub-band 0 has 4 bits,
while sub-band 6 has 1 bit; the number of levels in each band are
chosen to match the parabolic noise density function, PSD, of an FM
discriminator.
[0230] It is possible in a first embodiment of the present
invention to provide to an FM modulator sub-bands having decreasing
average power levels with increasing sub-band frequency. For
example, the higher sub-bands can carry fewer bits but all
sub-bands use the same level spacing per bit. In a second
embodiment of the present invention, the levels representing each
bit or bits in the sub-bands are spaced apart or pre-emphasized to
provide equivalent average power across all sub-bands. In other
words, voltage levels of +/-1, 3, 5, 7, 9, 11, 13 and 15 are
employed in sub-band 0 in order to represent the data conveyed by
the 4 bits assigned to this sub-band. Voltage levels of +/-9 are
used to represent the 0 or 1 state of the lone bit assigned to
sub-band 6. The average power for these two sub-bands is thus
approximately the same. This technique of spacing the levels apart
at higher frequency sub-bands is referred to as a pre-emphasis
technique. With a signal pre-emphasized in this manner in its data
coordinate representation, it can then be converted to its signal
coordinate representation by a polyphase coordinate rotation
filter. This sampled analog signal can then be used as an input to
an analog FM transmitter. A receiver detects these levels and
converts them back to bits. Thus, no explicit pre-emphasis or
de-emphasis filters are needed.
[0231] In the above example, the levels for each sub-band are given
as integers (i.e. +/-1, 3, 5, . . . ). In other words, each
sub-band has 2.sup.B levels. In a further embodiment of the present
application, the number of levels in a given sub-band is not a
power of two, but if a total of K bits are transmitted in p
sub-bands, then the total number of levels in p sub-bands is
2.sup.K. A binary mapping algorithm is then employed for
determining which of the two to the n levels is represented.
Adjusting the bits per sub-band and total number of bits per symbol
enables the optimization of bandwidth for carrier to noise ratio.
Computer aided design iterations provide these optimized
values.
[0232] In order to compensate for the pre-emphasis of the higher
frequency sub-bands, it is necessary to "de-emphasize" the received
signal at the higher frequencies in the receiver. Less data is sent
in higher frequency sub-bands, though the data is conveyed at
higher levels to provide uniform power out of the transmitter
across the sub-bands. Attenuating the high frequency sub-bands
results in de-emphasis gain Gd. This de-emphasis results in an
overall gain which, for M dimensions, may be approximated by the
following formula:
Gd=Gs.times.M.sup.3/(M-1)
[0233] where Gs may be one in a carefully designed modem, or may
vary slightly for each sub-band in a design having the levels in
each sub-band restricted to 2.sup.B levels. Clearly, a larger
number of sub-bands M increases the gain. Further improvements in
gain are possible by forward error correction and by reducing the
peak to average power ratio PAR using either companding or
controlled vector filtering. The latter is a technique whereby the
output peak voltage is precalculated at the transmitter and extra
bits, carrying no useful information, are sent along with the data.
These extra bits are chosen in a manner that reduces the
peak-to-average voltage ratio (PAR) out of the baseband
modulator.
[0234] Designating H(i) as the pre-emphasis amplification in
sub-band i:
Gs(i)=H(i).sup.2/(3i.sup.2+3i+1) for sub-bands i=0 to M-1
[0235] where the denominator in the preceding expression for Gs is
proportional to the integral from subband i to subband i+1 of the
PSD of the noise out of the discriminator. Sub-band i=0 carries k
bits of data and no pre-emphasis so H(0)=1. Sub-band 1 carries k-1
bits with H(1)=2, etc. A typical assignment for M=8 results in
nearly equal power in each sub-band:
4 i 0 1 2 3 4 5 6 7 bits 6 5 4 3 3 3 2 0 H(i) 1 2 4 8 8 8 16 1
[0236] for a total of B=26 bits per symbol. The various bit level
assignments are as illustrated above in the previous example of
bits per sub-band.
[0237] The total gain G is derived from the de-emphasis gain Gd, as
given above, the normal FM transmitter gain Gm (also known as the
modulation gain), which is due to the FM index, as given below, and
the noise-reduction gain Gr. The total gain G is given by:
G=Gm.times.Gd'.times.Gr
[0238] where G' equals the minimum de-emphasis gain Gd from the
de-emphasis gain formula given above. The textbook modulation gain
factor Gm is also given by:
Gm=6(m+1)(m.sup.2)/(PAR).sup.2
[0239] where PAR is the peak-to-RMS voltage ratio into the
frequency modulator and m is the modulation index.
[0240] The FM index is the ratio of the peak carrier frequency
deviation to the peak frequency of the baseband signal. As shown in
the foregoing formulas, as the peak-to-average ratio (PAR)
increases, the FM gain, or modulation gain, decreases. To address
this problem, a further embodiment of the present invention employs
non-linear amplification of the baseband signal prior to insertion
into the FM transmitter and complimentary de-amplification at the
receiver, collectively referred to as companding. In a preferred
embodiment, a logarithmic Mu-law function performs the transmitter
amplification digitally by table look-up. The Mu-law is applied to
the signal coordinate representation. In an embodiment preferred
for large carrier to noise ratios (CNR), the data bits are framed
and expressed in data coordinates, then pre-emphasized, then
rotated, then Mu-law amplified by look-up before the application to
the FM modulator as a sampled sequence. As previously noted, in one
embodiment, the de-compression attenuation includes an
equalizer.
[0241] In another embodiment preferred for small CNR, the data is
framed and expressed in data coordinates, rotated to signal
coordinates, digitally Mu-law amplified, rotated back to data
coordinates, pre-emphasized, rotated to signal coordinates and then
applied to the FM modulator. This latter configuration, which
permits de-emphasis immediately after the discriminator, may be
preferred when operating near FM threshold or when operating in the
presence of high-amplitude non-Guassian interference. The Mu-law
function preferred for the transmitter non-linear amplification
is:
Vo=SIGN(Vi).times.Vp.times.Log2(1+Mu.times.ABS(Vi/Vc))/Log2(1+Mu)
[0242] where the input Vi has a maximum voltage value Vc and the
output Vo has a maximum value Vp. The value of Mu is greater or
equal to 1 and may typically be 255. The FM deviation is determined
by Vp, whereas Vc reflects the precision of the rotation filter
calculations.
[0243] A second benefit of logarithmic amplification is a result of
the necessary logarithmic de-amplification (i.e. de-compression) at
the receiver, which amounts to attenuation. The input signal has
been logarithmically amplified and then de-amplified at either ends
of a transmission link. However, noise has been introduced within
this transmission link. Therefore, this noise is inverse
logarithmically attenuated, resulting in the noise reduction gain
Gr, as shown in the receiver gain equation above.
[0244] The bit error rate of a modem depends upon the energy per
bit, or in other words, the energy separating each data
representation level. This rate also depends upon the noise energy
density. The signal to noise ratio of an FM modem is:
S/N=Gm.times.Gd'.times.Gr.times.C/N
[0245] Thus, unlike linear modems, the efficiency depends
continuously on the design value for C/N. The efficiency of a
linear modem varies in steps as one adds modulation levels, for
example in going from 4-PSK to 8-PSK. For a given design, any
increase in C/N improves the bit error rate (BER) for both linear
and non-linear modems. However, a small increase in C/N for the FM
modem can be used instead to increase the bandwidth efficiency or
to reduce the bandwidth at the same efficiency. That is, the
increased C/N can be used to reduce the FM modulation index, which
lowers the bandwidth by Carson's rule, which specifies the
bandwidth W of FM or non-linear PM, given by:
W=2(M+1)w
[0246] where w is the baseband bandwidth. Thus, a non-linear modem
system could reduce the adjacent channel interference (ACI) by
using the excess of C/N over the design C/N value while maintaining
a constant BER and efficiency, or the modem can increase the
efficiency at the same BER and ACI.
[0247] The signal to noise ratio of a modem is Eb/N0 times the
bandwidth efficiency of the modem (given in bits per second per
hertz), or:
S/N=(Eb/N0).times.(eff)
[0248] where Eb/N0 reflects the energy per bit versus noise energy
density.
[0249] The foregoing application of FM transmission techniques to
data transmission derives benefit from the fact that amplitude
distortion is irrelevant for FM since information is retrieved by
the receiver from the frequency by, for example, tracking
zero-crossings. In FIG. 12, the transmission of data via FM double
side-band is illustrated in flow diagram form. In step 230, the
data to be transmitted is polyphase filtered as previously
discussed. Also as previously discussed, FIR filtration involves
the summation of a given number of previous polyphase filtrations.
This will be discussed with respect to FIG. 14.
[0250] It is commonly recognized that frequency modulation can be
achieved either by: 1) directly adjusting the frequency of a
carrier; or 2) adjusting the phase of a carrier with a signal which
is the integral of the information to be transmitted. The use of
phase adjustment to achieve frequency modulation is preferred in
one embodiment of the present invention since chips are available
which enable phase modulation in an entirely digital fashion, thus
maximizing the reproducibility of the input signal. Phase
adjustment FM is illustrated in FIG. 12 for FM double side-band and
FIG. 13 for FM single-side band.
[0251] In FIG. 12, the polyphase filtered input is integrated at
step 232. A lookup table is employed to digitally simulate a
sinusoidal carrier signal in step 236. This carrier signal is then
phase modulated using the result of the polyphase filtration
integration (step 238). The zero crossings of this signal contain
the coded information; by counting zero crossings (digitally--step
240), the desired information is provided to an RF switching
amplifier (steps 242 and 244). In a first embodiment of the present
invention, the switching amplifier is a Class C amplifier. In a
second embodiment, a VCO is employed for generating FM at passband.
In a third embodiment, FM is generated using the inphase and
quadrature technique.
[0252] FM double side-band provides significant advantages over
prior art modems. It provides immunity to noise associated with
amplitude modulated signals. Distortion due to non-linear
amplification is avoided. The RF amplifier employed need not be as
precise (and expensive) since amplitude modulation need not be
accurately reproduced. It also provides a certain degree of circuit
simplicity, since carrier recovery is not necessary at the
receiver.
[0253] However, FM double side-band provides half the band-width
efficiency as compared to FM single side-band. Therefore, another
embodiment of the present invention employs FM single side-band.
The flow diagram of FIG. 13 illustrates FM single side-band for the
present invention. In step 250, the input data is polyphase
filtered using, for instance, an FIR filter or wavelet
transformation as previously discussed. This step is further
developed in FIG. 14, discussed below. The polyphase filter output
is then integrated, and this result is stored (step 252).
[0254] A Hilbert Transform processes the input signal, effectively
phase shifting the input by 90 degrees (step 254). The output of
the Hilbert filtration is likewise integrated (step 256). The
Hilbert filter integration is then entered into an exponential
lookup table (step 258).
[0255] A sinusoidal carrier signal is digitally simulated as in
step 260 via the use of a lookup table. This carrier is then phase
modulated using the integrated polyphase filter output (step
262).
[0256] As with the FM double side-band scenario, the zero crossings
of the phase modulated carrier are computed (step 264), and a
digital pulse train corresponding to the zero crossings is produced
(step 266). Finally, in the single side-band case, a switching
amplifier whose input current is proportional to the output from
the exponential look-up table output amplifies the digital zero
crossing pulse train (step 268).
[0257] In either the FM double or single side-band cases, the first
steps in the transmission procedure, polyphase filtering the input
data, is achieved as follows. With reference to FIG. 14, the input
data is first partitioned into a block having B bits, wherein the B
bits are further separated into M coordinates of a vector (step
270). In the illustrated flow diagram, B=13 and M=8, though other
values for these variables are employable. Since the de-emphasis
gain factor varies according to (M.sup.3/(M-1)), an increase in M
permits a decrease in carrier to noise ratio. The optimal numbers
are determined empirically, and necessarily implicate the
determination of pre-emphasis across the sub-bands, as previously
discussed in relation to the de-emphasis gain factor.
[0258] A stack is employed in step 272 is order to retain this and
L previous vectors. As indicated in the figure, a first embodiment
uses L=9 vectors. These L vectors are multiplied by an M.times.M
dimensional scalar matrix to effectuate the initial polyphase
filtering (step 274). As illustrated, the scalar matrix is
8.times.8. Subsequently, in step 276, the matrix multiplication
occurs on the (L-1) previously stored vectors in the stack using
different 8.times.8 matrices for each iteration, and the result is
accumulated and output (step 278). As noted in step 280, the
previous steps shown in FIG. 14 are then repeated at the symbol
rate (R/B) in order to transmit R bits/second.
[0259] In all of the foregoing illustrations, it is understood that
alternative procedures for FM modulating input data according to
the present polyphase technique are feasible. However, the
illustrated procedure maximizes the proportion of data
manipulations which are digital.
[0260] With reference to FIG. 15, a procedure for receiving FM
transmitted data is illustrated. In step 284, the received signal
is low-noise amplified and passed through an image filter to
eliminate images introduced by mixing the received signal with a
local oscillator. Next, in step 286, the filtered receive signal is
down-converted to an intermediate frequency and inband filtered.
The zero crossings of the IF are counted in step 288; it is
unnecessary to recover a carrier signal or to determine the phase
of a carrier using FM modulation.
[0261] The DC filtration of step 290 is useful in applications of
the present invention which are subject to substantial doppler
shift. For modems used for low earth orbiting satellites, where the
doppler shift follows known orbital parameters, filtering is used
in one example in order to eliminate the effects of such DC or low
frequency distortion. Another approach to addressing such low
frequency distortion is to avoid use of the lowest frequency
sub-band. The decimation filtering of the same step effects a
smoothing of the zero crossing count, the latter necessarily being
at a high rate for adequate signal resolution, but which may
introduce unwanted noise. In step 292, polyphase filtration
involves the application of the commuting operator employed in the
first step of the transmission procedure.
[0262] Thresholding is used to differentiate between received
levels. The transmitted signal was sent at one of multiple, easily
distinguished levels. However, noise introduced in the transmission
link shifts the received signals to points intermediate the
expected levels. It is therefore necessary in step 294 to assign
the decimated receive signal to one of multiple signal levels.
[0263] Though carrier recovery is not required using FM data
transmission, baseband synchronization requires some form of bit
sync recovery (step 294). As previously noted, such sync
information can be transmitted in sub-bands not employed for data
transmission. If doppler shift is expected to be a problem, such as
in low earth orbit satellite communications, the lowest frequency
sub-band may not be used for data, and may be available for sync
transmission.
[0264] Similarly, the highest frequency sub-band cannot typically
be used. A filter perfect enough to avoid aliasing in the
equivalent A to D and D to A conversion operations does not exist.
By transmitting a known bit pattern at the 3 db point between the
second to highest sub-band and the highest sub-band, the sync
information is within the bandwidth of the transmitted signal, but
is not taking up usable data bandwidth. Such sync information can
be inserted by sampling a DC signal at a sync bit rate. High and
low pass filtering result in a sinewave output at the sample rate,
each square wave being at the high or low end of the respective
sub-band. Thus, this sync signal, akin to a pilot tone, is
orthogonal to all of the data signals.
[0265] The specific steps involved in the application of the
operator of step 292 is illustrated in FIG. 16. Specifically, the
sampled input is partitioned into a vector having the same number M
of dimensions as that employed in the transmission procedure (step
300). In the illustrated example, M=8. The result is pushed onto a
stack of L vectors (step 302), wherein the present example employs
L=9. The first vector on the stack is multiplied in step 304 by the
same 8.times.8 scalar matrix as employed in the transmission
sequence. This is repeated for L-1 previously vectors on the stack,
the results being accumulated (step 306). This accumulated result
provides the coordinates of a resultant vector sum (step 308)
which, after the thresholding and recovery of step 294, yields the
originally transmitted data. The steps of FIG. 16 are repeated at
the symbol rate R/B in order to receive R bits per second (step
310).
[0266] The aforementioned steps illustrate that this is, for all
practical purposes, an all digital FM modem. The only non-digital
parts are a passive tank circuit employed in steps 244 and 268, the
receiver front end in steps 284 and 286, and a D to A converter
necessary to modulate the input current to the Class C switching
amplifier using the output of the exponential lookup table. The
transmitter RF power amplifier is in fact a digital switch. The
filters could also be implemented so that all multiplications
become binary shifts and adds, thus reducing the cost and power
dissipation of an ASIC.
[0267] The previous description and equations generally assume that
only one of M subbands is unused to prevent aliasing in analog
converters. In alternative embodiments, a speed advantage may flow
from allowing more than one subband to be unused.
[0268] As previously recognized, the instant technique and general
structure can be adapted in a further embodiment for the
transmission of polyphase filtered data using AM modulation.
Adaptive rotation of the receive rotation matrix, as previously
described, can be applied to an AM modulated modem which employs
the LMS algorithm. For the LMS method, the rows of the vector
filter tap matrices are corrected iteratively by subtracting a
vector proportional to the error times the input vector stored in
the filter delay line for that tap. The error can be either the
difference between the unquantized and quantized output of the
modem receiver (i.e. the error margin), or the error can be the
difference between the unquantized output and a known training data
sequence. These general techniques are like those used in modem
equalizers except they are applied to the rotation matrix without a
separate equalizer.
[0269] One embodiment of the foregoing modulation and demodulation
technique is modelled using the software attached hereto as an
Appendix.
[0270] Having described preferred embodiments of the invention, it
will now become apparent to one of ordinary skill in the art that
other embodiments incorporating the concepts may be used. It is
felt, therefore, that these embodiments should not be limited to
disclosed embodiments but rather should be limited only by the
spirit and scope of the appended claims.
* * * * *