U.S. patent application number 10/953888 was filed with the patent office on 2005-06-16 for method and apparatus for electrochemical processing.
This patent application is currently assigned to GE ENERGY (USA) LLC. Invention is credited to Sulima, Oleg V..
Application Number | 20050126920 10/953888 |
Document ID | / |
Family ID | 28678244 |
Filed Date | 2005-06-16 |
United States Patent
Application |
20050126920 |
Kind Code |
A1 |
Sulima, Oleg V. |
June 16, 2005 |
Method and apparatus for electrochemical processing
Abstract
A method of electrochemically processing an article having a
semi-insulating element and a conducting element comprises forming
a conductive layer on the article, the conductive layer comprising
at least a first region covering at least a portion of the
semi-insulating element and a second region covering at least a
portion of the conducting element; gripping with at least one
conductive gripper a portion of the first region; submerging at
least a portion of the second region in an electrolyte while
keeping the conductive gripper out of said electrolyte; and
conducting current through a circuit comprising the conducting
element, the conductive layer, the conductive gripper, and an
electrode submerged in the electrolyte. The conductive layer is
preferably formed by diffusing a dopant from a vapor phase.
Inventors: |
Sulima, Oleg V.; (Newark,
DE) |
Correspondence
Address: |
BURR & BROWN
PO BOX 7068
SYRACUSE
NY
13261-7068
US
|
Assignee: |
GE ENERGY (USA) LLC
Atlanta
GA
|
Family ID: |
28678244 |
Appl. No.: |
10/953888 |
Filed: |
September 29, 2004 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
10953888 |
Sep 29, 2004 |
|
|
|
PCT/US03/09596 |
Mar 28, 2003 |
|
|
|
60368717 |
Mar 29, 2002 |
|
|
|
60368543 |
Mar 29, 2002 |
|
|
|
Current U.S.
Class: |
205/134 |
Current CPC
Class: |
H01L 31/02168 20130101;
H01L 21/28264 20130101; H01L 31/1868 20130101; H01L 21/02241
20130101; H01L 21/02233 20130101; H01L 21/02238 20130101; H01L
21/02178 20130101; Y02P 70/521 20151101; Y02P 70/50 20151101; H01L
21/31679 20130101; H01L 31/1844 20130101; Y02E 10/544 20130101;
C25D 5/02 20130101; H01L 21/02258 20130101 |
Class at
Publication: |
205/134 |
International
Class: |
C25D 005/02 |
Claims
1. A method of electrochemically processing an article comprising a
conducting element positioned on a semi-insulating element, the
method comprising: forming a conductive layer on an article, said
article comprising a semi-insulating element and a conducting
element, said conductive layer comprising at least a first region
and a second region, said first region covering at least a portion
of said semi-insulating element, said second region covering at
least a portion of said conducting element; gripping with at least
one conductive gripper a portion of said first region; submerging
at least a portion of said second region in an electrolyte while
keeping said conductive gripper out of said electrolyte; and
conducting current through a circuit comprising said conducting
element, said conductive layer, said conductive gripper, and an
electrode submerged in said electrolyte.
2. A method as recited in claim 1, wherein said semi-insulating
element has a substantially flat first surface and a substantially
flat second surface, said first surface of said semi-insulating
element being substantially parallel to said second surface of said
semi-insulating element, and said conducting element is
substantially flat and has a substantially flat first side and a
substantially flat second side, said first side of said conducting
element being substantially parallel to said second side of said
conducting element, said first side of said conducting element
being in contact with said second surface of said semi-insulating
element.
3. A method as recited in claim 1, wherein said conductive layer
completely surrounds said article.
4. A method as recited in claim 1, wherein said conductive layer is
formed by diffusing a dopant from a vapor phase.
5. A method as recited in claim 1, wherein said article is
submerged in said electrolyte to a depth where substantially an
entirety of said conducting element is beneath a top surface of
said electrolyte and substantially an entirety of said
semi-insulating element is above said top surface of said
electrolyte.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a Continuation of International
Application No. PCT/US03/09596 filed Mar. 28, 2003, the entirety of
which is incorporated herein by reference. This application claims
the benefit of U.S. Provisional Application 60/368,717, filed Mar.
29, 2002, and U.S. Provisional Application 60/368,543 filed Mar.
29, 2002, the entireties of which are incorporated herein by
reference.
FIELD OF THE INVENTION
[0002] The present invention is directed to a method of
electrochemically processing a conducting element which is
positioned on a semi-insulating element. In preferred aspects, the
present invention is directed to a method of electrochemically
processing a conducting epitaxial layer (or layers) which have been
grown on a semi-insulating substrate.
BACKGROUND OF THE INVENTION
[0003] There are a variety of devices known to those of skill in
the art which require one or more structure including a conducting
element positioned on a semi-insulating element, e.g., a conducting
layer formed epitaxially on a semi-insulating substrate. In
addition, there are a variety of situations known to those of skill
in the art where it is necessary or desirable to electrochemically
process such a conducting element positioned on a semi-insulating
element.
[0004] For instance, growth of epitaxial layers on semi-insulating
substrates has been used to provide series connection of
semiconductor devices (e.g., in high-voltage, low-current solar
cells and thermophotovoltaic cells). Electrochemical processing of
such devices can significantly simplify their fabrication.
[0005] For samples having a conducting epitaxial layer on a
semi-insulating substrate, two methods of electrochemical
processing which have been employed are: (i) holding the sample 10
(see FIG. 1), which includes a conducting epitaxial layer 11 and a
semi-insulating substrate 12, with a metal holder 13 contacting an
electrolyte 14 and applying current through a circuit including an
electrode 15 submerged in the electrolyte 14, the electrolyte 14,
the conducting layer 11 and wires 16 and 17, and (ii) a similar
arrangement except for holding the sample with a metal holder which
is not in contact with the electrolyte (see FIG. 2). Both of these
methods have substantial drawbacks. Method (i) leads to the
uncertainty of the current density for the processed area because
an unknown portion of current flows through the low-resistance
metal holder. For method (ii), the processed area is considerably
limited to avoid contacting the holder with the electrolyte. In
method (ii), a factor which limits the area which can be processed
is the electrolyte creeping along the processed surface toward the
holder, a phenomenon which is especially strong for rough surfaces
and long processes.
BRIEF SUMMARY OF THE INVENTION
[0006] The present invention provides a more precise and more
reproducible method of performing electrochemical processing on a
conducting element positioned on a semi-insulating element.
[0007] In accordance with the present invention, there is provided
a method of electrochemical processing, comprising:
[0008] forming a conductive layer on the outside of an article
comprising a semi-insulating element and a conducting element;
[0009] gripping the article with a conductive gripper at a region
of the conductive layer which is adjacent to the semi-insulating
element;
[0010] submerging the portion of the conductive layer which is in
contact with the conducting element in an electrolyte while keeping
the conductive gripper out of the electrolyte; and
[0011] conducting current through a circuit comprising the
conducting element, the conductive layer, the conductive gripper,
and an electrode submerged in the electrolyte.
[0012] Preferably, the article is a wafer, including a
semi-insulating substrate having substantially flat front and back
surfaces and a conducting epitaxial layer grown on the substrate
and also having substantially flat front and back surfaces, whereby
the gripper can be placed on the back surface of the wafer (i.e.,
the portion of the conductive layer adjacent to the back of the
substrate) and only the front side of the wafer (i.e., the portion
of the conductive layer adjacent to the front surface of the
conducting epitaxial layer) contacts the electrolyte, such that the
processed area or current density can be specified with high
accuracy.
[0013] A particularly preferred method for forming a conductive
layer on the outside of the article comprising a semi-insulating
element and a conducting element is to perform a diffusion of a
dopant suitable for the top epitaxial layer from a vapor phase.
Using a vapor phase dopant, the dopant can penetrate the article
from all sides, including the semi-insulating element.
[0014] The present invention is also directed to devices utilizing
the anodic oxide layer thus grown, including electrical and
optoelectrical devices such as transistors, capacitors, waveguides,
light emitters, light detectors and lasers, e.g., as disclosed in
U.S. Pat. Nos. 5,696,023, 5,567,980, 5,550,081 and 5,262,360 (the
entireties of which are hereby incorporated herein by reference),
as well as methods of making such devices including methods
according to the present invention. For example, the present
invention is directed to forming a III-V MOS device on a
semi-insulating substrate using an anodic oxide, e.g., in forming a
high-speed, high-power device (such as cell phones and radars).
[0015] In addition, the present invention relates to the masking
and passivation of semiconductors utilizing the anodic oxide that
forms from the practice of the present invention.
[0016] The invention may be more fully understood with reference to
the accompanying drawings and the following detailed description of
the invention.
BRIEF DESCRIPTION OF THE DRAWING FIGURES
[0017] FIG. 1 is a schematic view depicting a first known method of
electrochemically processing a sample having a conducting epitaxial
layer on a semi-insulating substrate.
[0018] FIG. 2 is a schematic view depicting a second known method
of electrochemically processing a sample having a conducting
epitaxial layer on a semi-insulating substrate.
[0019] FIG. 3 is a schematic view depicting a method of
electrochemically processing an article comprising a conducting
element on a semi-insulating element.
DETAILED DESCRIPTION OF THE INVENTION
[0020] As noted above, the present invention is direct to a method
of electrochemically processing an article comprising a conducting
element positioned on a semi-insulating element.
[0021] The present invention can be used to perform any kind of
electrochemical processing, a wide variety of which are well known
to those of skill in the art. For example, the present invention
can be used to perform electroplating. Also, the present invention
can be used to perform anodic oxidation. The present invention can
be used to make galvanic contacts. Similarly, the present invention
can be used to perform any other kind of electrochemical
processing.
[0022] The present invention is applicable to electrochemically
processing any article comprising any conducting element positioned
on any semi-insulating element. The present invention is therefore
not limited to any particular kind of conducting element made of
any particular material, or any particular kind of semi-insulating
element made of any particular material. Those of skill in the art
will appreciate that skilled artisans would readily be able to
apply the methods of the present invention to any such article.
[0023] Standard solar cells generate relatively high current but
relatively low voltage (usually less than 1 volt), e.g., voltage
which is not high enough to charge standard batteries (which
typically require at least several volts). To increase voltage, a
solar array consisting of several cells can be connected in series.
For such series connection, insulating semiconductor substrates can
be used. Because trenches are provided between respective cells,
the presence of a conductive layer in accordance with the present
invention, which conductive layer electrically connects the
opposite surfaces of each cell, does not present an electrical
problem.
[0024] A first side of the conducting element is in contact with a
second surface of the semi-insulating element. Preferably, the
second surface and a first surface of the semi-insulating element
are substantially flat, with the first surface being substantially
parallel to the second surface. Preferably, the first side and a
second side of the conducting element are substantially flat, with
the first side being substantially parallel to the second side.
[0025] As noted above, the method according to the present
invention comprises forming a conductive layer on an outside of the
article comprising a semi-insulating element and a conducting
element.
[0026] The conductive layer comprises at least a first region and a
second region, the first region covering at least a portion of the
semi-insulating element, the second region covering at least a
portion of the conducting element.
[0027] Preferably, the conductive layer completely surrounds the
article (i.e., is formed on all of the outer surfaces of the
conductive layer). It is not necessary, however, for the conductive
layer to completely surround the article, so long as the conductive
layer has a least a first region covering at least a portion of the
semi-insulating element and a second region covering at least a
portion of the conducting element, and the first region and the
second region are electrically connected to each other (e.g., the
first region and the second region both being connected to a third
region of the conductive layer).
[0028] Any suitable method for forming a conductive layer on the
outside of the article can be employed. A wide variety of
techniques for forming a conductive layer on the outside of an
article comprising a semi-insulating element and a conducting
element are known to those of skill in the art, and any such
technique can be employed.
[0029] As noted above, a preferred method for forming the
conductive layer on the outside of the article is to perform a
diffusion of a dopant suitable for the top epitaxial layer from a
vapor phase. Using a vapor phase dopant, the dopant can penetrate
the article from all sides, including the semi-insulating element,
such that the conductive layer completely surrounds the article. A
preferred dopant in such a method is zinc. The present invention is
not limited, however, to any particular method of forming the
conductive layer, or any particular type of conductive layer.
[0030] Next, a portion of the first region is gripped with at least
one conductive gripper. A variety of conductive grippers are known
to those of skill in the art, and any such gripper can be employed
in carrying out the present invention. For example, an example of a
suitable gripper is metal vacuum tweezers.
[0031] At least a portion of the second region of the conductive
layer (i.e., the portion which covers at least a portion of the
conductive element) is submerged in an electrolyte while keeping
the conductive gripper out of the electrolyte.
[0032] Preferably, the article is submerged to a depth where the
entire conducting element is beneath the level of the electrolyte
and the entire semi-insulating element is above the level of the
electrolyte.
[0033] Any suitable electrolyte can be employed, depending on the
nature of the electrochemical processing being performed. Those of
skill in the art can readily select an appropriate electrolyte
based on the nature of the electrochemical processing being
performed and the chemical nature of the other elements
involved.
[0034] Current is then conducted through a circuit comprising the
conductive layer, the conductive gripper, and an electrode
submerged in the electrolyte. Any suitable electrode can be
employed, and persons of skill in the art are readily able to
select an appropriate electrode, based on the nature of the
electrochemical processing being carried out and the materials of
the other elements. Likewise, any suitable circuitry can be
employed in order to provide the necessary current for performing
the electrochemical processing being performed, and persons of
skill can readily select appropriate circuitry. The present
invention is not limited to any particular electrolyte, circuitry
or electrodes.
[0035] Referring to FIG. 3, there is shown an article 30 (including
a conducting epitaxial element 31 and a semi-insulating element
32), and a conductive layer 33 surrounding the article 30 on all
sides. The article 30 is held with a pair of metal vacuum tweezers
34 and is submerged in an electrolyte 35, to a depth where the
conducting epitaxial element 31 is beneath the level of the
electrolyte 35 and the semi-insulating element 32 is above the
level of the electrolyte 35. Current is applied through a circuit
including an electrode 36 which is submerged in the electrolyte 35,
the electrolyte 35, the conducting epitaxial element 31, the
conductive layer 33 and wires 37 and 38.
[0036] For example, in a specific embodiment of the present
invention, there is provided a process for making a photovoltaic
cell for use in a device comprising scintillating fibers and a
solar cell array, in which the scintillating fibers are used to
absorb short wavelength light and re-emit the light at a longer
wavelength, and the solar cell array is used to absorb the
re-emitted light and convert it into energy.
[0037] According to this process, a gallium-arsenide
semi-insulating layer (or any other semi-insulating layer, e.g.,
indium phosphide) is provided, and then an n-doped gallium arsenide
layer is epitaxially formed on the semi-insulating layer (using any
material which acts as an n-dopant, e.g., tin dopant), then a
p-doped gallium arsenide layer is epitaxially formed on the n-doped
layer (using any material which acts as a p-dopant, e.g., germanium
dopant), and then an un-doped aluminum gallium arsenide layer is
formed on the p-doped layer. Preferably, the n-doped layer, the
p-doped layer and the un-doped layer are formed by liquid phase
epitaxy, preferably in a single melt run. Preferably, the un-doped
aluminum gallium arsenide layer has a composition at or near
Al.sub.0.8Ga.sub.0.2As. Next, a low-temperature vapor phase zinc
diffusion is carried out, e.g., in a pseudo-closed graphite
cassette. This diffusion leads to the formation of a thin
zinc-doped diffused layer on the outer surfaces of the entire
wafer, including the semi-insulating substrate.
[0038] Then the zinc-doped aluminum gallium arsenide layer is
anodically oxidized to form an anti-reflection coating. This anodic
oxidation is carried out in accordance with the present invention,
with the gallium arsenide semi-insulating layer functioning as the
semi-insulating element, the aluminum gallium arsenide layer
functioning as the conducting element, and the zinc-doped diffused
layer surrounding the entire wafer functioning as the conductive
layer. In the resulting product, the aluminum gallium arsenide
layer functions as a passivating layer.
[0039] In another aspect of the present invention, an important
trend in semiconductor technology is the use of Group III-V
materials for the fabrication of semiconductor devices. While the
utilization of silicon (Si) is still prevalent, Group III-v
compounds--such as GaAs--have been the subject of much research due
to significant advantages these compounds offer. For example, Group
III-V compounds generally exhibit larger band gaps, larger electron
mobilities and have the ability to produce light, which properties
result in unique electrical and optical characteristics.
[0040] Notwithstanding these qualities, there has been difficulty
in producing, on the Group III-v semiconductor, an oxide layer of
desired thickness that exhibits the necessary surface state and
electrical properties required for practical application. In this
regard, the oxide must be able to fulfill, without the disruption
and strain caused by over-expansion of the oxide thickness, a
variety of functions in a practical and consistent manner. Examples
of these functions include: serving as a mask during device
fabrication, providing surface passivation, isolating one device
from another (dielectric isolation, as opposed to junction
isolation), acting as a component in the anatomy of various device
structures and providing electrical isolation of multilevel
metallization systems. Accordingly, the presence of a high-quality,
stable oxide layer having adequate physical properties and proper
thickness, as provided by the present invention, is important to
the successful development of Group III-V semiconductor
technology.
[0041] Silicon-based materials, unlike Group III-V semiconductors,
readily form a high quality oxide (SiO.sub.2) by such methods as
reacting the silicon crystal with water vapor, e.g., in the form of
steam. Indeed, the very existence of silicon-based integrated
circuit technology is largely due and owing to this ability of
silicon to form a high quality silicon oxide. Moreover, this oxide
is a native oxide, as opposed to a deposited oxide layer. Native
oxides, e.g., the anodic oxides formed according to the present
invention, are more desirable than deposited oxides in that they
are monolithic with the crystal and thus avoid potential
mismatching of dielectric characteristics and problems associated
with oxide-substrate interface bonding, such as lifting and
cracking. Further, deposition processes are on the whole more
complicated and costly than are methods of growing a native oxide
thus making the latter more attractive for commercial use.
* * * * *