U.S. patent application number 10/977735 was filed with the patent office on 2005-05-26 for method and apparatus for forming high surface area material films and membranes.
This patent application is currently assigned to Hewlett-Packard Development Company, L.P.. Invention is credited to Dunfield, John Stephen, Gore, Makarand P..
Application Number | 20050112333 10/977735 |
Document ID | / |
Family ID | 31946364 |
Filed Date | 2005-05-26 |
United States Patent
Application |
20050112333 |
Kind Code |
A1 |
Gore, Makarand P. ; et
al. |
May 26, 2005 |
Method and apparatus for forming high surface area material films
and membranes
Abstract
The present invention discloses a method and apparatus for
producing high surface area material films and membranes on
substrates. In one application, patterns of spikes or bristles are
produced on wafers and transferred to films, such as conductive
polymer or metal films, by using repetitive and inexpensive
processes, such as electroplating and embossing. Such a technique
provides low cost, high surface area materials and allows reuse of
expensive patterned silicon. Membranes with high surface area are
extremely valuable in fuel cells since the power density is
generally proportional to the surface area and the patterns may be
used to cast inexpensive fuel cell electrodes.
Inventors: |
Gore, Makarand P.;
(Corvallis, OR) ; Dunfield, John Stephen;
(Corvallis, OR) |
Correspondence
Address: |
HEWLETT-PACKARD COMPANY
Intellectual Property Administration
P.O. Box 272400
Fort Collins
CO
80527-2400
US
|
Assignee: |
Hewlett-Packard Development
Company, L.P.
|
Family ID: |
31946364 |
Appl. No.: |
10/977735 |
Filed: |
October 29, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10977735 |
Oct 29, 2004 |
|
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|
10236429 |
Sep 6, 2002 |
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Current U.S.
Class: |
428/172 |
Current CPC
Class: |
H01M 4/044 20130101;
Y10T 428/24612 20150115; B29C 33/56 20130101; B29C 33/38 20130101;
C23C 14/0005 20130101; C25D 1/10 20130101; H01M 4/8605 20130101;
H01M 4/0407 20130101; Y02E 60/50 20130101; Y02E 60/10 20130101;
H01M 4/881 20130101 |
Class at
Publication: |
428/172 |
International
Class: |
B32B 003/00 |
Claims
What is claimed is:
1-11. (canceled)
12. A method of producing a high surface area film comprising:
providing a wafer with a textured surface; depositing a material
onto the wafer to form a film; and separating the film form the
wafer, wherein a surface pattern of said texture surface is
reproduced on said film.
13. The method of claim 12 wherein the textured surface comprises
surface features having shapes selected from the group consisting
of bristles, spikes, grass, steps, dimples and pores.
14. The method of claim 13 wherein the shapes are bristles.
15. The method of claim 12, wherein the surface pattern of the
textured surface is reproduced on the film within nanometer
scale.
16. The method of claim 12 wherein said deposited material is
selected from the group consisting of: a metal, a conductive
polymer, and a biological material.
17. The method of claim 16 wherein said metal is selected from the
group consisting of: ruthenium, rhodium, cobalt, iron, nickel,
palladium, rhenium, osmium, platinum, and tungsten, and alloys
thereof.
18. The method of claim 16 wherein said conductive polymer is
Nafion.RTM..
19. The method of claim 16 where said biological material is
selected from the group consisting of: a lipid, a protein, an
enzyme, an antibody, DNA, RNA, an amino acid, and a
carbohydrate.
20. The method of claim 12, further comprising preparing the
surface of the wafer for film deposition by applying at least one
preparation material onto the wafer.
21. The method of claim 20, wherein said at least one preparation
material is selected from the group consisting of: stainless steel,
ruthenium, rhodium, cobalt, iron, nickel, palladium, rhenium,
osmium, platinum, tungsten, and alloys thereof.
22. The method of claim 12, wherein said step of depositing
material comprises electroplating.
23. The method of claim 12, wherein the film has a thickness of
about 10 microns.
24. A method of producing a high surface area film comprising:
providing a first wafer with a first textured surface; providing a
second wafer with a second textured surface; embossing a film
between the first and second wafers; and removing the embossed
film, wherein a surface pattern of the first and second wafer is
reproduced on the film.
25. The method of claim 24, wherein the first and second textured
surfaces comprise surface features having shapes selected from the
group consisting of bristles, spikes, grass, steps, dimples and
pores.
26. The method of claim 25 wherein the shapes are bristles.
27. The method of claim 24, wherein the step of embossing
comprises: preparing the film for embossing by inserting the film
between the first and second wafers to create a wafer assembly;
securing the wafer assembly between metal plates to create a plate
assembly; and applying pressure to the plate.
28. The method of claim 27, wherein the step of removing the
embossed film comprises: heating the plate assembly, wherein the
film deforms; and cooling the wafer assembly, wherein the first and
second wafers fall away from the film.
29. The method of claim 28 wherein the step of cooling the wafer
assembly is performed in liquid.
30. A method of producing a high surface area film, comprising:
repeatedly forming surface features on a surface by first etching
the surface with an inorganic halide plasma and then depositing a
passivation layer onto said etched surface by means of an organic
halide plasma; depositing a catalytic material onto the passivation
layer to form a film; separating said catalytic material film from
said passivation layer, wherein said catalytic material fim
reproduces said surface features.
31. The method of claim 30 wherein the surface comprises surface
features having shapes selected from the group consisting of
bristles, spikes, grass, steps, dimples and pores.
32. The method of claim 31 wherein the shapes are bristles.
33. The method of claim 30 wherein said surface features comprise
spikes having a diameter less than 1 micron.
34. The method of claim 30 wherein said deposited material is
selected from the group consisting of: a metal, a conductive
polymer, and a biological material.
35. The method of claim 34 wherein said metal is selected from the
group consisting of: ruthenium, rhodium, cobalt, iron, nickel,
palladium, rhenium, osmium, platinum, and tungsten, and alloys
thereof.
36. The method of claim 34 wherein said conductive polymer is
Nafion.RTM..
37. The method of claim 34 wherein said biological material is
selected from the group consisiting of: a lipid, a protein, an
enzyme, an anibody, DNA, RNA, an amino acid, and a carybohydrate.
Description
FIELD OF THE INVENTION
[0001] The present invention is directed to the field of high
surface area material films and membranes.
BACKGROUND OF THE INVENTION
[0002] High efficiency catalysts are important in a vast number of
applications and processes. Efficient catalysts are necessary for
achieving desired performance in fuel cells, organic synthesis,
catalytic cracking, auto exhausts, etc. One determinant of
efficiency is the surface area available for reaction. For example,
when catalysts are used with electrodes in electrochemical
applications such as fuel cells, electrical and electrochemical
energy storage and peak power increases in proportion with
increasing surface area of the electrode. Therefore, the ability to
easily manufacture high area surfaces with a variety of chemistries
is important to the preparation of efficient catalysts.
SUMMARY OF THE INVENTION
[0003] The present invention discloses a method and apparatus for
producing high surface area material films and membranes on
substrates. In one application, patterns of spikes or bristles are
produced on wafers and transferred to films, such as conductive
polymer or metal films, by using repetitive and inexpensive
processes. Such a technique provides low cost, high surface area
materials and allows reuse of expensive patterned silicon.
Membranes with high surface area are extremely valuable in fuel
cells since the power density is generally proportional to the
surface area and the patterns may be used to cast inexpensive fuel
cell electrodes.
BRIEF DESCRIPTION OF THE DRAWING
[0004] The invention is described with reference to the several
figures of the drawing, in which:
[0005] FIG. 1 is an SEM micrograph of a grassy silicon template
created according to one embodiment of the invention;
[0006] FIG. 2 is an SEM micrograph of one embodiment of the
invention showing an electroplated nickel film with a complementary
surface pattern;
[0007] FIG. 3 illustrates an assembly and embossing process
according to one embodiment of the invention.
DETAILED DESCRIPTION OF THE INVENTION
[0008] Referring now to the figures of the drawing, the figures
constitute a part of this specification and illustrate exemplary
embodiments to the invention. It is to be understood that in some
instances various aspects of the invention may be shown exaggerated
or enlarged to facilitate an understanding of the invention.
[0009] The invention exploits the amenability of a silicon surface
to topological and chemical modification. Plasma etching processes
are typically used to create trenches and other features for use in
microelectromechanical systems (MEMS); however, these techniques
may be adapted to create a textured surface with surface features
having at least one of various shapes including: grassy, spiked,
stepped, dimpled, pored or bristled. An embodiment of the invention
utilizes the Advanced Silicon Etch (ASE) process developed by
SurfaceTechnology Systems (Newport, UK). The ASE process is based
on a sidewall passivation mechanism for etching anisotropic
structures. Anisotropy is defined as:
A=1-V.sub.i/V.sub.v
[0010] where V.sub.i is the lateral etch rate and V.sub.v is the
vertical etch rate. Passivation protects the sidewalls of etched
structures and inhibits thermal and chemical etching, enabling
production of vertical walls and deep trenches. However,
non-selective passivation over an entire silicon surface may
decrease the etch rate. In ASE, etching and passivation cycles are
alternated instead of adding both etchants and passivants to the
plasma at once. Typically, oxygen or hydrogen is added to the
plasma to form the passivation layer.
[0011] Previous investigators have recognized that silicon
structures other than vertical trenches may have practical
applications. For example, black silicon, whose surface has tall
spikes that are longer than the wavelength of visible light, is
useful for anti-reflective coatings. However, most refinement of
plasma etching techniques has aimed to reduce production of grassy
silicon.
[0012] The present invention recognizes the utility of grassy or
bristled silicon and utilizes ASE techniques to vary the aspect
ratio and density of the spikes or bristles. The inventive
apparatus and method provides for an inexpensive way of producing
high surface area films and submicron structures in many
applications. In one exemplary embodiment, SF.sub.6 is used as the
etchant and C.sub.4F.sub.8 is used as the passivant. The process
conditions are as follows:
1 Total process time 20 min Etch cycle 9 sec Passivation cycle 9
sec Etch gas SF.sub.6 at 130 sccm Passivation gas C.sub.4F.sub.8 at
85 sccm Etch pressure 25 mtorr Passivation pressure 12 mtorr
Temperature .about.25-30.degree. C. Coil Power 600 W Platen Power
6-10 W
[0013] These conditions result in spikes about 200 nm high.
Adjustment of the processing parameters will change both the
dimensions of the spikes and their aspect ratios. FIG. 1 shows that
the techniques of the invention may be used to generate grassy
silicon with submicron features and aspect ratios of 1:10, 1:50, or
even greater. Use of non-oxygen containing gases in the plasma not
only facilitates the formation of grassy structures but allow
formation of structures with high surface areas.
[0014] The grassy structures are then coated with a catalytic
material, for example, ruthenium, rhodium, cobalt, iron, nickel,
palladium, rhenium, osmium, platinum, tungsten, or alloys thereof.
Chemical vapor deposition, sputtering, evaporation, embossing and
electroplating are examples of techniques that may be used to
deposit catalytic or other materials on the grassy surface. The
catalytic material film is then separated from the grassy surface
silicon wafer. FIG. 2 is an SEM micrograph of an electroplated
nickel film with a complementary surface to that shown in FIG. 1. A
nickel film was deposited by electroplating on the silicon wafer
having the bristled pattern shown in FIG. 1. The electroplated
nickel film was then removed to reveal the complementary surface
shown in FIG. 2.
[0015] In other embodiments, the deposited material may be a
conductive polymer such as Nafion.RTM.. Alternatively, biological
molecules such as DNA, RNA, amino acids, proteins, enzymes,
antibodies, lipids, carbohydrates, etc. may be deposited onto the
silicon spikes or onto a coating previously disposed on the silicon
surface for use in biological probes. Graphite may also be
deposited on the surface to form an electrical probe.
[0016] By using repetitive and inexpensive processes such as
embossing or electroplating to transfer the bristled surface
pattern to material films, the invention provides for the
manufacture of low cost, high surface area materials and allows
reuse of expensive patterned silicon. Such membranes with high
surface area are extremely valuable in fuel cells since the power
density is generally proportional to the surface area and the
patterns may be used to cast inexpensive fuel cell electrodes.
Experiments using palladium deposition followed by treatment with
hydrogen and reaction with oxygen have shown very high catalytic
activity similar to the original silicon wafer. Indeed, the
embossing experiments performed showed transfer of pattern at
sub-micron levels from silicon to polymer. The wells created by the
spikes of sub-micron dimension (e.g., spikes having diameters of
less than 1 micron) are abundant and contribute to the higher
surface area. This method lends itself for ready adaptation to
roll-to-roll processing and provides the way for mass forming high
activity electrodes.
[0017] One skilled in the art will recognize that a wide variety of
surface modification techniques may be used to deposit materials on
the spikes. Standard chemical techniques may be used to modify the
etched silicon or coated surface. For example, metals, inorganic
materials, or organometallic molecules may be adsorbed onto the
surface or the silicon surface itself may be modified chemically,
for example, through formation of an oxide layer. Electrochemical
techniques may be used to deposit various materials, such as
oxidative catalysts for fuel cells. Electroless deposition
techniques may be used to deposit metals on the surface.
Organosilanes may be attached to the surface to form self-assembled
monolayers, or SAMs. These SAMs may be further modified by standard
chemical techniques.
[0018] FIG. 3 illustrates an assembly and embossing process
according to one embodiment of the invention. FIG. 3A shows the
preparation of a silicon wafer 10 with a bristled pattern 12 for
embossing a film 20. FIG. 3B shows the whole assembly 60 used for
the embossing process. FIG. 3C shows embossed film 20 having a
surface pattern 22 that is a complementary reproduction of the
bristled pattern 12 in the silicon wafer 10. In one example, the
silicon wafer 10 having bristled surface pattern 12 was sputtered
with approximately 250 Angstroms platinum on one side and a plain
"flat" silicon wafer 14 with similar treatment was used for the
embossing of the other side (as described in a later example,
surface pattern 12 could also potentially be sputtered with
multiple layers, such as stainless steel 316 on top of the platinum
layer). A film 20 (e.g. conductive polymer Nafion.RTM. 117 film)
was sandwiched between the respective surfaces to form a wafer
assembly 30. The wafer assembly 30 was mounted between steel plates
40 and put into a small `shop vice` 50. The whole assembly 60 was
put in an oven at 140.degree. C. for 1 hour. The whole assembly 60
was cooled and the wafer assembly 30 was soaked in water until the
silicon wafers fell off to produce the embossed film 20 having a
surface pattern 22 that is a complementary reproduction of the
bristled pattern 12 in the silicon wafer. Scanning Electron
Micrographs showed the film to be complementary to the respective
silicon patterns demonstrating a "hand to glove" type of pattern
reproducibility at nanometer scale. The side of the film embossed
with the "flat" silicon showed very small surface features in
comparison to the bristled pattern side.
[0019] Multiple sputtering depositions are possible. In another
example, a grassy silicon wafer sputtered with about 250 angstroms
of platinum was subsequently sputtered with stainless steel 316
with average thickness of about 220 angstroms. Scanning Electron
Micrographs showed the coating to be completely conformal to the
grassy pattern. The wafer was subjected to a nickel electroplating
bath to deposit approximately 10 microns of film. The film was
separated from the wafer "mandrel" showing "hand to glove" pattern
reproducibility at nanometer scale.
[0020] Other embodiments of the invention will be apparent to those
skilled in the art from a consideration of the specification or
practice of the invention disclosed herein. It is intended that the
specification and examples be considered as exemplary only, with
the true scope and spirit of the invention being indicated by the
following claims.
* * * * *