U.S. patent application number 10/945779 was filed with the patent office on 2005-03-24 for plasma etching apparatus.
This patent application is currently assigned to Samsung Electronics Co., Ltd.. Invention is credited to Kim, Do-Hyeong, Kim, Yong-Dae, Lee, Doo-Won, Yon, Soon-Ho.
Application Number | 20050061447 10/945779 |
Document ID | / |
Family ID | 34309458 |
Filed Date | 2005-03-24 |
United States Patent
Application |
20050061447 |
Kind Code |
A1 |
Kim, Yong-Dae ; et
al. |
March 24, 2005 |
Plasma etching apparatus
Abstract
A plasma etch apparatus is disclosed. The plasma etch apparatus
includes an electrostatic chuck for loading a wafer; an insulation
portion surrounding the electrostatic chuck; and a focus ring
disposed on the electrostatic chuck and the insulation portion. The
focus ring has a concave-convex configuration.
Inventors: |
Kim, Yong-Dae; (Kyungki-do,
KR) ; Yon, Soon-Ho; (Seoul, KR) ; Kim,
Do-Hyeong; (Kyungki-do, KR) ; Lee, Doo-Won;
(Kyungki-do, KR) |
Correspondence
Address: |
MARGER JOHNSON & MCCOLLOM, P.C.
1030 SW MORRISON STREET
PORTLAND
OR
97205
US
|
Assignee: |
Samsung Electronics Co.,
Ltd.
Suwon-city
KR
|
Family ID: |
34309458 |
Appl. No.: |
10/945779 |
Filed: |
September 20, 2004 |
Current U.S.
Class: |
156/345.51 |
Current CPC
Class: |
H01J 37/32642 20130101;
H01L 21/6831 20130101; H01J 37/32623 20130101 |
Class at
Publication: |
156/345.51 |
International
Class: |
C23F 001/00 |
Foreign Application Data
Date |
Code |
Application Number |
Sep 19, 2003 |
KR |
2003-65129 |
Claims
1. An apparatus for plasma etching a wafer, comprising: an
electrostatic chuck for loading said wafer in the apparatus; an
insulation portion surrounding the electrostatic chuck; and a focus
ring having a circular shape disposed on the electrostatic chuck
and the insulation portion, a portion of the focus ring having a
concave-convex configuration.
2. The plasma etch apparatus of claim 1, wherein the focus ring has
a concave-convex configuration at the interface where the focus
ring contacts the insulation portion.
3. The plasma etch apparatus of claim 1, wherein the electrostatic
chuck comprises: a center portion having a diameter shorter than
the diameter of the wafer; and a peripheral portion having a top
surface lower than the center portion and surrounding the center
portion.
4. The plasma etch apparatus of claim 3, wherein the insulation
portion comprises: a bottom supporter surrounding the electrostatic
chuck; and a cover ring spaced from the electrostatic chuck and
disposed on the bottom supporter, wherein the focus ring covers at
least a section of the top surface of the peripheral portion and an
inner top surface of the cover ring.
5. The plasma etch apparatus of claim 4, wherein the cover ring
comprises: an outer cover ring disposed on an edge of a top surface
of the bottom supporter; and an inner cover ring disposed between
the outer cover ring and the focus ring, wherein the inner cover
ring has an extension portion which extends to a bottom of the
focus ring.
6. The plasma etch apparatus of claim 5, wherein a top surface and
an outer sidewall of the outer cover ring form a curved fan-shaped
section.
7. The plasma etch apparatus of claim 5, wherein a bottom surface
of the outer cover ring is disposed at a location lower than the
inner cover ring.
8. The plasma etch apparatus of claim 5, wherein the outer cover
ring is formed of quartz or aluminum coated with yttrium oxide
(Y.sub.2O.sub.3), the inner cover ring is formed of quartz or
aluminum coated with yttrium oxide (Y.sub.2O.sub.3), and the focus
ring is formed of silicon.
9. The plasma etch apparatus of claim 1, wherein the insulation
portion has a circular-shaped groove and the focus ring has a
circular-shaped protruding portion fittingly engaged within the
groove.
10. The plasma etch apparatus of claim 5, wherein the inner cover
ring has a circular-shaped groove and the focus ring has a
circular-shaped protruding portion fittingly engaged within the
groove.
11. The plasma etch apparatus of claim 1, wherein the focus ring
has a circular-shaped groove and the insulation portion has a
circular-shaped protruding portion fittingly engaged within the
groove.
12. The plasma etch apparatus of claim 5, wherein the focus ring
has a circular-shaped groove and the inner cover ring has a
circular-shaped protruding portion fittingly engaged within the
groove.
13. The plasma etch apparatus of claim 1, wherein sections of the
focus ring and the insulation portion have complementary
configurations comprising ripple patterns which are fittingly
engaged with respect to each other.
14. The plasma etch apparatus of claim 5, wherein sections of the
focus ring and the inner cover ring have complementary
configurations comprising ripple patterns which are fitting engaged
with respect to each other.
15. The plasma etch apparatus of claim 1, wherein the focus ring
includes at least one protruding portion or at least one
groove.
16. The plasma etch apparatus of claim 3, wherein a gap between the
focus ring and the center portion is from about 0.01 mm to about
0.2 mm.
17. The plasma etch apparatus of claim 1, wherein a gap between the
focus ring and the insulation portion is from about 0.01 mm to
about 0.2 mm.
18. The plasma etch apparatus of claim 1, wherein the focus ring
includes an inner ring adjacent to the electrostatic chuck and an
outer ring adjacent to the insulation portion, wherein a top
surface of the inner ring is lower than a top surface of the
electrostatic chuck by a distance of from about 0.1 to 0.7 mm.
19. The plasma etch apparatus of claim 1, wherein a top surface of
the insulation portion is equal to or lower than an top surface of
the focus ring.
20. An apparatus for plasma etching a wafer, comprising: an
electrostatic chuck for loading said wafer in the apparatus; an
insulation portion surrounding the electrostatic chuck; a focus
ring disposed on the electrostatic chuck and the insulation
portion, at least a portion of the focus ring comprising a
concave-convex configuration; a center portion having a diameter
shorter than the diameter of the wafer; a peripheral portion having
a top surface lower than the center portion and surrounding the
center portion; a bottom supporter surrounding the electrostatic
chuck; and a cover ring spaced from the electrostatic chuck and
disposed on the bottom supporter.
Description
[0001] This application claims priority from Korean Patent
Application No. 2003-65129, filed on Sep. 19, 2004, the contents of
which are incorporated herein by reference in their entirety.
BACKGROUND OF THE INVENTION
[0002] 1. Field of this Invention
[0003] This disclosure relates to an apparatus for fabricating
semiconductor devices, and more particularly, to a plasma etching
apparatus for fabricating semiconductor devices.
[0004] 2. Description of Prior Art
[0005] A process of fabricating semiconductor devices includes
etching a material layer formed on a semiconductor wafer using a
predetermined etching apparatus. For example, an insulation layer
is etched to form a contact hole using a predetermined etching
apparatus. The etching apparatus can be classified as a dry etch
apparatus or wet etch apparatus. Although the wet etch apparatus
can treat a plurality of wafers at once, an etch process of forming
the contact hole can't be proceeded in the wet etch apparatus due
to isotropy of the wet etch. However, the dry etch apparatus can
anisotropically etch a material layer using plasma. Thus, the dry
etch apparatus can be used in an etch process of forming the
contact hole.
[0006] The dry etch apparatus can be classified into physical dry
etch apparatus and chemical dry etch apparatus. The physical dry
etch apparatus employs a process of accelerating ions formed in a
plasma by an electric field and impacting the ions with respect to
the material layer. The physical dry etch apparatus has a superior
anisotropic etch characteristic but a bad etch selectivity with
respect to a layer under the material layer. However, the chemical
dry etch apparatus etches the material layer using a chemical
reaction radicals formed in the plasma. The chemical dry etch
apparatus has a superior etch selectivity but a possibility of an
isotropic etch characteristic. Recently, by combining all
advantages of the physical and chemical dry etch apparatuses, an
ion-enhanced plasma etch method, having superior etch selectivity
and anisotropic etch characteristics, may be used for the purposes
described above.
[0007] A dry etch apparatus employing a plasma, which may be
conducted using plasma etch apparatus, has been disclosed in a
Korean patent application number 10-1996-0020284. Generally, a
plasma etch apparatus includes a reaction chamber and an upper
electrode and a lower electrode that are disposed in the reaction
chamber. The lower electrode is used as a susceptor when a wafer is
loaded. The upper electrode is disposed over the lower electrode so
that it is parallel to the lower electrode.
[0008] In the plasma etch chamber, after a wafer is loaded onto the
susceptor, high-frequency power is supplied to the upper and lower
electrodes while an etch gas is supplied into the reaction chamber.
The etch gas is ionized between the upper and lower electrodes to
from an etch gas in a plasma state used for etching a material
layer located on the wafer.
[0009] However, as semiconductor devices become more highly
integrated, the plasma etch apparatus is required to have a finer
and more uniform etch characteristic and/or a faster etch rate. On
the contrary, the plasma etch apparatus has a problem related to
the formation of by-products. For example, in the case that silicon
oxide is etched using a gas containing carbon and fluorine, such as
CF.sub.4 or CHF.sub.3, by-products containing carbon can be
generated of a polymeric type. Most of the by-products are
generally exhausted out of for the reaction chamber with a carrier
gas, but some of the by-products which is not fully exhausted can
pollute the reaction chamber.
[0010] The Korean patent application number 10-1996-0020284
discloses a method of using a material having a high thermal
conductivity as a part of the process chamber in order to minimize
pollution of the reaction chamber due to the by-products. However,
as illustrated in FIG. 1A, this method can't effectively prevent an
electrostatic chuck 150, a focus ring 110 surrounding the
electrostatic chuck 150, cover rings 130 and 140 and a bottom
supporter 120 from being polluted by the polymer-typed by-product
155, thereby causing a problem. FIG. 1B is a photograph showing an
edge surface of the electrostatic chuck 150 exposed by decomposing
the focus ring 110. As seen in FIG. 1B, much of the polymer-type
by-product 155 is attached to the edge of the electrostatic chuck
150. This polymer-type by-product may cause a problem in that the
photoresist can become damaged.
[0011] Usually, an etch process is performed using a photoresist
pattern as a etch mask pattern. In the case that the by-product 155
is accumulated on the edge of the electrostatic chuck 150, the
photoresist may be damaged in the plasma etch process by using the
high-frequency power. For example, the photoresist may be boiled or
burnt (Refer to FIGS. 1C and 1D).
[0012] The chance that the photoresist will become damaged will
increase as time goes on, even after maintaining the plasma etch
apparatus. When the focus ring 110 is dismantled for maintenance,
much of polymer 155 attached on a surface of the electrostatic
chuck 150 can occur as shown in FIG. 1b. The damage to the
photoresist causes a failure of a product. For this reason, a new
plasma etch apparatus is required to have more stable etch
characteristics.
SUMMARY
[0013] One feature of the present invention is to provide a plasma
etch apparatus having more stable etch characteristics.
[0014] A plasma etch apparatus according to an embodiment of the
present invention includes a focus ring. More particularly, the
plasma etch apparatus includes an electrostatic chuck for loading a
wafer in the apparatus; an insulation portion surrounding the
electrostatic chuck; and a focus ring disposed on the electrostatic
chuck and the insulation portion. A portion of the focus ring has a
concave-convex configuration.
[0015] The electrostatic chuck may include a center portion having
a diameter shorter than the diameter of the wafer; and a peripheral
portion having a top surface lower than the center portion and
surrounding the center portion. The insulation portion may include
a bottom supporter surrounding the electrostatic chuck; and a cover
ring spaced from the electrostatic chuck and disposed on the bottom
supporter. The focus ring may cover at least a section of a top
surface of the peripheral portion and an inner top surface of the
cover ring and have at least one protruded portion or at least one
groove.
[0016] Preferably, the cover ring includes an outer cover ring
disposed on edge of a top surface of the bottom supporter; and an
inner cover ring disposed between the outer cover ring and the
focus ring. At this time, the inner cover ring may have an
extension portion which extends to a bottom of the focus ring. A
top surface and an outer sidewall of the outer cover ring form a
curved section and a section of the outer cover ring includes a
curved fan shape. A bottom surface of the outer cover ring may be
lower than the inner cover ring. At this time, the outer cover ring
and the inner cover ring may be formed of quartz or aluminum coated
with yttrium oxide (Y.sub.2O.sub.3), and the focus ring may be
formed of silicon.
[0017] According to an embodiment of the present invention, the
insulation portion has a groove of a generally circle shape and the
focus ring has a protruded portion of a generally circle shape
fittingly engaged within the groove. Particularly, the inner cover
ring has a groove of a generally circle shape and the focus ring
has a protruded portion of a circle shape fittingly engaged within
the groove.
[0018] According to another embodiment of the present invention,
the focus ring has a groove of a circle shape and the insulation
portion has a generally circular-shaped protruded portion fittingly
engaged within the groove. The focus ring has a groove of a
generally circular shape and the inner cover ring has a generally
circular-shaped protruded portion fittingly engaged within the
groove.
[0019] According to still another embodiment of the present
invention, sections of the focus ring and the insulation portion
have ripple patterns fittingly engaged with respect to each other.
Sections of the focus ring and the inner covering have ripple
patterns which are fittingly engaged with respect to each
other.
[0020] The gap between the focus ring and the center portion ranges
preferably from about 0.01 to about 0.2 mm. The gap between the
focus ring and the insulation portion ranges preferably from about
0.01 to about 0.2 mm. The top surface of the inner ring is lower
than the top surface of the electrostatic chuck by a distance of
from about 0.1 mm to 0.7 mm. Furthermore, the top surface of the
insulation portion may have a height equal to or lower than an
utmost surface of the focus ring.
BRIEF DESCRIPTION OF THE DRAWINGS
[0021] FIG. 1A is a cross-sectional view showing portions of a
plasma etch apparatus according to certain conventional
technology.
[0022] FIG. 1B is a photograph showing polymer-typed by-products
attached to an electrostatic chuck of a plasma etch apparatus
according to certain conventional technology.
[0023] FIGS 1C and 1D are photographs showing examples of process
failures that may occur in a plasma etch apparatus according to
certain conventional technology.
[0024] FIG. 2 is a diagram showing a plasma etch apparatus
according to an embodiment of the present invention.
[0025] FIGS. 3 through 5 are cross-sectional views showing
embodiments of a plasma etch apparatus having a focus ring
according to the present invention.
[0026] FIGS. 6A, 7A, 8A and 9A are perspective views showing
embodiments of a plasma etch apparatus having a focus ring
according to the present invention.
[0027] FIGS. 6B, 7B, 8B and 9B are perspective views showing
embodiments of a plasma etch apparatus having an inner cover ring
according to the present invention.
[0028] FIG. 10 is a cross-sectional view showing a position of a
focus ring composing a plasma etch apparatus according to an
embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0029] Referring to FIG. 2, a plasma etch apparatus 1 according to
an embodiment of the present invention includes a reaction chamber
5 wherein a wafer W is loaded. The reaction chamber 5 provides a
space where an etch process can be performed with respect to the
loaded wafer W, and preferably includes a susceptor 10 where the
wafer W is loaded and an upper electrode 20 disposed on the
susceptor 10. The susceptor 10 and the upper electrode 20 each are
generally cylindrically shaped. The reaction chamber 5 is
preferably grounded through a ground line 9.
[0030] According to an embodiment of the present invention, the
susceptor 10 is connected to a first high-frequency power source 42
generating high-frequency electric power of about 2 MHz through a
first matcher and used as a lower electrode. Additionally, the
susceptor 10 includes a predetermined temperature controller (not
illustrated), for example, a heater (not illustrated) such as a
ceramic heater or a cooler such as a coolant-circulation line. The
wafer W loaded on the susceptor 10 can be kept to have a constant
temperature due to the temperature controller. Preferably, the
temperature controller is controlled by a predetermined automatic
controller having a temperature sensor in order to automatically
keep the temperature of the susceptor 10 constant.
[0031] In order to fix the wafer W, an electrostatic chuck 12 is
disposed on the susceptor 10. According to an embodiment of the
present invention, the electrostatic chuck 12 includes two
polyimide films and a conductive thin layer interposed between the
films. At this time, the conductive thin layer is connected to a
direct current power source 45 having a high voltage located
outside of the reaction chamber 5. When a predetermined voltage is
applied on the conductive thin layer from the direct current power
source 45 of high voltage, charges are generated at surfaces of the
polyimide film to generate a coulomb force fixing the wafer W on
the electrostatic chuck 12. However, a method of fixing the wafer W
is not limited as the method of using the electrostatic chuck 12.
The wafer W can be fixed using a mechanical device such as a clamp.
Furthermore, the susceptor 10 can include at least three lift pins
14 penetrating the electrostatic chuck 12. The lift pins 14
function for moving the wafer W loaded in the reaction chamber 5
down to the upper surface of the electrostatic chuck 12.
[0032] Insulation portions 30 surrounding the electrostatic chuck
12 are disposed at the upper edges of the susceptor 10. The
insulation portions 30 are generally ring shaped and are preferably
formed of quartz. A focus ring 50 having a generally ring shape is
disposed on a boundary between the insulation portions 30 and the
electrostatic chuck 12. The focus ring 50 and the insulation
portions 30 are explained in detail by referring to FIGS. 3 through
10.
[0033] The upper electrode 20 is parallel to the susceptor 10 and
disposed on the electrostatic chuck 12. The upper electrode 20 is
connected to a second high-frequency power source 44 generating an
electric power of high frequency of about 60 MHz through a second
matcher 43. At this time, a gap "h.sub.1" between a bottom surface
of the upper electrode 20 and an upper surface of the electrostatic
chuck 12 preferably ranges in size from about 20 mm to about 40 mm
for imparting superior etch characteristics. However, a bottom
surface of the upper electrode 20 (i.e., a surface 22 adjacent to
the electrostatic chuck 12) is preferably formed of silicon in
order to stabilize atmosphere in the reaction chamber 5 for the
etch process. At this time, the silicon preferably has a
predetermined thickness so that a high-frequency power used for the
plasma etch can penetrate the silicon. Furthermore, the upper
electrode 20 may be formed of components including aluminum and
anodized aluminum.
[0034] A gas inlet 23 is disposed on the upper electrode 20 in
order to supply gas for the etch process. The gas inlet 23 is
connected to a reaction gas supply source 47 through a gas supply
line 46, a valve 48, and a mass flow controller (MFC) 49, which are
disposed in the gas supply line 46 for controlling flow rate. The
upper electrode 20 may be a path for supplying the reaction gas
into the reaction chamber 5. For this, the upper electrode 20
includes a plurality of layers having a plurality of holes 25. At
this time, a bottom layer 22 of the upper electrode 20, composing
an inner wall of the reaction chamber 5, which is formed of silicon
as described above. Consequently, the upper electrode 20 preferably
has both shower head structure and hollow structure for a uniform
distribution of the supplied gas.
[0035] The reaction chamber 5 is connected to a predetermined
decompression device 7, such as a vacuum pump through an exhaust
pipe 6 disposed within a predetermined region. Thus, the reaction
chamber 5 can be maintained at a low inner pressure required for a
superior etch characteristic. According to an embodiment of the
present invention, an inner pressure of the reaction chamber 5 is
preferably from about 10 to 100 mTorr, more preferably from about
15 to about 75 mTorr, and most preferably from about 25 to about 50
mTorr. A pressure sensor 8 monitors the inner pressure of the
reaction chamber 5 and a controller 3 processes the result measured
by the pressure sensor 8. The pressure sensor 8 may be disposed in
the plasma etch apparatus 1. The decompression device 7 is
controlled by the controller 3 analyzing the result measured by the
pressure sensor 8 to keep an inner pressure of the reaction chamber
5 at a predetermined value.
[0036] A gate valve 52 is disposed on a sidewall of the reaction
chamber 5, and a loadlock chamber 50 is connected to the gate valve
52. A wafer transfer arm 54 is disposed at the loadlock chamber 50.
When the gate valve 52 is opened, gases in the loadlock chamber 50
are transferred into the reaction chamber 5 to make the pressure of
the reaction chamber 5 equal to that of the loadlock chamber 50.
Thus, in the case that the pressure of the loadlock chamber 50 is
excessively higher than that of the reaction chamber 5, a
decompression process of decreasing the inner pressure of the
reaction chamber 5 may take too long a time. Thus, before opening
the gate valve 52, the pressure of the loadlock chamber 50 should
be preferably controlled to a level similar with that of the
reaction chamber 5.
[0037] Next, a method of using the plasma etch apparatus describe
above is briefly explained by referring to a process of etching a
silicon oxide on a wafer to form a contact hole.
[0038] After decompressing the pressure of the loadlock chamber 50
to a value similar with that of the reaction chamber 5, the wafer W
is loaded from the loadlock chamber 50 into the reaction chamber 5
using the wafer transfer arm 54. The wafer W is loaded on the lift
pins 14 and, then onto the electrostatic chuck 12 by moving down
the lift pins 14. Then, after the wafer transfer arm 54 is
transferred out of the reaction chamber 5 to the loadlock chamber
50, the gate valve 52 is closed. The inner pressure of the reaction
chamber 5 is decompressed to a predetermined value using the
decompression device 7, and then a predetermined reaction gas is
supplied into the reaction chamber 5 from the reaction gas supply
source 47.
[0039] A high-frequency electric power is supplied by operating the
second high-frequency power source 44 to ionize the reaction gas.
Thus, a reaction gas having a plasma state is formed between the
upper electrode 20 and the loaded wafer W. The ions of the reaction
gas of the plasma state are projected onto the wafer W and on the
electrostatic chuck 12 to etch the silicon oxide formed on the
wafer W. The incidence rate of the plasma is controlled by a power
supplied by the first high-frequency power source 42. At this time,
in order to prevent the wafer from being damaged by an over
voltage, the power supplied to the susceptor 10 may be less than
that supplied to the upper electrode 20. After finishing the etch
process, the wafer W is unloaded from the reaction chamber 5. The
unloading process is preferably performed in reverse order of the
loading process of the wafer, but individual unloading steps may be
changed.
[0040] Referring to FIGS. 2 and 3, the electrostatic chuck 12
having a generally cylinder shape is disposed on the susceptor 10.
The electrostatic chuck 12 includes a center portion 16, where the
wafer W is loaded, and a peripheral portion 18 having a top surface
which is at a lower level than the center portion 16.
[0041] The electrostatic chuck 12 is surrounded by the insulation
portion 30 having the generally circular shape. The insulation
portion 30 is generally formed of quartz but may be formed of
aluminum oxide (Al.sub.2O.sub.3) and aluminum coated by yttrium
oxide (Y.sub.2O.sub.3). According to an embodiment of the present
invention, the insulation portion 30 may include a bottom supporter
37, an outer cover ring 34 and an inner cover ring 33.
[0042] The bottom supporter 37 is formed of quartz and surrounds
the electrostatic chuck 12. The height of the top surface of the
bottom supporter 37 may be lowered along an outer direction with
respect to the electrostatic chuck 12. According to an embodiment
of the present invention, the bottom supporter 12 has first, second
and third upper surfaces 37a, 37b and 37c of different relative
levels. The first upper surface 37a is at the highest level of the
three upper surfaces 37a, 37b and 37c, and is preferably at the
same level as the peripheral portion 18. The outer cover ring 34 is
disposed on the third upper surface 37c at the lowest level of the
three upper surfaces 37a, 37b and 37c. The inner cover ring 33 is
disposed on the second upper surface 37b at an intermediate
level.
[0043] The outer cover ring 34 is formed of quartz or yttrium oxide
(Y.sub.2O.sub.3) and, as described above, is disposed on the third
upper surface 37c. An outer arcuate portion 34a of the outer cover
ring has a generally curved configuration. That is, an upper
surface and an outer sidewall of the outer cover ring 34 form a
generally curved line so that a cross-sectional view of the outer
cover ring 34 has a generally curved shape.
[0044] The inner cover ring 33, which is formed of quartz or
aluminum coated by yttrium oxide (Y.sub.2O.sub.3), and as described
above, is disposed on the second upper surface 37b at an
intermediate height. Consequently, the inner cover ring 33 is
disposed between the outer cover ring 34 and the bottom supporter
37. The inner cover ring 33 includes an extension portion 31
adjacent to the electrostatic chuck 12 and an exposure portion 32
whose upper surface is exposed. The upper surface of the extension
portion 31 is at the same level as the first top surface 37a. The
upper surfaces of the extension portion 31, the peripheral portion
18 and the first top surface 37a have substantially the same
height. However, various embodiments at differing heights of these
surfaces may be possible. The exposure portion 32 preferably has
the same height as the upper portion of the outer cover ring 34 but
is lower than the upper surface of the focus ring 50.
[0045] The focus ring 50 of the circle type is disposed on the
extension portion 31, the peripheral portion 18 and the first top
surface 37a, respectively, to focus the plasma on the wafer W. The
focus ring 50 is generally formed of silicon and may include an
inner ring 51 and an outer ring 52 thicker than the inner ring
51.
[0046] According to an embodiment of the present invention, the
focus ring 50 and the inner cover ring 51 have concave-convex
structures fittingly engaged with respect to each other. According
to a preferred embodiment of the present invention, a protruding
portion 90 is disposed under the focus ring 50 and a complimentary
groove 92 fittingly engaged to the protruding portion 90 is formed
on the extension portion 31 (Refer to FIGS. 3, 6A and 6B). The
protruding portion 90 and the groove 92 may be formed at the outer
bottom surface of the focus ring 50 and on the outer surface of the
extension portion 31 as illustrated in FIGS. 7A and 7B,
respectively.
[0047] According to another embodiment of the present invention, a
groove 92' is formed at the bottom surface of the focus ring 50 and
a protruding portion 90' may be formed at the inner cover ring 51
(Refer to FIGS. 4, 8A and 8B). The groove 92' and the protruded
portion 90' also preferably have a generally circular shape.
According to another embodiment of the present invention, the focus
ring 50 and the insulation portion 30 can have complimentary ripple
patterns 97 which fittingly engage each other (Refer to FIGS. 5, 9A
and 9B). Preferably, the ripple patterns 97 are formed under the
outer ring 52 and on the extension portion 31. The distance from a
top surface of the exposure portion 32 to an inner bottom surface
of the focus ring 50 will be lengthened due to this concave-convex
structural configuration. The inner cover ring 51 of the quartz is
etched during the etch process to lower the top surface of the
exposure portion 32. The etching by-products may be accumulated at
a bottom surface of the focus ring 50, but the concave-convex
structure minimizes accumulation of these by-products.
[0048] However, referring to FIG. 10 showing a cross-sectional view
88 adjacent to the inner ring 51 in order to explain the structure
and arrangement of the focus ring 50 in more detail, a radius
r.sub.1 of the center portion 16 is shorter than a radius r.sub.2
of the wafer W. Thus, an edge of the wafer W disposed on the
electrostatic chuck 12 overlaps the center portion 16 a distance
equal to the difference of the respective radii, i.e.,
r.sub.2-r.sub.1. At this time, a thickness h.sub.2 of the inner
ring 51 is thinner than a difference h.sub.3 of height of the
center portion 16.
[0049] According to an embodiment of the present invention, a gap
hd between a bottom surface of the wafer W and a top surface of the
inner ring 51 is preferably ranging from about 0.1 to about 0.7 mm.
By decreasing the gap h.sub.d, it is possible to reduce the
strength of an electric field applied between the wafer W and the
focus ring 50 in step of applying a high-frequency power to
generate plasma. Thus, it is possible to minimize the occurrence of
problems such as electric discharge due to a concentration of the
electric field.
[0050] According to other embodiment of the present invention, in
order to minimize stacking of the by-product, a gap 1.sub.1 between
the center 16 and the inner ring 51 is preferably ranging from
about 0.01 to about 0.2 mm. For the same reason, a gap between the
focus ring 50 and the insulation portion 30 is also preferably
ranging from about 0.01 to about 0.2 mm. Furthermore, a top surface
of the outer ring 52 preferably has a height equal to or higher
than a top surface of the wafer W loaded on the electrostatic chuck
12.
[0051] As described above, the plasma etch apparatus having a focus
ring of a concave-convex structure according to the present
invention may provide more stable etch characteristics. For
example, although photoresists on 137 wafers were damaged in a
conventional etch apparatus, photoresist on only 4 wafers were
damaged in the present etch apparatus. Consequently, the plasma
etch apparatus according to the present invention can minimize
failure such as the damage of the photoresist during the etch
process.
[0052] Accordingly, a focus ring included in the plasma etch
apparatus of the present invention has a concave-convex structure.
Thus, an overall path where by-products penetrate to a bottom
surface of the focus ring is lengthened to minimize occurrence of
problems such as electric discharge due to an accumulation of the
by-products. Consequently, it is possible to fabricate a plasma
etch apparatus having more stable etch characteristics.
[0053] A person skilled in the art will be able to practice the
present invention in view of the description present in this
document, which is to be taken as a whole. Numerous details have
been set forth in order to provide a more thorough understanding of
the invention. In other instances, well-known features have not
been described in detail in order not to obscure unnecessarily the
invention.
[0054] While the invention has been disclosed in its preferred
embodiments, the specific embodiments as disclosed and illustrated
herein are not to be considered in a limiting sense. Indeed, it
should be readily apparent to those skilled in the art in view of
the present description that the invention may be modified in
numerous ways. The inventor regards the subject matter of the
invention to include all combinations and sub-combinations of the
various elements, features, functions and/or properties disclosed
herein.
[0055] The following claims define certain combinations and
sub-combinations, which are regarded as novel and non-obvious.
Additional claims for other combinations and sub-combinations of
features, functions, elements and/or properties may be presented in
this or a related document.
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