U.S. patent application number 10/944238 was filed with the patent office on 2005-03-10 for fabrication of optical components using si, sige, sigec, and chemical endpoint detection.
Invention is credited to Hunt, Charles E., Peterson, Jeffrey J..
Application Number | 20050051514 10/944238 |
Document ID | / |
Family ID | 29418786 |
Filed Date | 2005-03-10 |
United States Patent
Application |
20050051514 |
Kind Code |
A1 |
Peterson, Jeffrey J. ; et
al. |
March 10, 2005 |
Fabrication of optical components using Si, SiGe, SiGeC, and
chemical endpoint detection
Abstract
One embodiment of the present invention provides a system to
facilitate using selective etching to form optical components on a
circuit device. The system operates by receiving a substrate
composed of a first material including a buffer layer composed of a
second material. The system forms a sacrificial layer composed of a
third material on the buffer layer. Next, the system forms an
optical fiber core composed of a fourth material on the sacrificial
layer. After the optical fiber core has been formed, the system
performs an etching operation using a selective etchant to remove
the sacrificial layer. The system also applies a cladding layer to
the optical fiber core.
Inventors: |
Peterson, Jeffrey J.;
(Folsom, CA) ; Hunt, Charles E.; (Davis,
CA) |
Correspondence
Address: |
PARK, VAUGHAN & FLEMING LLP
508 SECOND STREET
SUITE 201
DAVIS
CA
95616
US
|
Family ID: |
29418786 |
Appl. No.: |
10/944238 |
Filed: |
September 16, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10944238 |
Sep 16, 2004 |
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10146278 |
May 15, 2002 |
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6800212 |
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Current U.S.
Class: |
216/24 |
Current CPC
Class: |
G02B 6/136 20130101;
G02B 2006/121 20130101; G02B 2006/1215 20130101 |
Class at
Publication: |
216/024 |
International
Class: |
B29D 011/00 |
Goverment Interests
[0001] This invention was made with United States Government
support under Grant Numbers N00014-93-C-0114 and N00014-96-C-0219,
awarded by the Office of Naval Research. The United States
Government has certain rights in the invention.
Claims
1-15. (Canceled).
16. A method to facilitate integrating active components on a
circuit device, wherein the circuit device includes an optical
fiber core that was epitaxially grown, comprising; receiving the
circuit device; etching a cavity into the circuit device, wherein
the cavity passes through the optical fiber core; and creating a
device within the cavity, wherein the device is aligned with the
optical fiber core and wherein the device is an active device or a
passive device.
17. The method of claim 16, wherein etching the cavity includes
etching into a buffer layer below the optical fiber core.
18. The method of claim 16, wherein etching the cavity includes
etching into a substrate layer below the optical fiber core.
19. The method of claim 18, wherein the substrate layer includes a
doped semiconductor region, whereby the doped semiconductor region
can form part of the active device.
20. The method of claim 16, further comprising applying a
metallization layer to the active device, whereby the metallization
layer forms conduction paths for the active device.
21. The method of claim 20, wherein the metallization layer forms a
mirror metallization.
22. A method to facilitate self aligned connections, wherein
creating a device includes creating a self-aligned device that is
self-aligned to an external fiber.
23-43. (Canceled).
Description
BACKGROUND
[0002] 1. Field of the Invention
[0003] The present invention relates to a process for manufacturing
structures on a substrate. More specifically, the present invention
relates to creating optical components within an integrated circuit
through a process that uses chemically-selective endpoint
detection.
[0004] 2. Related Art
[0005] The dramatic advances in computer system performance during
the past 20 years can largely be attributed to improvements in the
processes that are used to fabricate integrated circuits. By making
use of the latest fabrication processes, integrated circuit
designers can presently integrate computing systems comprised of
hundreds of millions of transistors onto a single semiconductor die
which is a fraction of the size of a human fingernail.
[0006] Integrated circuit fabrication technology is also being used
to fabricate optical devices such as lasers within integrated
circuit devices, and which have dimensions measured in fractions of
microns.
[0007] A typical fabrication process builds structures through
successive cycles of layer deposition and subtractive processing,
such as etching. As the dimensions of individual circuit elements
continue to decrease, it is becoming necessary to more tightly
control the etching operation. For example, in a typical etching
process, etching is performed for an amount of time that is
estimated by taking into account the time to etch through a layer
to reach an underlying layer, and the time to overetch into the
underlying layer. However, this process can only be controlled to
+/-100 Angstroms, which can be a problem when fine control of
dimensions is required.
[0008] Furthermore, conventional etching processes that
indiscriminately etch all exposed surfaces are not well suited to
manufacture some structures that require tighter control over
subtractive processing operations. As circuit structures become
smaller, there is less tolerance available to account for
uncertainties in the manufacturing process.
[0009] Additionally, connecting optical devices within an
integrated circuit typically requires aligning optical fibers with
an optical device such as a laser, or converting the optical
signals to electrical signals at the source and converting the
electrical signals back to optical signals at the destination.
Aligning optical fibers with an optical device is difficult and
time consuming because of the small dimensions involved, while
converting the form of the signals can lead to signal
degradation.
[0010] What is needed is a method of fabricating and connecting
optical components that does not have the difficulties listed
above.
SUMMARY
[0011] One embodiment of the present invention provides a system to
facilitate using selective etching to form optical components on a
circuit device. The system operates by receiving a substrate
composed of a first material including a buffer layer composed of a
second material. The system forms a sacrificial layer composed of a
third material on the buffer layer. Next, the system forms an
optical fiber core composed of a fourth material on the sacrificial
layer. After the optical fiber core has been formed, the system
performs an etching operation using a selective etchant to remove
the sacrificial layer. The system also applies a cladding layer to
the optical fiber core.
[0012] In one embodiment of the present invention, the system adds
a filler to fill the cavity left by removing the sacrificial layer
and planarizes the circuit device using chemo-mechanical polishing
to create a planarized surface.
[0013] In one embodiment of the present invention, the substrate is
Si and the buffer layer is SiGe or SiGeC. Using SiGeC for the
buffer layer allows growth of a thicker buffer layer than when
using SiGe. In this embodiment, the sacrificial layer is Si, the
optical fiber core is SiO.sub.2:GeO.sub.2, the selective etchant
used to remove the sacrificial layer is KOH or tetramethylammonium
hydroxide (TMAH), and the cladding layer on the optical fiber core
is SiO.sub.2. It is appreciated that other materials and etchants
may be used.
[0014] In one embodiment of the present invention, the buffer layer
is SiGeC, wherein carbon is greater than or equal to one atomic
percent.
[0015] In one embodiment of the present invention, the buffer layer
is SiGeC, wherein carbon is less than or equal to one atomic
percent.
[0016] In one embodiment of the present invention, the filler is
SiO.sub.2.
[0017] In one embodiment of the present invention, the buffer layer
is an epitaxial layer.
[0018] In one embodiment of the present invention, the sacrificial
layer is an epitaxial layer.
[0019] In one embodiment of the present invention, the optical
fiber core is an epitaxial layer.
[0020] In one embodiment of the present invention, the system
splits the optical fiber core into multiple optical fiber cores to
form an optical multiplexer.
[0021] In one embodiment of the present invention, the system
combines multiple optical fiber cores into a single optical fiber
core to form an optical demultiplexer.
[0022] One embodiment of the present invention provides a system to
facilitate integrating active or passive components on a circuit
device that includes an optical fiber core that was epitaxially
grown. During operation, the system receives this circuit device,
and etches a cavity into the circuit device, wherein the cavity
passes through the optical fiber core. The system also creates an
active device within the cavity that is aligned with the optical
fiber core.
[0023] In one embodiment of the present invention, etching the
cavity includes etching into a buffer layer below the optical fiber
core.
[0024] In one embodiment of the present invention, etching the
cavity includes etching into a substrate layer below the optical
fiber core.
[0025] In one embodiment of the present invention, the substrate
layer includes a doped semiconductor region that can form part of
the active device.
[0026] In one embodiment of the present invention, the system
applies a metallization layer to the active device to form
conduction paths for the active device.
[0027] In one embodiment of the present invention, the
metallization layer forms a mirror metallization.
BRIEF DESCRIPTION OF THE FIGURES
[0028] FIG. 1A illustrates preparing a circuit device with a
sacrificial layer in accordance with an embodiment of the present
invention.
[0029] FIG. 1B illustrates forming optical fiber cores on the
sacrificial layer in accordance with an embodiment of the present
invention.
[0030] FIG. 1C illustrates removing the sacrificial layer and
cladding the optical fiber core in accordance with an embodiment of
the present invention.
[0031] FIG. 1D illustrates including a filler in accordance with an
embodiment of the present invention.
[0032] FIG. 2A illustrates an optical multiplexer in accordance
with an embodiment of the present invention.
[0033] FIG. 2B illustrates an optical demultiplexer in accordance
with an embodiment of the present invention.
[0034] FIG. 3 is a flowchart illustrating the process of forming
optical fiber cores on a circuit device in accordance with an
embodiment of the present invention.
[0035] FIG. 4A illustrates a longitudinal cross-section view of a
circuit device in accordance with an embodiment of the present
invention.
[0036] FIG. 4B illustrates cavities etched into the circuit device
in accordance with an embodiment of the present invention.
[0037] FIG. 4C illustrates active devices formed in the cavities in
the circuit device in accordance with an embodiment of the present
invention.
[0038] FIG. 4D illustrates metallization applied to the circuit
device in accordance with an embodiment of the present
invention.
[0039] FIG. 5 is a flowchart illustrating the process of forming
active devices in the circuit device in accordance with an
embodiment of the present invention.
DETAILED DESCRIPTION
[0040] The following description is presented to enable any person
skilled in the art to make and use the invention, and is provided
in the context of a particular application and its requirements.
Various modifications to the disclosed embodiments will be readily
apparent to those skilled in the art, and the general principles
defined herein may be applied to other embodiments and applications
without departing from the spirit and scope of the present
invention. Thus, the present invention is not intended to be
limited to the embodiments shown, but is to be accorded the widest
scope consistent with the principles and features disclosed
herein.
[0041] Creating a Circuit Device with an Optical Fiber Core
[0042] FIG. 1A illustrates preparing a circuit device with a
sacrificial layer in accordance with an embodiment of the present
invention. The circuit device includes substrate 102, which can
include the material Si. Note that the materials described herein
include only one possible combination. A practitioner with ordinary
skill in the art will be able to readily substitute other suitable
materials for the ones described.
[0043] Buffer layer 104 is epitaxially grown on substrate 102.
Buffer layer 104 can include SiGe or SiGeC. Using SiGeC allows the
growth of thicker layers than does using SiGe. Note that using
different materials for the various layers allows use of different
chemical etchants to selectively etch the various layers.
[0044] Sacrificial layer 106 is epitaxially grown on buffer layer
104. Sacrificial layer 106 can include Si and is used to transfer
the crystalline structure of buffer layer 104 to layers that are
grown on sacrificial layer 106. Sacrificial layer 106 will be
selectively etched away after forming these additional layers.
Epitaxial blocking layer 108 has been added to the circuit device
to control where additional layers will be grown on sacrificial
layer 106. Epitaxial blocking layer 108 can include SiO.sub.2 or
SiN.
[0045] FIG. 1B illustrates forming optical fiber cores on the
sacrificial layer in accordance with an embodiment of the present
invention. Optical fiber cores 110 are epitaxially grown on
sacrificial layer 106 and can include SiGe or SiO.sub.2:GeO.sub.2.
Optical fiber cores 110 can include beams through the circuit
device and can be routed through the circuit device as needed. Note
that the material composition may be controlled during growth of
optical fiber cores 110 to create a graded index optical fiber
core.
[0046] FIG. 1C illustrates removing the sacrificial layer and the
addition of cladding to the optical fiber core in accordance with
an embodiment of the present invention. After growth of optical
fiber cores 110, epitaxial blocking layer 108 is removed and
sacrificial layer 106 is selectively etched using an etchant such
as KOH or TMAH. Cladding layer 112 can then be added to optical
fiber cores 110. A typical material for cladding layer 112 is
SiO.sub.2. Note that applying cladding layer 112 by thermal
oxidation will tend to round optical fiber cores 110, thereby
enhancing the graded index effect. Note also that SiGe and SiGeC
can be selectively etched using hydrofluoric/nitric/acetic (HNA)
acids.
[0047] FIG. 1D illustrates including filler 114 in accordance with
an embodiment of the present invention. Filler 114 can include any
suitable material, gas, or liquid such as the same material,
SiO.sub.2, used for cladding layer 112. Note that filler 114 is
optional and may be wholly or partially omitted.
[0048] Optical Multiplexers and Demultiplexers
[0049] FIG. 2A illustrates an optical multiplexer in accordance
with an embodiment of the present invention. Optical fiber core 202
is branched into optical fiber cores 204, 206, and 208. Note that
optical fiber core 202 may branch into more or less optical fiber
cores than shown. The optical multiplexer can be created by
controlling the apertures in epitaxial blocking layer 108.
[0050] FIG. 2B illustrates an optical demultiplexer in accordance
with an embodiment of the present invention. Optical fiber cores
210, 212, and 214 are combined into optical fiber core 216. Note
that optical fiber core 202 may combine more or less optical fiber
cores than shown. The optical demultiplexer can be created by
controlling the apertures in epitaxial blocking layer 108.
[0051] Forming Optical Fiber Cores
[0052] FIG. 3 is a flowchart illustrating the process of forming
optical fiber cores on a circuit device in accordance with an
embodiment of the present invention. The system starts by receiving
substrate 102 including buffer layer 104 (step 302). Next, the
system forms epitaxial sacrificial layer 106 on buffer layer 104
(step 304). Note that sacrificial layer 106 is used to transfer the
crystalline template from buffer layer 104 to layers grown on
sacrificial layer 106 such as optical fiber cores 110.
[0053] Epitaxial blocking layer 108 is then applied to sacrificial
layer 106 (step 306). Next, photoresist is applied to epitaxial
blocking layer 108 (step 308). After photoresist has been applied
the system exposes and develops the photoresist to create a pattern
on the photoresist (step 310). Next, epitaxial blocking layer 108
is etched to transfer the pattern layer 108 (step 312).
[0054] Optical fiber cores 110 are then epitaxially grown on the
exposed portions of sacrificial layer 106 (step 314). Next,
epitaxial blocking layer 108 is removed (step 316). After epitaxial
blocking layer 108 has been removed, sacrificial layer 106 is
removed by selective etching (step 318).
[0055] Cladding layer 112 is then added to optical fiber cores 110
(step 320). Finally, filler 114 can be added to the cavity if
desired (step 322).
[0056] Creating Active Devices
[0057] FIG. 4A illustrates a longitudinal cross-section view of a
circuit device in accordance with an embodiment of the present
invention. The circuit device includes substrate 402, buffer layer
406, cladding layer 408, filler 410, and optical fiber core 412.
The process described above in conjunction with FIGS. 1 through 3
can create these layers.
[0058] Substrate 402 can include regions 404. Regions 404 can be
doped semiconductor regions such as N-type or P-type Si, or can be
intrinsic Si. As previously noted, the materials described herein
are exemplary and are not to be construed as the only possible
materials for creating the various layers and structures.
Photoresist 414 is applied, exposed, and developed to create
windows for etching the structures.
[0059] FIG. 4B illustrates cavities etched into the circuit device
in accordance with an embodiment of the present invention. Cavities
have been etched into the circuit device using a combination of dry
etching and wet etching, wherein wet etching has been used to
selectively remove buffer layer 406 while not etching into regions
404 in substrate 402. Note that etching may be used to over-etch
into regions 404 if desired. Note also, that etching may be stopped
at buffer layer 406 or within buffer layer 406 if desired.
[0060] FIG. 4C illustrates active devices formed in the cavities in
the circuit device in accordance with an embodiment of the present
invention. Various active layers may be grown within the cavities
to form active regions 418 and 419. Note that circuit layers 420
and 422 are aligned with optical fiber core 412. This allows
coupling optical signals through optical fiber core 412 between
circuit layers 420 and 422 without the need to couple the signals
into an external optical fiber or converting the optical signal to
an electrical signal and back to an optical signal. Photoresist 416
has been added for subsequent exposure and developing to create a
pattern for metallization.
[0061] FIG. 4D illustrates metallization applied to the circuit
device in accordance with an embodiment of the present invention.
Metallization 424 has been added to active regions 418 and 419 to
allow electrical coupling of signals into and out of active regions
418 and 419. Mirror metallization 426 has been added to the circuit
elements of active region 419. Other configurations are equally
likely.
[0062] Forming Active Devices
[0063] FIG. 5 is a flowchart illustrating the process of forming
active devices in the circuit device in accordance with an
embodiment of the present invention. The system starts by receiving
the circuit device including optical fiber core 412 (step 502).
This circuit device with optical fiber core 412 can be constructed
as described above in conjunction with FIGS. 1 through 3.
[0064] Next photoresist 414 is applied to the surface of the
circuit device (step 504). Photoresist 414 is then exposed through
a mask and developed to form a pattern on the circuit device (step
506).
[0065] Next, the various layers are etched to form cavities within
the circuit device (step 508). Note that this etching can include a
combination of dry etching and wet etching. The etching can be
stopped within buffer layer 406, at regions 404, or can be
over-etched into regions 404. Selective chemical etching can be
used to automatically terminate etching at regions 404.
[0066] Active devices are then created within the cavities etched
into the circuit device (step 510). These active devices can
include active devices such as lasers, optical switches, etc., or
passive devices such as lenses, mirrors, etc. Note that circuit
layers 420 and 422 of the active devices are self-aligned with
optical fiber core 412 eliminating the necessity of connecting an
external optical fiber or converting the optical signal to an
electrical signal to couple signals between circuit layers 420 and
422.
[0067] After forming the active devices in active regions 418 and
419, photoresist 416 is applied to the surface (step 512). Next a
pattern is exposed and developed in photoresist 416 (step 514).
Finally, metallization 424 and 426 is applied to the circuit device
(step 516).
[0068] The foregoing descriptions of embodiments of the present
invention have been presented for purposes of illustration and
description only. They are not intended to be exhaustive or to
limit the present invention to the forms disclosed. Accordingly,
many modifications and variations will be apparent to practitioners
skilled in the art. Additionally, the above disclosure is not
intended to limit the present invention. It is appreciated that
other active (e.g. moveable mirrors, etc.) and passive devices
(e.g. lenses, micro-lenses, gratings, etc.) may be fabricated using
the present invention. The scope of the present invention is
defined by the appended claims.
* * * * *