U.S. patent application number 10/950597 was filed with the patent office on 2005-02-24 for a-c:h isfet device, manufacturing method, and testing methods and apparatus thereof.
This patent application is currently assigned to National Yunlin University of Science and Technology. Invention is credited to Chou, Jung-Chuan, Tsai, Hsuan-Ming.
Application Number | 20050040488 10/950597 |
Document ID | / |
Family ID | 28788681 |
Filed Date | 2005-02-24 |
United States Patent
Application |
20050040488 |
Kind Code |
A1 |
Chou, Jung-Chuan ; et
al. |
February 24, 2005 |
a-C:H ISFET device, manufacturing method, and testing methods and
apparatus thereof
Abstract
An a-C:H ISFET device and manufacturing method thereof. The
present invention prepares a-C:H as the detection membrane of an
ISFET by plasma enhanced low pressure chemical vapor deposition
(PE-LPCVD) to obtain an a-C:H ISFET. The present invention also
measures the current-voltage curve for different pH and
temperatures by a current measuring system. The temperature
parameter of the a-C:H ISFET is calculated according to the
relationship between the current-voltage curve and temperature. In
addition, the drift rates of the a-C:H ISFET for different pH and
hysteresis width of the a-C:H ISFET for different pH loops are
calculated by a constant voltage/current circuit and a voltage-time
recorder to measure the gate voltage of the a-C:H ISFET.
Inventors: |
Chou, Jung-Chuan; (Yunlin
Hsien, TW) ; Tsai, Hsuan-Ming; (Tainan, TW) |
Correspondence
Address: |
BIRCH STEWART KOLASCH & BIRCH
PO BOX 747
FALLS CHURCH
VA
22040-0747
US
|
Assignee: |
National Yunlin University of
Science and Technology
|
Family ID: |
28788681 |
Appl. No.: |
10/950597 |
Filed: |
September 28, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10950597 |
Sep 28, 2004 |
|
|
|
10419735 |
Apr 22, 2003 |
|
|
|
Current U.S.
Class: |
257/428 ;
257/429; 257/E21.051; 438/57 |
Current CPC
Class: |
H01L 2924/0002 20130101;
H01L 2924/00 20130101; H01L 2924/0002 20130101; G01N 27/414
20130101; H01L 29/66045 20130101 |
Class at
Publication: |
257/428 ;
257/429; 438/057 |
International
Class: |
H01L 027/14; H01L
021/00; H01L 031/00 |
Foreign Application Data
Date |
Code |
Application Number |
May 20, 2002 |
TW |
91110544 |
Claims
What is claimed is:
1. An a-C:H gate ISFET device, comprising: a semiconductor
substrate; a gate oxide layer on the semiconductor substrate; an
a-C:H layer overlying the gate oxide layer to form an a-C:H gate; a
source/drain in the semiconductor substrate beside the a-C:H gate;
a metal wire on the source/drain; and a sealing layer overlying the
metal wire and exposing the a-C:H layer.
2. The a-C:H gate ISFET device as claimed in claim 1, wherein the
length of the channel, the width of the channel and ratio of
width/length of the channel of the ISFET are 50 .mu.m, 1000 .mu.m
and 20, respectively.
3. The a-C:H gate ISFET device as claimed in claim 1, wherein the
semiconductor substrate is p-type.
4. The a-C:H gate ISFET device as claimed in claim 1, wherein the
resistivity of the semiconductor substrate ranges from 8 to
12.OMEGA.-cm.
5. The a-C:H gate ISFET device as claimed in claim 1, wherein the
lattice parameter of the semiconductor is (1,0,0).
6. The a-C:H gate ISFET device as claimed in claim 1, wherein the
thickness of the gate oxide layer is 1000 .ANG..
7. The a-C:H gate ISFET device as claimed in claim 1, wherein the
metal wire is Al.
8. The a-C:H gate ISFET device as claimed in claim 1, wherein the
sealing layer is epoxide resin.
9. The a-C:H gate ISFET device as claimed in claim 1, wherein the
source/drain is N-type.
Description
[0001] This application is a Divisional of co-pending application
Ser. No. 10/419,735, filed on Apr. 22, 2003, and for which priority
is claimed under 35 U.S.C. .sctn. 120; and this application claims
priority of Application No. 091110544 filed in Taiwan, R.O.C. on
May 20, 2002 under 35 U.S.C. .sctn. 119; the entire contents of all
are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to an ISFET, and in particular
to a hydrogenated amorphous carbon (a-C:H) ISFET device,
manufacturing method, and method and apparatus to measure
hysteresis width and drift rate therewith.
[0004] 2. Description of the Related Art
[0005] ISFETs (Ion Sensitive Field Effect Transistor) are
constructed by substituting a detecting film for the metal gate on
the gate oxide of a conventional MOSFET (Metal-Oxide-Semiconductor
Field Effect Transistor). When the ISFET is dipped into a solution,
the interfacial potential between the detecting film and the
solution influences the semiconductor surface since only an
extremely thin dielectric (that is, the gate oxide) separates the
detecting film from the semiconductor surface. This influences the
charge density in the inversion layer of the semiconductor surface,
and thereby modulates the channel current through the ISFET. Thus,
by utilizing this characteristic, the pH or other ion concentration
in a solution can be obtained from the measurement of source/drain
current and the gate voltage of the ISFET. The potential difference
on the interface between the detecting film and the solution is
related to the ion activity in a solution. The hydrogen ion
activity in the solution can be measured using different channel
currents caused by different interfacial potential differences in
various solutions with different hydrogen ion activity.
[0006] Patents related to the formation of the ISFET or measurement
thereof are listed hereinafter.
[0007] U.S. Pat. No. 5,350,701 discloses a method of measuring the
content of alkaline-group metals, especially the content of calcium
ions, utilizing chemosynthesis phosphide group as the detecting
film on a gate of an ISFET.
[0008] U.S. Pat. No. 5,387,328 discloses a bio-sensor using ion
sensitive field effect transistor with platinum, wherein an enzyme
membrane is immobilized on the ion-detecting film to determine the
concentration of glucose.
[0009] U.S. Pat. No. 5,414,284 discloses a method of fabricating an
ISFET and an ESD protective circuit on the same silicon substrate,
wherein a capacitor is utilized as an interface between the
protective circuit and a sample solution to the DC leakage
current.
[0010] U.S. Pat. No. 5,309,085 integrates the measurement circuit
of a creature sensor having ISFET on a wafer. The measured circuit
has two ISFET devices, an enzyme ISFET and a reference electrode
FET, whose output signal can be amplified by a differential
amplifier.
[0011] U.S. Pat. No. 5,061,976 discloses a carbon thin film on the
gate oxide of the ISFET and then a 2,6 xylenol electrolytic
polymerization film formed thereon. The ISFET has the ability to
detect hydrogen ions and the advantages of small floating time,
high reliability, and insensitivity to light. When other film types
are covered on the ISFET, other kinds of ions can be detected.
[0012] U.S. Pat. No. 5,833,824 discloses an ISFET sensor for
detecting ion activity in a solution, which includes a substrate
and an ISFET semiconductor die. The substrate has a front surface
exposed to the solution, a back surface opposite to the front
surface and an aperture extending therebetween. A detecting film of
the ISFET is mounted on the back surface such that the gate region
is exposed to the solution through the aperture.
[0013] U.S. Pat. No. 4,691,167 discloses a method of measuring ion
activation in a solution by combining the ISFET, the reference
electrode, the temperature sensor, amplifier circuit and a
calculation and memory circuit. Since the sensitivity is a function
of the temperature and drain current of ISFET and is decided by a
variable of gate voltage, the sensitivity can be obtained by
calculating formulas stored in memory.
[0014] U.S. Pat. No. 5,130,265 discloses a method of fabricating
the ISFET with multiple functions. The method uses siloxanic
prepolymer as the sensitive film, mixing the solution,
photochemistry treatment and heat treatment.
[0015] U.S. Pat. No. 4,660,063 discloses a method of performing
both laser drilling and solid diffusion to form a 3D diode array on
the semiconductor wafer. The laser first drills the wafer, and the
impurities are then diffused from the hole to form a cylindrical PN
junction and complete a non-planar ISFET structure.
[0016] U.S. Pat. No. 4,812,220 discloses an ISFET made by fixing
the enzyme on the detecting film to measure the concentration of
amino acids in food. The enzyme sensor is miniaturized, and can
accurately measure even small concentrations.
[0017] There are many materials acting as detection membranes of
ISFETs, such as, Al.sub.2O.sub.3, Si.sub.3N.sub.4, Ta.sub.2O.sub.5,
a-WO.sub.3, a-Si:H and the like. These thin films are deposited by
either sputtering or plasma enhanced chemical vapor deposition
(PECVD), therefore, the cost of the thin film fabrication is
higher. For commercial purposes, it is important to develop a thin
film, with low cost and easy fabrication.
[0018] In the ISFET applications, however, many factors such as
hysteresis, temperature, and drift behavior affect the accuracy of
the measuring results. Since pH-ISFET is a semiconductor device, it
is easily influenced by variations in temperature. The variation of
the temperature leads to a deviation of the measurement. With
reference to the hysteresis behavior, it is related to the change
in the pH of the solution (such as
pH.sub.x.fwdarw.pH.sub.y.fwdarw.pH.sub.X.fwdarw.pH.sub.z.fwdarw.pH.sub.x)
and the corresponding change in the output voltage of the ISFET
(such as
V.sub.ox1.fwdarw.V.sub.oy.fwdarw.V.sub.ox2.fwdarw.V.sub.oz.fwdarw.V.sub.o-
x3). At the same pH, the difference between the first output
voltage and the final output voltage (such as V.sub.ox3-V.sub.ox1)
is defined as the hysteresis width. For drift behavior, the drift
rate is defined as the change in the gate voltage per unit time
under conditions in which the source-drain current is stable and
the temperature is constant after the intrinsic response of the
pH-ISFET is completed. Hence, there is a need to measure the three
effects to prevent error.
SUMMARY OF THE INVENTION
[0019] In view of this, an object of the present invention is to
provide an a-C:H gate ISFET. The present invention forms the a-C:H
layer as the detection membrane of the ISFET by plasma enhanced low
pressure chemical vapor deposition (PE-LPCVD).
[0020] Another object of the present invention is to provide a
method of measuring temperature parameters of an ISFET. In the
present invention, the sensitivities of the ISFET at different
temperatures are obtained by the source-drain current and gate
voltage of the ISFET in a solution, such that temperature
parameters (temperature coefficient of the sensitivity) of the
ISFET are obtained.
[0021] In the method of measuring the temperature parameters of an
ISFET according to the present invention, the detecting film is
immersed in a buffer solution, and, then, at a predetermined
temperature, the pH of the buffer solution is changed to measure
and record the source-drain current and the gate voltage of the
ISFET to obtain a curve. The temperature parameters at the
predetermined temperature are obtained by selecting a fixed current
from the curve. The temperature parameters at other temperatures
are obtained by changing the temperature of the buffer solution and
the steps of measuring, recording and selecting.
[0022] Another object of the present invention is to provide a
method of measuring the hysteresis width and drift rate of the
a-C:H ISFET to use the reverse compensation method to obtain an
accurate output value.
[0023] In the method of measuring the hysteresis width of an a-C:H
ISFET according to the present invention, first, the drain-source
current and then the drain-source voltage are fixed by a constant
voltage/current circuit, and the a-C:H ISFET is immersed in a
buffer solution. The gate-source output voltage of the a-C:H ISFET
is recorded by a voltage-time recorder, and the pH of the buffer
solution is changed. The steps of immersing and recording are then
repeated to obtain the gate-source output voltages of the ISFET
immersed in the buffer solution with different pH. The hysteresis
width is the voltage deviation between starting pH and ending
pH.
[0024] In the method of measuring the drift rate of an a-C:H ISFET
according to the present invention, first, the drain-source current
and then the drain-source voltage are fixed by a constant
voltage/current circuit, and the a-C:H ISFET is immersed in a
buffer solution. The gate/source output voltage of the a-C:H ISFET
during a constant period is recorded by a voltage recorder. The pH
of the buffer solution is changed and the steps of immersing and
recording are repeated to obtain the gate-source output voltages of
the ISFET immersed in the buffer solution with different pH. The
drift rate is the slope of the gate-source output voltage with
respect to time.
[0025] Another object of the present invention is to provide an
apparatus to measure the hysteresis width and the drift rate. The
apparatus of measuring the hysteresis width and the drift rate has
an a-C:H ISFET, a buffer solution to contact the ISFET, a
light-isolation container to load the buffer and to isolate light,
a heater to heat the buffer solution, a constant current/voltage
measuring device coupled to the source and drain of the a-C:H
ISFET, and a voltage-time recorder to record the output voltage of
ISFET.
[0026] Further scope of the applicability of the present invention
will become apparent from the detailed description given
hereinafter. However, it should be understood that the detailed
description and specific examples, while indicating preferred
embodiments of the invention, are given by way of illustration
only, since various changes and modifications within the spirit and
scope of the invention will become apparent to those skilled in the
art from this detailed description.
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The present invention can be more fully understood by
reading the subsequent detailed description and examples with
references made to the accompanying drawings, which are given by
way of illustration only, and thus are not limitative of the
present invention, and wherein:
[0028] FIGS. 1a to 1c are cross-sections of the processes of the
present invention;
[0029] FIG. 2 is a cross-section of an ISFET with gate consisting
of a-C:H;
[0030] FIG. 3 is a schematic structural diagram of the apparatus to
measure the temperature parameter of the a-C:H ISFET according to
the present invention;
[0031] FIG. 4 is a schematic cross-section of the a-C:H ISFET
according to the present invention;
[0032] FIG. 5 shows a curve related to the source/drain current and
the gate voltage of the a-C:H ISFET at 25.degree. C. according to
the present invention;
[0033] FIG. 6 shows a curve related to the gate voltage of the
a-C:H ISFET and the pH;
[0034] FIG. 7 shows a curve related to the sensitivities of the
a-C:H ISFET and the temperature according to the present
invention;
[0035] FIG. 8 shows a schematic structure diagram of the apparatus
to measure the hysteresis width and drift rate of the a-C:H ISFET
according to the present invention;
[0036] FIG. 9 shows a schematic diagram of the constant voltage
current circuit according to the present invention;
[0037] FIG. 10 shows the relationship between the hysteresis width
and time in pH=6.fwdarw.2.fwdarw.6.fwdarw.10.fwdarw.6 order;
and
[0038] FIG. 11 shows the relationship between the drift rate of the
a-C:H ISFET and the pH.
DETAILED DESCRIPTION OF THE INVENTION
[0039] The a-C:H gate ion sensitive field effect transistor (a-C:H
gate ISFET) according to the present invention is illustrated in
FIGS. 1a to 1c.
[0040] As shown in FIG. 1a, a P-type (100) semiconductor substrate
100 with a resistivity ranging from 8 to 12 .OMEGA.-m is provided.
A pad oxide layer 102 consisting of silicon dioxide with a
thickness of 5000 .ANG. is formed on the substrate 100 by wet
oxidation. A first photoresist pattern (not shown) is formed on the
pad oxide layer 102 by conventional photolithography. A dummy gate
103 is formed to define the subsequent gate area, using the
photoresist pattern as a mask to a portion of the pad oxide layer
102.
[0041] Impurities are then implanted into the semiconductor
substrate 100 to form a source/drain 104 beside the dummy gate 103,
using the dummy gate 103 as a mask. For example, the impurities
implanted herein are boron ions with a dose of 10.sup.15
cm.sup.-2.
[0042] As shown in FIG. 1b, the dummy gate 103 is removed, namely,
the pad oxide layer 102 and the first photoresist pattern are
removed by wet etching. An insulating layer 106 consisting of
silicon dioxide with a thickness of about 1000 .ANG. is then formed
on the semiconductor substrate 100. A second photoresist pattern
(not shown) is formed on the insulating layer 106 by
photolithography. Next, the insulating layer 106 outside the gate
area is removed by the second photoresist pattern as a mask. The
residual insulating layer within the gate area is used as a gate
oxide layer. Subsequently, the second photoresist layer is
removed.
[0043] A a-C:H layer 108 is then formed on the insulating layer 106
by plasma enhanced low pressure chemical vapor deposition
(PE-LPCVD). The step of forming the a-C:H layer 108 on the gate
oxide layer 106 by plasma enhanced low pressure chemical vapor
deposition (PE-LPCVD) is illustrated as follows. First, the
semiconductor substrate 100 with the gate oxide layer 106 is
disposed into a PE-LPCVD system. During this process, the base
pressure of the PE-LPCVD system is adjusted at least 10-6 torr.
Next, the temperature of the semiconductor substrate 100 is
maintained between 140.degree. C.-160.degree. C. (preferably
150.degree. C.). A mixing gas consisting of methane and hydrogen is
then fed into PE-LPCVD system, wherein, in the mixing solution, the
ratio of methane and hydrogen is about 30 to 70. Further, the flow
ratio of the mixing gas is controlled between 6 to 10 standard
cubic centimeter per minute (SCCM), preferably 8 SCCM. The process
pressure of the PE-LPCVD is maintained between 0.08 to 0.1 torr,
preferably 0.09 torr. Finally, the RF power supply is then turned
on, and the RF power thereof is set between 145 W to 160 W,
preferably 150 W, for a time interval. After that, the a-C:H gate
layer 108 is obtained on the oxide layer 106 for the a-C:H
ISFET.
[0044] For example, the a-C:H layer 108 with a thickness of least
1000 .ANG. is formed on the insulating layer 106. A two-layer gate
consisting of the gate oxide layer 106 and the a-C:H layer 108 is
fabricated. Thus, an a-C:H ISFET is obtained. The a-C:H ISFET has a
channel length of about 50 .mu.m and a channel width of about 1000
.mu.m. Thus, the aspect ratio (channel width/channel length) of the
present a-.C:H ISFET is 20.
[0045] Next, as shown in FIG. 1c, an interconnecting process is
performed to obtain the ion sensitive field effect transistor
(ISFET) using conventional interconnect steps for MOS. Thus, an
insulating layer 100 is formed on the source/drain 104, and a metal
wire 112 is formed on the insulating 110 by etching and sputtering.
Finally, a sealing layer 114 consisting of the insulator is formed
to seal the metal wire excluding the a-C:H layer 108. For example,
the metal wire 112 can be aluminum, and the sealing layer 114 can
be epoxy resin.
[0046] The use of plasma enhanced low pressure chemical vapor
deposition to form the a-C:H detection membrane provides a simple
process and easily formed a-C:H detection membrane on a large area
surface of the substrate.
[0047] FIG. 2 is a cross-section of the a-C:H ISFET according to
the present invention. The structure of this ISFET is similar to
that of MOSFET. The difference between the ISFET and MOSFET is that
the metal gate of the MOSFET is replaced by an a-C:H detection
membrane 35, an aqueous solution 36 and reference electrode 38. The
circuits are formed by contacting the metal wire 31, preferably
consisting of Al, with the source/drain 33. Since the a-C:H
detection membrane 35 contacts the detected solution 36, the whole
device in addition to the a-C:H detection membrane 35 must be
enclosed by a sealing layer 37 consisting of a material with good
insulating property, such as epoxide resin. The reference electrode
38 provides a detecting base.
[0048] The a-C:H detection membrane 35 of the ISFET is immersed in
the solution 36 during operation, such that the point of
transformation from chemical equivalence into electrical
equivalence within the ISFET occurs with contact between the a-C:H
detection membrane 35 and the aqueous solution 36. The reaction
mechanism of the ionic activity within the solution is the
interface potential obtained from the interface between the aqueous
solution 36 and the a-C:H detection membrane 35 immersed in the
aqueous solution 36. The interface potential varies with the ionic
activities of various aqueous solutions. In addition, the interface
potential regulates the channel conduction of the ISFET and results
in the change of current within the source/drain 33.
[0049] FIG. 3 shows a systematic structure diagram according to the
present invention. An ISFET using a-C:H as a detection membrane
(called a-C:H ISFET) is immersed in a buffer solution 2 such as the
phosphate buffer solution that is stored in a container (not
titled). The source/drain (not shown) of the a-C:H ISFET 1 connects
a test fixer 3 through two connecting wires 331 and 321,
respectively, to convey the electrical signals obtained by
measuring the source/drain to a current/voltage measuring device 4,
such as the Keithley-236 current/voltage measuring device for data
processing.
[0050] Also, a reference electrode 5 is disposed in the buffer
solution 2, with one end connected to the test fixer 3 through the
connecting wire 331. A plurality of heaters 6 is disposed outside
the container and connected to a PID temperature controller 7. A
thermometer 8 connected to the PID temperature controller 7 detects
the temperature of the buffer solution 2. The above-mentioned
elements such as the buffer solution 2, the elements contacting the
buffer solution 2 and the heater 6 are placed in a light-isolating
container 9 to protect the measured data from the effect of light.
It should be noted that the interfacial potential between the a-C:H
membrane and the solution and the characteristic difference of
charge density in the reverse layer of the semiconductor surface
are used to measure needed data (such as the source-drain current
or the gate voltage) and thus obtain the temperature parameters of
the ISFET.
[0051] FIG. 4 is a schematic cross-section of the a-C:H ISFET
according to the present invention. The a-C:H ISFET is formed on a
semiconductor substrate 20 such as a p-type silicon substrate. A
pair of source/drain regions 21 separated from each other is formed
approaching the top surface of the semiconductor substrate 20 and
each region 21 is connected to the test fixer 3 outside through an
aluminum contact plug 22 and an aluminum wire 23. On the
semiconductor substrate 20 between the two drain/source regions 21,
a gate oxide 24, such as a silicon oxide layer, and an a-C:H
detection membrane 25 are formed sequentially. An epoxy resin 26
seals the device but exposes the a-C:H detection membrane 25. As
well, a metal-aluminum layer 27 is formed at the bottom of the
semiconductor substrate 20 to shield light and decrease its
influence on charge carriers.
[0052] With reference to apparatus shown in FIG. 3 and FIG. 4, the
temperature parameters of the a-C:H ISFET of the present invention
can be obtained according to a method as follows. First, with
regard to the measurement of the sensitivity, the detection
membrane of the a-C:H ISFET contacts with the buffer solution. The
temperature of the buffer solution is fixed, such as at 25.degree.
C., and the pH of the buffer solution is changed at the same time.
The curve related to the source-drain current and the gate voltage
of the a-C:H ISFET is measured and recorded by the Keithley-236
current/voltage measuring device. FIG. 5 shows curves related to
the statistical results, and both the source-drain current and the
gate voltage of the a-C:H ISFET rise as the pH of the buffer
resolution increases.
[0053] Next, a fixed current of the curve (like 80 .mu.A) is
selected to obtain a curve related to the gate voltage and the pH
at a specific temperature (like 25.degree. C.) as shown in FIG. 6,
wherein the sensitivity of the a-C:H ISFET at 25.degree. C. is
57.36 mV/pH. It is found that the gate voltage of the a-C:H ISFET
is in direct proportion to the pH of the buffer solution and the
slope of the curve is the sensitivity of the a-C:H ISFET at the
specific temperature.
[0054] Moreover, in order to measure the sensitivity of the a-C:H
ISFET at different temperatures, only the temperature of the buffer
solution needs to be changed, such as between 5.degree.
C.-55.degree. C., with the above step repeated at each temperature.
Table 1 shows the sensitivity of the ISFET at the different
temperatures.
1 TABLE 1 Sensitivity Temperature (.degree. C.) (mV/pH) 5 53.68 15
55.43 25 56.92 35 59.23 45 61.5 55 62.8
[0055] A curve showing the obtained sensitivities at different
temperatures is shown in FIG. 7, wherein the sensitivity is in
direct proportion to the rising temperature and the slope of the
curve is about 0.2032 mV/pH.degree. C. Namely, the temperature
parameter of the a-C:H ISFET is about 0.2032 mV/pH.degree. C.
[0056] FIG. 8 shows a schematic diagram to measure the hysteresis
width and the drift rate of an ISFET with a-C:H as a detection
membrane according to the present invention. An ISFET 81 with a-C:H
as a detection membrane (called a-C:H ISFET) is immersed in a
buffer solution 82 such as a standard buffer solution in a
container (not labeled). A drain/source (not shown) of the a-C:H
ISFET 81 is connected to a constant voltage/current circuit 83
(such as a negative feedback circuit) through two wires 811 and
812. The drain-source voltage and the drain-source current of the
a-C:H ISFET 81 are fixed by the constant voltage/current circuit
83.
[0057] A reference electrode 84 is disposed in the buffer solution
82, wherein one end of the reference electrode 84 is connected to
the constant voltage/current circuit 83 through a wire 841. A
heater 85 disposed outside the container is connected to a PID
(Proportional-Integral-Derivative) temperature controller 86. Both
the heater 85 and the PID temperature controller 86 keep the buffer
solution 82 at a constant temperature (preferably 25.degree. C.)
detected by a thermocouple 87 connected to the PID temperature
controller 86. The above buffer solution 82, every device connected
thereto, and the heater 86 are disposed in a light-isolating
container 88 to reduce the effect of light on the measuring
results.
[0058] The constant voltage/current circuit 83 is connected to a
current/voltage measuring device 89 composed of two digital
multimeters detecting whether the source-drain current and the
source-drain voltage of the a-C:H ISFET 81 move towards stability.
Also, the constant voltage/current circuit 83 is connected to a
voltage-time recorder 810 for setting and recording the output
voltages during each recording period.
[0059] FIG. 9 shows a schematic diagram of the constant
voltage/current circuit 83 according to the present invention. The
constant voltage/current circuit 83 is connected to the
source/drain of the a-C:H ISFET 81 through the wires 811 and 812,
and is connected to the reference electrode 84 through the wire
841. The source-drain voltage is fixed at a constant value
(preferably 0.2V) by adjusting the variable resistance R1. The
source-drain current is fixed at a constant value (preferably 80
.mu.A). In this case of the negative feedback circuit, the output
voltage and the gate voltage are reduced and finally the
drain-source current IDS is reduced when the increasing
drain-source current IDS increases the source voltage. The circuit
83 has advantages of simplicity, low cost, ease of operation and no
need for adjustment of the measuring point.
[0060] Next, returning to FIG. 4, a schematic cross-section of the
a-C:H ISFET according to the present invention, the a-C:H ISFET is
formed on a semiconductor substrate 20 such as a p-type silicon
substrate. In this case, a pair of source/drain regions 21
separated from each other are formed approaching the top surface of
the semiconductor substrate 20, and are connected to constant
voltage/current circuit by an aluminum contact plug 22 and an
aluminum wire 23. On the semiconductor substrate 20 between the two
drain/source regions 21, a gate oxide 24, such as a silicon oxide
layer, and an a-C:H detection membrane 25 are formed sequentially.
An epoxy resin 26 seals the device but exposes the a-C:H detection
membrane 25. As well, a metal-aluminum layer 27 is formed at the
bottom of the semiconductor substrate 20 to decrease the
channel-adjusting effect.
[0061] Hereinafter, a method to measure the hysteresis width and
the drift rate of the a-C:H ISFET in detail is described with
reference to FIGS. 2, 8 and 9.
[0062] With reference to the method of measuring the hysteresis
width of the a-C:H ISFET, first, the drain-source current and the
drain-source voltage of the a-C:H ISFET 81 are fixed by the
constant voltage/current circuit (negative feedback circuit) 83. In
this step, the a-C:H ISFET 81 and the reference electrode 84 are
connected to the constant voltage/current circuit 83, and are
immersed in the solution. Next, the drain voltage V.sub.D of the
a-C:H ISFET 81 is set at 0.2V by adjusting the variable resistant
R1 and measurement by one digital multimeter. Also, the
drain-source current IDS is set at 80 .mu.A by adjusting the
variable resistant R2 and measurement by the other digital
multimeter. The a-C:H ISFET 81 is then placed in a standard
solution to maintain stability.
[0063] After, the a-C:H ISFET 81 is immersed in a buffer solution.
Next, the voltage-time recorder records the gate-source output
voltages of a-C:H ISFET 81. The hysteresis width of the a-C:H ISFET
81 in accordance with the pH of the buffer solution is then
measured. In the present invention, hysteresis width is measured in
pH=6.fwdarw.2.fwdarw.6.fwdarw.- 10.fwdarw.6 order, namely
pH=6-5-4-3-2-3-4-5-6-7-8-9-10-9-8-7-6, wherein each measuring
result is achieved at the time the pH is changed for one minute,
the loop time is 1020 seconds, and each time the pH changes by one
unit. Particularly, choosing the pH=6-2-6-10-6 order measures
hysteresis within the pH range between 1 and 9. Also, the
hystereses within the pH range between 1 and 9 are measured in the
same way, wherein each result is at the time when the pH is changed
for two minutes and four minutes, the loop time is 2040 seconds and
4080 seconds. Table 2 shows the hysteresis width of the a-C:H ISFET
in pH=6.fwdarw.2.fwdarw.6.f- wdarw.10.fwdarw.6 order at different
loop time. By the same method, all of the hysteresis widths at
different pH values can be measured, which is helpful in performing
the reverse compensation method.
2 TABLE 2 Loop time(seconds) Hysteresis width(mV) 1020 2.38 2040
3.86 4080 4.5 8160 5.4 16320 7.22
[0064] The relationship between the hysteresis width, the pH and
time measured in pH=6.fwdarw.2.fwdarw.6.fwdarw.10.fwdarw.6 order
are shown in FIG. 10. As shown in FIG. 10, the hysteresis width of
the a-C:H ISFET increases as the loop time increases.
[0065] Next, with reference to the drift rate, the drain-source
current and the drain-source voltage of the a-C:H ISFET are fixed
by the constant voltage/current circuit (negative feedback circuit)
83. The a-C:H ISFET 81 and the reference electrode 84 are then
connected to the constant voltage/current circuit 83, and immersed
in the solution. Next, the drain-source current IDS of the ISFET 81
is set by adjusting the variable resistor R2 and measurement by one
digital multimeter. Also, the drain-source voltage VDS is set at
0.2V by adjusting the variable resistor R1 and measurement with the
other digital multimeter. Afterwards, the a-C:H ISFET is immersed
in the buffer solution for a period of time. Finally, the
gate-source output voltage is recorded by the voltage-time
recorder, thereby obtaining the drift rate of the ISFET.
[0066] It should be noted that current generated by illumination
affects the drift rate. Hence, the drain-source current should be
adjusted between 10 .mu.A and more than one hundred .mu.A to reduce
the illumination effect. As well, stability is easily affected by
temperature when the drain-source current IDS is extremely large.
Accordingly, the drain-source current is preferably set at 10-300
.mu.A.
[0067] Table 3 shows the drift rates of the a-C:H ISFET at pH 1-10,
and FIG. 11 shows the relationship between the drift rate and the
pH. The drift rate of the a-C:H ISFET is obtained from the slope of
a curve whose time parameter is more than the fifth hour.
3 TABLE 3 pH Drift rate (mV/h) 1 0.44 2 0.5 3 0.55 4 0.68 5 1.06 6
1.3 7 1.56 8 1.8 9 2.12 10 2.38
[0068] It is believed that the drift behavior is more obvious when
the pH is large. Also, when the data approximately forms a line,
the drift rates at any other pH can be estimated. This is useful
when performing reverse compensation.
[0069] The method of forming the a-C:H ISFET according to the
present invention is simple, has a low cost and novel technology.
The measuring methods and apparatus can accurately measure
hysteresis width and drift rate of the a-C:H ISFET, and also
hysteresis width and the drift rate of the ISFETs with other types
of detection membranes.
[0070] While the invention has been described by way of example and
in terms of the preferred embodiments, it is to be understood that
the invention is not limited to the disclosed embodiments. To the
contrary, it is intended to cover various modifications and similar
arrangements (as would be apparent to those skilled in the art).
Therefore, the scope of the appended claims should be accorded the
broadest interpretation to encompass all such modifications and
similar arrangements.
* * * * *