U.S. patent application number 10/463158 was filed with the patent office on 2004-10-28 for integrated inductor in semiconductor manufacturing.
Invention is credited to Cole, Richard, Ott, George, Thun, Matthew Von.
Application Number | 20040212038 10/463158 |
Document ID | / |
Family ID | 21760621 |
Filed Date | 2004-10-28 |
United States Patent
Application |
20040212038 |
Kind Code |
A1 |
Ott, George ; et
al. |
October 28, 2004 |
Integrated inductor in semiconductor manufacturing
Abstract
An integrated inductor is formed on an integrated circuit or
other substrate. The inductor is formed of a stack of almost
totally enclosed rings of conductive material in which each ring
has a single gap. Vias connect adjacent rings on opposite sides of
their gaps so as to form a coil shaped structure. The inductor has
applications in filtering, in an oscillator, in an antenna,
combined with an active detection circuit, combined with an
electron source, in a microelectromechanical systems or MEMS, or
the like. The inductor may be formed in a vertical orientation or
in a horizontal orientation. Chemical mechanical polishing may be
used for planarizing layers.
Inventors: |
Ott, George; (Colorado
Springs, CO) ; Cole, Richard; (Woodland Park, CO)
; Thun, Matthew Von; (Colorado Springs, CO) |
Correspondence
Address: |
LSI LOGIC CORPORATION
1621 BARBER LANE
MS: D-106 LEGAL
MILPITAS
CA
95035
US
|
Family ID: |
21760621 |
Appl. No.: |
10/463158 |
Filed: |
June 16, 2003 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10463158 |
Jun 16, 2003 |
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10013572 |
Dec 11, 2001 |
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6614093 |
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Current U.S.
Class: |
257/531 ;
257/E21.022; 257/E27.046 |
Current CPC
Class: |
H01F 17/0033 20130101;
H01L 2924/0002 20130101; H01L 28/10 20130101; H01L 23/645 20130101;
H01L 27/08 20130101; H01L 2924/00 20130101; H01L 23/5227 20130101;
H01L 2924/0002 20130101; H01F 41/043 20130101 |
Class at
Publication: |
257/531 |
International
Class: |
H01L 029/00 |
Claims
What is claimed is:
1. An inductor formed on a substrate, comprising: a plurality of
rings of conductive material, wherein each of the rings has a
single gap along its perimeter.
2. The inductor of claim 1, wherein the rings are connected to
adjacent rings by vias which extend from the proximity of the gaps
of the rings.
3. The inductor of claim 1, wherein the rings are generally
circular.
4. The inductor of claim 1, wherein the rings are generally
oval.
5. The inductor of claim 1, wherein the rings are generally square
shaped.
6. The inductor of claim 1, wherein the rings are generally
rectangular.
7. The inductor of claim 1, wherein the rings are polygonal.
8. The inductor of claim 1, wherein the longitudinal axis of the
inductor is oriented vertically with respect to the major plane of
extension of the substrate.
9. The inductor of claim 1, wherein the longitudinal axis of the
inductor is oriented horizontally with respect to the major plane
of extension of the substrate.
10. The inductor of claim 1, wherein the rings of conductive
material are formed from at least one of the group consisting of
nickel, molybdenum, indium tin oxide, tantalum, tungsten, gold,
copper, doped polysilicon, silicide, or silver.
11. The inductor of claim 1, wherein the rings of conductive
material are separated from one another by dielectric material.
12. The inductor of claim 1 1, wherein the dielectric material is a
nitride or an oxide.
13. The inductor of claim 11, wherein the dielectric material is
organic TEOS.
14. The inductor of claim 1, wherein a core of conductive material
is formed at the center of the inductor and extends along its
longitudinal axis.
15. The inductor of claim 14, wherein the core of conductive
material is formed of copper, gold, or a ferromagnetic
material.
16. The inductor of claim 15, wherein the core of conductive
material is encapsulated using a damascene process.
17. A method for making an inductor on a substrate, comprising:
depositing a first layer of conductive material on a surface, the
first layer of conductive material having a pattern; depositing a
first layer of dielectric material over the first layer of
conductive material having a pattern; forming a first through hole
in the first layer of dielectric material; filling the first
through hole with a plug of conductive material; and depositing a
second layer of metal on the first layer of dielectric material,
the second layer of conductive material having a pattern similar to
the pattern of the first layer of conductive material.
18. The method of claim 17, wherein the first layer of conductive
material and the second layer of conductive material have patterns
which form shapes of conductive material almost enclosing an inner
area that has no conductive material, the first and second layers
of conductive material each having gaps.
19. The method of claim 18, wherein the gaps of the first layer of
conductive material and the second layer of conductive material are
rotationally offset from one another.
20. The method of claim 19, wherein the conductive material filling
the first through hole connects one side of the gap of the first
layer of conductive material with the opposite side of the gap of
the second layer of conductive material.
21. The method of claim 17, wherein the method of making is a
chemical vapor deposition (CVD) method.
22. The method of claim 17, wherein the method is a molecular beam
epitaxy (MBE) method.
23. The method of claim 17, wherein the method is an atomic layer
deposition (ALD) method.
24. The method of claim 17, wherein the method is chemical
mechanical polishing (CMP).
25. The method of claim 17, wherein filling the through hole is
accomplished by electroplating, sputtering, or evaporation.
26. The method of claim 17, further comprising forming a core of
conductive material within the area enclosed by the first layer of
conductive material and the second layer of conductive
material.
27. An electronic circuit on a substrate, comprising: an inductor
formed as part of the substrate, wherein the inductor is formed of
a plurality of almost entirely enclosed toroids of conductive
material with a non-conductive interior, each toroid having a major
plane of extension, wherein each toroid is conductively
interconnected with an adjacent toroid by a conductor which extends
generally in a plane perpendicular to the major plane of extension
of the toroid.
28. The electronic circuit of claim 27, wherein the electronic
circuit is a filter.
29. The electronic circuit of claim 27, wherein the electronic
circuit is an oscillator.
30. The electronic circuit of claim 27, wherein the electronic
circuit further includes a resistive element.
31. The electronic circuit of claim 27, wherein the electronic
circuit further includes a capacitive element.
32. The electronic circuit of claim 27, wherein the electronic
circuit is a microelectromechanical system.
33. A method for forming an inductor whose longitudinal axis is
parallel to the major plane of extension of a substrate upon or in
which it is formed, comprising: depositing a first conductive layer
and forming first parallel strips of conductive material of a first
length; successively depositing a least one layer of a dielectric
material; forming through holes through the at least one layer of
dielectric material at the ends of the first length for each of the
parallel strips; filling the through hole with a plug of conductive
material; forming intermediate conductive strips of a second length
at the ends of the first length for each of the parallel strips;
and depositing a final conductive layer and forming final parallel
strips of conductive material of the first length, wherein the
resulting structure is coil shaped.
34. The method of claim 33, further comprising forming gaps in
portion of the first and final parallel strips or selectively
removing or omitting intermediate conductive strips to form gaps in
resulting rings or toroids.
35. The method of claim 34, further comprising forming connecting
strips of conductive material connecting a portion of the resulting
rings or toroids, wherein the connecting strips in a direction
generally perpendicular to the direction of extension of the first
and final parallel strips.
36. The method of claim 35, wherein the gap as viewed from
successive ones of the rings or toroids appears to rotate at a
generally fixed angle in the same direction of rotation.
37. The method of claim 33, wherein at least some of the first and
final parallel strips are L shaped.
38. The method of claim 33, wherein the first parallel strips are
not parallel to the final parallel strips.
39. The method of claim 38, wherein the first parallel strips are
each connected to adjacent ones of the final parallel strips, via
plugs, to form a coil structure.
40. The method of claim 33, further comprising forming connecting
strips of conductive material between adjacent final parallel
strips and forming connecting strips of conductive material between
adjacent first parallel strips to form a coil structure.
41. The method of claim 40, wherein the connecting strips are
oriented in a slanting direction with respect to the major
direction of extension of the first and final parallel strips.
42. The method of claim 40, wherein the connecting strips are
oriented in a perpendicular direction with respect to the major
direction of extension of the first and final parallel strips.
43. The method of claim 33, wherein, instead of forming plugs in
the through holes, connecting strips of conductive material are
selectively formed.
44. The method of claim 43, wherein the connecting strips project
perpendicularly from the major direction of extension of the first
and final parallel strips.
45. The method of claim 33, wherein the at least one dielectric
layer consists of two or more dielectric layers, each having a
through hole formed through it in a separate processing step and
each through hole having a plug of conductive material formed in it
in a separate processing step.
46. The method of claim 33, further comprising forming a trench in
the at least one dielectric layer between the ends of the first and
final parallel strips.
47. The method of claim 46, further comprising filling the trench
with a conductive material to form a core to improve the overall
inductance.
48. The method of claim 47, further comprising using a damascene
process to encapsulate the core with an encapsulating material.
Description
FIELD OF THE INVENTION
[0001] The present invention generally relates to the field of
semiconductor manufacture, and particularly to fabricating an
inductor in a semiconductor device.
BACKGROUND OF THE INVENTION
[0002] Semiconductor manufacture has long been able to create
component parts on a micron scale. In semiconductor manufacture,
various layers of conductive material, dielectric material, and
semiconducting material are deposited and etched to form structures
on silicon, ceramic, plastic, or other substrates. The processing
includes laying down resist materials and etching those materials
through masks. Thin film FET transistors, consisting of drain,
gate, and source terminals, may be constructed through the
deposition and etch processes. Capacitors may also be constructed
by the processing. Diodes may also be formed on the substrate.
[0003] There are several processes for forming integrated circuit
layers on a substrate.
[0004] The CVD process involves masking the surface of a
semiconducting substrate with an oxide or nitride and removing the
oxide or nitride in the areas where epitaxial growth is desired. In
CVD, all reactants required for film growth are simultaneously
exposed to a wafer surface, where they continuously deposit a thin
film. CVD deposition rates can be surface-limited at lower
temperatures, or mass-flow-limited at higher temperatures where
deposition rates are relatively higher. Layers are deposited. A
photoresist pattern is then deposited. A mask is placed above the
substrate. Portions of the photoresist are developed corresponding
to the mask pattern. Etching of the photoresist and underlying
layer occurs. The photoresist is removed to yield a desired
pattern. A planar structure is achieved by etching holes to
interconnect various layers. Epitaxial growth by CVD requires a
surface catalyzed reaction. Deposition occurs only on the
semiconducting substrate and not on the oxide or nitride film.
[0005] Molecular beam epitaxy (MBE) forms thin films of metal,
dielectric, and semiconductor compounds of controllable thickness
and conductivity type on a semiconductor substrate. The substrate
is first heated to reduce contamination on the surface where the
films are to be deposited. A vacuum chamber houses gun port
containing several guns thermally insulated from one another. A
substrate holder of a refractory material rotates. The substrate
holder is provided with an internal heater. A thermocouple is
disposed in an aperture on the side of substrate. The chamber
includes a pump for evacuating the chamber to a pressure of around
a millionth of a Torr. Source material is placed in the source
chamber for vaporization by a heating coil which surrounds the
crucible. Selected guns are heated so as to vaporize the contents
of the crucible to produce a molecular beam. Vaporization may occur
by evaporation or sublimation depending on whether the gun
temperature is above or below the melting point of the crucible
material. Growth of the epitaxial film is done by directing the
molecular beam generated by the guns at the substrate surface.
Growth is continued for a time period sufficient to yield an
epitaxial film of the desired thickness. This technique permits the
controlled growth of films of thickness ranging from a single
monolayer of several .ANG. to more than 100,000 .ANG..
[0006] Atomic layer deposition (ALD) is a thin-film deposition
technique used to fabricate ultrathin and conformal thin film
structures below 0.2 .mu.m. ALD is especially useful for the
deposition of ultrathin and conformal films of high dielectric
oxides, storage capacitor dielectrics, capacitor electrodes and
diffusion barriers. ALD forms layers of oxides, nitrides, metals,
and semiconductors to using sequential self-limiting surface
reactions to provide atomic layer control and allow conformal films
to be deposited on very high aspect ratio structures. In ALD,
reactants are introduced in a gaseous state in pulses which are
separated from each other by purge gas. Each reactant pulse
chemically reacts with the surface of the substrate. When ALD
deposits materials to be combined in a single layer, the first
reactant may contain the first material and the second reactant the
second material. For example, the first pulse may deposit a
metal-containing layer, and the second pulse may react with that
layer to form the complete film of metal oxide or metal nitride.
Film thickness can be controlled to within a monolayer solely by
counting pulses. Because ALD has a low deposition rate, it is most
suitable for ultrathin films whose thicknesses range from a few to
100 .ANG.. This process makes high quality conformal and uniform
films.
[0007] Analog circuitry ideally involves the use of both capacitors
and inductors as passive components. Capacitors are relatively easy
to integrate into integrated circuit manufacturing. Traditionally,
inductors have been difficult to manufacture.
[0008] Semiconductor manufacturing methods based on the stacked
deposition and patterning of successive layers or the lamination of
such layers to form high-density wiring structures of sufficient
tolerance for inductors have been deficient in that a new layer is
fabricated, the previously deposited and patterned layers are
exposed to contamination and damage from successive thermal,
chemical/solvents, mechanical and other stress-related operations.
Defective devices often result. Production is often costly.
[0009] Therefore, it would be desirable to provide inductor
elements in an integrated circuit.
SUMMARY OF THE INVENTION
[0010] Accordingly, the present invention is directed to an
inductor which is formed on a substrate, especially an integrated
circuit substrate.
[0011] The present invention can be configured in two different
forms. In the first form, inductor coils are constructed parallel
to the plane of the substrate, while the core of the inductor
extends vertically out of the substrate. This form is the
vertically oriented inductor. In the second form, the inductor
coils are constructed such that the plane of the coil is
perpendicular with the plane of the substrate, while the core of
the inductor extends parallel to the plane of the substrate. This
form is the horizontally oriented inductor.
[0012] In a first aspect of the invention, in the vertical
orientation of the inductor, the inductor is formed on a substrate,
has a plurality of rings of metallization, wherein each of the
rings has a single gap along its perimeter. These rings may be
circular or take the form of any polygonal shape. The gap in each
successive ring is offset in such a way as to allow a continuous
spiral connection.
[0013] In a second aspect of the present invention, a method for
making a vertically oriented inductor on a substrate, comprises the
steps of depositing a first layer of metal on a surface, the first
layer of metal having a pattern, depositing a first layer of
dielectric material over the first layer of metal having a pattern,
forming a first through hole in the first layer of dielectric
material, filling the first through hole with a conductive
material, and depositing a second layer of metal on the first layer
of dielectric material, the second layer of metal having a pattern
similar to the pattern of the first layer of metal, with the gap in
the pattern offset from the previous layer as described
previously.
[0014] In a third aspect of the present invention, an electronic
circuit on a substrate which includes an inductor formed as part of
the substrate, wherein the inductor is formed of a plurality of
almost entirely enclosed toroids of conductive material with a
non-conductive interior, each toroid having a major plane of
extension, wherein each toroid is conductively interconnected with
an adjacent toroid by a conductor which extends generally in a
plane perpendicular to the major plane of extension of the
toroid.
[0015] In a fourth aspect of the present invention, a method for
forming an inductor whose longitudinal axis is parallel to the
major plane of extension of a substrate upon or in which it is
formed, including the steps of depositing a first conductive layer
and forming first parallel strips of conductive material of a first
length, one or more layers of non-conducting dielectric material is
deposited on the parallel strips. Via holes are etched through the
dielectric holes and are filled with a conductive plug material.
Finally, a conductive layer is deposited and patterned in such a
manner that the final structure forms a coil shape.
[0016] In a fifth aspect of the present invention, one or more
horizontally oriented coils can be interdigitated.
[0017] In a sixth aspect of the present invention, the cores of
either the horizontal or vertical inductors may be filled with a
conductive or non-conductive material. This material may be used to
alter the value of the inductance.
[0018] The present invention permits straightforward integration in
the integrated process flow.
[0019] The present invention permits the choice of inductor core
materials based on any process compatible film.
[0020] The present invention permits building an active detector at
the bottom of the coil to make a tuneable charged particle
detector.
[0021] The present invention allows an oscillator, filter, or other
electronic circuit containing an inductor to have that inductor
built in a deposition process.
[0022] The present invention offers a high L/.mu.m.sup.2
density.
[0023] The present invention provides for the formation of two or
more mutually coupled inductors which may be used to create
transformers, inductively based sensing circuits or other circuits
involving coupled inductors.
[0024] The present invention may be configured such that the
physical properties of the core material are altered by the
presences of current in the inductor. This allows for such
applications as phase shift based optical wave guides.
[0025] The present invention allows for the creation of an electro
magnet which may be used in microelectromechanical systems or MEMS
applications. MEMS refers to a type of systems that is physically
small and has both electrical and mechanical components. Integrated
circuit fabrication techniques and materials are one way to create
these very small mechanical devices.
[0026] It is to be understood that both the forgoing general
description and the following detailed description are exemplary
and explanatory only and are not restrictive of the invention as
claimed. The accompanying drawings, which are incorporated in and
constitute a part of the specification, illustrate an embodiment of
the invention and together with the general description, serve to
explain the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The numerous advantages of the present invention may be
better understood by those skilled in the art by reference to the
accompanying figures in which:
[0028] FIG. 1 illustrates a ring or toroid used to form the coil
structure of the inductor of the present invention;
[0029] FIG. 2 illustrates an exploded view of the coil structure of
the inductor of the present invention;
[0030] FIG. 3 illustrates a first embodiment of the present
invention implemented as an electron source or as a particle
detector;
[0031] FIG. 4 illustrates a second embodiment of the present
invention;
[0032] FIG. 5 illustrates a cross sectional view of the second
embodiment;
[0033] FIG. 6 illustrates a longitudinal view of the present
invention;
[0034] FIGS. 7A to 7F illustrate a horizontal inductor
configuration, optimized for high coil density;
[0035] FIGS. 8A to 8F illustrate a horizontal inductor
configuration using only 90 degree angles;
[0036] FIGS. 9A to 9F illustrate a horizontal inductor
configuration using only 90 degree angles, with a higher coil
density than the inductor of FIGS. 8A to 8F;
[0037] FIGS. 10A to 10H illustrate a horizontal inductor
configuration using intermediate metal as part of a coil;
[0038] FIGS. 11A to 11F illustrate a horizontal inductor
configuration showing optional core filling techniques;
[0039] FIG. 12 illustrates a pair of interdigitated or intertwined
inductor coils;
[0040] FIG. 13 illustrates an inductor coil in which two levels of
metallization are formed in a slanting manner;
[0041] FIG. 14 illustrates the inductor of the present invention
used in an oscillator circuit; and
[0042] FIG. 15 illustrates the inductor of the present invention
used in a filter circuit.
DETAILED DESCRIPTION OF THE INVENTION
[0043] Reference will now be made in detail to the presently
preferred embodiments of the invention, examples of which are
illustrated in the accompanying drawings.
[0044] Referring generally now to FIGS. 1 through 15, exemplary
embodiments of the present invention are shown.
[0045] FIG. 1 shows a component ring 10 of the inductor coil. The
ring 10 is almost totally enclosed except for a gap 30. The gap
should offer enough distance between the two ends of the ring to
avoid any problem with hillocks or other shorts forming during the
manufacturing method. At either end of the ring 10 is an area 20
for contacting the via. This is not a specially processed portion
of the ring, but merely shows that the ring will be electrically
connected proximate or at that point. The material of the ring or
toroid 10 is any conductive material that is compatible with the
processing and other layers in which it may have some effect
because of contact or proximity. For example, the ring or toroid
may be made of gold, titanium, molybdenum, copper, silver,
aluminum, hafnium, tin, or any alloy of these metals, may be made
of a conductive oxide or nitride such as indium tin oxide, or may
be formed of some other conductive material. The intervening
insulating layers between rings may be formed of any compatible
insulating material such as nitrides or oxides. Specific examples
of such insulating materials include silicon dioxide, silicon
nitride, and organic tetraethyl oxysilane (TEOS).
[0046] FIG. 2 shows an exploded view of an inductor. Multiple rings
10 are stacked one above another and are separated by intervening
insulating or dielectric layers. Vias 40 connect the individual
rings 10 to create a good approximation to a coil structure. As
shown in FIG. 2, each successive ring's gap is rotated with respect
to the previous ring's gap and in the same direction as one travels
through the resulting coil structure. The rings are connected to
adjacent rings such that the vias 40 connect one side of the ring
with respect to its gap to the opposite side of the adjacent ring
with respect to that adjacent ring's gap. This structure allows
current to pass along the coil structure as in a common coil
inductor.
[0047] FIG. 3 shows a cut away view of a vertically oriented
inductor used with a combined with an component 60. In one
embodiment, the component 60 is an electron source at the bottom of
the coil which could provide a narrow and highly controlled beam of
electrons potentially useful for electron microscopy and elemental
analysis tools. Alternatively, component 60 is an active detection
circuit which is useable as a tuneable charged particle detector
with possible uses in implanter controls and high-energy physics.
The detector may be implemented as a silicon PN junction.
[0048] Air may be the insulating material within the coil
structure. A high permeability material may be placed inside the
coil structure. An insulating fill material may be placed inside
the coil structure.
[0049] Not shown are the vias which would necessarily interconnect
adjacent rings. A conductor 40 reaches through the dielectric
layers 50 to act as a contact terminal. The coil structure formed
from the interconnected rings 10 generate a magnetic flux through
the center of the coil structure. A charged particle will be driven
along by the magnetic flux lines outside the coils structure and
through the coil structure to be sensed by the particle detector
60.
[0050] The general formula for inductance of a coil where the cross
section of the coil is circular is given by the equation
L=.mu.N.sup.2A/s,
[0051] where L is the inductance, .mu. is the permeability, N is
the number of turns, A is the area of the cross section of the
coil, and s is the length of the coil.
[0052] FIG. 4 shows an exploded view of a second embodiment of the
inductor in which the inductor is oriented such that its
longitudinal axis is in or parallel to the major plane of extension
of the substrate. As in the first embodiment, the rings 10 have
gaps which are offset in a rotational manner with the gaps of
successive rings. Also, the vias 40 are really short patterned
conductors on insulating or dielectric layers 50, rather than
formed through them, to connect adjoining rings 10.
[0053] In the second embodiment, there are certain constraints
which limit the cross sectional shapes possible in the coil
structure. These constraints include the requirement of depositing
a multitude of alternating layers of conductive material and
dielectric material to make an approximation of a curve in the coil
structure. During processing, very thin layers with very tight
tolerances need to be successively laid down to make a curved shape
approximation. To do so would entail prohibitively high cost.
Basically, in the horizontal orientation of the second embodiment,
the shape of the coil cross-section is limited to a square or
rectangle.
[0054] The general formula for inductance of a coil where the cross
section of the coil is a square is given by the equation
L=.mu.N.sup.2A/(2.pi.1n(r2-r1)),
[0055] where L is the inductance, .mu. is the permeability, N is
the number of turns, A is the area of the cross section of the
coil, r2 is the outer radius, and r1 is the inner radius.
[0056] FIG. 5 shows a cross sectional view of the inductor of the
second embodiment. As with all rings 10, there must be a gap 30
which is as small as possible and large enough to avoid the
development of any shorts, such as from hillocks or via like
connecting conductors, across the gap 30.
[0057] FIG. 6 shows an exposed view of the ring structure of the
inductor of the present invention. The interconnecting vias are not
shown.
[0058] Thus, there are two possible integrated inductor
configurations are possible: vertical and horizontal. The vertical
configuration occupies a smaller area than a horizontal
configuration and is more likely to be used for charged particle
detection or emission. The horizontal configuration allows for a
significantly longer coil structure than the vertical configuration
since its length is not limited by the number of layers
deposited.
[0059] The thickness of individual conductive and insulating layers
depends upon the application. Current processes allow layer
thicknesses as low as several Angstroms. The inductor of the
present invention is meant to be scalable.
[0060] FIGS. 7A to 7F illustrate a horizontal inductor
configuration, optimized for high coil density. In FIGS. 7A and 7B,
an initial set of parallel lengths 100 of conductive material is
laid down upon an insulating layer. In FIGS. 7C and 7D, successive
layers of dielectric layers are laid down and successive plugs of
conductive material 110 are formed in its corresponding dielectric
layer to form a ring or toroid structure. By using successive
layers of dielectric material, the cross sectional area of the
inductor coil may be made greater than it would be relying on
single dielectric layer. The use of a single dielectric layer,
although within the scope of the present invention, limits the
vertical height because there are limits to the depth in which a
given through hole or via may be formed through its corresponding
dielectric layer. A last set of conductive lengths 120, formed at a
slant, connect the various ring like structures to form a coil
structure.
[0061] FIGS. 8A to 8F illustrate a horizontal inductor
configuration using only 90 degree angles. In this embodiment, the
initial set of conductors 100 are formed with an appendage 130 to
connect with an adjacent final conductor. The final set of
conductors 120 are formed with a similar appendage to connect
neighboring rings or toroids.
[0062] FIGS. 9A to 9F illustrate a horizontal inductor
configuration using only 90 degree angles, with a higher coil
density than the inductor of FIGS. 8A to 8F.
[0063] FIGS. 10A to 10H illustrate a horizontal inductor
configuration using intermediate metal as part of a coil.
Initially, a set of parallel conductors 100 are formed on an
insulating layer or substrate. A plug or successive plugs 110 of
conductive material are formed over their corresponding conductors
100. A connection appendage 140 is formed over the plug or
successive plugs 110 to allow connection to form the coil
structure. Another plug or successive plugs 110 of conductive
material are formed over the appendage 140 and underlying plugs
110. A final set of parallel conductors 120 are formed to connect
appendages 140 and complete the coil structure.
[0064] FIGS. 11A to 11F illustrate a horizontal inductor
configuration showing optional core filling techniques. The
inductance of the inductor may be increased by adding a core to the
inductor. The formation of this device is similar to the device of
FIGS. 7A to 7F. The core 150 may be formed by cutting a trench into
the dielectric and capping it with a dielectric. The core 150 may
be formed of copper, gold, ferromagnetic material, or other
suitable material. A damascene process for encapsulating the core
material may be used so as to prevent migration of the core
material to other component parts and impairing device
function.
[0065] FIG. 12 illustrates a pair of interdigitated or intertwined
inductor coils 200 and 210 for inductively coupled networks. In
this embodiment, it is important to scale the coils so that their
inductance is not dominated by capacitive effects. Capacitive
effects may arise through surrounding metallization.
[0066] FIG. 13 illustrates an inductor coil 220 in which two levels
of metallization are formed in a slanting manner.
[0067] Applications of the inductive circuit element in a
filtering, an oscillator, or an antenna. FIG. 14 shows an inductor
of the present invention used in an oscillator circuit which
generates a sine wave and has inductive-capacitive feedback. FIG.
15 shows an inductor used in a filter circuit. Other uses of the
present invention are possible. The present invention may also be
used in microelectromechanical devices. One possible application
concerns the use of the inductor with a filled core of the present
invention to control an array of mechanically deformed
micromirrors. Instead of electrostatic control, magnetic forces
could be used to control microdevices.
[0068] Recent improvements in planarization technology and
conformal films have made it possible to integrate inductors more
easily. With the increasing number of layers of metallization
possible in IC manufacturing, it has become possible to build a
vertically oriented coil/inductor using a set of split metal rings,
one built on each metal layer and joined together using standard
via techniques. The manufacture is a standard pattern and etch of
the metal layers to provide the horizontal rings combined with
standard planarization, etch, and via techniques to join the
rings.
[0069] Any process may be used, such as CVD, MBE, or ALD, as long
as it provides a smooth conformal conductive film on an insulating
layer having a via formed therein. The rings may be patterned by
laser trimming. The component layers may also be formed in one
location and then transferred to the desired substrate. The chosen
process only needs to provide good planarity and step coverage as
well as chemical compatibility and adhesion with contacting
component layers. The process includes forming through holes in an
insulating layer to a semiconducting or insulating substrate and
depositing the various layers of semiconductor, insulating, and
conductive material using the deposition techniques to provide a
conformal film that exhibits good step coverage.
[0070] Chemical mechanical polishing (CMP) may be employed to
improve the planarization of the layers. In this process, a slurry
with silicon or other granular component is deposited on the layer
to be polished. The granular components are about 0.2 microns in
diameter. A pad is used to press upon and move around the slurry.
The pad may rotate, the substrate may rotate, or both the pad and
the substrate may rotate.
[0071] In manufacture, for a vertically oriented inductor, a
substrate is chosen. Several underlying layers may first be
deposited and patterned to form conductor paths and various
component layers. Then, an insulating film may be deposited and may
also be patterned to include a via for each inductor to be formed.
The via is thereafter filled with a conductive material. A first
metal or other conductive layer is then deposited over the via. A
mask make be used to form a metal or conductor pattern or the
pattern may be developed through etching, laser trimming, or other
cut and remove process to form a ring or toroid shape which has a
gap formed near the via in which the via electrically connects the
ring or toroid. Any conductive material in the ring or toroid may
be removed. To increase magnetic flux, conductive material may be
retained within the ring or toroid and electrically insulated from
it. Then, a dielectric or insulating layer is deposited over the
ring or toroid. A through hole is formed in the insulating layer
over the unconnected end of the ring or toroid immediately
underneath. The through hole is filled with a conductive material.
Another conductive layer is formed over the insulating layer. It is
patterned in a similar manner to the first metal or conductive
layer. The difference is that the gap of the second ring or toroid
is rotated at an angle from the gap of the first ring or toroid.
The end of the first ring or toroid is connected not to the
corresponding end of the second ring or toroid, but to the opposing
end of the ring or toroid. By building successive layers in this
manner, a coil structure is created as long as the gap of the
successive ring or toroid is rotated in the same direction as done
in underlying layers.
[0072] In manufacture, for a horizontally oriented inductor, a
substrate is chosen. Several underlying layers may first be
deposited and patterned to form conductor paths and various
component layers. In this case, a metal layer is deposited by a
masking or later pattern so that there are parallel conductor
lengths equal in number to the desired number of rings or toroids
in the coil structure. The spacing between and thickness of the
rings or toroids may also be set as desired. It may be that a gap
location is to be formed in this first layer. The material is
removed by etching, trimming, or other cutting and removing process
to establish a gap which will effectively appear to rotate in a
cross section view of the coil structure going from successive
rings or toroids. Furthermore, if there are gaps to be formed in
this layer of metallization or the next layer, conductors may be
formed to electrically connect the rings or toroids which need to
be connected at this level. The next layers deposited are a
dielectric layer to serve at least as an inner area of the ring or
toroid to be formed as well as relatively small strips of metal or
conductive material. These strips are the length of the thickness
of the toroid, measured by subtracting the inner radius from the
outer radius. If a gap is to be formed, the affected ring or toroid
has no metal or conductive material placed at the gap location and
is filled there with the dielectric material. This may be
accomplished by either not forming metal or conductive material at
the gap or later removing such material. Again connecting strips of
conductive material are also formed at this level through the
dielectric to interconnect adjacent rings or toroids as needed.
Successively layers of dielectric and conductive materials are
built up. When the ring or toroid is to be finished, a length of
conductive material is formed similar to that of the first length
of the ring or toroid to form a nearly completely enclosed shape in
a cross sectional view. Because of the constraints in processing,
the horizontal inductor is basically limited to a squarish or
rectangular cross section.
[0073] It is believed that the integrated inductor in semiconductor
manufacturing of the present invention and many of its attendant
advantages will be understood by the forgoing description. It is
also believed that it will be apparent that various changes may be
made in the form, construction and arrangement of the components
thereof without departing from the scope and spirit of the
invention or without sacrificing all of its material advantages.
The form herein before described being merely an explanatory
embodiment thereof. It is the intention of the following claims to
encompass and include such changes.
* * * * *