U.S. patent application number 10/815653 was filed with the patent office on 2004-09-23 for semiconductor device, method of fabricating same, and, electrooptical device.
This patent application is currently assigned to Semiconductor Energy Laboratory Co., Ltd.. Invention is credited to Arai, Yasuyuki, Teramoto, Satoshi, Yamazaki, Shunpei.
Application Number | 20040183076 10/815653 |
Document ID | / |
Family ID | 18324832 |
Filed Date | 2004-09-23 |
United States Patent
Application |
20040183076 |
Kind Code |
A1 |
Yamazaki, Shunpei ; et
al. |
September 23, 2004 |
Semiconductor device, method of fabricating same, and,
electrooptical device
Abstract
A pair of substrates forming the active matrix liquid crystal
display are fabricated from resinous substrates having transparency
and flexibility. A thin-film transistor has a semiconductor film
formed on a resinous layer formed on one resinous substrate. The
resinous layer is formed to prevent generation of oligomers on the
surface of the resinous substrate during formation of the film and
to planarize the surface of the resinous substrate.
Inventors: |
Yamazaki, Shunpei;
(Setagaya, JP) ; Arai, Yasuyuki; (Atsugi-shi,
JP) ; Teramoto, Satoshi; (Ayase, JP) |
Correspondence
Address: |
ERIC ROBINSON
PMB 955
21010 SOUTHBANK ST.
POTOMAC FALLS
VA
20165
US
|
Assignee: |
Semiconductor Energy Laboratory
Co., Ltd.
Atsugi-shi
JP
|
Family ID: |
18324832 |
Appl. No.: |
10/815653 |
Filed: |
April 2, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10815653 |
Apr 2, 2004 |
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09118010 |
Jul 17, 1998 |
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09118010 |
Jul 17, 1998 |
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08962840 |
Nov 3, 1997 |
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6429053 |
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08962840 |
Nov 3, 1997 |
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08575355 |
Dec 20, 1995 |
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Current U.S.
Class: |
257/72 ;
257/E29.283; 438/151 |
Current CPC
Class: |
H01L 29/78636 20130101;
G02F 1/133305 20130101; G02F 1/136227 20130101 |
Class at
Publication: |
257/072 ;
438/151 |
International
Class: |
H01L 031/036; H01L
021/00 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 27, 1994 |
JP |
06-339162 |
Claims
What is claimed is:
1. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
2. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
3. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
4. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes.
5. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
6. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
7. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes.
8. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
9. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes, and wherein a
contact portion between the pixel electrode and the at least one of
the source and the drain electrodes is not formed over the n-type
semiconductor layer.
10. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
11. An electronic device comprising: a panel having a thin film
transistor formed over a substrate, the thin film transistor
comprising: a gate electrode formed over the substrate; a gate
insulating film formed over the gate electrode; a substantially
intrinsic semiconductor layer formed over the gate insulating film;
an n-type semiconductor layer formed over the substantially
intrinsic semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer, and wherein the insulating film is in contact
with the gate insulating film; and a pixel electrode formed over
the insulating film, wherein the pixel electrode is in contact with
the at least one of the source and the drain electrodes.
12. An electronic device according to any one of claims 1-11,
wherein the substrate comprises one selected from the group
consisting of polyethylene terephthalate, polyethylene naphthalate,
polyethylene sulfite, and polyimide.
13. An electronic device according to any one of claims 1-11,
wherein the gate insulating film comprises silicon oxide or silicon
nitride.
14. An electronic device according to any one of claims 1-11,
wherein the substantially intrinsic semiconductor layer comprises
amorphous silicon or microcrystalline silicon.
15. An electronic device according to any one of claims 1-11,
wherein the at least one of the source and the drain electrodes
comprises aluminum.
16. An electronic device according to any one of claims 1-11,
wherein the insulating film comprising the resinous material
comprises polyimide.
17. An electronic device according to any one of claims 1-11,
wherein the pixel electrode comprises ITO.
18. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
19. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
20. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
21. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes.
22. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
23. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer; and a pixel
electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
24. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes.
25. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer, wherein an
edge of the at least one of the source and the drain electrodes is
aligned with an edge of the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes.
26. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer; and a pixel electrode formed over the
insulating film, wherein the pixel electrode is in contact with the
at least one of the source and the drain electrodes, and wherein a
contact portion between the pixel electrode and the at least one of
the source and the drain electrodes is not formed over the n-type
semiconductor layer.
27. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, and wherein the
insulating film is in contact with the gate insulating film; and a
pixel electrode formed over the insulating film, wherein the pixel
electrode is in contact with the at least one of the source and the
drain electrodes, and wherein a contact portion between the pixel
electrode and the at least one of the source and the drain
electrodes is not formed over the n-type semiconductor layer.
28. A computer comprising: a panel having a thin film transistor
formed over a substrate, the thin film transistor comprising: a
gate electrode formed over the substrate; a gate insulating film
formed over the gate electrode; a substantially intrinsic
semiconductor layer formed over the gate insulating film; an n-type
semiconductor layer formed over the substantially intrinsic
semiconductor layer; at least one of a source and a drain
electrodes formed over the n-type semiconductor layer; an
insulating film comprising a resinous material formed over the thin
film transistor, wherein the insulating film is not in contact with
the substantially intrinsic semiconductor layer, wherein the
insulating film is in contact with an edge of the n-type
semiconductor layer, and wherein the insulating film is in contact
with the gate insulating film; and a pixel electrode formed over
the insulating film, wherein the pixel electrode is in contact with
the at least one of the source and the drain electrodes.
29. A computer according to any one of claims 18-28, wherein the
substrate comprises one selected from the group consisting of
polyethylene terephthalate, polyethylene naphthalate, polyethylene
sulfite, and polyimide.
30. A computer according to any one of claims 18-28, wherein the
gate insulating film comprises silicon oxide or silicon
nitride.
31. A computer according to any one of claims 18-28, wherein the
substantially intrinsic semiconductor layer comprises amorphous
silicon or microcrystalline silicon.
32. A computer according to any one of claims 18-28, wherein the at
least one of the source and the drain electrodes comprises
aluminum.
33. A computer according to any one of claims 18-28, wherein the
insulating film comprising the resinous material comprises
polyimide.
34. A computer according to any one of claims 18-28, wherein the
pixel electrode comprises ITO.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a configuration of
thin-film transistors (TFTs) formed on a flexible substrate (i.e.,
having mechanical flexibility) such as a resinous substrate which
can be made of engineering plastics. The invention also relates to
a method of fabricating such thin-film transistors. Furthermore,
the invention relates to an active matrix liquid crystal display
fabricated, using these thin-film transistors.
[0003] 2. Prior Art
[0004] Thin-film transistors formed on glass substrates or on
quartz substrates are known. Thin-film transistors formed on glass
substrates are chiefly used in active matrix liquid crystal
displays. Since active matrix liquid crystal displays can display
images with high response and with high information content, it is
expected that they can supplant simple matrix liquid crystal
displays.
[0005] In an active matrix liquid crystal display, one or more
thin-film transistors are disposed as a switching element at each
pixel. Electric charge going in and out of the pixel electrode is
controlled by this thin-film transistor. The substrates are made of
glass or quartz, because it is necessary that visible light pass
through the liquid crystal display.
[0006] Liquid crystal displays are display means which are expected
to find quite extensive application. For example, they are expected
to be used as display means for card-type computers, portable
computers, and portable electronic devices for various
telecommunication appliances. As more sophisticated information is
treated, more sophisticated information is required to be displayed
on the display means used for these portable electronic devices.
For example, there is a demand for functions of displaying higher
information content and moving pictures as well as numerals and
symbols.
[0007] Where a liquid crystal display is required to have a
function of displaying higher information content and moving
pictures, it is necessary to utilize an active matrix liquid
crystal display. However, where substrates made of glass or quartz
are used, various problems take place: (1) limitations are imposed
on thinning of the liquid crystal display itself; (2) the weight is
increased; (3) if the thickness is reduced in an attempt to reduce
the weight, the substrate breaks; and (4) the substrate lacks
flexibility.
[0008] Especially, card-type electronic devices are required to be
so flexible that they are not damaged if slight stress is exerted
on them when they are treated. Therefore, liquid crystal displays
incorporated in these electronic devices are similarly required to
be flexible.
[0009] The invention disclosed herein provides an active matrix
liquid crystal display having flexibility.
SUMMARY OF THE INVENTION
[0010] One available method of imparting flexibility to a liquid
crystal display is to use plastic or resinous substrates which
transmit light. However, because of poor heat resistance of
resinous substrates, it is technically difficult to form thin-film
transistors on them.
[0011] Accordingly, the invention disclosed herein solves the
foregoing difficulty by adopting the following configuration:
[0012] One invention disclosed herein comprises: a filmy resinous
substrate; a resinous layer formed on a surface of said resinous
substrate; and thin-film transistors formed on said resinous
layer.
[0013] A specific example of the above-described configuration is
shown in FIG. 1. In the configuration shown in FIG. 1, a resinous
layer 102 is in contact with a PET film 101 having a thickness of
100 .mu.m, the PET film being a filmy resinous substrate.
Inverted-staggered thin-film transistors are formed on the resinous
layer.
[0014] The material of the filmy resinous substrate can be selected
from PET (polyethylene terephthalate), PEN (polyethylene
naphthalate), PES (polyethylene sulfite), and polyimide. The
requirements are flexibility and transparency. Preferably, the
maximum temperature that the material can withstand is made as high
as possible. If the heating temperature is elevated above
200.degree. C., oligomers (polymers having diameters of about 1
.mu.m) are generally deposited on the surface, or gases are
produced. Therefore, it is quite difficult to form a semiconductor
layer on the resinous substrate. Consequently, the material should
have the highest possible processing temperature.
[0015] In the above-described structure, the resinous layer acts to
planarize the surface of the resinous substrate. The planarization
also serves to prevent precipitation of oligomers on the surface of
the resinous substrate during steps involving heating such as the
step for forming the semiconductor layer.
[0016] The material of this resinous layer can be selected from
methyl esters of acrylic acid, ethyl esters of acrylic acid, butyl
esters of acrylic acid, and 2-ethylhexyl esters of acrylic acid.
Even if resinous substrates are used, this resinous layer can
suppress the drawbacks with fabrication of the afore-mentioned
thin-film transistors.
[0017] The configuration of another invention comprises the steps
of: forming a resinous layer on a filmy resinous substrate; forming
a semiconductor layer on said resinous layer by plasma-assisted
CVD; and forming thin-film transistors, using said semiconductor
layer.
[0018] The configuration of a further invention comprises the steps
of: heat-treating a filmy resinous substrate at a given temperature
to degas said resinous substrate; forming a resinous layer on the
filmy resinous substrate; forming a semiconductor layer on said
resinous substrate by plasma-assisted CVD; and forming thin-film
transistors, using said semiconductor layer.
[0019] In the above-described structure, heat-treatment is made to
degas the resinous substrate, in order to prevent escape of gases
from the resinous substrate during later processes involving
heating. For example, if gases are released from the resinous
substrate when a semiconductor thin film is being formed on the
resinous substrate, then large pinholes are formed in the
semiconductor thin film. This greatly impairs the electrical
characteristics. Accordingly, the substrate is heat-treated at a
temperature higher than heating temperatures used in the later
processes, to degas the resinous substrate. In this way, release of
gases from the resinous substrate during the later steps can be
suppressed.
[0020] The configuration of a yet other invention comprises the
steps of: heat-treating a filmy resinous substrate at a given
temperature; forming a resinous layer on said filmy resinous
substrate; forming a semiconductor layer on said resinous substrate
by plasma-assisted CVD while heating the substrate to a temperature
lower than said given temperature; and forming thin-film
transistors, using said semiconductor layer.
[0021] The configuration of a still other invention comprises the
steps of: heat-treating a filmy resinous substrate at a given
temperature which is higher than any heat-treatment temperature
used in other steps; forming a resinous layer on said filmy
resinous substrate; forming a semiconductor layer on said resinous
substrate by plasma-assisted CVD; and forming thin-film
transistors, using said semiconductor layer.
[0022] The configuration of a still further invention comprises: a
pair of filmy resinous substrates; a liquid crystal material held
between said resinous substrates; pixel electrodes formed on a
surface of at least one of said resinous substrates; thin-film
transistors connected with said pixel electrodes and formed on said
resinous substrate; and resinous layers formed on surfaces of said
filmy resinous substrates to planarize the surfaces.
[0023] A specific example of the above-described structure is shown
in FIG. 3. In the structure shown in FIG. 3, a pair of resinous
substrates 301, 302, a liquid crystal material 309 held between
these resinous substrates, pixel electrodes 306, thin-film
transistors (TFTs) 305 connected with the pixel electrodes 306, and
a resinous layer 303 for planarizing the surface of the resinous
substrate 301.
BRIEF DESCRIPTION OF THE DRAWINGS
[0024] FIGS. 1(A) to 1(E) are views illustrating a process sequence
for fabricating thin-film transistors according to the present
invention;
[0025] FIGS. 2(A) to 2(C) are views illustrating another process
sequence for fabricating thin-film transistors according to the
present invention; and
[0026] FIG. 3 is a schematic cross-sectional view of a liquid
crystal panel.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
EXAMPLE 1
[0027] The present example shows an example in which
inverted-staggered TFTs are formed on a substrate of PET
(polyethylene terephthalate) which is an organic resin.
[0028] As shown in FIG. 1(A), a PET film 101 having a thickness of
100 .mu.m is first prepared and heat-treated to degas the film.
This heat-treatment is required to be conducted at a temperature
higher than the highest temperature applied in later processes. In
the processes shown in the present example, a temperature of
160.degree. C. used during formation of an amorphous silicon film
by plasma-assisted CVD is the highest heating temperature.
Therefore, the heat-treatment for degassing the PET film is
performed at 180.degree. C.
[0029] A layer of an acrylic resin 102 is formed on this PET film
101. As an example, a methyl ester of acrylic acid can be used as
the acrylic resin. This acrylic resin layer 102 acts to prevent
precipitation of oligomers on the surface of the PET film 101 in
processes conducted later. The acrylic resin layer 102 also serves
to planarize the uneven surface of the PET film 102. Generally, PET
film surface has unevenness of the order of several hundreds of
angstroms to 1 .mu.m. Such unevenness greatly affects the
electrical properties of the semiconductor layer having a thickness
of several hundreds of angstroms. Therefore, it is quite important
to planarize the base on which the semiconductor layer is
formed.
[0030] Then, gate electrodes 103 of aluminum are formed. The gate
electrodes 103 are formed by forming an aluminum film to a
thickness of 2000 to 5000 .ANG. (3000 .ANG. in this example) by
sputtering and performing a well-known patterning step making use
of photolithography. The gate electrodes 103 are etched so that the
side surfaces are tapered (FIG. 1(A)).
[0031] Thereafter, a silicon oxide film acting as a gate-insulating
film 104 is formed to a thickness of 1000 .ANG. by sputtering. The
gate-insulating film 104 may be made from silicon nitride instead
of silicon oxide.
[0032] Subsequently, a substantially intrinsic (I-type) amorphous
silicon film 105 is formed to a thickness of 500 .ANG. by
plasma-assisted CVD under the following conditions:
1 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 20
mW/cm.sup.2 reactant gas: SiH.sub.4
[0033] In this example, the film is formed, using a parallel-plate
plasma-CVD machine. The substrate is heated by a heater disposed
within a substrate stage in which the resinous substrate is placed.
In this way, the state shown in FIG. 1(B) is obtained.
[0034] Then, a silicon oxide film which acts as an etch stopper in
a later step is formed by sputtering and then patterned to form an
etch stopper 106.
[0035] Thereafter, an n-type amorphous silicon film 107 is formed
to a thickness of 300 .ANG. by parallel-plate plasma-assisted CVD
under the following conditions:
2 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 20
mW/cm.sup.2 reactant gases: B.sub.2H.sub.6/SiH.sub.4 = 1/100
[0036] In this way, the state shown in FIG. 1(C) is obtained. Then,
the n-type amorphous silicon film 107 and the substantially
intrinsic (I-type) amorphous silicon film 105 are patterned by a
dry-etching process. An aluminum film is formed to a thickness of
3000 .ANG. by sputtering techniques. Thereafter, this aluminum film
and the underlying n-type amorphous silicon film 107 are etched to
form source electrodes 108 and drain electrodes 109. During this
etching process, the action of the etch stopper 106 assures that
the source and drain regions are isolated from each other (FIG.
1(D)).
[0037] An interlayer dielectric layer 110 is formed out of a
resinous material such as silicon oxide or polyimide to a thickness
of 6000 .ANG.. Where a silicon oxide film is formed, a liquid which
is applied when the silicon oxide film is formed may be used.
Finally, contact holes are formed, and pixel electrodes 111 are
fabricated from ITO. In this way, thin-film transistors arranged at
the pixel electrodes of the active matrix liquid crystal display
can be fabricated, using the transparent resinous substrate (FIG.
1(E)).
EXAMPLE 2
[0038] The present example shows a case in which an active matrix
liquid crystal display is fabricated, using the thin-film
transistors described in Example 1. The liquid crystal
electrooptical device described in the present example is shown in
FIG. 3 in cross section.
[0039] In FIG. 3, PET films 301 and 302 having a thickness of 100
.mu.m form a pair of substrates. An acrylic resin layer 303 acts as
a planarizing layer. Indicated by 306 are pixel electrodes. In FIG.
3, only the structure corresponding to two pixels is shown.
[0040] Indicated by 304 is a counter electrode. Orientation films
307 and 308 orient a liquid crystal 309 which can be a
twisted-nematic (TN) liquid crystal, supertwisted-nematic (STN)
liquid crystal, or a ferroelectric liquid crystal. Generally, a TN
liquid crystal is employed. The thickness of the liquid crystal
layer is several micrometers to about 10 .mu.m.
[0041] Thin-film transistors (TFTs) 305 are connected with the
pixel electrodes 306. Electric charge going in and out of the pixel
electrodes 306 is controlled by the TFTs 305. In this example, only
one of the pixel electrodes 306 is shown as a typical one but a
required number of other configurations of similar structure are
also formed.
[0042] In the structure shown in FIG. 3, the substrates 301 and.
302 have flexibility and so the whole liquid crystal panel can be
made flexible.
EXAMPLE 3
[0043] The present example shows an example in which coplanar
thin-film transistors used for an active matrix liquid crystal
display are fabricated. The process sequence for fabricating the
thin-film transistors of the present example is shown in FIG. 2.
First, a PET film 201 having a thickness of 100 .mu.m is prepared
as a filmy organic resin substrate. The film is heated-treated at
180.degree. C. to promote degassing from the PET film 201. A layer
of an acrylic resin 202 is formed on the surface of the film. In
this example, an ethyl ester of acrylic acid is used as the acrylic
resin.
[0044] Then, a substantially intrinsic (I-type) semiconductor layer
203 in which a channel formation region is formed is grown by
plasma-assisted CVD under the following conditions:
3 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 20
mW/cm.sup.2 reactant gas: SiH.sub.4
[0045] In this example, a parallel-plate plasma-CVD machine is used
to grow the film.
[0046] Then, an n-type amorphous silicon film is grown to a
thickness of 300 .ANG. by the parallel-plate plasma-CVD machine
under the following conditions:
4 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 20
mW/cm.sup.2 reactant gases: B.sub.2H.sub.6/SiH.sub.4 = 1/100
[0047] The n-type amorphous silicon film is patterned to form
source regions 205 and drain regions 204 (FIG. 2(A)).
[0048] A silicon oxide film or silicon nitride film acting as a
gate-insulating film is formed by sputtering techniques and
patterned to form the gate-insulating film 206. Gate electrodes 207
are then formed from aluminum (FIG. 2(B)).
[0049] A polyimide layer 208 is formed as an interlayer dielectric
film to a thickness of 5000 .ANG.. Contact holes are formed. ITO
electrodes 209 becoming pixel electrodes are formed by sputtering,
thus completing TFTs (FIG. 2(C)).
EXAMPLE 4
[0050] The present example is similar to the structure of Example 1
or 2 except that the semiconductor layer is made of a
microcrystalline semiconductor film. First, a substantially
intrinsic semiconductor layer is grown as the microcrystalline
semiconductor layer under the following conditions:
5 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 150
mW/cm.sup.2 reactant gases: SiH.sub.4/H.sub.2 = 1/30
[0051] In this example, a parallel-plate plasma-CVD machine is used
to grow the film.
[0052] The conditions under which an n-type microcrystalline
silicon film is grown are described below. Also in this case, a
parallel-plate plasma-CVD machine is used.
6 film formation temperature 160.degree. C. (at which the substrate
is heated): reaction pressure: 0.5 torr RF power (13.56 MHz): 150
mW/cm.sup.2 reactant gases: B.sub.2H.sub.6/SiH.sub.4 = 1/100
[0053] Generally, a microcrystalline silicon film can be obtained
by supplying power of 100 to 200 mW/cm.sup.2. In the case of the
I-type semiconductor layer, desirable results are obtained by
diluting silane with hydrogen by a factor of about 10 to 50, as
well as by increasing the power. However, if the hydrogen dilution
is made, the film growth rate drops.
EXAMPLE 5
[0054] The present example relates to a method consisting of
irradiating a silicon film with laser light having such a power
that the filmy base or substrate is not heated, the silicon film
having been formed by plasma-assisted CVD as described in the other
examples.
[0055] A technique for changing an amorphous silicon film formed on
a glass substrate into a crystalline silicon film by irradiating
the amorphous film with laser light (e.g., KrF excimer laser light)
is known. In another known technique, impurity ions for imparting
one conductivity type are implanted into the silicon film and then
the silicon film is irradiated with laser light to activate the
silicon film and the impurity ions. The implantation of the
impurity ions amorphizes the silicon film.
[0056] The configuration described in the present example makes use
of a laser irradiation process as described above, and is
characterized in that the amorphous silicon film 105 shown in FIG.
1 or the amorphous silicon films 203 and 204 shown in FIG. 2 are
irradiated with quite weak laser light to crystallize the amorphous
silicon film. If the previously formed film is a microcrystalline
silicon film, the crystallinity can be improved.
[0057] KrF excimer laser or XeCl excimer laser can be used to emit
the laser light. The energy of the emitted laser light is 10 to 50
mJ/cm.sup.2. It is important that the resinous substrate 101 or 102
be not thermally damaged.
[0058] By utilizing the invention disclosed herein, the thickness
of an active matrix liquid crystal display can be reduced. Also,
the weight can be decreased. If an external force is applied, the
substrates do not break. Flexibility can be imparted to the
display.
[0059] This liquid crystal display can find wide application and is
quite useful.
* * * * *