U.S. patent application number 10/804021 was filed with the patent office on 2004-09-16 for recording/reproducing apparatus, error correcting coding method and information recording method.
This patent application is currently assigned to HITACHI, LTD. Invention is credited to Kondo, Masaharu, Takashi, Terumi.
Application Number | 20040181737 10/804021 |
Document ID | / |
Family ID | 18792583 |
Filed Date | 2004-09-16 |
United States Patent
Application |
20040181737 |
Kind Code |
A1 |
Kondo, Masaharu ; et
al. |
September 16, 2004 |
Recording/reproducing apparatus, error correcting coding method and
information recording method
Abstract
A recording/reproducing apparatus for recording in a recording
medium the interleaved data with an error correcting code added
thereto and reproducing the recorded data from the recording
medium, wherein the error correcting coding process is performed
using an elliptic code on a finite field GF(2.sup.m) where m is a
positive integer.
Inventors: |
Kondo, Masaharu; (Odawara,
JP) ; Takashi, Terumi; (Chigasaki, JP) |
Correspondence
Address: |
ANTONELLI, TERRY, STOUT & KRAUS, LLP
1300 NORTH SEVENTEENTH STREET
SUITE 1800
ARLINGTON
VA
22209-9889
US
|
Assignee: |
HITACHI, LTD
|
Family ID: |
18792583 |
Appl. No.: |
10/804021 |
Filed: |
March 19, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10804021 |
Mar 19, 2004 |
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09888645 |
Jun 26, 2001 |
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6728052 |
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Current U.S.
Class: |
714/758 ;
G9B/20.054; G9B/5.024 |
Current CPC
Class: |
H03M 13/158 20130101;
G11B 20/1866 20130101; G11B 5/012 20130101; H03M 13/1525 20130101;
H03M 13/1515 20130101; H03M 13/132 20130101 |
Class at
Publication: |
714/758 |
International
Class: |
H03M 013/00 |
Foreign Application Data
Date |
Code |
Application Number |
Oct 6, 2000 |
JP |
2000-313121 |
Claims
What is claimed is:
1. A recording/reproducing apparatus for recording in a recording
medium the interleaved data with an error correcting code added
thereto and reproducing the recorded data from said recording
medium, the apparatus comprising an error correcting coding circuit
for generating an error correcting code using an elliptic code on a
finite field GF(2.sup.m) where m is a positive integer.
2. A recording/reproducing apparatus comprising: an interface for
converting an input signal to binary data; an interleaver for
segmenting the converted binary data into a plurality of data
blocks; a coding circuit for performing the error correcting coding
operation for each of said data blocks using an elliptic code on a
finite GF(2.sup.m) where m is a positive integer; a signal
processing circuit for converting the data block subjected to the
error correcting coding operation into an analog signal for
recording in a recording medium, and converting the analog signal
read from said recording medium into binary data; and a decoding
circuit for detecting and correcting an error of the binary data
converted by said signal processing circuit using said elliptic
code.
3. A recording/reproducing circuit according to claim 1, wherein
said coding circuit uses an elliptic code in which the length n of
the data encoded for each interleave is not less than 2.sup.m and
the number t of correctable symbols holds the relation
m/2<t.ltoreq.2.sup.m/2, i.e.
m+1<2t+1.ltoreq.2.sup.(m+2)/2+1.
4. A recording/reproducing circuit according to claim 2, wherein
said coding circuit uses an elliptic code in which the length n of
the data encoded for each interleave is not less than 2.sup.m and
the number t of correctable symbols holds the relation
m/2<t.ltoreq.2.sup.m/2, i.e.
m+1<2t+1.ltoreq.2.sup.(m+2)/2+1.
5. An error correcting coding method using a code having a check
matrix wherein a point on an elliptic curve corresponds to the
symbol location in such a manner as to continue in the ascending or
descending lexicographic order of the direct product group G of the
residue class ring of integers isomorphic with the elliptic curve
as a group.
6. An information recording method comprising the steps of:
converting an input signal to binary data; segmenting the converted
binary data to data blocks; subjecting each of said data blocks to
the error correcting coding operation using an elliptic code on a
finite field GF(2.sup.m) where m is a positive integer; converting
the data block subjected to the error correcting coding operation
to an analog signal; and recording the data block converted to the
analog signal in a recording medium.
7. An error correcting coding method wherein assuming that the
reference position for counting symbols is the most significant
order or the least significant order of the code and that in the
case where a point on an elliptic curve corresponding to the jth
symbol position as counted from the reference position is
P.sup.(j)=(.alpha..sub.j, .beta..sub.j), the values P.sup.(1),
P.sup.(3), P.sup.(5), . . . , P.sup.(2s+1), where s is an integer,
and 2s+1 is n or n-1, are arranged continuously in ascending or
descending lexicographic order of the direct product group G of the
residue class ring of integers isomorphic with the elliptic curve,
and the relation holds that .alpha..sub.2s+1=.alpha..sub.2s+2 for
1.ltoreq.2s+2.ltoreq.n.
Description
BACKGROUND OF THE INVENTION
[0001] The present invention relates to an error correcting coding
method used with the recording/reproducing apparatus.
[0002] The Reed-Solomon code is used for the recording/reproducing
apparatus such as the magnetic disk device, the magneto-optic disk
device and the compact disk device. The magnetic disk device uses
the Reed-Solomon code on the finite field GF(2.sup.8) including
2.sup.8 elements which is a set wherein the four rules of
arithmetic are defined (except for "division by 0") mutually by the
elements, where GF is an abbreviation of Galois Field. The error
correcting coding and the error correcting process for the
recording/reproducing apparatus are performed with eight bits of
the Reed-Solomon code as one symbol providing a unit for
calculation.
[0003] In the Reed-Solomon code, it is known that the code having
the maximum number t of correction symbols can be configured by
setting the number of redundant symbols to 2t. The length of the
sector providing a unit for performing each-recording/reproducing
operation is 512 symbols. In view of the fact that the length of
the Reed-Solomon code that can be configured on GF(2.sup.8) is 255
(=2.sup.8-1) symbols or less, data are divided (interleaved) into
three or more blocks and then an error correcting code is provided
for each block.
[0004] One of the advantages of the Reed-Solomon code is that the
symbol positions for calculation are arranged, from the most
significant place of the code, as .alpha..sup.n-1, .alpha..sup.n-2,
. . . , .alpha..sub.2, .alpha..sup.1, .alpha..sup.0 (.alpha.:
primitive root of finite field), so that the symbol position for
calculation can be regularly calculated by the multiplier alone at
the time of the Chien search for the error position for decoding.
The Chien search is a method for searching for a solution of an
equation by substituting the elements into the equation
sequentially.
SUMMARY OF THE INVENTION
[0005] Consider the case in which the Reed-Solomon code on
GF(2.sup.8) is used for a recording system of 512 symbols per
sector. In view of the fact that the code length is not more than
2.sup.8-1=255 symbols and the relation holds that 512/255>2, the
problem is that the number of interleaves cannot be reduced below
3.
[0006] As long as the maximum number of correction symbols per
sector is constant, the smaller the number of interleaves, the
higher the error correcting ability of the code.
[0007] With the error correcting coding method according to this
invention, an elliptic code on GF(2.sup.m) is used to configure a
code longer than 2.sup.m-1 and therefore the number of interleaves
can be reduced.
[0008] For configuring the code having the maximum number t of
correction symbols by the elliptic code, the number of redundant
symbols is set to 2t+1. The number of redundant symbols for this
code is 287-256=31, and therefore the maximum number of correction
symbols is given as 15 (15.times.2+1=31). The use of this code
makes it possible to configure 512 bytes per sector in two
interleaves. The principle of the error correcting coding method
according to this invention will be explained below.
[0009] Assume that E(C, GF(2.sup.m)) for the elliptic curve C:
y.sup.2+a.sub.1xy+a.sub.3y+a.sub.0x.sup.3+a.sub.2x.sup.2+a.sub.4x+a.sub.6-
=0 on GF(2.sup.m) indicates the following set, .epsilon. is the
number of elements of E(C, GF(2.sup.m)) and a.sub.0, a.sub.1,
a.sub.2, a.sub.3, a.sub.4, a.sub.6 are constants.
E(C, GF(2.sup.m))={(.alpha., .beta.).di-elect
cons.GF(2.sup.m).sup.2.vertl-
ine..beta..sup.2+a.sub.1.alpha..beta.+a.sub.3.beta.+a.sub.0.alpha..sup.3+a-
.sub.2.alpha..sup.2+a.sub.4.alpha.+a.sub.6=0} (1)
.orgate.{o:point at infinity}
[0010] where if the points associated with E(C,
GF(2.sup.m)).backslash.{o} are assigned the numbers P.sup.(1),
P.sup.(2), . . . , P.sup.(.epsilon.-1), the code word of the
elliptic code is defined as a column vector w satisfying Hw=0 for
the matrix H of equation (2). 1 H = ( h i , j ) 1 i n - k 1 j n , h
i , j = v i - 1 ( P ( j ) ) , ( v 0 ( x , y ) = 1 , v 1 ( x , y ) =
x , v 2 ( x , y ) = y , v j + 2 = v 1 ( x , y ) v j ( x , y ) for j
1 ) ( 2 )
[0011] Especially, the code length n coincides with .epsilon.-1.
The elliptic curve C which satisfies the relation n>2.sup.m-1
can be found by total search of the values of the coefficient
a.sub.j.
[0012] With the definition of equation (2), however, the code word
cannot be calculated by other than the method of solving an
equation, and therefore the process is very complicated. The
calculation can be facilitated by regular matrix operation of the
code word by rewriting the equation (2) as follows.
[0013] Specifically, assume that the vector with k symbols arranged
in column before coding is w.sub.0. When H satisfies equation (3),
Gw.sub.0 constitutes a code word for the matrix G of equation (4).
As a matter of fact, the relation is obtained that
H(Gw.sub.0)=M.sup.-1 (MH) (Gw.sub.0)=M.sup.-1((MH)G)w.sub.0=0.
M:square matrix s.t. MH=(H.sub.1.vertline.I) (3)
[0014] 2 G = [ I H 1 ] ( 4 )
[0015] , where I represents an identity matrix. If H.sub.1 can be
calculated from equation (5), the redundant symbol of the
corresponding code word Gw.sub.0 can be calculated from w.sub.0. 3
Gw 0 = [ I H 1 ] w 0 = [ w 0 H 1 w 0 ] ( 5 )
[0016] Equation (6) can be obtained from equation (3). As long as M
is calculated and stored in advance, therefore, H.sub.1 can be
calculated. Thus, the redundant symbol of the code word Gw.sub.0
can also be calculated from w.sub.0. 4 H 1 = ( h i , j * ) 1 i n -
k , 1 j k , h i , j * = v i - 1 ( P ( j ) ) , ( V 0 ( x , y ) V 1 (
x , y ) V n - k - 1 ( x , y ) ) = M ( v 0 ( x , y ) v 1 ( x , y ) v
n - k - 1 ( x , y ) ) ( 6 )
[0017] In order to give the regularity to E(C,
GF(2.sup.m)).backslash.{o}, an arithmetic circuit for realizing the
calculation +.sub.0 as defined in equation (7) is built in and
used. 5 O + o P = P + o O = P for P E ( C , GF ( 2 m ) ) , ( x 1 ,
y 1 ) + o ( x 1 , y 1 + a 1 x 1 + a 3 ) = 0 , ( x 1 , y 1 ) + o ( x
2 , y 2 ) = ( x 3 , y 3 ) ( x 1 x 2 or y 2 y 1 + a 1 x 1 + a 3 ) {
x 3 = 2 + a 1 + a 2 + x 1 + x 2 , y 3 = ( + a 1 ) x 3 | v | - a 3 ,
{ = x 1 2 + a 4 + a 1 y 1 a 1 x 1 + a 3 , v = x 1 3 + a 1 x 1 + a 3
y 1 a 1 x 1 + a 3 ( x 1 = x 2 and y 2 y 1 + a 1 x 1 + a 3 ) { = x 1
3 + a 4 + a 1 y 1 a 1 x 1 + a 3 , v = x 1 3 + a 4 x 1 + a 3 y 1 a 1
x 1 + a 3 ( x 1 x 2 ) ( 7 )
[0018] For the element P of E(C, GF (2.sup.m)) P +.sub.0, . . . ,
+.sub.0P (involving Ps in the number of m) is expressed as
[m]P.
[0019] The recording/reproducing apparatus according to this
invention based on the aforementioned principle is for recording in
a recording medium the interleaved data with an error correcting
code added thereto and reproducing the recorded data from the
recording medium, the apparatus comprising an error correcting
decoding circuit for generating an error correcting code using an
elliptic code on a finite field GF(2.sup.m) (m: positive
integer).
BRIEF DESCRIPTION OF THE DRAWINGS
[0020] FIG. 1 is a block diagram showing a magnetic disk apparatus
using an error correcting coding method according to the present
invention.
[0021] FIG. 2 is a block diagram-showing a magnetic disk apparatus
using an error correcting coding method based on the Reed-Solomon
code.
[0022] FIG. 3 is a block diagram showing a specific example of the
elliptic coding circuit of FIG. 1.
[0023] FIG. 4 is a block diagram showing a first specific example
of configuration of the rational point generator of FIG. 3.
[0024] FIG. 5 is a block diagram showing a second specific example
of configuration of the rational point generator of FIG. 3.
[0025] FIG. 6 is a flowchart showing the flow of the error
detection/correction process of the elliptic decoding circuit of
FIG. 1.
[0026] FIG. 7 is a block diagram showing an example of a syndrome
calculation circuit in the elliptic decoding circuit of FIG. 1.
[0027] FIG. 8 is a flowchart showing the flow of the process in an
error location polynomial calculation circuit in the elliptic
decoding circuit of FIG. 7.
DESCRIPTION OF THE EMBODIMENTS
[0028] FIG. 2 is a schematic diagram showing a magnetic disk device
employing an error correcting coding method based on the
Reed-Solomon code. A sector of input signals 16 is converted to a
sector of binary data by an interface (I/F) 14. A sector of binary
data 13 is applied to a hard disk controller 9, and segmented into
three data blocks by an interleaver (ITLV-3) 11 in the hard disk
controller 9. An error correction code is generated for each
segmented data block by a Reed-Solomon coding circuit (RS-ENC)
6.
[0029] The data block 8 for which the error correcting code is
generated is converted by a signal processing LSI (R/W & SPC)
into an analog signal to be recorded in the magnetic disk 18 by a
magnetic head. The analog signal is sent to a head 17. The signal 1
read from the head 17 is equalized or otherwise subjected to the
signal processing such as Viterbi decoding by the signal processing
LSI 3, and by being discriminated into 0 and 1 levels, converted to
binary data. After conversion, the binary data 7 is applied to the
hard disk controller 9, and an error is detected and corrected for
each decoded block of the symbol length subjected to the error
correcting coding, by the Reed-Solomon decoding circuit (RS-DEC)
5.
[0030] The three code blocks decoded are combined with each other
by a deinterleaver (DITLV-3), so that a sector of binary data is
restored. A sector of the binary data thus restored is converted to
a signal 15 for output by the I/F 14.
[0031] This embodiment employs the Reed-Solomon coding/decoding LSI
circuit having the RS-DEC 5 and the RS-ENC 6 in a single chip. As
an alternative, however, the encoder and the decoder may be mounted
in different chips.
[0032] FIG. 1 shows a magnetic disk device using the error
correcting coding method according to an embodiment of the
invention. In FIG. 1, the same reference numerals as those of FIG.
2 designates component elements having the same functions as the
corresponding component elements in FIG. 2, respectively.
[0033] A sector of input signal 16 having 512 symbols is converted
to a sector of binary data by an interface (I/F) 14 for performing
the analog-to-digital (A/D) conversion. A sector of the binary data
13 is applied to the hard disk controller 9, and segmented into two
data blocks by the interleaver (ITLV-2) 204 included in the hard
disk controller 9. The error correcting coding operation is
performed for each converted and segmented data block by the
elliptic coding circuit 202 providing coding means. The data block
8 thus subjected to the error correcting and coding operation is
converted to an analog signal 2 by the signal processing LSI (R/W
& SPC) 3, and applied to the head 17. The signal thus sent is
recorded in the magnetic disk 18 providing a recording medium.
[0034] The signal 1 read from the magnetic disk 18 by the head 17,
on the other hand, is converted to binary data by the signal
processing LSI 3. After conversion, the binary data 7 is applied to
the disk controller 9, and an error is detected and corrected for
each error corrected/coded code block of the symbol length by the
elliptic decoding circuit 5 included in the disk controller 9. The
two decoded code blocks are coupled by the deinterleaver (DITLV-2)
10 and a sector of binary data is restored. A sector of the binary
data 12 thus restored is converted to the output signal 15 by the
I/F 14.
[0035] In the embodiment shown in FIG. 1, the elliptic coding
circuit 202 and the elliptic decoding circuit 201 may be formed
either on a single IC chip or on different IC chips.
[0036] FIG. 3 is a block diagram specifically showing the elliptic
coding circuit (EL-ENC) 202. An input symbol train b.sup.(1),
b.sup.(2), . . . , b.sup.(256) is input by way of an input terminal
304. A rational point generator 301 outputs a point P.sup.(j) at a
timing when b.sup.(j) is input. With the point P.sup.(j) as an
input, a vector generating circuit 302 outputs a vector v With the
point P.sup.(j) as an input, the matrix calculation circuit 303
outputs the vector V.sup.(j). With the vector V.sup.(j) and symbol
b.sup.(j) as an input, a scalar multiplier 305 outputs
b.sup.(j)V.sup.(j). The output b.sup.(j)V.sup.(j) is added to and
stored in the memory 306 for storing the redundant symbols. At the
same time, b.sup.(j) is passed through a selector 307 freely. After
the processing of 256 symbols, the selector 307 selectively
outputs, in descending order, the contents of the memory 306 in
which the redundant symbols are stored.
[0037] In the case where the input P.sup.(j)=(.alpha..sub.j,
.beta..sub.j, 1), the output of the vector generating circuit 302
is obtained from equation (2) as 1, .alpha..sub.j, .beta..sub.j,
.alpha..sub.j.sup.2, .alpha..sub.j.beta..sub.j, . . . in the
descending order.
[0038] An explanation will be given of an example of preparation
for the parameter calculation in decoding the elliptic code ((n,
k)=(287, 256)) on GF(2.sup.8) taking the systematic coding into
consideration. The code having the maximum number t of correction
symbols can be configured of the elliptic code by setting the
number of redundant symbols to 2t+1. The number of redundant
symbols of this code is 287-256=31, and therefore the maximum
number of correction symbols is 15(15.times.2+1=31). By using this
code, a sector of 512 bytes can be configured in two
interleaves.
[0039] Assume that a is the primitive root of GF(2.sup.8)
satisfying the relation
.alpha..sup.8+.alpha..sup.4+.alpha..sup.3+.alpha..sup.2+1=0, and
that the elliptic code configured of the elliptic curve C.sub.1:
y.sup.2+.alpha..sup.4xy+.alpha..sup.25y+x.sup.3+.alpha..sup.29=0 is
used.
[0040] By checking by total search whether a point on C.sub.1 is
involved or not, it is found that .epsilon.=288 for E(C.sub.1,
GF(2.sup.8)). For realizing the +o arithmetic circuit, assume that
the input/output corresponding to o is (0, 0, 0) and the
input/output for the point (.alpha..sub.0, .beta..sub.0) not o is
(.alpha..sub.0, .beta..sub.0, 1). The contents of calculation of
the +0 arithmetic circuit is configured as (a.sub.1, a.sub.3,
a.sub.0, a.sub.2, a.sub.4, a.sub.6)=(.alpha..sup.4, .alpha..sup.25,
1 , 0, 0, .alpha..sup.29) in equation (7).
[0041] In preparation for numbering the points associated with
E(C.sub.1, GF(2.sup.8)), [1]P, [2]P, [3]P, . . . are sequentially
calculated at each point P of E(C.sub.1, GF(2.sup.8)), and such a
positive integer that gives [m.sub.p]P=0 for the first time is
determined. One point where m.sub.P assumes a maximum value is
selected, and expressed as P*. In a specific example, max
m.sub.P=96, and (.alpha..sup.2, .alpha..sup.68) is an example of
P*. Then, such a P** is searched for that satisfies the relations
m.sub.P**=.epsilon./m.sub.P*=3 and P**.noteq. [96/3]P,
[2.times.96/3]P. In a specific example, (.alpha..sup.60,
.alpha..sup.23) is an example of P**.
[0042] In the process,
{[s]P**+.sub.o[u]P*.vertline.0.ltoreq.s.ltoreq.2,
0.ltoreq.u.ltoreq.95} is calculated and written out, and thus it
can be checked that it coincides with E(C.sub.1, GF(2.sup.8)).
Especially, a point associated with E(C.sub.1, GF(2.sup.8)) can be
numbered in the form of [s]P**+o[u]P* (0.ltoreq.s.ltoreq.2,
0.ltoreq.u.ltoreq.95). [s]P**+.sub.o[u]P* is expressed as
P.sub.s,u, and s and u corresponding to each point on E(C.sub.1,
GF(2.sup.8)) are calculated. In this way, the preparation for
numbering is complete.
[0043] From the definition of s and u, the mass of (s, u) is given
as a direct product group G=Z/3Z.times.Z/96Z of the residue class
ring of integers. Also, the aforementioned numbering operation
indicates that E(C.sub.1, GF(2.sup.8)) is isomorphic with
Z/3Z.times.Z/96Z as a group.
[0044] In the description that follows, the points corresponding to
the 1st, 2nd, . . . , 287th symbols as counted from the symbol
counting reference position are expressed as P.sup.(1), P.sup.(2),
. . . , P.sup.(287), respectively.
[0045] FIG. 4 is a schematic diagram showing a rational point
generator in the case where the points associated with E(C.sub.1,
GF(2.sup.8)) are numbered sequentially as P.sup.(1), P.sup.(2), . .
. , P.sup.(287) in the order indicated in equation (8).
P.sub.2,95, P.sub.2,94, . . . , P.sub.2,1, P.sub.2,0; P.sub.1,95,
P.sub.1,94, . . . ,
P.sub.1,1, P.sub.1,0; P.sub.0,95, P.sub.0,94, . . . , P.sub.0,2,
P.sub.0,1 (8)
[0046] Equation (8) is indicative of the fact that the subscript
(s,u) of P.sub.s,u corresponds to the symbol positions in
lexicographic order. The counter 404 is for counting the period of
descent (descending order) of subscripts from, for example,
P.sub.1,0 to P.sub.0,95.
[0047] FIG. 5 is a schematic diagram showing an example
configuration of the rational point generator in the case where the
points associated with E(C.sub.1, GF(2.sup.8)) are numbered as
P.sup.(1), P.sup.(2), . . . , P.sup.(287) in the order indicated by
equation (9). A part of the reference numerals designate the same
component elements as the corresponding component elements in FIG.
4.
P.sub.1,95, P.sub.2,1; P.sub.1,94, P.sub.2,2; . . . ; P.sub.1,1,
P.sub.2,95;
P.sub.1,0, P.sub.2,0; P.sub.0,95, P.sub.0,1; P.sub.0,94, P.sub.0,2;
. . . ;
P.sub.0,49, P.sub.0,47; P.sub.0,48 (9)
[0048] The arithmetic circuit 502 calculates the difference of
numerical value between the points P.sub.s,u and P.sub.3-s,96-u
separated by semicolon in equation (9). From the manner in which P*
and P** are determined and the expression of P.sub.s,u, the
relation holds that P.sub.s,u+.sub.o P.sub.3-s,96-u+o. From
equation (7), the difference between P.sub.s,u=(.alpha..sub.su,
.beta..sub.su) and P.sub.3-s,96-u is given as (0,
a.sub.1.alpha..sub.su+a.sub.3, 0) in the input/output format of the
+o arithmetic circuit.
[0049] Especially, the expression P.sup.(j)=(.alpha..sub.j,
.beta..sub.j) satisfies the relation
.alpha..sub.2s+1=.alpha..sub.2s+2.
[0050] After preparation of the foregoing process, the matrix M in
the matrix calculation circuit 303, and the initial value of the
memory for storing P.sub.0,95, P.sub.0,95,+.sub.o P.sub.2,0 and the
rational point in the rational point generator 301 indicating the
symbol position are a fixed value, i.e. an encoded parameter, as
far as the numbering of P.sup.(1), P.sup.(2), . . . , P.sup.(287)
is determined. The encoder can be configured by preparing, by
calculation with a calculator or the like, the matrix M from
equations (3), (4) on the one hand and the initial value of the
memory for storing P.sub.0,95, P.sub.0,95+.sub.o P.sub.2,0 and the
rational point from equation (7) (taking note of the fact that the
relation P.sub.0,1=P*, P.sub.1,0=P** holds from the manner in which
P* and P** are determined and the expression of P.sub.s,u).
[0051] Now, an explanation will be given of an example of error
detection and correction with utilizing an elliptic code. FIG. 6
shows the flow of the process for error detection and correction of
the elliptic code. An error syndrome s.sub.0, s.sub.1, s.sub.2, . .
. , s.sub.n-k-1 is calculated by a syndrome calculation circuit 601
for calculating the syndrome providing such a mass of check sums as
to assume zero in the absence of an error from the input. Then, the
error location polynomials f.sub.1 (P), f.sub.2 (P) are calculated
by the error location polynomial calculation circuit 602 from the
error syndrome. The error is located by the Chien search thereby to
determine the magnitude of the error at the error location. This
process corresponds to steps 603 to 609.
[0052] FIG. 7 is a schematic diagram showing the syndrome
calculation circuit 601. An input symbol train z.sup.(1),
z.sup.(2), . . . , z.sup.(287) is input from an input terminal 304.
The rational point generator 301 outputs a point P.sup.(j) at the
timing of input of z.sup.(j). With the point P.sup.(j) as an input,
the vector generating circuit 302 outputs a vector v.sup.(j). With
the vector v.sup.(j) and the symbol z.sup.(j) as an input, the
scalar multiplier 704 outputs z.sup.(j)v.sup.(j), which is then
added to and stored in the memory 705 for storing the syndrome.
After complete processing for 256 symbols, the result is output as
an error syndrome s.sub.0, s.sub.1, s.sub.2, . . . ,
s.sub.n-k-1.
[0053] FIG. 8 shows the flow of the process in the error location
polynomial calculation circuit 602. This diagram shows an example
of application to the elliptic code of the process called the
Barlekamp-Massey-Sakata algorithm (see S. Sakata, "Algebraic
Geometrical Codes and the Method of Decoding Thereof", Mathematical
Science, No. 421, pp. 33-40, No. 422, pp. 58-65, 1998; and S.
Sakata, "A Vector Version of the BMS Algorithm for Implementing
Fast Erasure-and-Error Decoding of One-Point AG codes", Proc.
AAECC-12, Springer Verlag, pp. 292-310, 1997).
[0054] The calculation 606 of the error value e.sup.(j) in FIG. 6
is carried out according to equation (10). 6 a = 0 2 8 - 2 b = 0 2
8 - 2 S ab x ( P ( j ) ) - a y ( P ( j ) ) - b ( 10 )
[0055] The foregoing description refers to a magnetic disk device
as an example. Nevertheless, the present invention is of course
applicable also to the recording and reproduction of data in a
recording medium of other types as well as the magnetic disk
device.
[0056] According to this invention, the use of the elliptic code
makes it possible to reduce the number of redundant bits as
compared with the Reed-Solomon code. Specifically, assuming that m
is a positive integer and an even number of more than 3, a code
having the length of 2.sup.m+2.sup.1+m/2 in maximum can be
configured by the error correction and coding using the elliptic
code on a finite field GF(2.sup.m). By use of-the code having this
length, a sector of 512 bytes can be configured in two
interleaves.
[0057] In the magnetic disk device, the number of redundant bits
can be reduced as compared with the Reed-Solomon code in which a
sector of 512 bytes can be configured in two interleaves. Assume,
for example, that the error correcting coding operation can be
performed in such a manner as to correct the random error of 15
symbols in maximum. Then, the following result of comparison is
obtained.
[0058] In the case of the Reed-Solomon code, the field on
GF(2.sup.8) cannot be used but GF(2.sup.9) or larger field is
required due to the limit of the code length. The maximum number t
of corrected symbols is 15, and therefore in the case of the code
on GF(2.sup.9), 30 (=15.times.2) redundant symbols of 9 bits are
added. Thus, a total of 270 (=30.times.9) redundant bits are
added.
[0059] In the case of the elliptic code, on the other hand, the
code on GF(2.sup.8) can be used. In this case, the maximum number t
of corrected symbols is 15, and therefore in the case of the code
on GF(2.sup.8), 31 (=15.times.2+1) redundant symbols of 8 bits are
added. Thus, a total of 248 (=31.times.8) redundant bits are added.
As a result, it is seen that the number of redundant bits of the
elliptic code can surely be reduced as compared with the
Reed-Solomon code.
* * * * *