U.S. patent application number 10/631404 was filed with the patent office on 2004-08-05 for magnetic shielding for magnetic random access memory.
Invention is credited to Stobbs, Colin A..
Application Number | 20040150091 10/631404 |
Document ID | / |
Family ID | 31888101 |
Filed Date | 2004-08-05 |
United States Patent
Application |
20040150091 |
Kind Code |
A1 |
Stobbs, Colin A. |
August 5, 2004 |
Magnetic shielding for magnetic random access memory
Abstract
A memory assembly comprises a substrate that incorporates
magnetic shielding, a magnetic random access memory die supported
by the substrate, and an encapsulation matrix that includes
magnetic shielding that is disposed over the magnetic random access
memory die.
Inventors: |
Stobbs, Colin A.; (Eagle,
ID) |
Correspondence
Address: |
HEWLETT-PACKARD COMPANY
Intellectual Property Administration
P.O. Box 272400
Fort Collins
CO
80527-2400
US
|
Family ID: |
31888101 |
Appl. No.: |
10/631404 |
Filed: |
July 30, 2003 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10631404 |
Jul 30, 2003 |
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10358770 |
Feb 5, 2003 |
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Current U.S.
Class: |
257/687 ;
257/E23.069; 257/E23.114 |
Current CPC
Class: |
H01L 2224/48471
20130101; H01L 2224/45099 20130101; G11C 11/16 20130101; H01L
2224/32225 20130101; H01L 2924/14 20130101; H01L 23/552 20130101;
H01L 2924/00014 20130101; H01L 2224/85399 20130101; H01L 2924/01057
20130101; H01L 23/49816 20130101; H01L 2924/15311 20130101; H01L
2224/16227 20130101; G11C 7/24 20130101; H01L 2924/3025 20130101;
H01L 2924/01025 20130101; H01L 2224/05599 20130101; B82Y 10/00
20130101; H01L 2224/73265 20130101; H01L 2924/181 20130101; G11C
7/02 20130101; H01L 2924/15192 20130101; H01L 24/48 20130101; H01L
2224/48227 20130101; H01L 2924/181 20130101; H01L 2924/00012
20130101; H01L 2224/85399 20130101; H01L 2924/00014 20130101; H01L
2224/05599 20130101; H01L 2924/00014 20130101; H01L 2924/00014
20130101; H01L 2224/45099 20130101; H01L 2924/00014 20130101; H01L
2224/45015 20130101; H01L 2924/207 20130101; H01L 2224/73265
20130101; H01L 2224/32225 20130101; H01L 2224/48227 20130101; H01L
2924/00012 20130101; H01L 2924/15311 20130101; H01L 2224/73265
20130101; H01L 2224/32225 20130101; H01L 2224/48227 20130101; H01L
2924/00 20130101 |
Class at
Publication: |
257/687 |
International
Class: |
H01L 021/00; H01L
023/24; H01L 023/22 |
Claims
What is claimed is:
1. A memory assembly, comprising: a substrate having magnetic
shielding; a magnetic random access memory die supported by the
substrate; and an encapsulation matrix having magnetic shielding
and being disposed over the magnetic random access memory die.
2. The memory assembly of claim 1, wherein the encapsulation matrix
at least substantially encloses the magnetic random access memory
die.
3. The memory assembly of claim 1, wherein the substrate
incorporates an internal layer of magnetic shielding.
4. The memory assembly of claim 1, wherein the encapsulation matrix
comprises magnetic shielding particles embedded within the
encapsulation matrix.
5. The memory assembly of claim 1, wherein the substrate comprises
a circuit structure.
6. The memory assembly of claim 5, wherein the encapsulation matrix
is disposed over a plurality of magnetic random access memory
dies.
7. The memory assembly of claim 1, wherein the magnetic random
access memory die is directly electrically connected to the
substrate using a flip-chip configuration.
8. The memory assembly of claim 1, wherein the magnetic random
access memory die comprises input/outputs that are electrically
connected to the substrate via one or more wire interbonds.
9. The memory assembly of claim 1, wherein the memory assembly is
configured for electrical connection to an additional
substrate.
10. The memory assembly of claim 9, wherein the electrical
connection to the additional substrate occurs via a plurality of
solder connections.
11. An electronic device, comprising: a magnetic memory assembly
that comprises a substrate; a magnetic random access memory die
supported by the substrate; and an encapsulation matrix disposed
over the magnetic random access memory die and supported by the
substrate; wherein both the substrate and the encapsulation matrix
incorporate magnetic shielding.
12. The electronic device of claim 11, wherein the magnetic memory
assembly comprises a removable package.
13. The electronic device of claim 12, wherein the removable
package comprises a memory card.
14. A method of manufacturing a magnetic random access memory
assembly, the method comprising: providing a substrate that
incorporates magnetic shielding; attaching a magnetic memory die to
the substrate; and applying a magnetically shielding material onto
the magnetic random access memory die.
15. The method of claim 14, wherein providing the substrate
comprises internally incorporating the magnetic shielding in the
substrate.
16. The method of claim 14, wherein applying the magnetically
shielding material comprises at least substantially enclosing the
magnetic random access memory die in the material.
17. The method of claim 14, wherein applying the material comprises
injection molding the material onto the magnetic random access
memory die.
18. The method of claim 14, wherein applying the material comprises
applying the material directly onto the magnetic random access
memory die as a liquid or semi-liquid.
19. The method of claim 18, further comprising curing the
material.
20. A memory, comprising means for storing magnetic random access
memory; means for supporting a magnetic random access memory means;
means for encapsulating the magnetic random access memory means;
magnetic shielding means disposed in the supporting means; and
magnetic shielding means disposed in the encapsulating means.
Description
[0001] This application is a continuation-in-part of U.S. patent
application Ser. No. 10/358,770, filed Feb. 5, 2003 of Andrew M.
Spencer, Connie Lemus and Colin Stobbs entitled MAGNETIC SHIELDING
FOR MAGNETIC RANDOM ACCESS MEMORY CARD, hereby incorporated by
reference.
BACKGROUND
[0002] There is an increasing need to make portable electronic
devices smaller, more durable, and more powerful. A variety of
electronic memory systems may be used in such devices, including
hard drives, electronic memory, and magnetic memory. Conventional
hard drives offer high memory capacity, but they are slow,
unreliable and power-hungry when compared to silicon-based memory
assemblies. Electronic memory assemblies, such as static random
access memory chips (SRAM) and dynamic random access memory chips
(DRAM), are faster and typically smaller, but the contents of the
electronic memory are lost when power to the memory is
interrupted.
[0003] Magnetic random access memory (or MRAM), uses magnetic,
rather than electronic, charges to store bits of data. The use of
MRAM chips typically improves the performance of electronic devices
by permitting the storage of more information, permitting faster
access to stored information, and using lower power consumption
than is possible using electronic memory. In addition, MRAM chips
retain information when power to the memory is turned off, meaning
electronic devices incorporating MRAM chips, such as personal
digital assistants, may start up instantly, rather than requiring
initialization while software loads to electronic memory.
[0004] A typical magnetic memory chip, or die, includes an array of
memory cells. The memory cell array may include a layer of magnetic
film in which the magnetization is alterable and a layer of
magnetic film in which the magnetization is fixed or "pinned" in a
particular direction. The magnetic film having alterable
magnetization optionally is referred to as a data storage layer or
sense layer, and the magnetic film that is pinned optionally is
referred to as a reference layer.
[0005] Conductive traces (commonly referred to as word lines and
bit lines) are typically routed across the array of memory cells.
Word lines extend along rows of memory cells, and bit lines extend
along columns of memory cells. Because the word lines and bit lines
operate in combination to switch the orientation of magnetization
of the selected memory cell (i.e., to write the memory cell), the
word lines and bit lines optionally are referred to collectively as
write lines. Additionally, the write lines optionally are used to
read the logic values stored in the memory cell.
[0006] Located at each intersection of a word line and a bit line
is a memory cell. Each memory cell stores a bit of information as
an orientation of a magnetization. The orientation of magnetization
of each memory cell will assume one of two stable orientations at
any given time. These two stable orientations represent logic
values of "1" and "0".
[0007] The orientation of magnetization of a selected memory cell
may be changed by the application of an external magnetic field.
Supplying electrical current to a word line and a bit line that
intersect at the selected memory cell creates the external magnetic
field. The electrical currents in the word and bit lines create
magnetic fields (also referred to as "write fields") surrounding
the energized word and bit lines that, when combined, can switch
the orientation of magnetization (and thus the logic value) of the
selected memory cell.
[0008] Generally, only the selected magnetic memory cell is
subjected to both the word and bit line write fields. Other memory
cells coupled to the particular word line generally receive only
the word line write field. The magnitudes of the word and bit line
write fields are usually selected to be sufficiently high that the
chosen magnetic memory cell will switch its logic state only when
subjected to both fields, and low enough so that the other magnetic
memory cells that are subject only to a single write field (from
either the word line or the bit line) are not switched. The
undesirable switching of a magnetic memory cell that receives only
one write field is commonly referred to as "half-select"
switching.
[0009] MRAM devices may be subject to error in the presence of
stray or externally applied magnetic fields from sources other than
the applied write fields. Such stray magnetic fields can originate
from a multitude of sources, e.g. external electronic devices such
as computers, displays, bar code readers, etc. Such magnetic fields
may have a magnitude sufficient to switch the logic state of one or
more memory cells in the memory cell array, even in the complete
absence of a write field. The use of MRAM devices in environments
that are rich in stray magnetic fields has previously been limited,
due to the unacceptable levels of memory error that may result.
[0010] Memory problems arising from stray magnetic fields may be
compounded as memory cell arrays become smaller, and memory cells
are more densely packed into the array. Each individual memory cell
becomes subjected to greater influence by the magnetic fields of
adjacent memory cells and their associated write conductors,
increasing the possibility that a stray magnetic field may cause
the total magnetic field of an individual memory cell to be
changed. It would therefore be advantageous to minimize the effects
of stray magnetic fields, particularly where newer die attachment
methods may permit MRAM dies to be positioned in close proximity,
limiting the space available in the memory assembly for magnetic
shielding.
SUMMARY
[0011] A memory assembly comprises a substrate having magnetic
shielding, a magnetic random access memory die supported by the
substrate, and an encapsulation matrix having magnetic shielding
and being disposed over the magnetic random access memory die.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] FIG. 1 illustrates an electronic device within an external
magnetic field.
[0013] FIG. 2 is a semi-schematic cross-sectional view of a memory
assembly according to an embodiment of the invention.
[0014] FIG. 3 is a semi-schematic cross-sectional view of a memory
assembly, according to an alternative embodiment of the
invention.
[0015] FIG. 4 is a semi-schematic cross-sectional view of a memory
assembly, according to yet another alternative embodiment of the
invention.
[0016] FIG. 5 is a perspective, cut-away view of a memory assembly
that includes multiple memory dies with individual encapsulation
matrices.
[0017] FIG. 6 is a perspective, cut-away view of a memory assembly
that includes multiple memory dies under a collective encapsulation
matrix.
[0018] FIG. 7 is a flowchart depicting a method of making a memory
assembly, according to an embodiment of the invention.
DETAILED DESCRIPTION
[0019] FIG. 1 includes an electronic device 9 that includes
magnetic memory, in the presence of an externally applied magnetic
field, as represented by magnet 10, and magnetic field flux lines
11. As the magnetic field of magnet 10 penetrates and passes
through device 9, the magnetization states of the memory cells
incorporated in device 9 may be inadvertently switched, resulting
in memory error and compromising the function of the device.
Although electronic device 9 is depicted as a personal digital
assistant (PDA), any electronic device that utilizes magnetic
memory may be similarly susceptible to memory error in the presence
of an externally applied magnetic field. Electronic device 9 may
include one or more magnetic memory assemblies that incorporate
magnetic shielding and that are therefore at least partially
shielded from the effects of stray magnetic fields, as discussed
below.
[0020] FIG. 2 is a schematic depiction of a memory assembly 12.
Memory assembly 12 may include one or more MRAM dies 13 mounted on
a substrate 14. MRAM die 13 may be directly attached to substrate
14 using an adhesive 16, such as an epoxy adhesive, for example.
The input/outputs of the MRAM die may be electrically connected to
one or more circuit pathways 18 printed or otherwise incorporated
on or in the substrate, such as by interconnections 20. These
interconnections may include wire-bonding between the die
input/outputs and circuit pathways 18. MRAM die 13 may be further
secured to substrate 14 by an encapsulation matrix 22 that at least
substantially encloses the die.
[0021] Encapsulation matrix 22 may entirely cover the upper surface
of the die, and typically at least partially covers and encloses
the sides of the die as well. Where encapsulation matrix 22
substantially encloses the die, the encapsulation matrix may
enhance the security of the attachment of the die to the substrate,
by further fixing the die in place. Alternatively, or in addition,
the encapsulation matrix may also protect the die from
environmental effects, such as moisture, abrasion, and impact.
[0022] The encapsulation matrix typically comprises an electrically
nonconductive compound such as, for example, epoxy resin or
silicone. The encapsulation matrix may be applied to the die using
suitable manufacturing techniques. For example, the encapsulation
matrix may be applied via injection molding the matrix in place
around the die. Alternatively, the encapsulation matrix may be
applied to the die and substrate by an injection molding process,
or the matrix material may be applied die directly onto the surface
of the die. Further yet, the encapsulation matrix may be
prefabricated and then sealed around the die. Typically the
encapsulation matrix is applied as a liquid or semi-liquid that
then cools or cures until solid. Encapsulation matrix 22 may also
incorporate magnetic shielding material to protect the die from
external magnetic fields.
[0023] Substrate 14 may be a printed circuit board or other
substrate suitable for the interconnection of desired electronic
components. Substrate 14 may include printed circuit pathways
and/or electronic components on surface 23 of the substrate, on
opposing surface 24 of the substrate, or both surfaces. The
substrate may optionally include electrical connections between
surfaces 23 and 24. Substrate 14 may include a plurality of
discrete layers. For example, the substrate may have at least one
internal layer that includes a thin film of magnetic shielding
material 25. The thin layer of shielding material 25 may be formed
during manufacture of the substrate, for example, by inclusion of a
film of magnetic shielding material or by spraying or sputtering
the material onto one of the circuit board's internal layers during
manufacture of the printed circuit board.
[0024] Alternatively, or in addition to incorporating magnetic
shielding as an internal layer of the substrate, magnetic shielding
material may be sprayed or sputtered onto surface 24 of substrate
14 opposite surface 23 attached to MRAM die 12, surface 24 of the
substrate may thereby therefore become unavailable for attaching
additional electronic components. As electronic devices become more
compact, the ability to utilize both sides of a substrate, such as
a printed circuit board, for attachment of electronic components
may become increasingly important. By incorporating the magnetic
shielding within the substrate as an internal layer, both the upper
and lower surfaces of the substrate remain available for electronic
component attachment.
[0025] The magnetic shielding incorporated into memory assembly 12
may be distributed within the encapsulation matrix 22 or may be
formed as a thin substrate layer 25, or both. The magnetic
shielding material itself may be selected from a number of
appropriate shielding materials, provided that the selected
magnetic shielding material is capable of at least partially
protecting the MRAM die from the effect of an external magnetic
field.
[0026] The magnetic shielding present in the encapsulation matrix
may include magnetic particles, threads or other structures or
forms (collectively herein, "particles") that are incorporated into
the encapsulation matrix before the matrix is applied to the MRAM
die. Such particles are formed of any of a variety of materials,
examples include but are not limited to iron, nickel, iron-nickel
alloy, iron-nickel-molybdenum alloy, and other materials. Other
types of magnetic shielding may include electrically non-conductive
materials, examples include but are not limited to non-conductive
magnetic oxides such as the ferrites MnFe.sub.2O.sub.4,
FeFe.sub.2O.sub.4, CoFe.sub.2O.sub.4, NiFe.sub.2O.sub.4,
CuFe.sub.2O.sub.4, or MgFe.sub.2O.sub.4, cobaltites, chromites,
manganites and other materials. Various commercially available
shielding materials also are contemplated for use, examples include
but are not limited to ferromagnetic shielding materials generally,
specific shielding materials sold under the trademarks MUMETAL,
PERMALLOY, and others. Both conductive and non-conductive shielding
materials are contemplated, depending, for example, on proximity to
integrated circuit packages or other electronics in the finished
memory assembly. The specific materials and forms of application
are chosen according to the properties of the specific MRAM die
that is subject to encapsulation.
[0027] Similarly, the magnetic shielding material present within
the substrate may include any of the materials discussed above. In
one exemplary embodiment, the selected material is compatible with
incorporation in the substrate as a thin layer, either by inclusion
of a thin film, or by deposition onto an internal layer during
manufacture.
[0028] The magnetic shielding material incorporated into the
substrate and encapsulation matrix, respectively, may be selected
so as to at least substantially shield the magnetic random access
memory die from an externally applied magnetic field. Preferably,
the encapsulation matrix provides shielding on the sides of the
memory die, as well as along the top of the die, so that even
magnetic flux lines that impinge upon the die substantially
parallel to the planes of the substrate and the die may be
prevented from altering the magnetic state of the MRAM die.
[0029] The shielded memory assembly described above may be
incorporated into chip carrier package. Such carrier packages may
facilitate the attachment of an MRAM die to a substrate. As shown
in FIG. 3, a memory assembly 26 may include one or more MRAM dies
28 mounted on a substrate 30 that incorporates magnetic shielding
32. As discussed above for memory assembly 12, the MRAM die may be
directly attached to the substrate using an adhesive, while the die
is electrically connected to circuitry 34 by interconnections 36.
The MRAM die 28 may also be secured to the substrate by an
encapsulation matrix 37 that includes magnetic shielding.
[0030] However, in the case of memory assembly 26, circuitry 34 is
in electronic communication with one or more carrier
interconnections 38 located on the underside of substrate 30, so
that the entire carrier package may be readily attached to a second
substrate 40, such as a printed circuit board. Where the carrier
interconnections 38 include one or more conductive solder balls,
the resulting chip carrier package is referred to as a ball grid
array package. Incorporation of memory assembly 26 in a ball grid
array package may facilitate connections to printed circuit boards,
as ball grid array packages typically provide higher pin counts in
smaller areas, provide robust electrical connections via the solder
balls of the package, and may be integrated into existing
manufacturing processes.
[0031] Alternatively, the shielded memory assembly may be
incorporated in a chip carrier package as shown in FIG. 4. Memory
assembly 42 of FIG. 4 may include one or more MRAM dies 44 that
have been inverted, or flipped, such that the input/outputs of the
die are directly electrically connected to substrate 46, otherwise
known as a `flip-chip` configuration. The resulting chip carrier
may be referred to as a flip-chip carrier package. Substrate 46 may
incorporate an internal layer of magnetic shielding 48, as
described above. In addition to the electrical connections 50
between die 44 and substrate 46, the die may be additionally
secured by an encapsulation matrix 52 that may include magnetic
shielding. Electrical connections 50 may include solder balls, or
they may include micro-vias, for example, such as may be
manufactured by the formation of metal pillars on substrate 46,
followed by application of a dielectric coating, and polishing to
expose the top surfaces of the pillars. Similar to the ball grid
array package of FIG. 2, the flip-chip package may be electrically
attached to a substrate 54 via one or more electrical connections
56, which may include solder balls or other suitable conductive
contact. Substrate 46 may include a plurality of electrical
connections between selected input/outputs 50 and corresponding
connections 56 (not shown). These connections may include
conducting vias within the substrate, or another suitable
electrical connection structure.
[0032] As shown in FIG. 5, a given memory assembly 60 may include a
plurality of dies 62, each attached to a substrate 63 and at least
partially encapsulated within individual encapsulation matrices 64.
Each die may be electrically connected to a printed circuit
structure 65 on the substrate. Alternatively, as shown for memory
assembly 66 of FIG. 6, a plurality of dies 68 may be connected to a
substrate 69, electrically connected to a printed circuit structure
70, and at least partially encapsulated within a collective
encapsulation matrix 71.
[0033] The memory assembly described herein may be incorporated in
an electronic device, as discussed above. Alternatively, or in
addition, the memory assembly described herein may be incorporated
in a removable package, such as a magnetic memory card that may be
inserted or removed from an electronic device. As the memory
assemblies described herein include magnetic shielding incorporated
within the die substrate and encapsulation matrix, the shielding is
less prone to damage by impact or abrasion, such as during removal
and insertion of such a removable package.
[0034] A shielded magnetic memory assembly as described herein may
be manufactured according to the method set out in flowchart 72 of
FIG. 7. The illustrated method comprises providing a substrate that
incorporates magnetic shielding at 74, connecting a magnetic memory
die to the substrate at 76, and applying a magnetically shielding
encapsulation matrix to the magnetic random access memory die so
that it is supported by the substrate at 78. The die may be
attached to the substrate by an appropriate adhesive, and/or by
wire-bonding, soldering, or another appropriate electrical and/or
mechanical connection.
[0035] While various alternative embodiments and arrangements of a
magnetic memory assembly have been shown and described above, it
will be appreciated by those of skill in the art that numerous
other embodiments, arrangements, and modifications are possible and
are within the scope of the attached claims. In other words, those
skilled in the art will understand that many variations may be made
therein without departing from the spirit and scope of the
invention as defined in the following claims. The present
description should be understood to include all novel and
non-obvious combinations of elements described herein, and claims
may be presented in this or a later application to any novel and
non-obvious combination of these elements. The foregoing
embodiments are illustrative, and no single feature or element is
essential to all possible combinations that may be claimed in this
or a later application. Where the claims recite "a" or "a first"
element or the equivalent thereof, such claims should be understood
to include incorporation of one or more such elements, neither
requiring, nor excluding two or more such elements.
* * * * *