U.S. patent application number 10/327473 was filed with the patent office on 2004-06-24 for dc offset canceling circuit applied in a variable gain amplifier.
Invention is credited to Lai, Sheng-Yeh, Shen, Wei-Chen.
Application Number | 20040119531 10/327473 |
Document ID | / |
Family ID | 32393142 |
Filed Date | 2004-06-24 |
United States Patent
Application |
20040119531 |
Kind Code |
A1 |
Shen, Wei-Chen ; et
al. |
June 24, 2004 |
DC OFFSET CANCELING CIRCUIT APPLIED IN A VARIABLE GAIN
AMPLIFIER
Abstract
A DC offset canceling circuit. The DC offset canceling circuit
applied in a variable gain amplifier includes chopper circuits, a
transconductance amplifier, and at least one internal capacitor.
The transconductance amplifier and at least one capacitor function
as a filter for canceling DC offset of the variable gain amplifier.
A first chopper circuit is inserted between the output of the
variable gain amplifier and the input of the transconductance
amplifier. A second chopper circuit is inserted between the output
of the transconductance amplifier and the capacitor. The DC offset
and low frequency noise of the transconductance amplifier, the
undesired signal, is translated up to a chopping frequency by
chopper circuits. The chopping frequency is much higher than the
desired signal bandwidth, and the amount of the undesired signal in
the passband of the signal is thereby greatly reduced.
Inventors: |
Shen, Wei-Chen; (Hsinchu,
TW) ; Lai, Sheng-Yeh; (Taichung, TW) |
Correspondence
Address: |
BIRCH STEWART KOLASCH & BIRCH
PO BOX 747
FALLS CHURCH
VA
22040-0747
US
|
Family ID: |
32393142 |
Appl. No.: |
10/327473 |
Filed: |
December 24, 2002 |
Current U.S.
Class: |
330/9 |
Current CPC
Class: |
H03G 1/0088 20130101;
H03F 3/387 20130101; H03F 2200/168 20130101; H03F 3/45977 20130101;
H03F 2203/45212 20130101 |
Class at
Publication: |
330/009 |
International
Class: |
H03F 001/02 |
Claims
What is claimed is:
1. A DC offset canceling circuit applied in a variable gain
amplifier, comprising: a first chopper circuit having an input
coupled to an output of the variable gain amplifier; a
transconductance amplifier having an input coupled to an output of
the first chopper circuit for transforming an input voltage to an
output with a current based on a ratio; a second chopper circuit
having an input coupled to the output of the transconductance
amplifier; at least one internal capacitor coupled to an output of
the second chopper circuit for generating a low-pass filtering
function by working together with the transconductance amplifier;
and an auxiliary differential pair at the input of the variable
gain amplifier and coupled to the output of the transconductance
amplifier.
2. A DC offset canceling circuit applied in a variable gain
amplifier as claimed in claim 1, wherein the first chopper circuit
is merged into the input of the transconductance amplifier.
3. A DC offset canceling circuit applied in a variable gain
amplifier as claimed in claim 1, wherein the second chopper circuit
is merged into the output of the transconductance amplifier.
4. A DC offset canceling circuit applied in a variable gain
amplifier as claimed in claim 1, wherein the first chopper circuit
is merged into the input of the transconductance amplifier and the
second chopper circuit is merged into the output of the
transconductance amplifier.
5. A DC offset canceling circuit applied in a variable gain
amplifier having a final-stage amplifier and an auxiliary
differential input pair coupled to an output of the variable gain
amplifier, comprising: a first chopper circuit having an input
coupled to the variable gain amplifier and an output coupled to an
input of the final-stage amplifier; a second chopper circuit having
an input coupled to the output of the final-stage amplifier and an
output coupled to the output of the variable gain amplifier.
6. A DC offset canceling circuit as claimed in claim 5, wherein the
first chopper circuit is merged into the input of the final-stage
amplifier.
7. A DC offset canceling circuit as claimed in claim 5, wherein the
second chopper circuit is merged into the output of the final-stage
amplifier.
8. A DC offset canceling circuit as claimed in claim 5, wherein the
first chopper circuit is merged into the input of the final-stage
amplifier and the second chopper circuit is merged into the output
of the final-stage amplifier.
9. A DC offset canceling circuit as claimed in claim 5 further
comprising at least one internal capacitor coupled to the output of
the second chopper circuit for generating a low-pass filtering
function by working together with the final-stage amplifier.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a DC offset canceling
circuit applied in a variable gain amplifier, and particularly to a
DC offset canceling circuit which utilizes a chopper stabilization
method to cancel DC offset of output stage.
[0003] 2. Description of the Related Art
[0004] Variable gain amplifiers (VGA), which amplify input signal
to necessary voltage levels in a system in demodulation process,
are widely used in home network transceivers which transmit signals
via cable. When the variable gain amplifier is used, a differential
input end of an internal operational amplifier has the problem of
intrinsic offset, and the intrinsic offset is always in the range
of several mV to tens of mV. For wireless or wired communication,
the maximum gain of variable gain amplification is up to tens of
dB; therefore, the intrinsic offset after amplification will affect
the recovery ability of the received signal, the characteristics of
parameters of a dynamic range, and signal-to-noise ratio.
[0005] A DC offset canceling circuit is shown in FIG. 1, disclosed
by Yao et al., in "DC offset canceling circuit applied in a
variable gain amplifier" U.S. Pat. No. 6,407,630 B1. In FIG. 1, a
DC offset circuit 26 applied in a variable gain amplifier 25. The
variable gain amplifier 25 includes a first amplifier 21, a second
amplifier 22, a plurality of switches 201.about.208, and a
plurality of resistors. The DC offset canceling circuit 26 includes
a transconductance amplifier 23 and at least one internal capacitor
24. The switches 201.about.204 adjust the variable gain of the
first amplifier 21. For example, if the switch 201 is closed, the
gain is raised; and if the switch 202 is closed, the gain is
reduced. The switches 205.about.208 adjust the variable gain of the
first amplifier 22. For example, if the switch 205 is closed, the
gain is raised; and if the switch 207 is closed, the gain is
reduced. The transconductance amplifier 23 is used to transform the
output voltage of the second amplifier 22 to an output current
based on a ratio.
[0006] The output of the transconductance amplifier 23 is coupled
to at least one internal capacitor 24, and is then fed back to the
input of the first amplifier 21 to cancel the DC offset of the
variable gain amplifier 25. The transconductance amplifier 23
cooperates with the internal capacitor 24, only about 10 pF or even
under 10 pF, as a Gm-C filter. Since the capacitance of the
internal capacitor 24 is small, the internal capacitor 24 can be
manufactured easily inside an IC, and does not occupy I/O pin.
[0007] The DC offset of the first amplifier 21 and the second
amplifier 22 is canceled by the transconductance amplifier 23 and
capacitor 24, the Gm-C filter, but the DC offset of the
transconductance amplifier 23 is not. There is a need for a novel
canceling circuit to cancel the DC offset of the final stage.
[0008] According to the prior art, an extremely large chip area is
required for implementing the transconductance amplifier so as to
reduce the DC offset. However, the DC offset can be reduced by a
chopper to saving the chip area according to the present invention
described as follows.
SUMMARY OF THE INVENTION
[0009] It is therefore an object of the present invention to
provide a DC offset canceling circuit of a variable gain
amplifier.
[0010] To achieve the above objects, the present invention provides
a DC offset canceling circuit including a transconductance
amplifier, at least one internal capacitor, and chopper
circuits.
[0011] A first chopper circuit 30 is inserted between the output of
the variable gain amplifier and the input of the transconductance
amplifier. A second chopper circuit is inserted between the output
of the transconductance amplifier and the capacitor. The first
chopper circuit and the second chopper circuit are controlled by a
non-overlap clock signal having a chopping frequency. The first
chopper circuit can be merged into the input of transconductance
amplifier. The second chopper circuit can be merged into the output
of transconductance amplifier.
[0012] The DC offset and low frequency noise of the
transconductance amplifier, the undesired signal, is translated up
to the chopping frequency. The spectrum of the undesired signal is
folded back around the chopping frequency. The chopping frequency
is much higher than the desired signal bandwidth, thus the size of
the undesired signal in the passband of the signal is greatly
reduced.
[0013] Being chopper-stabilized, the transconductance amplifier and
capacitor serve the same function, canceling the DC offset of the
variable gain amplifier. The chopper circuit cancels the DC offset
of the transconductance amplifier.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The aforementioned objects, features and advantages of this
invention will become apparent by referring to the following
detailed description of the preferred embodiment with reference to
the accompanying drawings, wherein:
[0015] FIG. 1 shows a DC offset canceling circuit in the prior
art.
[0016] FIG. 2 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the first embodiment.
[0017] FIG. 3 is a block diagram of the chopper circuit applied in
the variable gain amplifier.
[0018] FIG. 4A.about.4D show the spectra of the desired and
undesired signals.
[0019] FIG. 5A is a schematic of the chopper circuit applied in the
present invention.
[0020] FIG. 5B is a schematic of the transconductance amplifier
applied in the present invention.
[0021] FIGS. 6A.about.6B shows the operation of the chopper
circuits.
[0022] FIG. 7 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the second
embodiment.
[0023] FIG. 8 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the third embodiment.
[0024] FIG. 9 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the fourth
embodiment.
DETAILED DESCRIPTION OF THE INVENTION
[0025] FIG. 2 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the first embodiment. The
first chopper circuit 30 is inserted between the second amplifier
22 and the transconductance amplifier 23. The second chopper
circuit 35 is inserted between the transconductance amplifier 23
and capacitor 24.
[0026] FIG. 3 is a block diagram of the chopper circuit applied in
the variable gain amplifier. The chopper circuit 30 and 35 are
controlled by non-overlap clock signals CK and CKB. The undesired
signal Vu represents the DC offset or the low frequency noise of
the transconductance amplifier 23. The signal Vu' is an undesired
signal modulated by the chopper circuit 35. FIGS. 4A.about.4D show
the spectra of the desired and undesired signals. The desired
signal Vin comes from the second amplifier 22. After the first
chopper circuit 30, the desired signal Vin is shifted up to the
signal Vin', at the clock frequency fc and the harmonic frequencies
of the clock while the undesired signal Vu is unaffected. After the
second chopper circuit 35, the signal Vin' is shifted back to the
signal Vin" in the original band and the undesired signal Vu is
shifted up to the undesired Vu', at the clock frequency fc and the
harmonic frequencies of the clock.
[0027] The spectrum of the undesired signal Vu' has been folded
back around the clock frequency fc. The clock frequency fc is much
higher than the desired signal bandwidth, so the amount of the
undesired signal Vu' in the desired signal bandwidth is greatly
reduced. Since the undesired signal Vu includes the DC offset and
1/f noise of the transconductance amplifier 23, the influence of
the undesired signal is mixed out the range of the desired
signal.
[0028] FIG. 5A is a schematic of the transconductance amplifier
applied in the present invention. FIG. 5B is a schematic of the
chopper circuit applied in the present invention. The first chopper
circuit 30 and the second chopper circuit 35 are both implemented
by two cross-coupled switches. FIGS. 6A.about.6B shows the
operation of the chopper circuits. When CK is on and CKB is off,
the first chopper circuit 30 and the second chopper circuit 35 are
in the state shown in FIG. 6A. The equivalent undesired signal Vueq
at the input of the transconductance amplifier 23 is equal to the
undesired signal Vu. When CK is off and CKB is on, the first
chopper circuit 30 and the second chopper circuit 35 are in the
state shown in FIG. 6B. The equivalent signal Vueq is equal to the
negative of the undesired signal -Vu. The average of the equivalent
signal approximates zero, that is, the undesired signal Vu is
averaged out.
[0029] FIG. 7 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the second embodiment.
The first chopper circuit 30 is merged into the input of the
transconductance amplifier 23 to form the transconductance
amplifier 502. The second chopper circuit 35 is inserted between
output of the transconductance amplifier 502 and capacitor 24.
[0030] FIG. 8 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the third embodiment. The
second chopper circuit 35 is merged into the output of the
transconductance amplifier 23 to form the transconductance
amplifier 504. The first chopper circuit 30 is inserted between the
second amplifier 22 and input to the transconductance amplifier
504.
[0031] FIG. 9 is a schematic of a DC offset canceling circuit
applied in the variable gain amplifier in the fourth embodiment.
The chopper circuit 30 and 35 are merged into input and output of
the transconductance amplifier 23 to form the transconductance
amplifier 506.
[0032] Although the present invention has been described in its
preferred embodiments, it is not intended to limit the invention to
the precise embodiments disclosed herein. Those who are skilled in
this technology can still make various alterations and
modifications without departing from the scope and spirit of this
invention. Therefore, the scope of the present invention shall be
defined and protected by the following claims and their
equivalents.
* * * * *