U.S. patent application number 10/688816 was filed with the patent office on 2004-05-06 for method for screening semiconductor devices for contact coplanarity.
Invention is credited to Wong, Lik Son.
Application Number | 20040087157 10/688816 |
Document ID | / |
Family ID | 25505817 |
Filed Date | 2004-05-06 |
United States Patent
Application |
20040087157 |
Kind Code |
A1 |
Wong, Lik Son |
May 6, 2004 |
Method for screening semiconductor devices for contact
coplanarity
Abstract
A method for determining contact coplanarity of packaged
semiconductor devices having a plurality of contacts. The method
includes the steps of measuring the relative positions of the
contacts on a subject semiconductor device; calculating from the
measurements seating planes 64 formed by tilting the device to one
or more of its corners and/or sides such that each said plane
comprises contacts at or adjacent to the corners of the device;
using the measured relative contact positions and the calculated
seating planes to determine the highest deviation from contact
coplanarity for the semiconductor device.
Inventors: |
Wong, Lik Son; (Singapore,
SG) |
Correspondence
Address: |
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS
TX
75265
|
Family ID: |
25505817 |
Appl. No.: |
10/688816 |
Filed: |
October 17, 2003 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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10688816 |
Oct 17, 2003 |
|
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09962407 |
Sep 25, 2001 |
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Current U.S.
Class: |
438/689 ;
257/E23.048 |
Current CPC
Class: |
H01L 2224/48091
20130101; H01L 23/49555 20130101; H01L 2224/48247 20130101; G01R
31/2886 20130101; H01L 2224/48091 20130101; G01R 31/71 20200101;
H01L 2924/00014 20130101 |
Class at
Publication: |
438/689 |
International
Class: |
H01L 021/302; H01L
021/461 |
Claims
We claim:
1. A method for determining contact coplanarity of packaged
semiconductor devices having a plurality of contacts, comprising
the steps of: measuring the relative positions of said contacts on
a subject semiconductor device; calculating from said measurements
seating planes formed by tilting said device to one or more of its
corners and/or sides such that each said plane comprises contacts
at or adjacent to the corners of said device; using said measured
relative contact positions and said calculated seating planes to
determine the highest deviation from contact coplanarity for said
semiconductor device.
2. The method of claim 1, wherein said step of measuring comprises
measuring the relative positions of said contacts using a 3-point
seating plane method.
3. The method of claim 1, wherein said contacts are leads extending
in a gull-wing pattern from said packaged semiconductor device.
4. The method of claim 1, wherein said contacts are solder balls
attached to a bottom side of said packaged semiconductor
device.
5. A method for screening for contact coplanarity packaged
semiconductor devices having a plurality of contacts, comprising
the steps of: measuring the relative positions of said contacts on
a subject semiconductor device; calculating from said measurements
seating planes formed by tilting said device to one or more of its
corners and/or sides such that each said plane comprises contacts
at or adjacent to the corners of said device; using said measured
relative contact positions and said calculated seating planes to
determine the highest deviation from contact coplanarity for said
semiconductor device; and comparing said highest deviation from
contact coplanarity to a pre-determined specification.
6. The method of claim 5, further comprising the step of sorting
packaged semiconductor devices that have a highest deviation at or
in excess of said pre-determined specification from packaged
semiconductor devices that have a highest deviation less than said
pre-determined specification.
7. The method of claim 5, wherein said step of measuring comprises
measuring the relative positions of said contacts using a 3-point
seating plane method.
8. The method of claim 5, wherein said contacts are leads extending
in a gull-wing pattern from said packaged semiconductor device.
9. The method of claim 5, wherein said contacts are solder balls
attached to a bottom side of said packaged semiconductor
device.
10. A semiconductor test apparatus, comprising: a tool operable to
measure the relative positions of contacts on a packaged
semiconductor device; a computer operable to use said relative
positions to determine seating planes formed by tilting said device
to one or more of its corners and/or sides such that each said
plane comprises contacts at or adjacent to the corners of said
device; said computer further operable to calculate a highest
deviation from contact coplanarity using said measured relative
contact positions and said seating planes.
11. The apparatus of claim 10, where said computer is further
operable to compare said highest deviation from contact coplanarity
to a pre-determined specification.
12. The apparatus of claim 11, further comprising a device for
separating packaged semiconductor devices having deviations from
contact coplanarity that exceed said pre-determined specification
from packaged semiconductor devices that do not exceed said
pre-determined specification.
13. The apparatus of claim 10, wherein said contacts on a packaged
semiconductor device comprise leads extending in a gull-wing
pattern from said device.
14. The apparatus of claim 10, wherein said contacts on a packaged
semiconductor device comprise solder balls extending from a bottom
side of said device.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
BACKGROUND OF THE INVENTION
[0001] This invention is in the field of semiconductor assembly,
testing, and packaging.
[0002] An integrated circuit in its unpackaged state is susceptible
to damage and its small size and dense features cause difficulties
when interconnecting the integrated circuit with other electronic
components in a system. Consequently, an integrated circuit is
typically packaged in plastic or ceramic and the interconnection
problems are solved by leads extending from the plastic or ceramic
package material, or in the case of a Ball Grid Array (BGA)
package, by solder balls attached to contact pads on the bottom
side of the device package. FIG. 1 is a side cross-sectional view
of a leaded, packaged integrated circuit, hereinafter referred to
as a "semiconductor device". The integrated circuit 10 is mounted
on a leadframe 12. Electrical connection between the integrated
circuit 10 and the leads 14 is established by bond wires 16. The
integrated circuit 10, the leadframe 12, the bond wires 16, and a
portion of leads 14 are encapsulated in packaging material 18,
which is typically plastic or ceramic. Leads 14 are bent into a
gullwing shape that is suitable for surface mounting. Well-known
package types such as the Thin Small Outline Package (TSOP) and the
Quad Flat Package (QFP) typically have the features shown in FIG.
1. FIG. 2a is a top view of a square QFP semiconductor device
showing plastic encapsulant 20 with leads 22 along all four sides
of the device. FIG. 2b is a side view of the QFP semiconductor
device illustrating the shape of the leads.
[0003] In practice, the semiconductor device is mounted on a
printed circuit board (PCB) with electrical connection between the
leads and the pads on the PCB established with solder. Coplanarity
of the leads is important in order to ensure that all leads
properly contact the appropriate pads on the PCB. However, leads
are easily bent, in particular in testing and burning-in of the
device, in packing and shipping of the device, as well as in the
assembly process in which the device is mounted on a PCB.
Consequently, a need has been recognized by the electronics
industry to establish standards for lead coplanarity. An example is
JEDEC Standard JESD22-B108 "Coplanarity Test for Surface-Mount
Semiconductor Devices." Equipment manufacturers have responded by
developing optical/laser systems for measuring deviations of leads
from coplanarity. Coplanarity inspection typically consists of
laser triangulation to map the coordinates of the leads of the
package, or in the case of BGA, the solder balls, relative to the
other leads or balls. Once the coordinates have been measured, a
seating plane including the lowest three leads or solder balls is
calculated. Automated software then determines whether the
remaining leads or balls are within a specified distance above the
seating plane. Unfortunately, these prior art techniques suffer
from shortcomings that can result in an unacceptable failure rate
when the semiconductor device is mounted on a PCB. This is
particularly true when the seating plane is determined by three
leads or balls in close proximity to one another, or when the
package is warped.
[0004] The JEDEC test JESD22-B108 consists of measuring the
distance between the intended contact point of a lead and a seating
plane. The seating plane is defined as the plane established by the
contact points of three or more leads that support the device when
it is placed on top of a planar surface. FIGS. 3a and 3b show an
example of a seating plane 32 calculated using the JEDEC test. The
lowest three leads 34 are the corners of the triangle and the
maximum lead distance above the seating plane is the lead
coplanarity 36 for the particular device shown. The center of
gravity 30 of the device is indicated in FIG. 3a. Equipment vendors
have developed systems that establish the seating plane and measure
the deviation of the leads from coplanarity as required by the
standard. However, in an unacceptable number of cases, devices that
pass this test later fail coplanarity tests when mounted on a PCB.
The JEDEC test assumes the device is mounted on a planar surface. A
PCB is often far from ideally planar. In addition, some measurement
equipment measures coplanarity deviation from the top side of the
lead, a technique which assumes that all leads are of the same
thickness. A variation in thickness of the leads can change the
seating plane measured in the JEDEC test. Some equipment measures
coplanarity while the devices are packed in trays, creating
potential for miscomputation of the seating planes. For larger
packages in particular, there is potential for tilting and a change
of seating plane, not only from lead thickness variations, but also
from downward force applied during component placement and during
wave-soldering when solder paste under the leads typically loses
significant volume, for example. Variations in solder paste applied
to the PCB solder pads on which the leads sit could also be a
problem. Of course, any device warpage or variations in the lead
forming angle will exacerbate the deviations from lead coplanarity.
Similar problems apply to BGA packages.
[0005] In response to the shortcomings of the single seating plane
method described above, the test and measurement industry has
developed a dual seating plane method for predicting coplanarity
problems. The single seating plane method is particularly
inadequate in situations where the center of gravity of the device
is contained within a narrow seating plane triangle, or when a side
of a narrow seating plane triangle passes through the center of
gravity. Such a situation is shown in FIGS. 4a and 4b. In FIG. 4a,
the seating plane 42 has an edge passing through the center of
gravity 40. In addition, the seating plane triangle 42 is
relatively narrow, which results in a tendency of the device to
tilt. The prior art dual seating plane method therefore assumes
that the device will tilt and calculates a new seating plane 44
based on the predicted tilt. The lead coplanarity 46 is determined
relative to this tilted plane 44. One disadvantage of this approach
is that it depends upon a determination of whether the seating
plane is narrow or not. If a narrow plane is mistakenly detected as
non-narrow, significant errors in determining lead coplanarity will
result. Furthermore, in selecting the new seating plane 44, the
prior art dual seating plane method does not systematically choose
the corner pins as one or more of its seating points. Rather, it
selects a lead based on a pre-determined formula, such as the
lowest lead twenty leads away from the previous lead on either side
of the center of gravity of the device, and then calculates the
worst-case coplanarity deviation for the original as well as these
additional seating planes. This creates a situation in which the
device could again tilt from the selected seating plane; if, for
instance, the new planes are narrow or if the new seating planes
are not near the corners. In summary, this dual plane method is an
improvement over the single plane method, but still is inadequate
in predicting worst case coplanarity, particularly in situations
where warpage of the semiconductor device is present. The
inadequacies of the prior art methods lead to screening errors that
can result in either a lower device yield than is necessary, or in
a customer receiving out-of-specification devices, neither of which
is acceptable.
BRIEF SUMMARY OF THE INVENTION
[0006] In an embodiment of the invention, a method for determining
contact coplanarity of packaged semiconductor devices having a
plurality of contacts is disclosed. The method includes the steps
of measuring the relative positions of the contacts on a subject
semiconductor device; calculating from the measurements seating
planes formed by tilting the device to one or more of its corners
and/or sides such that each said plane comprises contacts at or
adjacent to the corners of the device; using the measured relative
contact positions and the calculated seating planes to determine
the highest deviation from contact coplanarity for the
semiconductor device.
[0007] In another embodiment of the invention, a method for
screening for contact coplanarity packaged semiconductor devices
having a plurality of contacts is disclosed. The method includes
the steps of measuring the relative positions of the contacts on a
subject semiconductor device; calculating from the measurements
seating planes formed by tilting the device to one or more of its
corners and/or sides such that each said plane comprises contacts
at or adjacent to the corners of the device; using the measured
relative contact positions and the calculated seating planes to
determine the highest deviation from contact coplanarity for the
semiconductor device; and comparing the highest deviation from
contact coplanarity to a pre-determined specification.
[0008] In still another embodiment of the invention, a
semiconductor test apparatus is disclosed. The apparatus includes a
tool operable to measure the relative positions of contacts on a
packaged semiconductor device and a computer operable to use the
relative positions to determine seating planes formed by tilting
the device to one or more of its corners and/or sides such that
each said plane comprises contacts at or adjacent to the corners of
the device. The computer is further operable to calculate a highest
deviation from contact coplanarity using the measured relative
contact positions and the seating planes.
[0009] An advantage of the invention is that it enables efficient
screening of semiconductor devices for worst-case deviations from
lead coplanarity. The inventive methods and apparatus were
developed in view of the fact that semiconductor devices are
typically placed on a PCB having a rough and uneven surface.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0010] FIG. 1 is a cross-section side view of a prior art leaded,
packaged integrated circuit;
[0011] FIGS. 2a and 2b are top and side views, respectively, of a
prior art QFP device;
[0012] FIGS. 3a and 3b are top and side views, respectively, of a
device showing an implementation of a prior art three-point seating
plane method;
[0013] FIGS. 4a and 4b are top and side views, respectively, of a
device showing the effects of a narrow seating plane angle and the
implementation of a prior art dual seating plane method;
[0014] FIGS. 5a and 5b are top and side views, respectively, of a
device showing the role of corner leads in restraining the tilt of
a device;
[0015] FIGS. 6a and 6b are top and side views, respectively, of a
device showing an application of an embodiment of the inventive
method;
[0016] FIGS. 7a and 7b show four seating planes that would exist if
the device were tilted to its four corners;
[0017] FIGS. 7c and 7d show seating planes that would exist if the
device were tilted to its four sides;
[0018] FIGS. 8a and 8b are side and top views, respectively, of a
device showing an application of an embodiment of the inventive
method;
[0019] FIGS. 9a and 9b are side and magnified views, respectively,
of a device indicating the effects of a corner lead being higher
than an adjacent lead;
[0020] FIGS. 10a and 10b are side and magnified views,
respectively, of a device indicating the effects of a corner lead
being higher than an adjacent lead;
[0021] FIGS. 11a and 11b are side and magnified views,
respectively, of a device indicating the effects of a corner lead
being higher than an adjacent lead, where lead position is measured
from the top side of the lead;
[0022] FIGS. 12a and 12b are side and magnified views,
respectively, of a device indicating the effects of a corner lead
being higher than an adjacent lead, where lead position is measured
from the top side of the lead;
[0023] FIGS. 13a and 13b are side and magnified views,
respectively, of a device in which the corner seating point is a
corner lead, or a lead adjacent to the corner lead, on a device
side adjacent to the side being viewed;
[0024] FIGS. 14a, 14b, and 14c are top, side, and magnified views,
respectively, of a device in which the corner seating point is a
corner lead, or a lead adjacent to the corner lead, on a device
side adjacent to the side being viewed, where lead position is
measured from the top side of the lead;
[0025] FIGS. 15a and 15b show leads with ideal and non-ideal lead
forming angles, respectively.
DETAILED DESCRIPTION OF THE INVENTION
[0026] A device with any seating plane, narrow or otherwise, can be
expected to tilt when it is placed on an uneven surface, and a
typical PCB has an uneven surface. A semiconductor device placed on
a PCB will often rock to one side or another, or rock along a
diagonal axis of the device, or a combination of both. Applicant
has determined that the amount of tilt or rocking is dependent upon
the position of the corner leads of the device. It is typically
true that the worst-case or highest deviation from coplanarity of
the leads of a device will occur at the far corner when the device
seats at one of its corner pins (or balls in the case of BGA), or
on a few pins near the corner. The corner pins tend to restrain the
device from further tilting even when the leads away from the
corners have a higher coplanarity deviation than the corner pins.
FIGS. 5a and 5b are illustrations of the role of the corner pins in
restraining tilt. Note that the relative position of the leads can
be determined by well known techniques such as laser triangulation
and with tools such as an optical comparator.
[0027] A preferred embodiment of the inventive method is described
with reference to FIGS. 6a and 6b. FIG. 6a shows a package with an
original seating plane 62 that does not have an edge intersecting
the center of gravity 60 of the device. Hence, the prior art
techniques would rely on the single plane technique since it is
assumed that a seating plane that does not pass through the center
of gravity is not prone to tilting or rocking. The inventive
approach, however, assumes that any device will tilt to rest on a
corner when placed on an uneven surface such as a PCB. In this
case, a device tilting to rest on the lower left corner of the
device will result in a new seating plane 64. The seating plane is
determined using coplanarity data taken using a test such as the
prior art JEDEC three-point method, for example, rather than
physically tilting the device for measurement. The coplanarity of
the device is calculated based on this new seating plane. These
steps are then repeated for each corner of the device. FIGS. 7a and
7b show the four seating planes assuming the device is tilted in
turn to all four corners. Seating plane 64 is the seating plane
shown in FIG. 6a that is formed by rocking the device to its lower
left corner. Seating plane 66 is the seating plane that is formed
by rocking the device to its upper left corner. Seating plane 68 is
the seating plane that is formed by rocking the device to its upper
right corner. Seating plane 70 is the seating plane that is formed
by rocking the device to its lower right corner. As mentioned
above, devices can tilt to one side when placed on a PCB rather
than to a corner. FIGS. 7c and 7d show the four seating planes
assuming the device is tilted sideward. Two of the points of the
seating planes would be on one side while the third could be in any
position along any of the other three sides.
[0028] The coplanarity is calculated for each of the four
corner-based seating planes and/or for each of the four side-based
seating planes, or for a subset of these seating planes. The worst
case coplanarity result of all the seating planes considered is
then used to determine whether the lead coplanarity meets the
specifications set by the manufacturer or by its customers. The
inventive method for determining worst-case or highest deviation
from lead coplanarity based on the corner leads has been shown to
be superior to both the prior art single-and dual-plane approaches.
It lessens the chance that good devices will be screened out, and
also reduces the chances that a customer will receive devices that
do not meet its specifications.
[0029] Since the goal of the measurement is the worst-case or the
highest deviation from lead coplanarity, in an alternative
embodiment the lead with the highest coplanarity is identified and
then the corner closest to opposing the lead with highest
coplanarity is tested as part of the seating plane and vice versa.
The next highest coplanarity lead could then be tested using the
corner closest to opposing it, and so on.
[0030] The worst case coplanarity deviation of a device can be
computed from the coplanarity measurement and other position
measurements obtained from either the single-or dual-plane method.
As is illustrated in FIGS. 8a and 8b, the device having an original
seating plane formed by points S.sub.1A, S.sub.1B, and S.sub.1C is
assumed to have a new seating plane formed by points S.sub.2A,
S.sub.2B, and S.sub.2C after it is tilted toward the corner lead at
B.sub.1. The coplanarity deviation of the lead at the far corners,
A.sub.1, C.sub.N, D.sub.1, and D.sub.N are re-computed. This new
coplanarity at D.sub.1 is equal to:
H.sub.D1+Z; and
H.sub.D1+QTangent O.sub.S, where Tangent O.sub.S=Z/Q; and
H.sub.D1+Q H.sub.B1/P, where Tangent O.sub.S=H .sub.B1/P; and
H.sub.D1+H.sub.B1(L.sub.E-P)/P, where L.sub.E=P+Q; and
H.sub.D1+H.sub.B1(L.sub.E/P-1).
[0031] Intercept point K, and hence lengths P and Q. can be
obtained by solving a pair of linear equations. Namely, the
equation for the line from S.sub.2C to S.sub.2A, an edge of the new
seating plane, can be described as
Y =M.sub.1X+C.sub.1, where M.sub.1 is the gradient and C.sub.1, is
the intercept of the Y axis.
[0032] The second equation is the line from B.sub.1 to D.sub.1,
which is the line for computing the coplanarity at D.sub.1 with
reference to B.sub.1, is described as
Y=M.sub.2X+C.sub.2, where M.sub.2 is the gradient and C.sub.2 is
the intercept of the Y axis.
[0033] These quantities are computed for at least a few adjacent
leads at the highest far corner to determine whether their
coplanarity deviation is higher than the corner lead. It is
preferable to select one of the corner leads as a corner of the
tilted seating plane triangle. For example, in FIG. 7a, for seating
plane triangle 66, one would choose A.sub.N or B.sub.1, depending
on which is lower, because that corner of the triangle will be the
point at which the rocking or tilting of the device is most likely
to be restrained. Note that the shape of the seating plane triangle
will be slightly different if B.sub.1 is chosen as the corner of
the triangle than if A.sub.N is chosen.
[0034] The preceding discussion assumed that the corner lead was
lower than adjacent leads. In the case where a lead adjacent to the
corner lead is lower than the corner lead, the test tool would
select the adjacent lead as one of the points of the new seating
plane when the device is tilted. As is illustrated in FIG. 9a and
9b, this condition occurs where the angle O.sub.1, between the
corner lead and the adjacent lead is greater than angle O.sub.A
between the original seating plane and a plane based only on the
corner lead. Referring to FIG. 9b, where O.sub.1>O.sub.A,
Tangent
O.sub.1=(h.sub.i-t.sub.1)-(h.sub.2-t.sub.2)/(w.sub.1+g.sub.1).
[0035] Referring now to FIGS. 10a and 10b, the angle O.sub.B of the
new seating plane with respect to the original seating plane can be
found as follows,
Tangent O.sub.B=(h.sub.2-t.sub.2)/[(w.sub.2+g.sub.3)].
[0036] In the event a tool is used that determines lead position
from the top side and therefore does not comprehend the thickness
of the leads, an alternative method for determining angle O.sub.1,
can be employed. Referring to FIGS. 11a and 11b, where again,
O.sub.1>O.sub.A,
Tangent O.sub.1=(h.sub.1-h.sub.2)/p.sub.1.
[0037] Referring now to FIGS. 12a and 12b, the angle O.sub.B of the
new seating plane with respect to the original seating plane can be
found as follows,
Tangent O.sub.B=(h.sub.2-h.sub.4)/(p.sub.2+p.sub.3).
[0038] Another possible situation is shown in FIGS. 13a and 13b,
where the corner seating point is the corner lead 120, or a lead
adjacent to the corner lead, on a side adjacent to the side of the
device being viewed in FIG. 13a. In this case, the angle of the new
seating plane with respect to the original seating plane can be
determined as follows,
Tangent
O.sub.B=(h.sub.s1-t.sub.s1)/[(d.sub.s1+(w.sub.1-g.sub.2)+(w.sub.3+-
g.sub.3)].
[0039] For tools that measure lead position from the top side, the
angle of the new seating plane with respect to the original seating
plane can be determined using the parameters shown in FIGS. 14a,
14b, and 14c as follows,
Tangent O.sub.B=h.sub.s1/q.sub.s1.
[0040] As mentioned above, the lead coplanarity is also affected by
the lead forming angle. Some laser inspection systems measure the
forming angles of each lead, which allows for a calculation of the
effect of the lead forming angle on lead coplanarity. FIG. 15a
shows a lead with an ideal, flat forming angle, whereas the lead
shown in FIG. 15b is non-ideal. An estimation of the increase in
coplanarity of a lead because of the non-ideal forming angle can be
obtained as follows,
Sine O.sub.L=H/K, so
H=K Sine O.sub.L.
[0041] While the present invention has been described according to
its preferred embodiments, it is of course contemplated that
modifications of, and alternatives to, these embodiments, such
modifications and alternatives obtaining the advantages and
benefits of this invention, will be apparent to those of ordinary
skill in the art having reference to this specification and its
drawings. For example, the embodiments described and shown herein
are leaded, packaged devices. One skilled in the art will
appreciate that the scope of the concepts presented herein would be
equally applicable to packaged devices with contacts in a form
other than leads, e.g. solder balls on the underside of a BGA
package. It is contemplated that such modifications and
alternatives are within the scope of this invention as subsequently
claimed herein.
* * * * *