U.S. patent application number 10/395393 was filed with the patent office on 2003-11-13 for semiconductor, electrooptic apparatus and electronic apparatus.
This patent application is currently assigned to Seiko Epson Corporation. Invention is credited to Hara, Hiroyuki, Kimura, Mutsumi, Miyazawa, Wakao, Utsunomiya, Sumio.
Application Number | 20030209713 10/395393 |
Document ID | / |
Family ID | 28786210 |
Filed Date | 2003-11-13 |
United States Patent
Application |
20030209713 |
Kind Code |
A1 |
Kimura, Mutsumi ; et
al. |
November 13, 2003 |
Semiconductor, electrooptic apparatus and electronic apparatus
Abstract
In a semiconductor device made by forming functional elements on
a first substrate, transferring the element chip onto a second
substrate, and connecting first pads on the element chip to second
pads on the second substrate, the area or the width of the first is
increased. The first pads can be securely connected to the second
pads even when misalignment occurs during the separating and
transferring processes. Only the first pads are formed on a surface
of the element chip at the second-substrate-side. The functional
elements are formed to be farther from the second substrate than
the first pads. Alternatively, only the first pads are formed on a
surface of the element chip remote from the second substrate, and
the functional elements are formed to be closer to the second
substrate than the first pads. Alternatively, the first pads are
formed on both the surface of the element chip at the
second-substrate-side and the surface of the element chip remote
from the second substrate.
Inventors: |
Kimura, Mutsumi;
(Kyotanabe-shi, JP) ; Utsunomiya, Sumio;
(Suwa-shi, JP) ; Hara, Hiroyuki; (Chino-shi,
JP) ; Miyazawa, Wakao; (Chino-shi, JP) |
Correspondence
Address: |
OLIFF & BERRIDGE, PLC
P.O. BOX 19928
ALEXANDRIA
VA
22320
US
|
Assignee: |
Seiko Epson Corporation
Tokyo
JP
|
Family ID: |
28786210 |
Appl. No.: |
10/395393 |
Filed: |
March 25, 2003 |
Current U.S.
Class: |
257/72 ; 257/692;
257/698; 257/700; 257/723; 257/778; 257/786; 257/E21.511; 438/107;
438/108; 438/149; 438/612 |
Current CPC
Class: |
H01L 2224/73265
20130101; H01L 24/75 20130101; H01L 2924/01006 20130101; H01L
2924/014 20130101; H01L 2924/01033 20130101; H01L 2224/32225
20130101; H01L 2224/16225 20130101; H01L 2924/01082 20130101; H01L
27/3255 20130101; H01L 2924/01049 20130101; H01L 24/81 20130101;
H01L 2924/12042 20130101; H01L 24/73 20130101; H01L 2224/7598
20130101; H01L 2924/01013 20130101; H01L 2221/68322 20130101; H01L
2924/30105 20130101; H01L 2224/73204 20130101; H01L 2924/01005
20130101; H01L 2924/19041 20130101; H01L 2924/01004 20130101; H01L
2924/12044 20130101; H01L 2224/48227 20130101; H01L 2224/48091
20130101; H01L 2224/75263 20130101; H01L 2224/75 20130101; H01L
2224/81801 20130101; H01L 2224/81001 20130101; H01L 2224/48091
20130101; H01L 2924/00014 20130101; H01L 2224/73204 20130101; H01L
2224/16225 20130101; H01L 2224/32225 20130101; H01L 2224/73265
20130101; H01L 2224/32225 20130101; H01L 2224/48227 20130101; H01L
2924/00 20130101; H01L 2924/12042 20130101; H01L 2924/00 20130101;
H01L 2924/12044 20130101; H01L 2924/00 20130101 |
Class at
Publication: |
257/72 ; 438/149;
257/723; 438/107; 257/692; 257/698; 257/700; 257/778; 438/108;
257/786; 438/612 |
International
Class: |
H01L 029/04; H01L
031/036; H01L 023/48 |
Foreign Application Data
Date |
Code |
Application Number |
Mar 29, 2002 |
JP |
2002-097196 |
Claims
What is claimed is:
1. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, only the first pads being formed on a
surface of the element chip at a second-substrate-side.
2. The semiconductor device according to claim 1, the functional
elements being farther from the second substrate than the first
pads.
3. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, only the first pads being formed on a
surface of the element chip remote from the second substrate.
4. The semiconductor device according to claim 3, the functional
elements being formed to be closer to the second substrate than the
first pads.
5. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, the first pads being formed on both a
surface of the element chip at a second-substrate-side and a
surface of the element chip remote from the second substrate.
6. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, the following expression being
satisfied: L>2.pi..sup.1/2S.sup.1/2 where L is the peripheral
length and S is the area of the element chip.
7. The semiconductor device according to claim 6, the following
expression being satisfied: L>4S.sup.1/2.
8. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, at least one of the first pads and
the second pads being formed using a low-melting-point material
including at least one of solder, indium, and lead.
9. A semiconductor device, comprising: first and second substrates;
functional elements formed on the first substrate; an element chip
including at least one functional element, the element chip being
separated and transferred to the second substrate; and first and
second pads that are each formed of a conductive material, the
first pads being disposed on the element chip, the second pads
being disposed on the second substrate, the first pads being
connected to the second pads, the first pads being formed to
protrude from a side face of the element chip outwardly parallel to
a plane of the first substrate, and shapes corresponding to the
first pads being formed in the second substrate.
10. A semiconductor device, comprising: first and second
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, the first pads having a convex
shape and the second pads having a concave shape, or the first pads
having a concave shape and the second pads having a convex
shape.
11. A semiconductor device, comprising: first and second
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, a low-dielectric-constant
material being used in an insulating layer of the element chip.
12. A semiconductor device, comprising: first and second
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, at least one of air, liquid,
and vacuum being used in an insulating layer of the element
chip.
13. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, only the first pads being
formed on a surface of the element chip at the
second-substrate-side.
14. The semiconductor device according to claim 13, the functional
elements being farther from the second substrate than the first
pads.
15. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, only the first pads being
formed on a surface of the element chip remote from the second
substrate.
16. The semiconductor device according to claim 15, the functional
elements being formed to be closer to the second substrate than the
first pads.
17. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, the first pads being formed on
both a surface of the element chip at a second-substrate-side and a
surface of the element chip remote from the second substrate.
18. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, the following expression being
satisfied: L>2.pi..sup.1/2S.sup.1/2 where L is the peripheral
length and S is the area of the element chip.
19. The semiconductor device according to claim 18, the following
expression being satisfied L>4S.sup.1/2.
20. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, at least one of first pads and
the second pads being formed using a low-melting-point material
including at least one of solder, indium, and lead.
21. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, the first pads being formed to
protrude from a side face of the element chip outwardly parallel to
the plane of the first substrate, and shapes corresponding to the
first pads being formed in the second substrate.
22. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, the first pads having a convex
shape and the second pads having a concave shape, or the first pads
having a concave shape and the second pads having a convex
shape.
23. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, a low-dielectric-constant
material being used in an insulating layer of the element chip.
24. A semiconductor device, comprising: first, second and third
substrates; functional elements formed on the first substrate; an
element chip including at least one functional element, the element
chip being separated and transferred to the third substrate, the
element chip also being transferred to the second substrate; and
first and second pads that are each formed of a conductive
material, the first pads being disposed on the element chip, the
second pads being disposed on the second substrate, the first pads
being connected to the second pads, at least one of air, liquid,
and vacuum being used in an insulating layer of the element
chip.
25. The semiconductor device according to claim 1, the separating
and transferring of the element chip being performed using laser
radiation.
26. The semiconductor device according to claim 1, the functional
elements being thin-film transistors.
27. The semiconductor device according to claim 1, the functional
elements being organic electroluminescent elements.
28. An electrooptic apparatus, comprising: the semiconductor device
according to claim 1.
29. An electronic apparatus, comprising: the semiconductor device
according to claim 1.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of Invention
[0002] The present invention relates to semiconductor devices. More
specifically, the invention relates to a semiconductor device made
by forming functional elements on a first substrate, separating an
element chip including at least one functional element,
transferring the element chip to a second substrate, and connecting
first pads composed of a conductive material and disposed on the
element chip to second pads composed of a conductive material and
disposed on the second substrate. Moreover, the invention relates
to a semiconductor device made by forming functional elements on a
first substrate, separating an element chip including at least one
functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate.
[0003] 2. Description of Related Art
[0004] In related art semiconductor devices, such as electronic
circuits including functional elements, e.g., thin-film transistors
or organic electroluminescent elements, interconnections between
the functional elements, and supporting substrates, the functional
elements can constitute only part of the whole, the rest being the
interconnections and supporting substrates. When this type of
semiconductor device is produced in one manufacturing process
whereby the functional elements, the interconnections, and the
supporting substrates are integrally formed, a highly advanced
complicated manufacturing process is necessary to produce highly
functional elements. This generally increases the manufacturing
cost. However, no complicated manufacturing process is necessary to
produce interconnections and supporting substrates, and the
manufacturing cost thereof is low. The manufacturing cost of the
semiconductor device as a whole can be averaged out and decreased
if functional elements are manufactured in a process separate from
that of manufacturing interconnections and supporting substrates,
and subsequently installed at only required positions.
[0005] In view of the above, the related art also includes
semiconductor devices that are made by forming functional elements
on a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
related art also includes semiconductor devices made by forming
functional elements on a first substrate, separating an element
chip including at least one functional element, transferring the
element chip to a third substrate, transferring the element chip to
a second substrate, and connecting first pads composed of a
conductive material and disposed on the element chip to second pads
composed of a conductive material and disposed on the second
substrate. The related art also includes electrooptic apparatuses,
such as a display apparatus that use these semiconductor devices.
In this manner, the functional elements can be placed only at the
required positions. When averaged out, the manufacturing cost of
the semiconductor device as a whole can be reduced. In order to
perform the separating and transferring processes, laser ablation
or an adhesive agent can be used, as disclosed in (T. Shimoda, et
al., Techn. Dig. IEDM 1999, 289; S. Utsunomiya, et al., Dig. Tech.
Pap. SID 2000, 916; T. Shimoda, Proc. Asia Display/IDW '01, 327;
and S. Utsunomiya, et al., Proc. Asia Display/IDW '01, 339).
SUMMARY OF THE INVENTION
[0006] In developing semiconductor devices made by forming
functional elements on a first substrate, separating an element
chip including at least one functional element, transferring the
element chip to a second substrate, and connecting first pads
composed of a conductive material and disposed on the element chip
to second pads composed of a conductive material and disposed on
the second substrate, and in developing semiconductor devices made
by forming functional elements on a first substrate, separating an
element chip including at least one functional element,
transferring the element chip to a third substrate, transferring
the element chip to a second substrate, and connecting first pads
composed of a conductive material and disposed on the element chip
to second pads composed of a conductive material and disposed on
the second substrate, one of the challenging tasks is how to form
the connection between the first pads and the second pads. Since
misalignment can occur during the separation and transfer
processes, the area of each first pad and each second pad is
preferably large so that the connection between the first and
second pads is secured, even when misalignment occurs. However, it
is difficult to form large first pads on a small element chip, the
size of which is reduced to decrease the manufacturing cost. On the
other hand, it is relatively easy to form large second pads since
the second substrate often has a real allowance. Preferably, the
first pads are not only large but also wide.
[0007] The present invention increases the area and the width of
the first pad of a semiconductor element made by forming functional
elements on a first substrate, separating an element chip
comprising at least one functional element, transferring the
element chip to a second substrate, and connecting first pads
composed of a conductive material and disposed on the element chip
to second pads composed of a conductive material and disposed on
the second substrate, or a semiconductor element made by forming
functional elements on a first substrate, separating an element
chip comprising at least one functional element, transferring the
element chip to a third substrate, transferring the element chip to
a second substrate, and connecting first pads composed of a
conductive material and disposed on the element chip to second pads
composed of a conductive material and disposed on the second
substrate. According to this structure, the first pads can be
reliably connected to the second pads even when misalignment occurs
during the separation and transfer processes. Moreover, the contact
resistance can be reduced by increasing the area of the first pads
and the area of the corresponding second pads.
[0008] An aspect of the present invention provides a semiconductor
device manufactured by forming functional elements on a first
substrate, separating an element chip including at least one
functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. Only
the first pads are formed on a surface of the element chip at the
second-substrate-side.
[0009] According to this structure, the area of each first pad can
be increased.
[0010] In the semiconductor device of this aspect of the present
invention, the functional elements are farther from the second
substrate than the first pads.
[0011] According to this structure, the area of each first pad can
be increased since the first pads and the functional elements are
stacked on each other.
[0012] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. Only
the first pads are formed on a surface of the element chip remote
from the second substrate.
[0013] According to this structure, the area of each first pad can
be increased.
[0014] In the semiconductor device of this aspect, the functional
elements are formed to be closer to the second substrate than the
first pads.
[0015] According to this structure, the area of each first pad can
be increased since the first pads and the functional elements are
stacked on each other.
[0016] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
first pads are formed on both a surface of the element chip at the
second-substrate-side and a surface of the element chip remote from
the second substrate.
[0017] According to this structure the area of each first pad can
be further increased.
[0018] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
following expression is satisfied:
L>2.pi..sup.1/2S.sup.1/2
[0019] where L is the peripheral length and S is the area of the
element chip.
[0020] According to this structure, the peripheral length of the
element chip can be increased to form wide first pads. Since the
area of the element chip does not increase, the effect of
manufacturing cost reduction remains the same.
[0021] The semiconductor device of this aspect may be provided such
that L>4S.sup.1/2.
[0022] Also, according to this structure, the peripheral length of
the element chip can be increased to form wide first pads. Since
the area of the element chip does not increase, the effect of
manufacturing cost reduction remains the same.
[0023] Another aspect (claim 8) of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
first pads or the second pads are formed using a low-melting-point
material such as solder, indium, or lead.
[0024] According to this structure, the first pads can be connected
to the second pads by applying high temperatures for a
predetermined time after the transfer of the separated element
chip.
[0025] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
first pads are formed to protrude from a side face of the element
chip outwardly parallel the plane of the first substrate, and
shapes corresponding to the first pads are formed in the second
substrate.
[0026] According to this structure, the first pads and the second
pads can be self-aligned, and the connection between the first pad
and the second pad are ensured even when misalignment occurs.
[0027] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. The
first pads have a convex shape and the second pads have a concave
shape, or the first pads have a concave shape and the second pads
have a convex shape.
[0028] Also, according to this structure, the first pads and the
second pads can be self-aligned, and the connection between the
first pad and the second pad are ensured even when misalignment
occurs.
[0029] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. A
low-dielectric-constant material is used in an insulating layer of
the element chip.
[0030] According to this structure, the parasitic capacitance at
and around the functional elements of the element chip can be
decreased, and a decrease in the power consumption and an increase
in the operating frequency can be expected.
[0031] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate. Air,
liquid, or vacuum is used in an insulating layer of the element
chip.
[0032] According to this structure, the parasitic capacitance at
and around the functional elements of the element chip can also be
decreased, and a decrease in the power consumption and an increase
in the operating frequency can be expected.
[0033] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. Only the
first pads are formed on a surface of the element chip at the
second-substrate-side.
[0034] According to this structure, the area of each first pad can
be increased.
[0035] In the semiconductor device of this aspect the functional
elements are farther from the second substrate than the first
pads.
[0036] According to this structure, the area of each first pad can
be increased since the first pads and the functional elements are
stacked on each other.
[0037] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. Only the
first pads are formed on a surface of the element chip remote from
the second substrate.
[0038] According to this structure, the area of each first pad can
be increased.
[0039] In the semiconductor device of this aspect the functional
elements are formed to be closer to the second substrate than the
first pads.
[0040] According to this structure, the area of each first pad can
be increased since the functional elements and the first pads are
stacked on each other.
[0041] According to this structure, the area of each first pad can
be increased.
[0042] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. The first
pads are formed on both a surface of the element chip at the
second-substrate-side and a surface of the element chip remote from
the second substrate.
[0043] According to this structure, the area of each first pad can
be further increased.
[0044] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. The
following expression is satisfied:
L>2.pi..sup.1/2S.sup.1/2
[0045] where L is the peripheral length and S is the area of the
element chip.
[0046] According to this structure, the peripheral length of the
element chip can be increased to form wide first pads. Since the
area of the element chip does not increase, the same advantages of
reducing the manufacturing cost can be achieved.
[0047] In the semiconductor device of this aspect, the following
expression is satisfied: L>4S.sup.1/2.
[0048] According to this structure also, the peripheral length of
the element chip can be increased to form wide first pads. Since
the area of the element chip does not increase, the same advantages
of reducing the manufacturing cost can be achieved.
[0049] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. The first
pads or the second pads are formed using a low-melting-point
material, such as solder, indium, or lead.
[0050] According to this structure, the first pads can be connected
to the second pads by applying high temperatures for a
predetermined time after the transfer of the separated element
chip.
[0051] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. The first
pads are formed to protrude from a side face of the element chip
outwardly parallel to the plane of the first substrate, and shapes
corresponding to the first pads are formed in the second
substrate.
[0052] According to this structure, the first pads and the second
pads can be self-aligned, and the connection between the first pad
and the second pad are ensured even when misalignment occurs.
[0053] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. The first
pads have a convex shape and the second pads have a concave shape,
or the first pads have a concave shape and the second pads have a
convex shape.
[0054] According to this structure also, the first pads and the
second pads can be self-aligned, and the connection between the
first pad and the second pad are ensured even when misalignment
occurs.
[0055] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. A
low-dielectric-constant material is used in an insulating layer of
the element chip.
[0056] According to this structure, the parasitic capacitance at
and around the functional elements of the element chip can be
decreased, and a decrease in the power consumption and an increase
in the operating frequency can be expected.
[0057] Another aspect of the present invention provides a
semiconductor device manufactured by forming functional elements on
a first substrate, separating an element chip including at least
one functional element, transferring the element chip to a third
substrate, transferring the element chip to a second substrate, and
connecting first pads composed of a conductive material and
disposed on the element chip to second pads composed of a
conductive material and disposed on the second substrate. Air,
liquid, or vacuum is used in an insulating layer of the element
chip.
[0058] According to this structure also, the parasitic capacitance
at and around the functional elements of the element chip can be
decreased, and a decrease in the power consumption and an increase
in the operating frequency can be expected.
[0059] In the semiconductor device of the above-described aspects,
the separating and transferring of the element chip are performed
using laser radiation.
[0060] In this manner, the separation and the transfer of the
element chip can be performed with stability.
[0061] In the semiconductor device of the above-described aspects,
the functional elements are thin-film transistors.
[0062] According to this structure, the area and the width of each
first pad can be increased even in high-performance transistors
that have conventionally required advanced, complicated
manufacturing processes.
[0063] In the semiconductor device of the above-described aspects,
the functional elements are organic electroluminescent
elements.
[0064] According to this structure, the area and the width of each
first pad can be increased even in high-performance organic
electroluminescent element that have, in the related art, required
advanced, complicated manufacturing processes.
[0065] Another aspect of the present invention provides an
electrooptic apparatus including a semiconductor device according
to the above-described aspects.
[0066] According to this structure, since electrooptic apparatuses
generally have a large a real ratio of the interconnections and the
substrate to the functional element, the cost-reducing effect is
particularly acute. The interconnections and the supporting
substrates can be prepared separately from the functional elements,
and the functional elements are then installed only at the required
positions.
[0067] Another aspect of the present invention provides an
electronic apparatus including a semiconductor device according to
the above-described aspects.
[0068] According to this structure, the fist pads can be reliably
connected to the second pad while reducing the manufacturing cost,
and high-performance electronic apparatuses may be obtained.
BRIEF DESCRIPTION OF THE DRAWINGS
[0069] FIGS. 1(a) and 1(b) are schematics that show a manufacturing
method according to a first exemplary embodiment of the present
invention;
[0070] FIG. 2 is a schematic perspective view that shows the
structure of an element chip according to the first exemplary
embodiment of the present invention;
[0071] FIG. 3 is a schematic perspective view that shows the
structure of a second substrate according to the first exemplary
embodiment of the present invention;
[0072] FIGS. 4(a) and 4(b) are cross-sectional views schematically
showing an example in which first pads are given a convex shape and
second pads are given concave shape;
[0073] FIGS. 5(a)-5(c) are schematics that show a manufacturing
method according to a second exemplary embodiment of the present
invention;
[0074] FIG. 6 is a schematic perspective view that shows the
structure of an element chip according to the second exemplary
embodiment of the present invention;
[0075] FIG. 7 is a schematic perspective view that shows the
structure of a second substrate according to the second exemplary
embodiment of the present invention;
[0076] FIGS. 8(a) and 8(b) are schematics that show a manufacturing
method according to a third exemplary embodiment of the present
invention;
[0077] FIGS. 9(a) and 9(b) are schematic perspective views that
show the structure of an element chip according to the third
exemplary embodiment of the present invention;
[0078] FIG. 10 is a schematic perspective view that shows the
structure of a second substrate according to the third exemplary
embodiment of the present invention;
[0079] FIG. 11 is a schematic that shows the structure of an
element chip according to a fourth exemplary embodiment of the
present invention;
[0080] FIGS. 12(a)-12(c) are schematics that show an exemplary
separating and transferring method according to the present
invention;
[0081] FIGS. 13(a)-13(c) are schematics that show an exemplary
method of making a thin-film transistor according to the present
invention;
[0082] FIGS. 14(a) and 14(b) are graphs that show an exemplary
method of making an organic electroluminescent element;
[0083] FIG. 15 is a schematic that shows an electrooptic apparatus
according to a fifth exemplary embodiment of the present
invention;
[0084] FIGS. 16(a) and 16(b) are schematics that show a
manufacturing method according to the fifth exemplary embodiment of
the present invention;
[0085] FIG. 17 is a schematic circuit configuration of a pixel
region of an electrooptic apparatus using semiconductor devices of
the present invention;
[0086] FIGS. 18(a)-18(f) are schematics that show examples of
electronic apparatuses to which the semiconductor devices of the
present invention are incorporated.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
[0087] Exemplary embodiments of the present invention are described
below.
[0088] (First Exemplary Embodiment)
[0089] FIGS. 1(a) and 1(b) show manufacturing steps according to a
first exemplary embodiment of the present invention. A
semiconductor device, such as an electronic circuit or the like, is
manufactured by forming functional elements 12 on a first substrate
11, separating an element chip 13 including at least one functional
element 12, transferring the element chip 13 onto a second
substrate 14, and connecting first pads 15 composed of a conductive
material and disposed on the element chip 13 to second pads 16
composed of a conductive material and disposed on the second
substrate 14. FIG. 1(a) is a schematic showing the step of bonding
an element-chip-forming face of the first substrate 11 onto the
second substrate 14. FIG. 1(b) is a schematic showing the step of
separating the element chip 13 from the first substrate 11,
transferring the element chip 13 onto the second substrate 14, and
removing the first substrate 11. The connection between the first
pads 15 and the second pads 16 may be made either before or after
the separating and transferring.
[0090] FIG. 2 is a schematic showing the structure of the element
chip according to the first exemplary embodiment of the present
invention. The functional elements 12 are electrically connected to
predetermined first pads 15. Only the first pads 15 are formed on
the surface of the element chip 13 at the second-substrate-14-side.
No other element or electrodes are formed on the surface of the
element chip 13 at the second-substrate-14-side. According to this
structure, the area of the first pads 15 can be increased. The
functional elements 12 are farther from the second substrate 14
than the first pads 15. According to this structure, the functional
elements 12 and the first pads 15 are formed by stacking, the
functional elements 12 being positioned farther from the second
substrate 14 than the first pads 15, and the area of the first pads
15 stacked on the functional elements 12 can be increased.
[0091] FIG. 3 is a schematic showing the structure of the second
substrate according to the first exemplary embodiment of the
present invention. The schematic is a perspective view, and
interconnections, contact holes, via plugs, and the like are
partially omitted from FIG. 3. Not only the second pads 16 but also
interconnections 17 for connection with the predetermined second
pads 16 are formed on the second substrate 14. The second pads 16
are formed on the second substrate 14 at the positions
corresponding to the positions of the first pads 15 on the element
chip 13.
[0092] A semiconductor device may also be formed by forming the
functional elements 12 on the first substrate 11, separating the
element chip 13 including at least one functional element 12,
transferring the element chip 13 on a third substrate 18,
transferring the element chip 13 on the second substrate 14, and
connecting the first pads 15 composed of a conductive material and
disposed on the element chip 13 to the second pads 16 composed of a
conductive material and disposed on the second substrate 14. Also,
in this device, it is particularly effective to form only the first
pads 15 on the surface of the element chip 13 at
the-second-substrate-14-side in order to increase the area of the
first pads 15. At this time, by forming the functional elements 12
at positions farther from the second substrate 14 than the first
pads 15, the functional elements 12 and the first pads 15 can be
arranged to stack on each other, thereby increasing the area of the
first pads 15.
[0093] To provide connections between the first pads 15 and the
second pads 16, the first pads 15 or the second pads 16 may be made
of a low-melting-point material, such as solder, indium, lead, or
the like. In this manner, the first pads 15 and can be welded to
the second pads 16 by applying a suitably high temperature
corresponding to the melting temperature of each low-melting-point
material for a predetermined period of time after the transfer of
the separated element chip 13 onto the second substrate 14, thereby
making connections therebetween. Alternatively, a liquid metal
application process using inkjet may be employed to form
connections between the first pads 15 and the second pads 16.
Alternatively, a wire bonding method, an anisotropic conductive
material, or an anisotropic conductive film may be used.
[0094] Although not shown in the drawings, each first pad 15 may
protrude from an end face of the element chip 13 outwardly parallel
to the plane of the first substrate 11, and a shape corresponding
to the first pad 15 may be formed in the second substrate 14. In
such a case, the first substrate 14 is also arranged to have a
protruding portion at the part corresponding to the protruding
first pad 15 so as to support and reinforce the protruding first
pad 15. The second pad 16 having the shape corresponding to the
shape of the first pad 15 is preferably positioned outside the
region where the element chip 13 is disposed, and the first pad 15
is preferably inserted in the second pad 16. According to this
structure, the first pad 15 and the second pad 16 can be
self-aligned, and the connection between the first pad 15 and the
second pad 16 are ensured even when misalignment occurs.
[0095] The first pad 15 may be formed to have a convex shape, and
the second pad 16 may be formed to have a concave shape.
Alternatively, the first pad 15 may be formed to have a concave
shape, and the second pad 16 may be formed to have a convex shape.
Such a structure is schematically shown in a cross-sectional view
of FIGS. 4(a) and 4(b). The functional elements 12, the
interconnections 17, and the like are omitted. As shown in FIGS.
4(a) and 4(b), when the first pad 15 has a convex shape, a
concavity corresponding to the convex shape is formed in the second
substrate 14. Each second pad 16 is formed so that the conductive
material either partially covers the concavity (shown in FIG. 4(a))
or completely covers the concavity (shown in FIG. 4(b)). According
to this structure, the first pads 15 and the second pads 16 can be
self-aligned, and the connections between the first pads 15 and the
second pads 16 can be ensured even when misalignment occurs.
[0096] An insulating layer of the element chip 13 may be composed
of a low-dielectric-constant material. According to this structure,
the parasitic capacitance in and around the functional elements 12
of the element chip 13 can be reduced, and a decrease in power
consumption and an increase in operating frequency can be expected.
Alternatively, the insulating layer of the element chip 13 may be
air, liquid, or vacuum. Also, according to this structure, the
parasitic capacitance in and around the functional elements 12 of
the element chip 13 can be reduced, and a decrease in power
consumption and an increase in operating frequency can be
expected.
[0097] The first substrate 11, the functional element 12, the
element chip 13, the second substrate 14, the first pads 15, the
second pads 16, and the interconnections 17 may be of any material
and of any structure. Manufacturing these and other elements from
the above and other materials and other structures is still within
the spirit of the present invention.
[0098] (Second Exemplary Embodiment)
[0099] FIGS. 5(a)-5(c) show steps of a manufacturing method
according to a second exemplary embodiment of the present
invention. A semiconductor device is manufactured by forming
functional elements 12 on a first substrate 11, separating an
element chip 13 including at least one functional element 12,
transferring the element chip 13 onto a third substrate 18,
transferring the element chip 13 onto a second substrate 14, and
connecting first pads 15 composed of a conductive material and
disposed on the element chip 13 to second pads 16 composed of a
conductive material and disposed on the second substrate 14. FIG.
5(a) is a schematic showing the step of bonding an
element-chip-forming face of the first substrate 11 and the third
substrate 18. FIG. 5(b) is a schematic showing the step of
separating the element chip 13, transferring the element chip 13
onto the third substrate 18, and bonding the face of the third
substrate 18 provided with the element chip onto the second
substrate 14. FIG. 5(c) is a schematic showing the step of
transferring the element chip 13 onto the second substrate 14 and
removing the third substrate 18. As indicated by reference numeral
19, the connections between the first pads 15 and the second pads
16 are formed after the separating and transferring from the third
substrate to the second substrate.
[0100] FIG. 6 is a schematic showing the structure of the element
chip according to the second embodiment of the present invention.
The functional elements 12 are electrically connected to the
predetermined first pads 15. Only the first pads 15 are formed at
the surface of the element chip 13 remote from the second substrate
14. No other elements or electrode are formed at the surface of the
element chip 13 remote from the second substrate 14. According to
this structure, the area of the first pads 15 can be increased.
Moreover, the functional elements 12 are closer to the second
substrate 14 than the first pads 15. According to this structure,
the functional elements 12 and the first pads 15 are formed by
stacking so that the first pads 15 and the functional elements 12
overlap each other, thereby increasing the area of the first pads
15.
[0101] FIG. 7 is a schematic showing the structure of the second
substrate according to the second exemplary embodiment of the
present invention. The schematic is a perspective view, and
interconnections, contact holes, via plugs, and the like are
partially omitted from FIG. 7. Not only the second pads 16 but also
interconnections 17 for connection with the predetermined second
pads 16 are formed on the second substrate 14. The second pads 16
are also provided around the positions on the second substrate 14
corresponding to the first pads 15 on the element chip 13.
[0102] It is effective to form on the first pads 15 on the face of
the element chip 13 remote from the second substrate 14 in order to
increase the area of the first pads 15 even in a semiconductor
element manufactured by forming the functional elements 12 on the
first substrate 11, separating the element chip 13 including at
least one functional element 12, transferring the element chip 13
on the second substrate 14, and connecting the first pads 15
composed of a conductive material and disposed on the element chip
13 to the second pads 16 composed of a conductive material and
disposed on the second substrate 14. At this time, the functional
elements 12 are closer to the second substrate 14 then the first
pads 15. In this manner, the functional elements 12 and the first
pads 15 can be formed by stacking, and the functional elements 12
and the first pads 15 overlap each other, thereby increasing the
area of the first pads 15.
[0103] In order to connect the first pads 15 to the second pads 16,
connecting leads 19 shown in FIG. 5(c) may be made by a liquid
metal application process using inkjet. Alternatively, a
wire-bonding process may be employed.
[0104] Each first pad 15 may protrude from an end face of the
element chip 13 outwardly parallel to the plane of the first
substrate 11, and a shape corresponding to the first pad 15 may be
formed in the second substrate 14. In such a case, the first
substrate 14 is also arranged to have a protruding portion at the
part corresponding to the protruding first pad 15 so as to support
and reinforce the protruding first pad 15. The second pad 16 having
the shape corresponding to the shape of the first pad 15 is
preferably positioned outside the region where the element chip 13
is disposed, and the first pad 15 is preferably inserted in the
second pad 16. According to this structure, the first pad 15 and
the second pad 16 can be self-aligned, and the connection between
the first pad 15 and the second pad 16 are ensured even when
misalignment occurs. An insulating layer of the element chip 13 may
be composed of a low-dielectric-constant material. According to
this structure, the parasitic capacitance in and around the
functional elements 12 of the element chip 13 can be reduced, and a
decrease in power consumption and an increase in operating
frequency can be expected. Alternatively, the insulating layer of
the element chip 13 may be air, liquid, or vacuum. According to
this structure also, the parasitic capacitance in and around the
functional elements 12 of the element chip 13 can be reduced, and a
decrease in power consumption and an increase in operating
frequency can be expected.
[0105] The first substrate 11, the functional element 12, the
element chip 13, the second substrate 14, the first pads 15, the
second pads 16, the interconnections 17, the third substrate 18,
and the connecting leads 19 may be of any material and of any
structure. Manufacturing these and other elements from the above
and other materials and in other structures is still within the
spirit of the present invention.
[0106] (Third Exemplary Embodiment)
[0107] FIGS. 8(a) and 8(b) are schematics showing steps of a
manufacturing method according to a third exemplary embodiment of
the present invention. A semiconductor device is manufactured by
forming functional elements 12 on a first substrate 11, separating
an element chip 13 including at least one functional element 12,
transferring the element chip 13 onto a second substrate 14, and
connecting first pads 15 composed of a conductive material and
disposed on the element chip 13 to second pads 16 composed of a
conductive material and disposed on the second substrate 14. FIG.
8(a) is a schematic showing the step of bonding the
element-chip-forming face of the first substrate 11 onto the second
substrate 14. FIG. 8(b) is a schematic showing the step of
separating the element chip 13, transferring the element chip 13
onto the second substrate 14, and removing the first substrate 11.
The connections between the first pads 15 and the second pads 16
may be made either before or after the separating and transferring.
The connections between the first pads 15 disposed remote from the
second substrate 14 and the second pads 16 are formed after the
separating and transferring from the first substrate to the second
substrate.
[0108] FIGS. 9(a) and 9(b) are schematics showing the structure of
the element chip according to the third exemplary embodiment of the
present invention. FIG. 9(a) is a bird's-eye view viewed from the
side remote from the second substrate 14, and FIG. 9(b) is a
bird's-eye view viewed from the second-substrate-14-side. The
functional elements 12 are electrically connected to the
predetermined first pads 15. The first pads 15 are formed on the
second-element-14-side surface of the element chip 13 and the
surface of the element chip 13 remote from the second substrate 14.
According to this structure, the area of the first pads 15 can be
further increased.
[0109] FIG. 10 is a schematic showing the structure of the second
substrate according to the third exemplary embodiment of the
present invention. The schematic is a perspective view, and
connections, contact holes, via plugs and the like are partially
omitted. Not only the second pads 16 but also the interconnections
17 for connection with the predetermined second pads are formed on
the second substrate 14. The second pads 16 are formed on the
second substrate 14 at and around positions corresponding to the
positions of the first pads 15.
[0110] It is effective to form the first pads on the
second-element-14-side surface of the element chip 13 and the
surface of the element chip 13 remote from the second substrate 14
in order to further increase the area of the first pads 15 even in
a semiconductor element manufactured by forming the functional
elements 12 on the first substrate 11, separating the element chip
13 including at least one functional element 12, transferring the
element chip on the third substrate 18, transferring the element
chip 13 on the second substrate 14, and connecting the first pads
15 composed of a conductive material and disposed on the element
chip 13 to the second pads 16 composed of a conductive material and
disposed on the second substrate 14.
[0111] To provide connections between the first pads 15 at the
second-substrate-2-side and the second pads 16, the first pads 15
and the second pads 16 may be made of a low-melting-point material,
such as solder, indium, lead, or the like. In this manner, the
first pads 15 and can be welded to the second pads 16 by applying a
suitably high temperature corresponding to the melting temperature
of each low-melting-point material for a predetermined period of
time after the transfer of the separated element chip 13 onto the
second substrate 14, thereby making connections therebetween.
Alternatively, a liquid metal application process using inkjet may
be employed. Alternatively, a wire bonding method, an anisotropic
conductive material, or an anisotropic conductive film may be
used.
[0112] In order to connect the first pads 15 remote from the second
substrate 14 to the second pads 16, connecting leads 19 shown in
FIG. 8(b) may be formed by a liquid metal application process using
inkjet. Alternatively, a wire-bonding process may be employed.
[0113] Each first pad 15 may protrude from an end face of the
element chip 13 outwardly parallel to the plane of the first
substrate 11, and a shape corresponding to the first pad 15 may be
formed in the second substrate 14. In such a case, the first
substrate 14 is also arranged to have protruding portion at the
part corresponding to the protruding first pad 15 so as to support
and reinforce the protruding first pad 15. The second pad 16 having
the shape corresponding to the shape of the first pad 15 is
preferably positioned outside the region where the element chip 13
is disposed, and the first pad 15 is preferably inserted in the
second pad 16. According to this structure, the first pad 15 and
the second pad 16 can be self-aligned, and the connection between
the first pad 15 and the second pad 16 are ensured even when
misalignment occurs.
[0114] The first pad 15 may be formed to have a convex shape, and
the second pad 16 may be formed to have a concave shape.
Alternatively, the first pad 15 may be formed to have a concave
shape, and the second pad 16 may be formed to have a convex shape.
For example, when the first pads 15 are formed to have a convex
shape, concavities corresponding to the convex shape are formed in
the second substrate 14. Each second pad 16 is formed so that the
conductive material either partially covers the concavity (refer to
FIG. 4(a)) or completely covers the concavity (refer to FIG. 4(b)).
According to this structure, the first pads 15 and the second pads
16 can be self-aligned, and the connections between the first pads
15 and the second pads 16 can be ensured even when misalignment
occurs.
[0115] An insulating layer of the element chip 13 may be composed
of a low-dielectric-constant material. According to this structure,
the parasitic capacitance in and around the functional elements 12
of the element chip 13 can be reduced, and a decrease in power
consumption and an increase in operating frequency can be expected.
Alternatively, the insulating layer of the element chip 13 may be
air, liquid, or vacuum. Also, according to this structure, the
parasitic capacitance in and around the functional elements 12 of
the element chip 13 can be reduced, and a decrease in power
consumption and an increase in operating frequency can be
expected.
[0116] The first substrate 11, the functional element 12, the
element chip 13, the second substrate 14, the first pads 15, the
second pads 16, the interconnections 17, and the connecting leads
19 may be of any material and of any structure. Manufacturing these
and other elements from the above and other materials and other
structures is still within the spirit of the present invention.
[0117] (Fourth Exemplary Embodiment)
[0118] FIG. 11 is a schematic showing the structure of an element
chip according to a fourth exemplary embodiment of the present
invention. The overall manufacturing method and the structure of
the second substrate are the same as those of the first to third
exemplary embodiments. The peripheral length L and the area S of
the element chip 13 satisfies the relationship:
L>2.pi..sup.1/2S.sup.1/2
[0119] Moreover, the following relationship is satisfied:
L>4S.sup.1/2. In particular, L=36, and S=45. According to this
arrangement, wide first pads 15 can be formed by increasing the
peripheral length of the element chip 13. Since the area of the
element chip 13 does not increase, the same advantage of decreasing
the manufacturing cost can still be achieved. Although the element
chip 13 of this exemplary embodiment has an oblong shape, any other
shape, such as a letter-L shape, a letter-U shape, a ring shape, an
arc shape, or the like may be employed as long as the two
relationships described above are satisfied. Manufacturing these
elements into other shapes is still within the spirit of the
present invention.
[0120] (Exemplary Method of Separating and Transferring)
[0121] FIGS. 12(a)-12(c) are schematics showing an exemplary method
of separating and transferring according to the present invention.
The description below is an example of separating and transferring
according to the present invention (Japanese Patent Application
Nos. 2001-282423 and 2001-282424; T. Shimoda, et al., Techn. Dig.
IEDM 1999, 289; S. Utsunomiya, et al., Dig. Tech. Pap. SID 2000,
916; T. Shimoda, Proc. Asia Display/IDW '01, 327; and S.
Utsunomiya, et al., Proc. Asia Display/IDW '01, 339). First, an
amorphous silicon film 22 is formed on a first substrate 21,
composed of quartz or glass, by plasma-enhanced chemical vapor
deposition (PECVD) using SiH.sub.4 or by low-pressure chemical
vapor deposition (LPCVD) using Si.sub.2H.sub.6. Functional elements
23 are formed on the amorphous silicon film 22. First pads 24 are
formed as the topmost layer (FIG. 12(a)). This structure is flipped
upside-down and bonded onto a second substrate 25. Only an element
chip 27, which is the element chip targeted for separation and
transfer, is irradiated with laser 26 through the first substrate
21, which is composed of quartz or glass and is thus transparent
(FIG. 12(b)). Only the portion of the amorphous silicon film 22
irradiated with the laser 26 separated by ablation, and the an
element chip 27 is transferred onto the second substrate 25 (FIG.
12(c)). The separation and transfer of the element chip 27 is
performed by irradiation of the laser 26. In this manner, the
separation and transfer of the element chip 27 can be reliably
performed.
[0122] (Exemplary Method of Making Thin-Film Transistors)
[0123] FIGS. 13(a)-13(c) are schematics showing a method of
manufacturing a thin-film transistor according to the present
invention. A thin-film transistor is an exemplary of a functional
element of the present invention, and the method of making the
thin-film transistor is described. A laser-crystallized
polycrystalline thin-film transistor is described below as an
example. First, an amorphous silicon film is formed on a first
substrate 31 composed of quartz or glass by PECVD using SiH.sub.4
or by LPCVD using Si.sub.2H.sub.6. Irradiation with laser 33
crystallizes the amorphous silicon film, thereby producing a
polycrystalline silicon film 32 (FIG. 13(a)). After patterning the
polycrystalline silicon film 32, a gate insulating film 34 is
deposited, and gate electrodes 35 are formed and patterned (FIG.
13(b)). An impurity such as phosphorus, boron, or the like is
implanted into the polycrystalline silicon film 32 in a
self-aligning manner using the gate electrodes 35, and is activated
to make source/drain regions 36 of a CMOS structure. An interlayer
insulating film 37 is then deposited, contact holes are formed, and
source/drain electrodes 38 are formed and patterned (FIG. 13(c)).
This functional element is a thin-film transistor (as described in
claim 26). In this manner, a high-performance thin-film transistor,
which has conventionally required an advanced, complicated
manufacturing process, can include larger or wider first pads.
[0124] (Exemplary Method of Making Organic Electroluminescent
Elements)
[0125] FIGS. 14(a) and 14(b) are schematics showing a method of
making an organic electroluminescent element according to the
present invention. An organic electroluminescent element is an
example of the functional element, and the manufacturing thereof is
explained. A transparent electrode 42 is first deposited on a first
substrate 41 composed of quartz or glass. A contact layer 43 is
deposited, and an opening is formed in a region designed to emit
light. A bank 44 is deposited using polyimides or acryls, and an
opening is formed in the region designed to emit light (FIG.
14(a)). Next, the wettability of the substrate surface is adjusted
by plasma processing using an oxygen plasma, a CF.sub.4 plasma, or
the like. A hole injection layer 45 and a luminescent layer 46 are
formed by a liquid-phase process, such as spin-coating, squeegee
application, or an inkjet process (T. Shimoda, S. Seki, et al.,
Dig. SID '99, 376; and S. Kanbe, et al., Proc. Euro Display '99
Late-News Papers, 85), or by a vacuum-process such as sputtering or
vapor deposition. In order to reduce the work function, a cathode
47 including an alkali metal is deposited, and sealing is provided
by a sealant 48 to complete the process (FIG. 14(b)). This
functional element is an organic electroluminescent element. In
this manner, a high-performance organic electroluminescent element,
which has conventionally required an advanced, complicated
manufacturing process, can include larger or wider first pads.
[0126] (Fifth Exemplary Embodiment)
[0127] FIG. 15 is a schematic showing an electrooptic apparatus
according to a fifth exemplary embodiment of the present invention.
Element chips 52 are arranged and interconnections 53 are formed on
a display region 51. The interconnections 53 are connected to
driving circuits 55 via extraction lines 54. This electrooptic
apparatus uses the semiconductor devices. Since ratio of the area
of the interconnections and supporting members relative to that of
the functional element is generally large in an electrooptic
apparatus, the effect of cost reduction resulting from preparing
the interconnections and supporting members separately and
arranging functional element only at the required positions is
large.
[0128] FIGS. 16(a) and 16(b) are schematics showing a manufacturing
method according to the fifth exemplary embodiment of the present
invention. First, a semiconductor device is formed in the same
manner as that of the first exemplary embodiment (FIG. 16(a)).
Subsequently, the organic electroluminescent element is made (FIG.
16(b)).
[0129] The driving circuits 55 may be formed on the same substrate
as that including the display region by a technique, such as the
above-described separation and transfer, or a technique described
above of making a thin-film transistor. Although an organic
electroluminescent display apparatus is illustrated in this
exemplary embodiment, the electrooptic apparatus may be of other
type, such as liquid crystal display apparatus or an
electrophoresis display device.
[0130] FIG. 17 is a schematic circuit configuration of a pixel
region of an active-matrix electrooptic apparatus 10. Each pixel
includes a luminescent layer OLED that can emit light by an
electroluminescent effect, a hold capacitor C to store electric
current for driving the luminescent layer OLED, and thin-film
transistors T1 and T2. Selection signal lines Vsel extend from a
scanline driver 20 to each of the pixels. Signal lines Vsig and
power lines Vdd extend from a data line driver 30 to each of the
pixels. By controlling the selection signal lines Vsel and the
signal lines Vsig, the electric current to each of the pixels is
programmed, and light emission from the luminescent layers OLED is
controlled.
[0131] (Example of Electronic Apparatus)
[0132] Examples of electronic apparatuses to which the
semiconductor devices described above are incorporated are depicted
in FIGS. 18(a)-18(f). FIG. 18(a) illustrates an application to a
cellular phone. A cellular phone 230 includes an antenna unit 231,
an audio output unit 232, an audio input unit 233, an operation
unit 234, and the electrooptic apparatus 10 including semiconductor
devices of the present invention. The semiconductor devices of the
present invention can be used in the display section of the
cellular phone 230. FIG. 18(b) illustrates an application to a
video camera. A video camera 240 includes an image reception unit
241, an operation unit 242, an audio input unit 243, and the
electrooptic apparatus 10 including semiconductor devices of the
present invention. The semiconductor devices of the present
invention can be used in a finder or in a display section. FIG.
18(c) illustrates an application to a portable personal computer. A
computer 250 includes a camera unit 251, an operation unit 252, and
the electrooptic apparatus 10 includes the semiconductor devices of
the present invention. The semiconductor devices of the present
invention can be used in a display section.
[0133] FIG. 18(d) illustrates an application to a head-mounted
display. A head-mounted display 260 includes a band 261, an
optical-system compartment 262, and the electrooptic apparatus 10
including the semiconductor devices of the present invention.
Accordingly, the semiconductor devices of the present invention can
be used as the image display source. FIG. 18(e) illustrates an
application to a rear projector. A projector 270 includes a housing
271, a light source 272, a composite optical system 273, a mirror
274, a mirror 275, a screen 276, and the electrooptic apparatus 10
including semiconductor devices of the present invention.
Accordingly, the semiconductor devices of the present invention can
be used as the image display source. FIG. 18(f) illustrates an
application to a front projector. A projector 280 has a housing 282
that includes an optical system 281 and the electrooptic apparatus
10 including the semiconductor devices of the present invention.
Images are displayed in a screen 283. Accordingly, the
semiconductor devices of the present invention can be used as the
image display source.
[0134] The semiconductor devices of the present invention can be
applied to any electronic apparatuses using active matrix
electrooptic apparatuses other than those described above. For
example, they can be applied to fax machine with a display
function, a finder of a digital camera, a portable television set,
a DSP device, a PDA, an electronic databook, an electric bulletin
board, an advertisement display, or the like.
[0135] [Advantages]
[0136] According to the present invention, in a semiconductor
device manufactured by forming functional elements on a first
substrate, separating an element chip including at least one
functional element, transferring the element chip to a second
substrate, and connecting first pads composed of a conductive
material and disposed on the element chip to second pads composed
of a conductive material and disposed on the second substrate, or
in a semiconductor device manufactured by forming functional
elements on a first substrate, separating an element chip
comprising at least one functional element, transferring the
element chip to a third substrate, transferring the element chip to
a second substrate, and connecting first pads composed of a
conductive material and disposed on the element chip to second pads
composed of a conductive material and disposed on the second
substrate, the area and the width of each first pad can be
increased.
* * * * *